[release-notes] Convert Circuit Design beat
John J. McDonough
jjmcd at fedoraproject.org
Thu Mar 24 17:06:20 UTC 2011
commit 18ca4b8ba96b39d6cdef22efabf070d790a2350d
Author: John J. McDonough <jjmcd at fedoraproject.org>
Date: Thu Mar 24 13:06:12 2011 -0400
Convert Circuit Design beat
en-US/Circuit_Design.xml | 154 +++++++++++++++++++++++++++++++++++++++++++++-
1 files changed, 153 insertions(+), 1 deletions(-)
---
diff --git a/en-US/Circuit_Design.xml b/en-US/Circuit_Design.xml
index b78d98c..3cf79c1 100644
--- a/en-US/Circuit_Design.xml
+++ b/en-US/Circuit_Design.xml
@@ -7,6 +7,158 @@
<section id="sect-RelNotes-Circuit_Design">
<title>Circuit Design</title>
- <para> </para>
+
+ <para>
+ This section includes the set of applications for schematic
+ capture, circuit simulation and PCB layout that have had
+ major changes with Fedora 15.
+ </para>
+
+ <section>
+ <title>gtkwave</title>
+ <para>
+ <package>gtkwave</package> is an analysis tool used to
+ perform debugging on Verilog or VHDL simulation models.
+ </para>
+ <para>
+ With Fedora 15 <package>gtkwave</package> has been
+ upgraded to 3.3.20, with improvements and new features
+ respect to the release 3.3.10 present in Fedora 14. Among
+ these there are: additions of new tcl functions to enhance
+ Tcl access; added support for process and transaction
+ filters in MinGW and support for Open New Window to MinGW;
+ in order to aid in indexing, detection for Verilog
+ XL-style VCD identifiers in all vcd loaders in
+ gtkwave. Updates to manual supporting GTKWave 3.3.20. For
+ all details and fixes, refer to the CHANGELOG.TXT in the
+ package doc directory.
+ </para>
+ <para>
+ <ulink
+ url="http://gtkwave.sourceforge.net/">http://gtkwave.sourceforge.net/</ulink>
+ </para>
+ </section>
+
+ <section>
+ <title>iverolg</title>
+ <para>
+ Icarus Verilog or <package>iverilog</package> is a Verilog
+ compiler that generates a variety of engineering formats,
+ including simulation. It strives to be true to the IEEE-1364
+ standard.
+ </para>
+ <para>
+ In Fedora 15 <package>iverilog</package> has been built
+ against version 0,9.3. As declared in upstream, within the
+ v0.9 series major changes are kept to a minimum, allowing
+ some new features only if they do not risk the stability of
+ the branch or of Verilog programs that use this
+ compiler. Some changes of this release are related to
+ <emphasis>Language Coverage</emphasis> with remotion of
+ obsolete VAMS $log function; addition of a warning that
+ synthesis is not currently being maintained when -S is used;
+ named blocks now keep their scope information; and it has
+ been added the correct version information to the data
+ structure returned by the PLI vpi_get_vlog_info()
+ call. Regarding the <emphasis>Language Extensions</emphasis>
+ it has been added FST dumper; +timescale to the command
+ file; ability to automatically perform bit <-> real
+ conversion for module inputs/outputs where this makes sense;
+ optional warnings for out of range bit/part selects; and
+ $info(), $warning() and $error() as aliases for
+ $display.
+ </para>
+ <para>
+ For a complete list of these features, with the general bug
+ fixes and some of the things that still don't work, please
+ refer to:
+ </para>
+ <para>
+ <ulink
+ url="http://iverilog.wikia.com/wiki/Release_Notes_Icarus_Verilog_0_9_3">http://iverilog.wikia.com/wiki/Release_Notes_Icarus_Verilog_0_9_3</ulink>
+ </para>
+ </section>
+
+ <section>
+ <title>mot-adms</title>
+ <para>
+ <package>mot-adms</package> is a code generator that
+ converts electrical compact device models specified in
+ high-level description language into ready-to-compile c code
+ for the API of spice simulators. Based on transformations
+ specified in xml language adms transforms Verilog-AMS code
+ into other target languages.
+ </para>
+ <para>
+ <ulink
+ url="http://mot-adms.sourceforge.net/">http://mot-adms.sourceforge.net/</ulink>
+ </para>
+ </section>
+
+ <section>
+ <title>ngspice</title>
+ <para>
+ <package>ngspice</package> is a general-purpose circuit
+ simulator program. It implements three classes of analysis:
+ Nonlinear DC analyses, Nonlinear Transient analyses and
+ Linear AC analyses.
+ </para>
+ <para>
+ With F15, <package>ngspice</package> has been upgraded to
+ release 22. In this update, more features have been added to
+ <package>ngspice</package>, improving its compatibility
+ through an extensive code cleanup that considerably reduces
+ compiler warnings; improving its speed with the availabilty
+ of OpenMP multicore support for BSIM3, BSIM4, and BSIMSOI4
+ that speeds up transistor loaded simulation by a factor of
+ two; and improving its stability. In particular, the new
+ feauture include: reinstate expansion in interactive
+ interpreter; .TITLE line added; update to 'spectrum' script;
+ par('expression') in .four, .plot, .print, .meas, .save
+ commands; command 'option' for use in spinit, .spiceinit and
+ in scripts; adms procedure updated; new random number
+ generator, new random functions sunif() and sgauss(), and
+ scripts for Monte Carlo simulations, new plot vectors allv,
+ alli, ally. Manuals and documents follow the updates.</para>
+ <para>
+ <ulink url="http://ngspice.sourceforge.net">http://ngspice.sourceforge.net</ulink>
+ </para>
+ </section>
+
+ <section>
+ <title>pcb</title>
+ <para>
+ An interactive printed circuit board editor.
+ </para>
+ <para>
+ In F15, <package>pcb</package> has been upgraded to release
+ 20100929, with many bug fixes and new features. Among these
+ are to cite: direct importing of schematics during runtime;
+ places accept measurements' unit; the polygon hole tool;
+ DBUS enabled by default (when possible); action scripts run
+ by the CLI exporters; no more required the (,,) syntax of
+ CLI actions in GUI; and tool-tips pop-up on elements, pins
+ and nets; new GCode exporter and updated reference card.
+ </para>
+ <para>
+ <ulink
+ url="http://pcb.sourceforge.net">http://pcb.sourceforge.net</ulink>
+ </para>
+ </section>
+
+ <section>
+ <title>rcrpanel</title>
+ <para>
+ <package>rcrpanel</package> is a command line application
+ that takes a text description of a panel and produces a
+ PostScript rendering of the panel. It is especially handy
+ for things like calibrated dial faces that can be tedious to
+ produce with a traditional graphics application. rcrpanel
+ is described in detail in the <ulink
+ url="http://docs.fedoraproject.org/en-US/Fedora/14/html/Amateur_Radio_Guide/others-rcrpanel.html|">
+ Fedora Amateur Radio Guide</ulink>.
+ </para>
+ </section>
+
</section>
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