[ghc/f18] backport two llvmGen patches from 7.4.2; remove HS*.o lib files
Jens Petersen
petersen at fedoraproject.org
Mon Oct 1 02:15:51 UTC 2012
commit 4a2ee5ff3f858d3fb1739f0e5048e559c62092e8
Author: Jens Petersen <petersen at redhat.com>
Date: Mon Oct 1 11:15:24 2012 +0900
backport two llvmGen patches from 7.4.2; remove HS*.o lib files
ghc-llvmGen-fence-instruction.patch | 131 +++++++++++++++++++++++++++++++
ghc-llvmGen-improve-write-barrier.patch | 111 ++++++++++++++++++++++++++
ghc.spec | 14 +++-
3 files changed, 255 insertions(+), 1 deletions(-)
---
diff --git a/ghc-llvmGen-fence-instruction.patch b/ghc-llvmGen-fence-instruction.patch
new file mode 100644
index 0000000..5417295
--- /dev/null
+++ b/ghc-llvmGen-fence-instruction.patch
@@ -0,0 +1,131 @@
+commit 102a5380574ed22eca32f8e63cae22f013153f0b
+Author: Ben Gamari <ben at panda.(none)>
+Date: Tue Jan 24 19:56:35 2012 -0500
+
+ llvmGen: Use new fence instruction
+
+ Signed-off-by: David Terei <davidterei at gmail.com>
+
+ MERGED from commit 766da942097613fed56417e3e149997812f83105
+
+ Modified compiler/llvmGen/Llvm.hs
+diff --git a/compiler/llvmGen/Llvm.hs b/compiler/llvmGen/Llvm.hs
+index aec492e..d516dab 100644
+--- a/compiler/llvmGen/Llvm.hs
++++ b/compiler/llvmGen/Llvm.hs
+@@ -20,6 +20,9 @@ module Llvm (
+ LlvmBlocks, LlvmBlock(..), LlvmBlockId,
+ LlvmParamAttr(..), LlvmParameter,
+
++ -- * Fence synchronization
++ LlvmSyncOrdering(..),
++
+ -- * Call Handling
+ LlvmCallConvention(..), LlvmCallType(..), LlvmParameterListType(..),
+ LlvmLinkageType(..), LlvmFuncAttr(..),
+ Modified compiler/llvmGen/Llvm/AbsSyn.hs
+diff --git a/compiler/llvmGen/Llvm/AbsSyn.hs b/compiler/llvmGen/Llvm/AbsSyn.hs
+index 93bc62c..468b7e4 100644
+--- a/compiler/llvmGen/Llvm/AbsSyn.hs
++++ b/compiler/llvmGen/Llvm/AbsSyn.hs
+@@ -61,6 +61,11 @@ data LlvmFunction = LlvmFunction {
+
+ type LlvmFunctions = [LlvmFunction]
+
++data LlvmSyncOrdering = SyncAcquire
++ | SyncRelease
++ | SyncAcqRel
++ | SyncSeqCst
++ deriving (Show, Eq)
+
+ -- | Llvm Statements
+ data LlvmStatement
+@@ -72,6 +77,11 @@ data LlvmStatement
+ = Assignment LlvmVar LlvmExpression
+
+ {- |
++ Memory fence operation
++ -}
++ | Fence Bool LlvmSyncOrdering
++
++ {- |
+ Always branch to the target label
+ -}
+ | Branch LlvmVar
+ Modified compiler/llvmGen/Llvm/PpLlvm.hs
+diff --git a/compiler/llvmGen/Llvm/PpLlvm.hs b/compiler/llvmGen/Llvm/PpLlvm.hs
+index 217d02d..f3c8342 100644
+--- a/compiler/llvmGen/Llvm/PpLlvm.hs
++++ b/compiler/llvmGen/Llvm/PpLlvm.hs
+@@ -166,6 +166,7 @@ ppLlvmStatement :: LlvmStatement -> Doc
+ ppLlvmStatement stmt
+ = case stmt of
+ Assignment dst expr -> ppAssignment dst (ppLlvmExpression expr)
++ Fence st ord -> ppFence st ord
+ Branch target -> ppBranch target
+ BranchIf cond ifT ifF -> ppBranchIf cond ifT ifF
+ Comment comments -> ppLlvmComments comments
+@@ -254,6 +255,17 @@ ppCmpOp op left right =
+ ppAssignment :: LlvmVar -> Doc -> Doc
+ ppAssignment var expr = (text $ getName var) <+> equals <+> expr
+
++ppFence :: Bool -> LlvmSyncOrdering -> Doc
++ppFence st ord =
++ let singleThread = case st of True -> text "singlethread"
++ False -> empty
++ in text "fence" <+> singleThread <+> ppSyncOrdering ord
++
++ppSyncOrdering :: LlvmSyncOrdering -> Doc
++ppSyncOrdering SyncAcquire = text "acquire"
++ppSyncOrdering SyncRelease = text "release"
++ppSyncOrdering SyncAcqRel = text "acq_rel"
++ppSyncOrdering SyncSeqCst = text "seq_cst"
+
+ ppLoad :: LlvmVar -> Doc
+ ppLoad var = text "load" <+> texts var
+ Modified compiler/llvmGen/LlvmCodeGen/CodeGen.hs
+diff --git a/compiler/llvmGen/LlvmCodeGen/CodeGen.hs b/compiler/llvmGen/LlvmCodeGen/CodeGen.hs
+index d8507ab..c505cc0 100644
+--- a/compiler/llvmGen/LlvmCodeGen/CodeGen.hs
++++ b/compiler/llvmGen/LlvmCodeGen/CodeGen.hs
+@@ -136,16 +136,13 @@ stmtToInstrs env stmt = case stmt of
+ -> return (env, unitOL $ Return Nothing, [])
+
+
+--- | Foreign Calls
+-genCall :: LlvmEnv -> CmmCallTarget -> [HintedCmmFormal] -> [HintedCmmActual]
+- -> CmmReturnInfo -> UniqSM StmtData
++barrier :: LlvmEnv -> UniqSM StmtData
++barrier env = do
++ let s = Fence False SyncAcqRel
++ return (env, unitOL s, [])
+
+--- Write barrier needs to be handled specially as it is implemented as an LLVM
+--- intrinsic function.
+-genCall env (CmmPrim MO_WriteBarrier) _ _ _
+- | platformArch (getLlvmPlatform env) `elem` [ArchX86, ArchX86_64, ArchSPARC]
+- = return (env, nilOL, [])
+- | otherwise = do
++oldBarrier :: LlvmEnv -> UniqSM StmtData
++oldBarrier env = do
+ let fname = fsLit "llvm.memory.barrier"
+ let funSig = LlvmFunctionDecl fname ExternallyVisible CC_Ccc LMVoid
+ FixedArgs (tysToParams [i1, i1, i1, i1, i1]) llvmFunAlign
+@@ -166,6 +163,17 @@ genCall env (CmmPrim MO_WriteBarrier) _ _ _
+ lmTrue :: LlvmVar
+ lmTrue = mkIntLit i1 (-1)
+
++-- | Foreign Calls
++genCall :: LlvmEnv -> CmmCallTarget -> [HintedCmmFormal] -> [HintedCmmActual]
++ -> CmmReturnInfo -> UniqSM StmtData
++
++-- Write barrier needs to be handled specially as it is implemented as an LLVM
++-- intrinsic function.
++genCall env (CmmPrim MO_WriteBarrier) _ _ _
++ | platformArch (getLlvmPlatform env) `elem` [ArchX86, ArchX86_64, ArchSPARC]
++ = return (env, nilOL, [])
++ | otherwise = barrier env
++
+ -- Handle popcnt function specifically since GHC only really has i32 and i64
+ -- types and things like Word8 are backed by an i32 and just present a logical
+ -- i8 range. So we must handle conversions from i32 to i8 explicitly as LLVM
diff --git a/ghc-llvmGen-improve-write-barrier.patch b/ghc-llvmGen-improve-write-barrier.patch
new file mode 100644
index 0000000..a90d50e
--- /dev/null
+++ b/ghc-llvmGen-improve-write-barrier.patch
@@ -0,0 +1,111 @@
+commit 932cdfd52d94cdfb074878e98767d0ff597262b6
+Author: Paolo Capriotti <p.capriotti at gmail.com>
+Date: Mon Mar 26 18:56:14 2012 +0100
+
+ Improve support for LLVM >= 3.0 write barrier. (#5814)
+
+ MERGED from commit d2d5ee16cf21c5b32333ff57ba0a65f89ff7e988
+
+ Modified compiler/llvmGen/Llvm/AbsSyn.hs
+diff --git a/compiler/llvmGen/Llvm/AbsSyn.hs b/compiler/llvmGen/Llvm/AbsSyn.hs
+index 468b7e4..1b50d29 100644
+--- a/compiler/llvmGen/Llvm/AbsSyn.hs
++++ b/compiler/llvmGen/Llvm/AbsSyn.hs
+@@ -59,13 +59,24 @@ data LlvmFunction = LlvmFunction {
+ funcBody :: LlvmBlocks
+ }
+
+-type LlvmFunctions = [LlvmFunction]
+-
+-data LlvmSyncOrdering = SyncAcquire
+- | SyncRelease
+- | SyncAcqRel
+- | SyncSeqCst
+- deriving (Show, Eq)
++type LlvmFunctions = [LlvmFunction]
++
++-- | LLVM ordering types for synchronization purposes. (Introduced in LLVM
++-- 3.0). Please see the LLVM documentation for a better description.
++data LlvmSyncOrdering
++ -- | Some partial order of operations exists.
++ = SyncUnord
++ -- | A single total order for operations at a single address exists.
++ | SyncMonotonic
++ -- | Acquire synchronization operation.
++ | SyncAcquire
++ -- | Release synchronization operation.
++ | SyncRelease
++ -- | Acquire + Release synchronization operation.
++ | SyncAcqRel
++ -- | Full sequential Consistency operation.
++ | SyncSeqCst
++ deriving (Show, Eq)
+
+ -- | Llvm Statements
+ data LlvmStatement
+ Modified compiler/llvmGen/Llvm/PpLlvm.hs
+diff --git a/compiler/llvmGen/Llvm/PpLlvm.hs b/compiler/llvmGen/Llvm/PpLlvm.hs
+index f3c8342..0a750c3 100644
+--- a/compiler/llvmGen/Llvm/PpLlvm.hs
++++ b/compiler/llvmGen/Llvm/PpLlvm.hs
+@@ -166,7 +166,7 @@ ppLlvmStatement :: LlvmStatement -> Doc
+ ppLlvmStatement stmt
+ = case stmt of
+ Assignment dst expr -> ppAssignment dst (ppLlvmExpression expr)
+- Fence st ord -> ppFence st ord
++ Fence st ord -> ppFence st ord
+ Branch target -> ppBranch target
+ BranchIf cond ifT ifF -> ppBranchIf cond ifT ifF
+ Comment comments -> ppLlvmComments comments
+@@ -258,14 +258,16 @@ ppAssignment var expr = (text $ getName var) <+> equals <+> expr
+ ppFence :: Bool -> LlvmSyncOrdering -> Doc
+ ppFence st ord =
+ let singleThread = case st of True -> text "singlethread"
+- False -> empty
++ False -> empty
+ in text "fence" <+> singleThread <+> ppSyncOrdering ord
+
+ ppSyncOrdering :: LlvmSyncOrdering -> Doc
+-ppSyncOrdering SyncAcquire = text "acquire"
+-ppSyncOrdering SyncRelease = text "release"
+-ppSyncOrdering SyncAcqRel = text "acq_rel"
+-ppSyncOrdering SyncSeqCst = text "seq_cst"
++ppSyncOrdering SyncUnord = text "unordered"
++ppSyncOrdering SyncMonotonic = text "monotonic"
++ppSyncOrdering SyncAcquire = text "acquire"
++ppSyncOrdering SyncRelease = text "release"
++ppSyncOrdering SyncAcqRel = text "acq_rel"
++ppSyncOrdering SyncSeqCst = text "seq_cst"
+
+ ppLoad :: LlvmVar -> Doc
+ ppLoad var = text "load" <+> texts var
+ Modified compiler/llvmGen/LlvmCodeGen/CodeGen.hs
+diff --git a/compiler/llvmGen/LlvmCodeGen/CodeGen.hs b/compiler/llvmGen/LlvmCodeGen/CodeGen.hs
+index c505cc0..4a8d37f 100644
+--- a/compiler/llvmGen/LlvmCodeGen/CodeGen.hs
++++ b/compiler/llvmGen/LlvmCodeGen/CodeGen.hs
+@@ -136,11 +136,13 @@ stmtToInstrs env stmt = case stmt of
+ -> return (env, unitOL $ Return Nothing, [])
+
+
++-- | Memory barrier instruction for LLVM >= 3.0
+ barrier :: LlvmEnv -> UniqSM StmtData
+ barrier env = do
+- let s = Fence False SyncAcqRel
++ let s = Fence False SyncSeqCst
+ return (env, unitOL s, [])
+
++-- | Memory barrier instruction for LLVM < 3.0
+ oldBarrier :: LlvmEnv -> UniqSM StmtData
+ oldBarrier env = do
+ let fname = fsLit "llvm.memory.barrier"
+@@ -172,7 +174,8 @@ genCall :: LlvmEnv -> CmmCallTarget -> [HintedCmmFormal] -> [HintedCmmActual]
+ genCall env (CmmPrim MO_WriteBarrier) _ _ _
+ | platformArch (getLlvmPlatform env) `elem` [ArchX86, ArchX86_64, ArchSPARC]
+ = return (env, nilOL, [])
+- | otherwise = barrier env
++ | getLlvmVer env > 29 = barrier env
++ | otherwise = oldBarrier env
+
+ -- Handle popcnt function specifically since GHC only really has i32 and i64
+ -- types and things like Word8 are backed by an i32 and just present a logical
diff --git a/ghc.spec b/ghc.spec
index 6ae21bd..19c45ca 100644
--- a/ghc.spec
+++ b/ghc.spec
@@ -30,7 +30,7 @@ Version: 7.4.1
# - release can only be reset if all library versions get bumped simultaneously
# (eg for a major release)
# - minor release numbers should be incremented monotonically
-Release: 6%{?dist}
+Release: 6.1%{?dist}
Summary: Glasgow Haskell Compiler
# fedora ghc has been bootstrapped on
# %{ix86} x86_64 ppc alpha sparcv9 ppc64 armv7hl armv5tel s390 s390x
@@ -104,6 +104,8 @@ Patch12: fix-ARM-StgCRun-to-not-save-and-restore-r11-fp-regis.patch
# Debian armhf fixes
Patch13: ghc-debian-ARM-VFPv3D16.patch
Patch14: ghc-debian-armhf_llvm_abi.patch
+Patch15: ghc-llvmGen-fence-instruction.patch
+Patch16: ghc-llvmGen-improve-write-barrier.patch
%description
GHC is a state-of-the-art, open source, compiler and interactive environment
@@ -234,6 +236,8 @@ ln -s $(pkg-config --variable=includedir libffi)/*.h rts/dist/build
%patch14 -p1 -b .arm
autoreconf
%endif
+%patch15 -p1 -b .15~
+%patch16 -p1 -b .16~
%build
# http://hackage.haskell.org/trac/ghc/wiki/Platforms
@@ -271,6 +275,9 @@ make -j$RPM_BUILD_NCPUS
%install
make DESTDIR=${RPM_BUILD_ROOT} install
+# this should be done in the buildsys
+find %{buildroot} -type f -name "HS*.o" -delete
+
for i in %{ghc_packages_list}; do
name=$(echo $i | sed -e "s/\(.*\)-.*/\1/")
ver=$(echo $i | sed -e "s/.*-\(.*\)/\1/")
@@ -435,6 +442,11 @@ fi
%files libraries
%changelog
+* Mon Oct 1 2012 Jens Petersen <petersen at redhat.com> - 7.4.1-6.1
+- backport two llvmGen patches from 7.4.2 for fence and better barrier support
+ to fix ARM build with llvm-3.1
+- forcibly remove redundant HS*.o files from ghc libs for now
+
* Thu Jul 19 2012 Fedora Release Engineering <rel-eng at lists.fedoraproject.org> - 7.4.1-6
- Rebuilt for https://fedoraproject.org/wiki/Fedora_18_Mass_Rebuild
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