[ghdl] add missing patch
sailer
sailer at fedoraproject.org
Wed May 1 22:26:36 UTC 2013
commit 3ced926b35acdf92ad04fa9bc7d452045914c938
Author: Thomas Sailer <t.sailer at alumni.ethz.ch>
Date: Thu May 2 00:26:00 2013 +0200
add missing patch
gcc47-texinfo.patch | 256 +++++++++++++++++++++++++++++++++++++++++++++++++++
1 files changed, 256 insertions(+), 0 deletions(-)
---
diff --git a/gcc47-texinfo.patch b/gcc47-texinfo.patch
new file mode 100644
index 0000000..be584c3
--- /dev/null
+++ b/gcc47-texinfo.patch
@@ -0,0 +1,256 @@
+Tested with make info dvi pdf html and checked in as obvious.
+
+Andreas.
+
+ * doc/cppopts.texi: Fix use of @item vs. @itemx inside @table.
+ * doc/extend.texi: Likewise.
+ * doc/generic.texi: Likewise.
+ * doc/invoke.texi: Likewise.
+ * doc/md.texi: Likewise.
+ * doc/sourcebuild.texi: Likewise.
+
+diff --git a/gcc/doc/cppopts.texi b/gcc/doc/cppopts.texi
+index 27b1095..a2eb79d 100644
+--- a/gcc/doc/cppopts.texi
++++ b/gcc/doc/cppopts.texi
+@@ -1,5 +1,5 @@
+ @c Copyright (c) 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008,
+- at c 2010, Free Software Foundation, Inc.
++ at c 2010, 2012, Free Software Foundation, Inc.
+ @c This is part of the CPP and GCC manuals.
+ @c For copying conditions, see the file gcc.texi.
+
+@@ -805,7 +805,7 @@ Replacement: [ ] @{ @} # \ ^ | ~
+ Enable special code to work around file systems which only permit very
+ short file names, such as MS-DOS at .
+
+- at itemx --help
++ at item --help
+ @itemx --target-help
+ @opindex help
+ @opindex target-help
+diff --git a/gcc/doc/extend.texi b/gcc/doc/extend.texi
+index fb1becb..5c4f8fd 100644
+--- a/gcc/doc/extend.texi
++++ b/gcc/doc/extend.texi
+@@ -1251,10 +1251,10 @@ The @code{__flash} qualifier will locate data in the
+ instruction. Pointers to this address space are 16 bits wide.
+
+ @item __flash1
+- at item __flash2
+- at item __flash3
+- at item __flash4
+- at item __flash5
++ at itemx __flash2
++ at itemx __flash3
++ at itemx __flash4
++ at itemx __flash5
+ @cindex @code{__flash1} AVR Named Address Spaces
+ @cindex @code{__flash2} AVR Named Address Spaces
+ @cindex @code{__flash3} AVR Named Address Spaces
+diff --git a/gcc/doc/generic.texi b/gcc/doc/generic.texi
+index c739731..e878811 100644
+--- a/gcc/doc/generic.texi
++++ b/gcc/doc/generic.texi
+@@ -1,4 +1,4 @@
+- at c Copyright (c) 2004, 2005, 2007, 2008, 2010 Free Software Foundation, Inc.
++ at c Copyright (c) 2004, 2005, 2007, 2008, 2010, 2012 Free Software Foundation, Inc.
+ @c Free Software Foundation, Inc.
+ @c This is part of the GCC manual.
+ @c For copying conditions, see the file gcc.texi.
+@@ -1417,13 +1417,13 @@ generate these expressions anyhow, if it can tell that strictness does
+ not matter. The type of the operands and that of the result are
+ always of @code{BOOLEAN_TYPE} or @code{INTEGER_TYPE}.
+
+- at itemx POINTER_PLUS_EXPR
++ at item POINTER_PLUS_EXPR
+ This node represents pointer arithmetic. The first operand is always
+ a pointer/reference type. The second operand is always an unsigned
+ integer type compatible with sizetype. This is the only binary
+ arithmetic operand that can operate on pointer types.
+
+- at itemx PLUS_EXPR
++ at item PLUS_EXPR
+ @itemx MINUS_EXPR
+ @itemx MULT_EXPR
+ These nodes represent various binary arithmetic operations.
+diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
+index afb9f21..15ecaf1 100644
+--- a/gcc/doc/invoke.texi
++++ b/gcc/doc/invoke.texi
+@@ -1617,7 +1617,7 @@ GNU dialect of ISO C99. When ISO C99 is fully implemented in GCC,
+ this will become the default. The name @samp{gnu9x} is deprecated.
+
+ @item gnu11
+- at item gnu1x
++ at itemx gnu1x
+ GNU dialect of ISO C11. Support is incomplete and experimental. The
+ name @samp{gnu1x} is deprecated.
+
+@@ -5310,7 +5310,7 @@ is set by this option.
+ For example, with @option{-fdbg-cnt=dce:10,tail_call:0},
+ @code{dbg_cnt(dce)} returns true only for first 10 invocations.
+
+- at itemx -fenable- at var{kind}- at var{pass}
++ at item -fenable- at var{kind}- at var{pass}
+ @itemx -fdisable- at var{kind}- at var{pass}=@var{range-list}
+ @opindex fdisable-
+ @opindex fenable-
+@@ -5464,11 +5464,11 @@ Dump after duplicating the computed gotos.
+ @option{-fdump-rtl-ce3} enable dumping after the three
+ if conversion passes.
+
+- at itemx -fdump-rtl-cprop_hardreg
++ at item -fdump-rtl-cprop_hardreg
+ @opindex fdump-rtl-cprop_hardreg
+ Dump after hard register copy propagation.
+
+- at itemx -fdump-rtl-csa
++ at item -fdump-rtl-csa
+ @opindex fdump-rtl-csa
+ Dump after combining stack adjustments.
+
+@@ -5479,11 +5479,11 @@ Dump after combining stack adjustments.
+ @option{-fdump-rtl-cse1} and @option{-fdump-rtl-cse2} enable dumping after
+ the two common subexpression elimination passes.
+
+- at itemx -fdump-rtl-dce
++ at item -fdump-rtl-dce
+ @opindex fdump-rtl-dce
+ Dump after the standalone dead code elimination passes.
+
+- at itemx -fdump-rtl-dbr
++ at item -fdump-rtl-dbr
+ @opindex fdump-rtl-dbr
+ Dump after delayed branch scheduling.
+
+@@ -5528,7 +5528,7 @@ Dump after the initialization of the registers.
+ @opindex fdump-rtl-initvals
+ Dump after the computation of the initial value sets.
+
+- at itemx -fdump-rtl-into_cfglayout
++ at item -fdump-rtl-into_cfglayout
+ @opindex fdump-rtl-into_cfglayout
+ Dump after converting to cfglayout mode.
+
+@@ -5558,7 +5558,7 @@ Dump after removing redundant mode switches.
+ @opindex fdump-rtl-rnreg
+ Dump after register renumbering.
+
+- at itemx -fdump-rtl-outof_cfglayout
++ at item -fdump-rtl-outof_cfglayout
+ @opindex fdump-rtl-outof_cfglayout
+ Dump after converting from cfglayout mode.
+
+@@ -10815,10 +10815,10 @@ integer multiply, or integer multiply-and-accumulate.
+ The default is @option{-mfp-mode=caller}
+
+ @item -mnosplit-lohi
++ at itemx -mno-postinc
++ at itemx -mno-postmodify
+ @opindex mnosplit-lohi
+- at item -mno-postinc
+ @opindex mno-postinc
+- at item -mno-postmodify
+ @opindex mno-postmodify
+ Code generation tweaks that disable, respectively, splitting of 32-bit
+ loads, generation of post-increment addresses, and generation of
+@@ -10901,7 +10901,7 @@ statically linked only.
+ Do not assume that unaligned memory references will be handled by the system.
+
+ @item -momit-leaf-frame-pointer
+- at item -mno-omit-leaf-frame-pointer
++ at itemx -mno-omit-leaf-frame-pointer
+ @opindex momit-leaf-frame-pointer
+ @opindex mno-omit-leaf-frame-pointer
+ Omit or keep the frame pointer in leaf functions. The former behaviour is the
+@@ -11739,7 +11739,7 @@ This is the case for devices with at least 16 at tie{}KiB of program
+ memory.
+
+ @item __AVR_HAVE_EIJMP_EICALL__
+- at item __AVR_3_BYTE_PC__
++ at itemx __AVR_3_BYTE_PC__
+ The device has the @code{EIJMP} and @code{EICALL} instructions.
+ This is the case for devices with more than 128 at tie{}KiB of program memory.
+ This also means that the program counter
+@@ -11750,13 +11750,13 @@ The program counter (PC) is 2 at tie{}bytes wide. This is the case for devices
+ with up to 128 at tie{}KiB of program memory.
+
+ @item __AVR_HAVE_8BIT_SP__
+- at item __AVR_HAVE_16BIT_SP__
++ at itemx __AVR_HAVE_16BIT_SP__
+ The stack pointer (SP) register is treated as 8-bit respectively
+ 16-bit register by the compiler.
+ The definition of these macros is affected by @code{-mtiny-stack}.
+
+ @item __AVR_HAVE_SPH__
+- at item __AVR_SP8__
++ at itemx __AVR_SP8__
+ The device has the SPH (high part of stack pointer) special function
+ register or has an 8-bit stack pointer, respectively.
+ The definition of these macros is affected by @code{-mmcu=} and
+@@ -11764,9 +11764,9 @@ in the cases of @code{-mmcu=avr2} and @code{-mmcu=avr25} also
+ by @code{-msp8}.
+
+ @item __AVR_HAVE_RAMPD__
+- at item __AVR_HAVE_RAMPX__
+- at item __AVR_HAVE_RAMPY__
+- at item __AVR_HAVE_RAMPZ__
++ at itemx __AVR_HAVE_RAMPX__
++ at itemx __AVR_HAVE_RAMPY__
++ at itemx __AVR_HAVE_RAMPZ__
+ The device has the @code{RAMPD}, @code{RAMPX}, @code{RAMPY},
+ @code{RAMPZ} special function register, respectively.
+
+@@ -11774,7 +11774,7 @@ The device has the @code{RAMPD}, @code{RAMPX}, @code{RAMPY},
+ This macro reflects the @code{-mno-interrupts} command line option.
+
+ @item __AVR_ERRATA_SKIP__
+- at item __AVR_ERRATA_SKIP_JMP_CALL__
++ at itemx __AVR_ERRATA_SKIP_JMP_CALL__
+ Some AVR devices (AT90S8515, ATmega103) must not skip 32-bit
+ instructions because of a hardware erratum. Skip instructions are
+ @code{SBRS}, @code{SBRC}, @code{SBIS}, @code{SBIC} and @code{CPSE}.
+@@ -18457,7 +18457,7 @@ Mark the @code{MAC} register as call-clobbered, even if
+ @option{-mhitachi} is given.
+
+ @item -mieee
+- at item -mno-ieee
++ at itemx -mno-ieee
+ @opindex mieee
+ @opindex mnoieee
+ Control the IEEE compliance of floating-point comparisons, which affects the
+diff --git a/gcc/doc/md.texi b/gcc/doc/md.texi
+index dfbdc4c..bca0d8f 100644
+--- a/gcc/doc/md.texi
++++ b/gcc/doc/md.texi
+@@ -4483,8 +4483,8 @@ means of constraints requiring operands 1 and 0 to be the same location.
+ @cindex @code{ior at var{m}3} instruction pattern
+ @cindex @code{xor at var{m}3} instruction pattern
+ @item @samp{ssadd at var{m}3}, @samp{usadd at var{m}3}
+- at item @samp{sub at var{m}3}, @samp{sssub at var{m}3}, @samp{ussub at var{m}3}
+- at item @samp{mul at var{m}3}, @samp{ssmul at var{m}3}, @samp{usmul at var{m}3}
++ at itemx @samp{sub at var{m}3}, @samp{sssub at var{m}3}, @samp{ussub at var{m}3}
++ at itemx @samp{mul at var{m}3}, @samp{ssmul at var{m}3}, @samp{usmul at var{m}3}
+ @itemx @samp{div at var{m}3}, @samp{ssdiv at var{m}3}
+ @itemx @samp{udiv at var{m}3}, @samp{usdiv at var{m}3}
+ @itemx @samp{mod at var{m}3}, @samp{umod at var{m}3}
+diff --git a/gcc/doc/sourcebuild.texi b/gcc/doc/sourcebuild.texi
+index 89e7712..ec8263f 100644
+--- a/gcc/doc/sourcebuild.texi
++++ b/gcc/doc/sourcebuild.texi
+@@ -691,7 +691,7 @@ standard rule in @file{gcc/Makefile.in} to the variable
+ @code{lang_checks}.
+
+ @table @code
+- at itemx all.cross
++ at item all.cross
+ @itemx start.encap
+ @itemx rest.encap
+ FIXME: exactly what goes in each of these targets?
+
+--
+Andreas Schwab, schwab at linux-m68k.org
+GPG Key fingerprint = 58CA 54C7 6D53 942B 1756 01D3 44D5 214B 8276 4ED5
+"And now for something completely different."
+
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