[kernel] Add radeon fixes for PCI-e gen2 speed issues (rhbz 961527)

[Josh Boyer]

commit 67a061c91ea272f54dcebb8a23009236f006b992
Author: Josh Boyer <jwboyer at redhat.com>
Date:   Mon May 13 10:11:10 2013 -0400

    Add radeon fixes for PCI-e gen2 speed issues (rhbz 961527)

 kernel.spec                                        |    9 ++
 ...use-max_bus-speed-to-activate-gen2-speeds.patch |   99 ++++++++++++++++++++
 2 files changed, 108 insertions(+), 0 deletions(-)
---
diff --git a/kernel.spec b/kernel.spec
index 572c937..859696c 100644
--- a/kernel.spec
+++ b/kernel.spec
@@ -734,6 +734,9 @@ Patch25015: 0001-Revert-drm-i915-revert-eDP-bpp-clamping-code-changes.patch
 
 Patch25016: tglx.patch
 
+#rhbz 961527
+Patch25021: radeon-use-max_bus-speed-to-activate-gen2-speeds.patch
+
 # END OF PATCH DEFINITIONS
 
 %endif
@@ -1416,6 +1419,9 @@ ApplyPatch 0001-Revert-drm-i915-revert-eDP-bpp-clamping-code-changes.patch
 
 ApplyPatch tglx.patch
 
+#rhbz 961527
+ApplyPatch radeon-use-max_bus-speed-to-activate-gen2-speeds.patch
+
 # END OF PATCH APPLICATIONS
 
 %endif
@@ -2236,6 +2242,9 @@ fi
 #                 ||----w |
 #                 ||     ||
 %changelog
+* Mon May 13 2013 Josh Boyer <jwboyer at redhat.com>
+- Add radeon fixes for PCI-e gen2 speed issues (rhbz 961527)
+
 * Mon May 13 2013 Josh Boyer <jwboyer at redhat.com> - 3.10.0-0.rc1.git0.2
 - Reenable debugging options.
 
diff --git a/radeon-use-max_bus-speed-to-activate-gen2-speeds.patch b/radeon-use-max_bus-speed-to-activate-gen2-speeds.patch
new file mode 100644
index 0000000..f9a1199
--- /dev/null
+++ b/radeon-use-max_bus-speed-to-activate-gen2-speeds.patch
@@ -0,0 +1,99 @@
+radeon: use max_bus_speed to activate gen2 speeds
+
+radeon currently uses a drm function to get the speed capabilities for
+the bus, drm_pcie_get_speed_cap_mask. However, this is a non-standard
+method of performing this detection and this patch changes it to use
+the max_bus_speed attribute.
+
+From: Lucas Kannebley Tavares <lucaskt at linux.vnet.ibm.com>
+Signed-off-by: Kleber Sacilotto de Souza <klebers at linux.vnet.ibm.com>
+---
+ drivers/gpu/drm/radeon/evergreen.c |   10 +++-------
+ drivers/gpu/drm/radeon/r600.c      |    9 ++-------
+ drivers/gpu/drm/radeon/rv770.c     |    9 ++-------
+ 3 files changed, 7 insertions(+), 21 deletions(-)
+
+diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c
+index 105bafb..3966696 100644
+--- a/drivers/gpu/drm/radeon/evergreen.c
++++ b/drivers/gpu/drm/radeon/evergreen.c
+@@ -4992,8 +4992,7 @@ void evergreen_fini(struct radeon_device *rdev)
+ 
+ void evergreen_pcie_gen2_enable(struct radeon_device *rdev)
+ {
+-	u32 link_width_cntl, speed_cntl, mask;
+-	int ret;
++	u32 link_width_cntl, speed_cntl;
+ 
+ 	if (radeon_pcie_gen2 == 0)
+ 		return;
+@@ -5008,11 +5007,8 @@ void evergreen_pcie_gen2_enable(struct radeon_device *rdev)
+ 	if (ASIC_IS_X2(rdev))
+ 		return;
+ 
+-	ret = drm_pcie_get_speed_cap_mask(rdev->ddev, &mask);
+-	if (ret != 0)
+-		return;
+-
+-	if (!(mask & DRM_PCIE_SPEED_50))
++	if ((rdev->pdev->bus->max_bus_speed != PCIE_SPEED_5_0GT) &&
++		(rdev->pdev->bus->max_bus_speed != PCIE_SPEED_8_0GT))
+ 		return;
+ 
+ 	speed_cntl = RREG32_PCIE_PORT(PCIE_LC_SPEED_CNTL);
+diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c
+index 1a08008..b45e648 100644
+--- a/drivers/gpu/drm/radeon/r600.c
++++ b/drivers/gpu/drm/radeon/r600.c
+@@ -4631,8 +4631,6 @@ static void r600_pcie_gen2_enable(struct radeon_device *rdev)
+ {
+ 	u32 link_width_cntl, lanes, speed_cntl, training_cntl, tmp;
+ 	u16 link_cntl2;
+-	u32 mask;
+-	int ret;
+ 
+ 	if (radeon_pcie_gen2 == 0)
+ 		return;
+@@ -4651,11 +4649,8 @@ static void r600_pcie_gen2_enable(struct radeon_device *rdev)
+ 	if (rdev->family <= CHIP_R600)
+ 		return;
+ 
+-	ret = drm_pcie_get_speed_cap_mask(rdev->ddev, &mask);
+-	if (ret != 0)
+-		return;
+-
+-	if (!(mask & DRM_PCIE_SPEED_50))
++	if ((rdev->pdev->bus->max_bus_speed != PCIE_SPEED_5_0GT) &&
++		(rdev->pdev->bus->max_bus_speed != PCIE_SPEED_8_0GT))
+ 		return;
+ 
+ 	speed_cntl = RREG32_PCIE_PORT(PCIE_LC_SPEED_CNTL);
+diff --git a/drivers/gpu/drm/radeon/rv770.c b/drivers/gpu/drm/radeon/rv770.c
+index 83f612a..a6af4aa 100644
+--- a/drivers/gpu/drm/radeon/rv770.c
++++ b/drivers/gpu/drm/radeon/rv770.c
+@@ -2113,8 +2113,6 @@ static void rv770_pcie_gen2_enable(struct radeon_device *rdev)
+ {
+ 	u32 link_width_cntl, lanes, speed_cntl, tmp;
+ 	u16 link_cntl2;
+-	u32 mask;
+-	int ret;
+ 
+ 	if (radeon_pcie_gen2 == 0)
+ 		return;
+@@ -2129,11 +2127,8 @@ static void rv770_pcie_gen2_enable(struct radeon_device *rdev)
+ 	if (ASIC_IS_X2(rdev))
+ 		return;
+ 
+-	ret = drm_pcie_get_speed_cap_mask(rdev->ddev, &mask);
+-	if (ret != 0)
+-		return;
+-
+-	if (!(mask & DRM_PCIE_SPEED_50))
++	if ((rdev->pdev->bus->max_bus_speed != PCIE_SPEED_5_0GT) &&
++		(rdev->pdev->bus->max_bus_speed != PCIE_SPEED_8_0GT))
+ 		return;
+ 
+ 	DRM_INFO("enabling PCIE gen 2 link speeds, disable with radeon.pcie_gen2=0\n");
+-- 
+1.7.1