September 2020 - Arch-excludes - Fedora mailing-lists

Architecture specific change in rpms/darktable.git
by githook-noreply＠fedoraproject.org 25 Sep '20

25 Sep '20

The package rpms/darktable.git has added or updated architecture specific content in its spec file (ExclusiveArch/ExcludeArch or %ifarch/%ifnarch) in commit(s): https://src.fedoraproject.org/cgit/rpms/darktable.git/commit/?id=6d0f75b44b…. Change: -%ifnarch ppc64le Thanks. Full change: ============ commit 6d0f75b44b3ef4800dda4dbb3fb7789ba7a3f79a Author: Germano Massullo <germano.massullo(a)gmail.com> Date: Sat Sep 26 00:37:35 2020 +0200 removed %ifnarch ppc64le %{_bindir}/darktable-cltest diff --git a/darktable.spec b/darktable.spec index e5c5bd9..19ca91b 100644 --- a/darktable.spec +++ b/darktable.spec @@ -217,9 +217,8 @@ appstream-util validate-relax --nonet %{buildroot}/%{_datadir}/appdata/darktable %{_bindir}/darktable %{_bindir}/darktable-chart %{_bindir}/darktable-cli -%ifnarch ppc64le + %{_bindir}/darktable-cltest -%endif %{_bindir}/darktable-cmstest %{_bindir}/darktable-generate-cache %{_bindir}/darktable-rs-identify @@ -245,6 +244,7 @@ appstream-util validate-relax --nonet %{buildroot}/%{_datadir}/appdata/darktable - resumed OpenMP on ppc64le aarch64 - resumed OpenCL on ppc64le - added 0001.patch +- removed %%ifnarch ppc64le %%{_bindir}/darktable-cltest * Fri Sep 25 2020 Germano Massullo <germano.massullo(a)gmail.com> - 3.2.1-2 - Introduced new cmake macros for Fedora >= 33 and EL >= 9 https://fedoraproject.org/wiki/Changes/CMake_to_do_out-of-source_builds

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Architecture specific change in rpms/darktable.git
by githook-noreply＠fedoraproject.org 25 Sep '20

25 Sep '20

The package rpms/darktable.git has added or updated architecture specific content in its spec file (ExclusiveArch/ExcludeArch or %ifarch/%ifnarch) in commit(s): https://src.fedoraproject.org/cgit/rpms/darktable.git/commit/?id=6d0f75b44b…. Change: -%ifnarch ppc64le Thanks. Full change: ============ commit 6d0f75b44b3ef4800dda4dbb3fb7789ba7a3f79a Author: Germano Massullo <germano.massullo(a)gmail.com> Date: Sat Sep 26 00:37:35 2020 +0200 removed %ifnarch ppc64le %{_bindir}/darktable-cltest diff --git a/darktable.spec b/darktable.spec index e5c5bd9..19ca91b 100644 --- a/darktable.spec +++ b/darktable.spec @@ -217,9 +217,8 @@ appstream-util validate-relax --nonet %{buildroot}/%{_datadir}/appdata/darktable %{_bindir}/darktable %{_bindir}/darktable-chart %{_bindir}/darktable-cli -%ifnarch ppc64le + %{_bindir}/darktable-cltest -%endif %{_bindir}/darktable-cmstest %{_bindir}/darktable-generate-cache %{_bindir}/darktable-rs-identify @@ -245,6 +244,7 @@ appstream-util validate-relax --nonet %{buildroot}/%{_datadir}/appdata/darktable - resumed OpenMP on ppc64le aarch64 - resumed OpenCL on ppc64le - added 0001.patch +- removed %%ifnarch ppc64le %%{_bindir}/darktable-cltest * Fri Sep 25 2020 Germano Massullo <germano.massullo(a)gmail.com> - 3.2.1-2 - Introduced new cmake macros for Fedora >= 33 and EL >= 9 https://fedoraproject.org/wiki/Changes/CMake_to_do_out-of-source_builds

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Architecture specific change in rpms/elpa.git
by githook-noreply＠fedoraproject.org 25 Sep '20

25 Sep '20

The package rpms/elpa.git has added or updated architecture specific content in its spec file (ExclusiveArch/ExcludeArch or %ifarch/%ifnarch) in commit(s): https://src.fedoraproject.org/cgit/rpms/elpa.git/commit/?id=bd7db846ed3dc4a…. Change: +%ifarch x86_64 ppc64le Thanks. Full change: ============ commit bd7db846ed3dc4a2747282fccce05029c1143516 Author: Dominik 'Rathann' Mierzejewski <dominik(a)greysector.net> Date: Fri Sep 25 23:20:50 2020 +0200 disable openmpi tests on x86_64 and ppc64le They seem to be hanging. diff --git a/elpa.spec b/elpa.spec index 7b51e2e..15c41dc 100644 --- a/elpa.spec +++ b/elpa.spec @@ -255,7 +255,11 @@ rm %{buildroot}%{_pkgdocdir}/USERS_GUIDE_DEPRECATED_LEGACY_API.md %check . /etc/profile.d/modules.sh for s in '' _openmp ; do +%ifarch x86_64 ppc64le + for mpi in '' mpich ; do +%else for mpi in '' mpich openmpi ; do +%endif pushd ${s:-.}/${mpi:-serial} if [ -n "$mpi" ]; then module load mpi/${mpi}-%{_arch} commit 866c61a89c2ea0292c05f6d83688ab9c89c29192 Merge: 8163064 cce9142 Author: Dominik 'Rathann' Mierzejewski <dominik(a)greysector.net> Date: Fri Sep 25 23:06:07 2020 +0200 Merge branch 'f33' commit cce9142eae4c9d9a33a18a2c17ebefa51365693a Author: Dominik 'Rathann' Mierzejewski <dominik(a)greysector.net> Date: Fri Sep 25 23:04:13 2020 +0200 drop F33+ conditional diff --git a/elpa.spec b/elpa.spec index 8345bbb..7b51e2e 100644 --- a/elpa.spec +++ b/elpa.spec @@ -1,9 +1,3 @@ -%if 0%{?fedora} >= 33 -%global blaslib flexiblas -%else -%global blaslib openblas -%endif - %ifnarch s390 s390x %global with_papi 1 %endif @@ -29,7 +23,7 @@ Patch3: elpa-c-binding.patch # add FlexiBLAS support Patch6: elpa-flexiblas.patch License: LGPLv3+ -BuildRequires: %{blaslib}-devel +BuildRequires: flexiblas-devel BuildRequires: gcc-gfortran BuildRequires: gnupg2 BuildRequires: libtool

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Architecture specific change in rpms/ocaml-csexp.git
by githook-noreply＠fedoraproject.org 25 Sep '20

25 Sep '20

The package rpms/ocaml-csexp.git has added or updated architecture specific content in its spec file (ExclusiveArch/ExcludeArch or %ifarch/%ifnarch) in commit(s): https://src.fedoraproject.org/cgit/rpms/ocaml-csexp.git/commit/?id=b146a8b0…. Change: +%ifarch %{ocaml_native_compiler} Thanks. Full change: ============ commit a80472d00b43796d84e75f4e392242d339089cbe Author: Jerry James <loganjerry(a)gmail.com> Date: Fri Sep 18 12:50:16 2020 -0600 Version 1.3.2. diff --git a/ocaml-csexp-result.patch b/ocaml-csexp-result.patch index 978c995..0f4f846 100644 --- a/ocaml-csexp-result.patch +++ b/ocaml-csexp-result.patch @@ -1,13 +1,13 @@ --- a/csexp.opam +++ b/csexp.opam -@@ -33,7 +33,6 @@ depends: [ - "dune" {>= "2.5"} +@@ -32,7 +32,6 @@ bug-reports: "https://github.com/ocaml-d + depends: [ + "dune" {>= "1.11"} "ocaml" {>= "4.02.3"} - "ppx_expect" {with-test} - "result" {>= "1.5"} ] + dev-repo: "git+https://github.com/ocaml-dune/csexp.git" build: [ - ["dune" "subst"] {pinned} --- a/src/csexp.ml +++ b/src/csexp.ml @@ -15,12 +15,6 @@ end diff --git a/ocaml-csexp.spec b/ocaml-csexp.spec index 5857c38..41ec8c9 100644 --- a/ocaml-csexp.spec +++ b/ocaml-csexp.spec @@ -15,7 +15,7 @@ %bcond_with dune Name: ocaml-%{srcname} -Version: 1.3.1 +Version: 1.3.2 Release: 1%{?dist} Summary: Parsing and printing of S-expressions in canonical form @@ -30,9 +30,9 @@ Patch0: %{name}-result.patch BuildRequires: ocaml >= 4.02.3 %if %{with dune} -BuildRequires: ocaml-dune +BuildRequires: ocaml-dune >= 1.11 BuildRequires: ocaml-odoc -BuildRequires: ocaml-result-devel +BuildRequires: ocaml-result-devel >= 1.5 %endif %description @@ -171,5 +171,8 @@ EOF %{_libdir}/ocaml/%{srcname}/*.mli %changelog +* Fri Sep 18 2020 Jerry James <loganjerry(a)gmail.com> - 1.3.2-1 +- Version 1.3.2 + * Thu Sep 10 2020 Jerry James <loganjerry(a)gmail.com> - 1.3.1-1 - Initial RPM diff --git a/sources b/sources index 3c24733..1e2c3a9 100644 --- a/sources +++ b/sources @@ -1 +1 @@ -SHA512 (csexp-1.3.1.tbz) = dd6b3894529c828926ee05070548125822ad3bee8324623de0188d49655439286343f8cbc2ede8a27e01af5715e3bc1e643d6a0d770061b384d6dcefdb545eb2 +SHA512 (csexp-1.3.2.tbz) = ff1bd6a7c6bb3a73ca9ab0506c9ec1f357657deaa9ecc7eb32955817d9b0f266d976af3e2b8fc34c621cb0caf1fde55f9a609dd184e2054f500bf09afeb83026 commit b146a8b0b92a392530c47491e913bd7e44930892 Author: Jerry James <loganjerry(a)gmail.com> Date: Mon Sep 14 14:48:28 2020 -0600 Initial import. diff --git a/.gitignore b/.gitignore new file mode 100644 index 0000000..ee32f28 --- /dev/null +++ b/.gitignore @@ -0,0 +1 @@ +/csexp-*.tbz diff --git a/ocaml-csexp-result.patch b/ocaml-csexp-result.patch new file mode 100644 index 0000000..978c995 --- /dev/null +++ b/ocaml-csexp-result.patch @@ -0,0 +1,92 @@ +--- a/csexp.opam ++++ b/csexp.opam +@@ -33,7 +33,6 @@ depends: [ + "dune" {>= "2.5"} + "ocaml" {>= "4.02.3"} + "ppx_expect" {with-test} +- "result" {>= "1.5"} + ] + build: [ + ["dune" "subst"] {pinned} +--- a/src/csexp.ml ++++ b/src/csexp.ml +@@ -15,12 +15,6 @@ end + module Make (Sexp : Sexp) = struct + open Sexp + +- (* This is to keep compatibility with 4.02 without writing [Result.] +- everywhere *) +- type ('a, 'b) result = ('a, 'b) Result.result = +- | Ok of 'a +- | Error of 'b +- + module Parser = struct + exception Parse_error of string + +@@ -283,9 +277,9 @@ module Make (Sexp : Sexp) = struct + + module Monad : Monad + +- val read_string : t -> int -> (string, string) Result.t Monad.t ++ val read_string : t -> int -> (string, string) result Monad.t + +- val read_char : t -> (char, string) Result.t Monad.t ++ val read_char : t -> (char, string) result Monad.t + end + + module Make_parser (Input : Input) = struct +--- a/src/csexp.mli ++++ b/src/csexp.mli +@@ -33,24 +33,24 @@ module Make (Sexp : Sexp) : sig + [s]. It is an error for [s] to contain a S-expression followed by more + data. In case of error, the offset of the error as well as an error + message is returned. *) +- val parse_string : string -> (Sexp.t, int * string) Result.t ++ val parse_string : string -> (Sexp.t, int * string) result + + (** [parse_string s] parses a sequence of S-expressions encoded in canonical + form in [s] *) +- val parse_string_many : string -> (Sexp.t list, int * string) Result.t ++ val parse_string_many : string -> (Sexp.t list, int * string) result + + (** Read exactly one canonical S-expressions from the given channel. Note that + this function never raises [End_of_file]. Instead, it returns [Error]. *) +- val input : in_channel -> (Sexp.t, string) Result.t ++ val input : in_channel -> (Sexp.t, string) result + + (** Same as [input] but returns [Ok None] if the end of file has already been + reached. If some more characters are available but the end of file is + reached before reading a complete S-expression, this function returns + [Error]. *) +- val input_opt : in_channel -> (Sexp.t option, string) Result.t ++ val input_opt : in_channel -> (Sexp.t option, string) result + + (** Read many S-expressions until the end of input is reached. *) +- val input_many : in_channel -> (Sexp.t list, string) Result.t ++ val input_many : in_channel -> (Sexp.t list, string) result + + (** {2 Serialising} *) + +@@ -352,18 +352,18 @@ module Make (Sexp : Sexp) : sig + val bind : 'a t -> ('a -> 'b t) -> 'b t + end + +- val read_string : t -> int -> (string, string) Result.t Monad.t ++ val read_string : t -> int -> (string, string) result Monad.t + +- val read_char : t -> (char, string) Result.t Monad.t ++ val read_char : t -> (char, string) result Monad.t + end + [@@deprecated "Use Parser module instead"] + + [@@@warning "-3"] + + module Make_parser (Input : Input) : sig +- val parse : Input.t -> (Sexp.t, string) Result.t Input.Monad.t ++ val parse : Input.t -> (Sexp.t, string) result Input.Monad.t + +- val parse_many : Input.t -> (Sexp.t list, string) Result.t Input.Monad.t ++ val parse_many : Input.t -> (Sexp.t list, string) result Input.Monad.t + end + [@@deprecated "Use Parser module instead"] + end diff --git a/ocaml-csexp.spec b/ocaml-csexp.spec new file mode 100644 index 0000000..5857c38 --- /dev/null +++ b/ocaml-csexp.spec @@ -0,0 +1,175 @@ +%ifnarch %{ocaml_native_compiler} +%global debug_package %{nil} +%endif + +%global srcname csexp + +# This package is needed to build dune. To avoid circular dependencies, this +# package cannot depend on dune, or any package that depends on dune. +# Therefore, we: +# - hack up our own build, rather than using dune to do the build +# - bypass the need for ocaml-result (which requires dune to build) +# - skip tests, which require ppx_expect, which is built with dune +# - skip building documentation, which requires odoc, which is built with dune +# If you know what you are doing, build with dune anyway using this conditional. +%bcond_with dune + +Name: ocaml-%{srcname} +Version: 1.3.1 +Release: 1%{?dist} +Summary: Parsing and printing of S-expressions in canonical form + +License: MIT +URL: https://github.com/ocaml-dune/csexp +Source0: %{url}/releases/download/%{version}/%{srcname}-%{version}.tbz + +# Depend on Stdlib.Result instead of ocaml-result. See comment above. +# This patch is not appropriate for upstream, which needs to keep compatibility +# with older OCaml versions. +Patch0: %{name}-result.patch + +BuildRequires: ocaml >= 4.02.3 +%if %{with dune} +BuildRequires: ocaml-dune +BuildRequires: ocaml-odoc +BuildRequires: ocaml-result-devel +%endif + +%description +This project provides minimal support for parsing and printing +S-expressions in canonical form, which is a very simple and canonical +binary encoding of S-expressions. + +%package devel +Summary: Development files for %{name} +Requires: %{name}%{?_isa} = %{version}-%{release} +%if %{with dune} +Requires: ocaml-result-devel%{?_isa} +%endif + +%description devel +The %{name}-devel package contains libraries and signature files for +developing applications that use %{name}. + +%prep +%autosetup -N -n %{srcname}-%{version} +%if %{without dune} +%autopatch -p1 +%endif + +%build +%if %{with dune} +dune build %{?_smp_mflags} --display=verbose @install +dune build %{?_smp_mflags} @doc +%else +OFLAGS="-strict-sequence -strict-formats -short-paths -keep-locs -g -opaque" +OCFLAGS="$OFLAGS -bin-annot" +cd src +ocamlc $OCFLAGS -output-obj csexp.mli +ocamlc $OCFLAGS -a -o csexp.cma csexp.ml +%ifarch %{ocaml_native_compiler} +ocamlopt $OFLAGS -ccopt "%{optflags}" -cclib "$RPM_LD_FLAGS" -a \ + -o csexp.cmxa csexp.ml +ocamlopt $OFLAGS -ccopt "%{optflags}" -cclib "$RPM_LD_FLAGS" -shared \ + -o csexp.cmxs csexp.ml +%endif +cd - +%endif + +%install +%if %{with dune} +dune install --destdir=%{buildroot} + +# We do not want the dune markers +find _build/default/_doc/_html -name .dune-keep -delete + +# We do not want the ml files +find %{buildroot}%{_libdir}/ocaml -name \*.ml -delete + +# We install the documentation with the doc macro +rm -fr %{buildroot}%{_prefix}/doc + +%ifarch %{ocaml_native_compiler} +# Add missing executable bits +find %{buildroot}%{_libdir}/ocaml -name \*.cmxs -exec chmod a+x {} \+ +%endif +%else +# Install without dune. See comment at the top. +mkdir -p %{buildroot}%{_libdir}/ocaml/%{srcname} +cp -p src/csexp.{cma,cmi,cmt,cmti,mli} %{buildroot}%{_libdir}/ocaml/%{srcname} +%ifarch %{ocaml_native_compiler} +cp -p src/csexp.{a,cmx,cmxa,cmxs} %{buildroot}%{_libdir}/ocaml/%{srcname} +%endif +cp -p csexp.opam %{buildroot}%{_libdir}/ocaml/%{srcname}/opam + +cat >> %{buildroot}%{_libdir}/ocaml/%{srcname}/META << EOF +version = "%{version}" +description = "Parsing and printing of S-expressions in canonical form" +archive(byte) = "csexp.cma" +%ifarch %{ocaml_native_compiler} +archive(native) = "csexp.cmxa" +%endif +plugin(byte) = "csexp.cma" +%ifarch %{ocaml_native_compiler} +plugin(native) = "csexp.cmxs" +%endif +EOF + +cat >> %{buildroot}%{_libdir}/ocaml/%{srcname}/dune-package << EOF +(lang dune 2.5) +(name csexp) +(version %{version}) +(library + (name csexp) + (kind normal) +%ifarch %{ocaml_native_compiler} + (archives (byte csexp.cma) (native csexp.cmxa)) + (plugins (byte csexp.cma) (native csexp.cmxs)) + (native_archives csexp.a) +%else + (archives (byte csexp.cma)) + (plugins (byte csexp.cma)) +%endif + (main_module_name Csexp) +%ifarch %{ocaml_native_compiler} + (modes byte native) +%else + (modes byte) +%endif + (modules + (singleton (name Csexp) (obj_name csexp) (visibility public) (impl) (intf)))) +EOF +%endif + +# Cannot do this until ocaml-ppx-expect is available in Fedora. +#%%if %%{with dune} +#%%check +#dune runtest +#%%endif + +%files +%doc README.md +%license LICENSE.md +%dir %{_libdir}/ocaml/%{srcname}/ +%{_libdir}/ocaml/%{srcname}/META +%{_libdir}/ocaml/%{srcname}/*.cma +%{_libdir}/ocaml/%{srcname}/*.cmi +%ifarch %{ocaml_native_compiler} +%{_libdir}/ocaml/%{srcname}/*.cmxs +%endif + +%files devel +%{_libdir}/ocaml/%{srcname}/dune-package +%{_libdir}/ocaml/%{srcname}/opam +%ifarch %{ocaml_native_compiler} +%{_libdir}/ocaml/%{srcname}/*.a +%{_libdir}/ocaml/%{srcname}/*.cmx +%{_libdir}/ocaml/%{srcname}/*.cmxa +%endif +%{_libdir}/ocaml/%{srcname}/*.cmt +%{_libdir}/ocaml/%{srcname}/*.cmti +%{_libdir}/ocaml/%{srcname}/*.mli + +%changelog +* Thu Sep 10 2020 Jerry James <loganjerry(a)gmail.com> - 1.3.1-1 +- Initial RPM diff --git a/sources b/sources new file mode 100644 index 0000000..3c24733 --- /dev/null +++ b/sources @@ -0,0 +1 @@ +SHA512 (csexp-1.3.1.tbz) = dd6b3894529c828926ee05070548125822ad3bee8324623de0188d49655439286343f8cbc2ede8a27e01af5715e3bc1e643d6a0d770061b384d6dcefdb545eb2

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Architecture specific change in rpms/flocq.git
by githook-noreply＠fedoraproject.org 25 Sep '20

25 Sep '20

The package rpms/flocq.git has added or updated architecture specific content in its spec file (ExclusiveArch/ExcludeArch or %ifarch/%ifnarch) in commit(s): https://src.fedoraproject.org/cgit/rpms/flocq.git/commit/?id=348ca10a97bb11…. Change: +ExcludeArch: s390x Thanks. Full change: ============ commit 348ca10a97bb117ed3232b2727473878aaaaae96 Author: Jerry James <loganjerry(a)gmail.com> Date: Fri Sep 25 11:35:20 2020 -0600 Flocq is installed in an archful directory, so cannot be noarch. - ExcludeArch s390x due to bz 1874879. diff --git a/flocq.spec b/flocq.spec index f460aeb..b2ce18b 100644 --- a/flocq.spec +++ b/flocq.spec @@ -1,24 +1,19 @@ -# On platforms with a native OCaml compiler, proofs can be compiled into cmxs -# files, but there are no source files that rpm recognizes as such. -%ifarch %{ocaml_native_compiler} -%global _debugsource_template %{nil} -%else +# This package is installed into an archful location, but contains no ELF +# objects. %global debug_package %{nil} -%endif %global flocqdir %{_libdir}/ocaml/coq/user-contrib/Flocq %global coqver 8.12.0 Name: flocq Version: 3.3.1 -Release: 6%{?dist} +Release: 7%{?dist} Summary: Formalization of floating point numbers for Coq License: LGPLv3+ URL: http://flocq.gforge.inria.fr/ Source0: https://gforge.inria.fr/frs/download.php/file/38329/%{name}-%{version}.tar.… -BuildArch: noarch BuildRequires: gcc-c++ BuildRequires: remake BuildRequires: coq = %{coqver} @@ -26,6 +21,9 @@ BuildRequires: ocaml BuildRequires: ocaml-findlib Requires: coq%{?_isa} = %{coqver} +# https://bugzilla.redhat.com/show_bug.cgi?id=1874879 +ExcludeArch: s390x + %description Flocq (Floats for Coq) is a floating-point formalization for the Coq system. It provides a comprehensive library of theorems on a @@ -84,6 +82,10 @@ cp -p opam $RPM_BUILD_ROOT%{flocqdir} %{flocqdir}/Prop/*.v %changelog +* Fri Sep 25 2020 Jerry James <loganjerry(a)gmail.com> - 3.3.1-7 +- Flocq is installed in an archful directory, so cannot be noarch +- ExcludeArch s390x due to bz 1874879 + * Wed Sep 02 2020 Richard W.M. Jones <rjones(a)redhat.com> - 3.3.1-6 - OCaml 4.11.1 rebuild

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Architecture specific change in rpms/intel-ipsec-mb.git
by githook-noreply＠fedoraproject.org 25 Sep '20

25 Sep '20

The package rpms/intel-ipsec-mb.git has added or updated architecture specific content in its spec file (ExclusiveArch/ExcludeArch or %ifarch/%ifnarch) in commit(s): https://src.fedoraproject.org/cgit/rpms/intel-ipsec-mb.git/commit/?id=93778…. Change: +ExclusiveArch: x86_64 Thanks. Full change: ============ commit 9377815f8d0b28d459aea6cc535541f0fe13f9fb Author: Marcel D. Cornu <marcel.d.cornu(a)intel.com> Date: Fri Sep 25 11:11:30 2020 -0400 Initial intel-ipsec-mb-v0.54 package commit diff --git a/.gitignore b/.gitignore new file mode 100644 index 0000000..07e4123 --- /dev/null +++ b/.gitignore @@ -0,0 +1,2 @@ +/intel-ipsec-mb-0.54.tar.gz +/0001-Fix-for-executable-stack-in-v0.54-release.patch diff --git a/intel-ipsec-mb.spec b/intel-ipsec-mb.spec new file mode 100644 index 0000000..d57a5fa --- /dev/null +++ b/intel-ipsec-mb.spec @@ -0,0 +1,128 @@ +# Copyright (c) 2017-2020, Intel Corporation +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions are met: +# +# * Redistributions of source code must retain the above copyright notice, +# this list of conditions and the following disclaimer. +# * Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in the +# documentation and/or other materials provided with the distribution. +# * Neither the name of Intel Corporation nor the names of its contributors +# may be used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +# DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE +# FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL +# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR +# SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER +# CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, +# OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +# Versions numbers +%global major 0 +%global minor 54 +%global patch 0 +%global fullversion %{major}.%{minor}.%{patch} + +# GitHub properties +%global githubname intel-ipsec-mb +%global githubver %{major}.%{minor} +%global githubfull %{githubname}-%{githubver} + +# disable producing debuginfo for this package +%global debug_package %{nil} + +Summary: IPSEC cryptography library optimized for Intel Architecture +Name: %{githubname} +Release: 2%{?dist} +Version: %{fullversion} +License: BSD +Group: Development/Tools +ExclusiveArch: x86_64 +Source0: https://github.com/intel/%{githubname}/archive/v%{githubver}.tar.gz#/%{gith… +Patch: 0001-Fix-for-executable-stack-in-v0.54-release.patch +URL: https://github.com/intel/%{githubname} +BuildRequires: make +BuildRequires: gcc >= 4.8.3 +BuildRequires: nasm >= 2.14 + +%description +IPSEC cryptography library optimized for Intel Architecture + +%package -n intel-ipsec-mb-devel +Summary: IPSEC cryptography library optimized for Intel Architecture +License: BSD +Requires: %{name}%{?_isa} = %{version}-%{release} +Group: Development/Tools +ExclusiveArch: x86_64 + +%description -n intel-ipsec-mb-devel +IPSEC cryptography library optimized for Intel Architecture + +For additional information please refer to: +https://github.com/intel/%{githubname} + +%prep +%autosetup -n %{githubfull} -p1 + +%if 0%{?rhel} && 0%{?rhel} < 8 +%ldconfig_post + +%ldconfig_postun +%endif + +%build +make SAFE_PARAM=y SAFE_DATA=y EXTRA_CFLAGS='%{optflags}' %{?_smp_mflags} + +%install + +# Install the library +install -d %{buildroot}/%{_includedir} +install -m 0644 %{_builddir}/%{githubfull}/intel-ipsec-mb.h %{buildroot}/%{_includedir} +install -d %{buildroot}/%{_libdir} +install -s -m 0755 %{_builddir}/%{githubfull}/libIPSec_MB.so.%{fullversion} %{buildroot}/%{_libdir} +install -d %{buildroot}/%{_mandir}/man7 +install -m 0444 libipsec-mb.7 %{buildroot}/%{_mandir}/man7 +install -m 0444 libipsec-mb-dev.7 %{buildroot}/%{_mandir}/man7 +cd %{buildroot}/%{_libdir} +ln -s libIPSec_MB.so.%{fullversion} libIPSec_MB.so.0 +ln -s libIPSec_MB.so.%{fullversion} libIPSec_MB.so + +%files + +%license LICENSE +%doc README ReleaseNotes.txt + +%{_libdir}/libIPSec_MB.so.%{fullversion} +%{_libdir}/libIPSec_MB.so.0 + +%{_mandir}/man7/libipsec-mb.7.gz + +%files -n %{name}-devel +%{_includedir}/intel-ipsec-mb.h +%{_mandir}/man7/libipsec-mb-dev.7.gz +%{_libdir}/libIPSec_MB.so + +%changelog +* Tue Sep 08 2020 Marcel Cornu <marcel.d.cornu(a)intel.com> 0.54.0-2 +- Updated to improve compliance with packaging guidelines +- Added patch to fix executable stack issue + +* Thu May 14 2020 Marcel Cornu <marcel.d.cornu(a)intel.com> 0.54.0-1 +- Update for release package v0.54.0 + +* Thu Sep 13 2018 Marcel Cornu <marcel.d.cornu(a)intel.com> 0.51-1 +- Update for release package v0.51 + +* Mon Apr 16 2018 Tomasz Kantecki <tomasz.kantecki(a)intel.com> 0.49-1 +- update for release package v0.49 +- 01org replaced with intel in URL's +- use of new makefile 'install' target with some workarounds + +* Fri Aug 11 2017 Tomasz Kantecki <tomasz.kantecki(a)intel.com> 0.46-1 +- initial version of the package diff --git a/sources b/sources new file mode 100644 index 0000000..09ebdbf --- /dev/null +++ b/sources @@ -0,0 +1,2 @@ +SHA512 (intel-ipsec-mb-0.54.tar.gz) = 9e19dee571f7dd72795154a954aa31e21cc5ddf595cb202b211a0c066826d2d4eb84a3297cb89d9cf00a311f256b8128ec54f828a1ab969956af53e6e8a508d9 +SHA512 (0001-Fix-for-executable-stack-in-v0.54-release.patch) = df6cf56319c938d70a752fe296b441163d229fe0a9c78ac7ec35a7e88eb73ebfe5e24af6d58fb821d00ee4f5fb9c780704be80ad6b2b9fa9ab49c1512865d585

1 0

Architecture specific change in rpms/intel-ipsec-mb.git
by githook-noreply＠fedoraproject.org 25 Sep '20

25 Sep '20

The package rpms/intel-ipsec-mb.git has added or updated architecture specific content in its spec file (ExclusiveArch/ExcludeArch or %ifarch/%ifnarch) in commit(s): https://src.fedoraproject.org/cgit/rpms/intel-ipsec-mb.git/commit/?id=93778…. Change: +ExclusiveArch: x86_64 Thanks. Full change: ============ commit 9377815f8d0b28d459aea6cc535541f0fe13f9fb Author: Marcel D. Cornu <marcel.d.cornu(a)intel.com> Date: Fri Sep 25 11:11:30 2020 -0400 Initial intel-ipsec-mb-v0.54 package commit diff --git a/.gitignore b/.gitignore new file mode 100644 index 0000000..07e4123 --- /dev/null +++ b/.gitignore @@ -0,0 +1,2 @@ +/intel-ipsec-mb-0.54.tar.gz +/0001-Fix-for-executable-stack-in-v0.54-release.patch diff --git a/intel-ipsec-mb.spec b/intel-ipsec-mb.spec new file mode 100644 index 0000000..d57a5fa --- /dev/null +++ b/intel-ipsec-mb.spec @@ -0,0 +1,128 @@ +# Copyright (c) 2017-2020, Intel Corporation +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions are met: +# +# * Redistributions of source code must retain the above copyright notice, +# this list of conditions and the following disclaimer. +# * Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in the +# documentation and/or other materials provided with the distribution. +# * Neither the name of Intel Corporation nor the names of its contributors +# may be used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +# DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE +# FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL +# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR +# SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER +# CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, +# OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +# Versions numbers +%global major 0 +%global minor 54 +%global patch 0 +%global fullversion %{major}.%{minor}.%{patch} + +# GitHub properties +%global githubname intel-ipsec-mb +%global githubver %{major}.%{minor} +%global githubfull %{githubname}-%{githubver} + +# disable producing debuginfo for this package +%global debug_package %{nil} + +Summary: IPSEC cryptography library optimized for Intel Architecture +Name: %{githubname} +Release: 2%{?dist} +Version: %{fullversion} +License: BSD +Group: Development/Tools +ExclusiveArch: x86_64 +Source0: https://github.com/intel/%{githubname}/archive/v%{githubver}.tar.gz#/%{gith… +Patch: 0001-Fix-for-executable-stack-in-v0.54-release.patch +URL: https://github.com/intel/%{githubname} +BuildRequires: make +BuildRequires: gcc >= 4.8.3 +BuildRequires: nasm >= 2.14 + +%description +IPSEC cryptography library optimized for Intel Architecture + +%package -n intel-ipsec-mb-devel +Summary: IPSEC cryptography library optimized for Intel Architecture +License: BSD +Requires: %{name}%{?_isa} = %{version}-%{release} +Group: Development/Tools +ExclusiveArch: x86_64 + +%description -n intel-ipsec-mb-devel +IPSEC cryptography library optimized for Intel Architecture + +For additional information please refer to: +https://github.com/intel/%{githubname} + +%prep +%autosetup -n %{githubfull} -p1 + +%if 0%{?rhel} && 0%{?rhel} < 8 +%ldconfig_post + +%ldconfig_postun +%endif + +%build +make SAFE_PARAM=y SAFE_DATA=y EXTRA_CFLAGS='%{optflags}' %{?_smp_mflags} + +%install + +# Install the library +install -d %{buildroot}/%{_includedir} +install -m 0644 %{_builddir}/%{githubfull}/intel-ipsec-mb.h %{buildroot}/%{_includedir} +install -d %{buildroot}/%{_libdir} +install -s -m 0755 %{_builddir}/%{githubfull}/libIPSec_MB.so.%{fullversion} %{buildroot}/%{_libdir} +install -d %{buildroot}/%{_mandir}/man7 +install -m 0444 libipsec-mb.7 %{buildroot}/%{_mandir}/man7 +install -m 0444 libipsec-mb-dev.7 %{buildroot}/%{_mandir}/man7 +cd %{buildroot}/%{_libdir} +ln -s libIPSec_MB.so.%{fullversion} libIPSec_MB.so.0 +ln -s libIPSec_MB.so.%{fullversion} libIPSec_MB.so + +%files + +%license LICENSE +%doc README ReleaseNotes.txt + +%{_libdir}/libIPSec_MB.so.%{fullversion} +%{_libdir}/libIPSec_MB.so.0 + +%{_mandir}/man7/libipsec-mb.7.gz + +%files -n %{name}-devel +%{_includedir}/intel-ipsec-mb.h +%{_mandir}/man7/libipsec-mb-dev.7.gz +%{_libdir}/libIPSec_MB.so + +%changelog +* Tue Sep 08 2020 Marcel Cornu <marcel.d.cornu(a)intel.com> 0.54.0-2 +- Updated to improve compliance with packaging guidelines +- Added patch to fix executable stack issue + +* Thu May 14 2020 Marcel Cornu <marcel.d.cornu(a)intel.com> 0.54.0-1 +- Update for release package v0.54.0 + +* Thu Sep 13 2018 Marcel Cornu <marcel.d.cornu(a)intel.com> 0.51-1 +- Update for release package v0.51 + +* Mon Apr 16 2018 Tomasz Kantecki <tomasz.kantecki(a)intel.com> 0.49-1 +- update for release package v0.49 +- 01org replaced with intel in URL's +- use of new makefile 'install' target with some workarounds + +* Fri Aug 11 2017 Tomasz Kantecki <tomasz.kantecki(a)intel.com> 0.46-1 +- initial version of the package diff --git a/sources b/sources new file mode 100644 index 0000000..09ebdbf --- /dev/null +++ b/sources @@ -0,0 +1,2 @@ +SHA512 (intel-ipsec-mb-0.54.tar.gz) = 9e19dee571f7dd72795154a954aa31e21cc5ddf595cb202b211a0c066826d2d4eb84a3297cb89d9cf00a311f256b8128ec54f828a1ab969956af53e6e8a508d9 +SHA512 (0001-Fix-for-executable-stack-in-v0.54-release.patch) = df6cf56319c938d70a752fe296b441163d229fe0a9c78ac7ec35a7e88eb73ebfe5e24af6d58fb821d00ee4f5fb9c780704be80ad6b2b9fa9ab49c1512865d585

1 0

Architecture specific change in rpms/intel-ipsec-mb.git
by githook-noreply＠fedoraproject.org 25 Sep '20

25 Sep '20

The package rpms/intel-ipsec-mb.git has added or updated architecture specific content in its spec file (ExclusiveArch/ExcludeArch or %ifarch/%ifnarch) in commit(s): https://src.fedoraproject.org/cgit/rpms/intel-ipsec-mb.git/commit/?id=93778…. Change: +ExclusiveArch: x86_64 Thanks. Full change: ============ commit 9377815f8d0b28d459aea6cc535541f0fe13f9fb Author: Marcel D. Cornu <marcel.d.cornu(a)intel.com> Date: Fri Sep 25 11:11:30 2020 -0400 Initial intel-ipsec-mb-v0.54 package commit diff --git a/.gitignore b/.gitignore new file mode 100644 index 0000000..07e4123 --- /dev/null +++ b/.gitignore @@ -0,0 +1,2 @@ +/intel-ipsec-mb-0.54.tar.gz +/0001-Fix-for-executable-stack-in-v0.54-release.patch diff --git a/intel-ipsec-mb.spec b/intel-ipsec-mb.spec new file mode 100644 index 0000000..d57a5fa --- /dev/null +++ b/intel-ipsec-mb.spec @@ -0,0 +1,128 @@ +# Copyright (c) 2017-2020, Intel Corporation +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions are met: +# +# * Redistributions of source code must retain the above copyright notice, +# this list of conditions and the following disclaimer. +# * Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in the +# documentation and/or other materials provided with the distribution. +# * Neither the name of Intel Corporation nor the names of its contributors +# may be used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +# DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE +# FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL +# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR +# SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER +# CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, +# OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +# Versions numbers +%global major 0 +%global minor 54 +%global patch 0 +%global fullversion %{major}.%{minor}.%{patch} + +# GitHub properties +%global githubname intel-ipsec-mb +%global githubver %{major}.%{minor} +%global githubfull %{githubname}-%{githubver} + +# disable producing debuginfo for this package +%global debug_package %{nil} + +Summary: IPSEC cryptography library optimized for Intel Architecture +Name: %{githubname} +Release: 2%{?dist} +Version: %{fullversion} +License: BSD +Group: Development/Tools +ExclusiveArch: x86_64 +Source0: https://github.com/intel/%{githubname}/archive/v%{githubver}.tar.gz#/%{gith… +Patch: 0001-Fix-for-executable-stack-in-v0.54-release.patch +URL: https://github.com/intel/%{githubname} +BuildRequires: make +BuildRequires: gcc >= 4.8.3 +BuildRequires: nasm >= 2.14 + +%description +IPSEC cryptography library optimized for Intel Architecture + +%package -n intel-ipsec-mb-devel +Summary: IPSEC cryptography library optimized for Intel Architecture +License: BSD +Requires: %{name}%{?_isa} = %{version}-%{release} +Group: Development/Tools +ExclusiveArch: x86_64 + +%description -n intel-ipsec-mb-devel +IPSEC cryptography library optimized for Intel Architecture + +For additional information please refer to: +https://github.com/intel/%{githubname} + +%prep +%autosetup -n %{githubfull} -p1 + +%if 0%{?rhel} && 0%{?rhel} < 8 +%ldconfig_post + +%ldconfig_postun +%endif + +%build +make SAFE_PARAM=y SAFE_DATA=y EXTRA_CFLAGS='%{optflags}' %{?_smp_mflags} + +%install + +# Install the library +install -d %{buildroot}/%{_includedir} +install -m 0644 %{_builddir}/%{githubfull}/intel-ipsec-mb.h %{buildroot}/%{_includedir} +install -d %{buildroot}/%{_libdir} +install -s -m 0755 %{_builddir}/%{githubfull}/libIPSec_MB.so.%{fullversion} %{buildroot}/%{_libdir} +install -d %{buildroot}/%{_mandir}/man7 +install -m 0444 libipsec-mb.7 %{buildroot}/%{_mandir}/man7 +install -m 0444 libipsec-mb-dev.7 %{buildroot}/%{_mandir}/man7 +cd %{buildroot}/%{_libdir} +ln -s libIPSec_MB.so.%{fullversion} libIPSec_MB.so.0 +ln -s libIPSec_MB.so.%{fullversion} libIPSec_MB.so + +%files + +%license LICENSE +%doc README ReleaseNotes.txt + +%{_libdir}/libIPSec_MB.so.%{fullversion} +%{_libdir}/libIPSec_MB.so.0 + +%{_mandir}/man7/libipsec-mb.7.gz + +%files -n %{name}-devel +%{_includedir}/intel-ipsec-mb.h +%{_mandir}/man7/libipsec-mb-dev.7.gz +%{_libdir}/libIPSec_MB.so + +%changelog +* Tue Sep 08 2020 Marcel Cornu <marcel.d.cornu(a)intel.com> 0.54.0-2 +- Updated to improve compliance with packaging guidelines +- Added patch to fix executable stack issue + +* Thu May 14 2020 Marcel Cornu <marcel.d.cornu(a)intel.com> 0.54.0-1 +- Update for release package v0.54.0 + +* Thu Sep 13 2018 Marcel Cornu <marcel.d.cornu(a)intel.com> 0.51-1 +- Update for release package v0.51 + +* Mon Apr 16 2018 Tomasz Kantecki <tomasz.kantecki(a)intel.com> 0.49-1 +- update for release package v0.49 +- 01org replaced with intel in URL's +- use of new makefile 'install' target with some workarounds + +* Fri Aug 11 2017 Tomasz Kantecki <tomasz.kantecki(a)intel.com> 0.46-1 +- initial version of the package diff --git a/sources b/sources new file mode 100644 index 0000000..09ebdbf --- /dev/null +++ b/sources @@ -0,0 +1,2 @@ +SHA512 (intel-ipsec-mb-0.54.tar.gz) = 9e19dee571f7dd72795154a954aa31e21cc5ddf595cb202b211a0c066826d2d4eb84a3297cb89d9cf00a311f256b8128ec54f828a1ab969956af53e6e8a508d9 +SHA512 (0001-Fix-for-executable-stack-in-v0.54-release.patch) = df6cf56319c938d70a752fe296b441163d229fe0a9c78ac7ec35a7e88eb73ebfe5e24af6d58fb821d00ee4f5fb9c780704be80ad6b2b9fa9ab49c1512865d585

1 0

Architecture specific change in rpms/elpa.git
by githook-noreply＠fedoraproject.org 25 Sep '20

25 Sep '20

The package rpms/elpa.git has added or updated architecture specific content in its spec file (ExclusiveArch/ExcludeArch or %ifarch/%ifnarch) in commit(s): https://src.fedoraproject.org/cgit/rpms/elpa.git/commit/?id=4e8d6a84a4c6b62…. Change: +%ifarch x86_64 Thanks. Full change: ============ commit 81630640284512c537f94dea65f687e7a143c850 Merge: febcfce 4e8d6a8 Author: Dominik 'Rathann' Mierzejewski <dominik(a)greysector.net> Date: Fri Sep 25 13:06:44 2020 +0200 Merge branch 'f33' commit 4e8d6a84a4c6b62775dc30d2a7358f77a6a39f71 Author: Dominik 'Rathann' Mierzejewski <dominik(a)greysector.net> Date: Fri Sep 25 13:04:45 2020 +0200 update to 2020.05.001 (ABI and API break) rebase patches and drop obsolete ones legacy API removed build only SSE3 and AVX SIMD kernels for x86 which should still work on 10yo machines disable VSX SIMD as the kernels are broken in this release diff --git a/.gitignore b/.gitignore index 3932767..13ce3a2 100644 --- a/.gitignore +++ b/.gitignore @@ -6,3 +6,5 @@ /elpa-2017.05.003.tar.gz.asc /elpa-2019.05.002.tar.gz /elpa-2019.05.002.tar.gz.asc +/elpa-2020.05.001.tar.gz +/elpa-2020.05.001.tar.gz.asc diff --git a/elpa-aarch64-no-fma.patch b/elpa-aarch64-no-fma.patch deleted file mode 100644 index 8993c06..0000000 --- a/elpa-aarch64-no-fma.patch +++ /dev/null @@ -1,11 +0,0 @@ -diff -up elpa-2019.05.002/src/elpa2/kernels/real_128bit_256bit_512bit_BLOCK_template.c.aarch64-no-fma elpa-2019.05.002/src/elpa2/kernels/real_128bit_256bit_512bit_BLOCK_template.c ---- elpa-2019.05.002/src/elpa2/kernels/real_128bit_256bit_512bit_BLOCK_template.c.aarch64-no-fma 2019-10-08 12:17:31.000000000 +0200 -+++ elpa-2019.05.002/src/elpa2/kernels/real_128bit_256bit_512bit_BLOCK_template.c 2019-12-11 23:23:10.153036398 +0100 -@@ -193,7 +193,6 @@ - #endif /* VEC_SET == 1281 */ - - #if VEC_SET == NEON_ARCH64_128 --#define __ELPA_USE_FMA__ - #ifdef DOUBLE_PRECISION_REAL - #define offset 2 - #define __SIMD_DATATYPE __Float64x2_t diff --git a/elpa-c-binding.patch b/elpa-c-binding.patch new file mode 100644 index 0000000..c6c0171 --- /dev/null +++ b/elpa-c-binding.patch @@ -0,0 +1,12 @@ +diff -up mpich/test/shared/test_blacs_infrastructure.F90.layout mpich/test/shared/test_blacs_infrastructure.F90 +--- mpich/test/shared/test_blacs_infrastructure.F90.layout 2020-06-08 16:09:32.000000000 +0200 ++++ mpich/test/shared/test_blacs_infrastructure.F90 2020-09-24 16:32:01.225307325 +0200 +@@ -84,7 +84,7 @@ module test_blacs_infrastructure + #ifdef SXAURORA + character(len=1), intent(in) :: layout + #else +- character(len=1), intent(in), value :: layout ++ character(kind=c_char), intent(in), value :: layout + #endif + TEST_INT_TYPE, intent(out) :: my_blacs_ctxt, my_prow, my_pcol + diff --git a/elpa-flexiblas.patch b/elpa-flexiblas.patch new file mode 100644 index 0000000..8f6e678 --- /dev/null +++ b/elpa-flexiblas.patch @@ -0,0 +1,12 @@ +diff -up mpich/configure.ac.fb mpich/configure.ac +--- mpich/configure.ac.fb 2020-09-15 13:19:43.467050663 +0200 ++++ mpich/configure.ac 2020-09-15 13:19:43.468050671 +0200 +@@ -527,7 +527,7 @@ if test x"${have_mkl}" = x"yes" ; then + else + + dnl first check blas +- AC_SEARCH_LIBS([dgemm],[openblas satlas blas],[have_blas=yes],[have_blas=no]) ++ AC_SEARCH_LIBS([dgemm],[flexiblas openblas satlas blas],[have_blas=yes],[have_blas=no]) + AC_MSG_CHECKING([whether we can link a program with a blas lib]) + AC_MSG_RESULT([${have_blas}]) + diff --git a/elpa-merge.patch b/elpa-merge.patch deleted file mode 100644 index b303e95..0000000 --- a/elpa-merge.patch +++ /dev/null @@ -1,48 +0,0 @@ -diff --git a/src/elpa1/elpa1_merge_systems_real_template.F90 b/src/elpa1/elpa1_merge_systems_real_template.F90 -index 6bc91a81..9ce49e4e 100644 ---- a/src/elpa1/elpa1_merge_systems_real_template.F90 -+++ b/src/elpa1/elpa1_merge_systems_real_template.F90 -@@ -438,9 +438,9 @@ - #ifdef WITH_OPENMP - - call obj%timer%start("OpenMP parallel" // PRECISION_SUFFIX) --!$OMP PARALLEL PRIVATE(i,my_thread,delta,s,info,j) -- my_thread = omp_get_thread_num() --!$OMP DO -+!!$OMP PARALLEL PRIVATE(i,my_thread,delta,s,info,j) -+ my_thread = 0 -+!!$OMP DO - #endif - DO i = my_proc+1, na1, n_procs ! work distributed over all processors - call obj%timer%start("blas") -@@ -484,7 +484,7 @@ - endif - enddo - #ifdef WITH_OPENMP --!$OMP END PARALLEL -+!!$OMP END PARALLEL - - call obj%timer%stop("OpenMP parallel" // PRECISION_SUFFIX) - -@@ -513,9 +513,9 @@ - - call obj%timer%start("OpenMP parallel" // PRECISION_SUFFIX) - --!$OMP PARALLEL DO PRIVATE(i) SHARED(na1, my_proc, n_procs, & --!$OMP d1,dbase, ddiff, z, ev_scale, obj) & --!$OMP DEFAULT(NONE) -+!!$OMP PARALLEL DO PRIVATE(i) SHARED(na1, my_proc, n_procs, & -+!!$OMP d1,dbase, ddiff, z, ev_scale, obj) & -+!!$OMP DEFAULT(NONE) - - #endif - DO i = my_proc+1, na1, n_procs ! work distributed over all processors -@@ -532,7 +532,7 @@ - ! ev_scale(i) = ev_scale_val - enddo - #ifdef WITH_OPENMP --!$OMP END PARALLEL DO -+!!$OMP END PARALLEL DO - - call obj%timer%stop("OpenMP parallel" // PRECISION_SUFFIX) - diff --git a/elpa-onenode.patch b/elpa-onenode.patch index 83c74b5..ee409cf 100644 --- a/elpa-onenode.patch +++ b/elpa-onenode.patch @@ -1,7 +1,7 @@ diff -up mpich/configure.ac.onenode mpich/configure.ac ---- mpich/configure.ac.onenode 2018-06-22 09:00:16.000000000 +0200 -+++ mpich/configure.ac 2018-07-30 14:59:05.236011016 +0200 -@@ -1211,19 +1211,11 @@ mkdir -p modules private_modules test_mo +--- mpich/configure.ac.onenode 2020-09-15 12:55:04.903053847 +0200 ++++ mpich/configure.ac 2020-09-15 13:18:02.433294919 +0200 +@@ -1696,19 +1696,11 @@ mkdir -p modules private_modules test_mo # into "postdeps_FC" and causes linking errors later on. postdeps_FC=$(echo $postdeps_FC | sed 's/-l //g') @@ -19,17 +19,17 @@ diff -up mpich/configure.ac.onenode mpich/configure.ac - fi -fi - AC_SUBST([SUFFIX]) - AC_SUBST([PKG_CONFIG_FILE],[elpa${SUFFIX}-${PACKAGE_VERSION}.pc]) + dnl store-build-config + AC_ARG_ENABLE([store-build-config], diff -up mpich/INSTALL.md.onenode mpich/INSTALL.md ---- mpich/INSTALL.md.onenode 2018-07-30 14:59:05.236011016 +0200 -+++ mpich/INSTALL.md 2018-07-30 15:00:21.978765980 +0200 -@@ -139,9 +139,6 @@ configure FC=gfortran --with-mpi=no +--- mpich/INSTALL.md.onenode 2020-09-15 12:55:04.903053847 +0200 ++++ mpich/INSTALL.md 2020-09-15 12:55:35.322278705 +0200 +@@ -171,9 +171,6 @@ configure FC=gfortran --with-mpi=no **DO NOT specify a MPI compiler here!** -Note, that the installed *ELPA* library files will be suffixed with --"_onenode", in order to discriminate this build from possible ones with MPI. +-`_onenode`, in order to discriminate this build from possible ones with MPI. - Please continue reading at "C) Enabling GPU support" diff --git a/elpa-simd.patch b/elpa-simd.patch deleted file mode 100644 index 7df0035..0000000 --- a/elpa-simd.patch +++ /dev/null @@ -1,77 +0,0 @@ -diff -up mpich/configure.ac.simd mpich/configure.ac ---- mpich/configure.ac.simd 2019-12-06 12:33:56.084477063 +0100 -+++ mpich/configure.ac 2019-12-06 12:36:48.024825037 +0100 -@@ -947,6 +947,8 @@ int main(int argc, char **argv) { - fi - - -+save_CFLAGS="$CFLAGS" -+CFLAGS="$CFLAGS -msse3" - if test x"${need_sse}" = x"yes"; then - AC_MSG_CHECKING(whether we can compile SSE3 with gcc intrinsics in C) - AC_COMPILE_IFELSE([AC_LANG_SOURCE([ -@@ -965,7 +967,9 @@ int main(int argc, char **argv) { - AC_MSG_ERROR([Could not compile test program, try with --disable-sse, or adjust the C compiler or CFLAGS]) - fi - AC_DEFINE([HAVE_SSE_INTRINSICS],[1],[gcc intrinsics SSE is supported on this CPU]) -+ SSE3CFLAGS="-msse3" - fi -+CFLAGS="$save_CFLAGS" - - - if test x"${need_sse_assembly}" = x"yes"; then -@@ -1007,6 +1011,8 @@ fi - if test x"${need_avx}" = x"yes"; then - dnl check whether one can compile AVX gcc intrinsics - AC_MSG_CHECKING([whether we can compile AVX gcc intrinsics in C]) -+ save_CFLAGS="$CFLAGS" -+ CFLAGS="$CFLAGS -mavx" - AC_COMPILE_IFELSE([AC_LANG_SOURCE([ - #include <x86intrin.h> - int main(int argc, char **argv){ -@@ -1023,11 +1029,15 @@ if test x"${need_avx}" = x"yes"; then - AC_MSG_ERROR([Could not compile a test program with AVX, try with --disable-avx, or adjust the C compiler or CFLAGS]) - fi - AC_DEFINE([HAVE_AVX],[1],[AVX is supported on this CPU]) -+ AVXCFLAGS="-mavx" -+ CFLAGS="$save_CFLAGS" - fi - - - if test x"${need_avx2}" = x"yes"; then - AC_MSG_CHECKING([whether we can compile AVX2 gcc intrinsics in C]) -+ save_CFLAGS="$CFLAGS" -+ CFLAGS="$CFLAGS -mavx2 -mfma" - AC_COMPILE_IFELSE([AC_LANG_SOURCE([ - #include <x86intrin.h> - int main(int argc, char **argv){ -@@ -1045,6 +1055,8 @@ if test x"${need_avx2}" = x"yes"; then - AC_MSG_ERROR([Could not compile a test program with AVX2, try with --disable-avx2, or adjust the C compiler or CFLAGS]) - fi - AC_DEFINE([HAVE_AVX2],[1],[AVX2 is supported on this CPU]) -+ AVX2CFLAGS="-mavx2 -mfma" -+ CFLAGS="$save_CFLAGS" - fi - - -@@ -1335,6 +1347,9 @@ AC_SUBST([WITH_MKL]) - AC_SUBST([WITH_BLACS]) - AC_SUBST([FC_MODINC]) - AC_SUBST([FC_MODOUT]) -+AC_SUBST([SSE3CFLAGS]) -+AC_SUBST([AVXCFLAGS]) -+AC_SUBST([AVX2CFLAGS]) - AC_SUBST([OPENMP_CFLAGS]) - AC_SUBST([OPENMP_FCFLAGS]) - AC_SUBST([OPENMP_LDFLAGS]) -diff -up mpich/Makefile.am.simd mpich/Makefile.am ---- mpich/Makefile.am.simd 2019-10-08 12:17:31.000000000 +0200 -+++ mpich/Makefile.am 2019-12-06 12:33:56.087477086 +0100 -@@ -33,6 +33,7 @@ endif - # internal parts - noinst_LTLIBRARIES += libelpa@SUFFIX@_private.la - libelpa@SUFFIX@_private_la_FCFLAGS = $(AM_FCFLAGS) $(FC_MODOUT)private_modules $(FC_MODINC)private_modules -+libelpa@SUFFIX@_private_la_CFLAGS = $(SSE3CFLAGS) $(AVXCFLAGS) $(AVX2CFLAGS) $(AM_CFLAGS) - libelpa@SUFFIX@_private_la_SOURCES = \ - src/elpa_impl.F90 \ - src/elpa_autotune_impl.F90 \ diff --git a/elpa-vsx.patch b/elpa-vsx.patch index ab4d580..7f3de10 100644 --- a/elpa-vsx.patch +++ b/elpa-vsx.patch @@ -1,7 +1,7 @@ diff -up mpich/src/elpa2/kernels/real_128bit_256bit_512bit_BLOCK_template.c.vsx mpich/src/elpa2/kernels/real_128bit_256bit_512bit_BLOCK_template.c ---- mpich/src/elpa2/kernels/real_128bit_256bit_512bit_BLOCK_template.c.vsx 2019-10-08 10:17:31.000000000 +0000 -+++ mpich/src/elpa2/kernels/real_128bit_256bit_512bit_BLOCK_template.c 2019-12-06 12:42:40.826334062 +0000 -@@ -175,7 +175,7 @@ +--- mpich/src/elpa2/kernels/real_128bit_256bit_512bit_BLOCK_template.c.vsx 2020-05-27 13:16:25.000000000 +0200 ++++ mpich/src/elpa2/kernels/real_128bit_256bit_512bit_BLOCK_template.c 2020-09-21 15:23:52.106489501 +0200 +@@ -184,7 +184,7 @@ #ifdef DOUBLE_PRECISION_REAL #define offset 2 #define __SIMD_DATATYPE __vector double @@ -10,57 +10,164 @@ diff -up mpich/src/elpa2/kernels/real_128bit_256bit_512bit_BLOCK_template.c.vsx #endif #ifdef SINGLE_PRECISION_REAL -@@ -1829,7 +1829,7 @@ __forceinline void CONCAT_8ARGS(hh_trafo - #endif /* VEC_SET == 128 */ +@@ -197,6 +197,7 @@ + #define _SIMD_STORE vec_st + #define _SIMD_ADD vec_add + #define _SIMD_MUL vec_mul ++#define _SIMD_SUB vec_sub + #define _SIMD_SET1 vec_splats - #if VEC_SET == 1282 -- __SIMD_DATATYPE sign = vec_spalts(-1.0); -+ __SIMD_DATATYPE sign = vec_splats(-1.0); + #endif /* VEC_SET == SPARC64_SSE */ +@@ -1629,7 +1630,7 @@ void CONCAT_7ARGS(PREFIX,_hh_trafo_real_ + + + #undef ROW_LENGTH +-#if VEC_SET == SSE_128 || VEC_SET == SPARC64_SSE || VEC_SET == NEON_ARCH64_128 ++#if VEC_SET == SSE_128 || VEC_SET == SPARC64_SSE || VEC_SET == VSX_SSE || VEC_SET == NEON_ARCH64_128 + #ifdef DOUBLE_PRECISION_REAL + #define ROW_LENGTH 6 + #define STEP_SIZE 6 +@@ -1640,7 +1641,7 @@ void CONCAT_7ARGS(PREFIX,_hh_trafo_real_ + #define STEP_SIZE 12 + #define UPPER_BOUND 8 #endif +-#endif /* VEC_SET == SSE_128 || VEC_SET == SPARC64_SSE || VEC_SET == NEON_ARCH64_128 */ ++#endif /* VEC_SET == SSE_128 || VEC_SET == SPARC64_SSE || VEC_SET == VSX_SSE || VEC_SET == NEON_ARCH64_128 */ + #if VEC_SET == AVX_256 || VEC_SET == AVX2_256 + #ifdef DOUBLE_PRECISION_REAL +@@ -1680,14 +1681,14 @@ void CONCAT_7ARGS(PREFIX,_hh_trafo_real_ -@@ -5124,7 +5124,7 @@ __forceinline void CONCAT_8ARGS(hh_trafo - #endif /* VEC_SET == 128 */ - #if VEC_SET == 1282 -- __SIMD_DATATYPE sign = vec_spalts(-1.0); -+ __SIMD_DATATYPE sign = vec_splats(-1.0); + #undef ROW_LENGTH +-#if VEC_SET == SSE_128 || VEC_SET == SPARC64_SSE || VEC_SET == NEON_ARCH64_128 ++#if VEC_SET == SSE_128 || VEC_SET == SPARC64_SSE || VEC_SET == VSX_SSE || VEC_SET == NEON_ARCH64_128 + #ifdef DOUBLE_PRECISION_REAL + #define ROW_LENGTH 4 #endif + #ifdef SINGLE_PRECISION_REAL + #define ROW_LENGTH 8 + #endif +-#endif /* VEC_SET == SSE_128 || VEC_SET == SPARC64_SSE || VEC_SET == NEON_ARCH64_128 */ ++#endif /* VEC_SET == SSE_128 || VEC_SET == SPARC64_SSE || VEC_SET == VSX_SSE || VEC_SET == NEON_ARCH64_128 */ - #if VEC_SET == 256 -@@ -8141,7 +8141,7 @@ __forceinline void CONCAT_8ARGS(hh_trafo - #endif /* VEC_SET == 128 */ + #if VEC_SET == AVX_256 || VEC_SET == AVX2_256 + #ifdef DOUBLE_PRECISION_REAL +@@ -1715,14 +1716,14 @@ void CONCAT_7ARGS(PREFIX,_hh_trafo_real_ + } - #if VEC_SET == 1282 -- __SIMD_DATATYPE sign = vec_spalts(-1.0); -+ __SIMD_DATATYPE sign = vec_splats(-1.0); + #undef ROW_LENGTH +-#if VEC_SET == SSE_128 || VEC_SET == SPARC64_SSE || VEC_SET == NEON_ARCH64_128 ++#if VEC_SET == SSE_128 || VEC_SET == SPARC64_SSE || VEC_SET == VSX_SSE || VEC_SET == NEON_ARCH64_128 + #ifdef DOUBLE_PRECISION_REAL + #define ROW_LENGTH 2 + #endif + #ifdef SINGLE_PRECISION_REAL + #define ROW_LENGTH 4 #endif +-#endif /* VEC_SET == SSE_128 || VEC_SET == SPARC64_SSE || VEC_SET == NEON_ARCH64_128 */ ++#endif /* VEC_SET == SSE_128 || VEC_SET == SPARC64_SSE || VEC_SET == VSX_SSE || VEC_SET == NEON_ARCH64_128 */ - #if VEC_SET == 256 -@@ -10865,7 +10865,7 @@ __forceinline void CONCAT_8ARGS(hh_trafo - #endif /* VEC_SET == 128 */ + #if VEC_SET == AVX_256 || VEC_SET == AVX2_256 + #ifdef DOUBLE_PRECISION_REAL +@@ -1772,7 +1773,7 @@ void CONCAT_7ARGS(PREFIX,_hh_trafo_real_ + #ifdef BLOCK6 - #if VEC_SET == 1282 -- __SIMD_DATATYPE sign = vec_spalts(-1.0); -+ __SIMD_DATATYPE sign = vec_splats(-1.0); + #undef ROW_LENGTH +-#if VEC_SET == SSE_128 || VEC_SET == SPARC64_SSE || VEC_SET == NEON_ARCH64_128 ++#if VEC_SET == SSE_128 || VEC_SET == SPARC64_SSE || VEC_SET == VSX_SSE || VEC_SET == NEON_ARCH64_128 + #ifdef DOUBLE_PRECISION_REAL + #define ROW_LENGTH 4 + #define STEP_SIZE 4 +@@ -1783,7 +1784,7 @@ void CONCAT_7ARGS(PREFIX,_hh_trafo_real_ + #define STEP_SIZE 8 + #define UPPER_BOUND 4 #endif +-#endif /* VEC_SET == SSE_128 || VEC_SET == SPARC64_SSE || VEC_SET == NEON_ARCH64_128 */ ++#endif /* VEC_SET == SSE_128 || VEC_SET == SPARC64_SSE || VEC_SET == VSX_SSE || VEC_SET == NEON_ARCH64_128 */ - #if VEC_SET == 256 -@@ -13324,7 +13324,7 @@ __forceinline void CONCAT_8ARGS(hh_trafo - #endif /* VEC_SET == 128 */ + #if VEC_SET == AVX_256 || VEC_SET == AVX2_256 + #ifdef DOUBLE_PRECISION_REAL +@@ -1822,14 +1823,14 @@ void CONCAT_7ARGS(PREFIX,_hh_trafo_real_ + } - #if VEC_SET == 1282 -- __SIMD_DATATYPE sign = vec_spalts(-1.0); -+ __SIMD_DATATYPE sign = vec_splats(-1.0); + #undef ROW_LENGTH +-#if VEC_SET == SSE_128 || VEC_SET == SPARC64_SSE || VEC_SET == NEON_ARCH64_128 ++#if VEC_SET == SSE_128 || VEC_SET == SPARC64_SSE || VEC_SET == VSX_SSE || VEC_SET == NEON_ARCH64_128 + #ifdef DOUBLE_PRECISION_REAL + #define ROW_LENGTH 2 #endif + #ifdef SINGLE_PRECISION_REAL + #define ROW_LENGTH 4 + #endif +-#endif /* VEC_SET == SSE_128 || VEC_SET == SPARC64_SSE || VEC_SET == NEON_ARCH64_128 */ ++#endif /* VEC_SET == SSE_128 || VEC_SET == SPARC64_SSE || VEC_SET == VSX_SSE || VEC_SET == NEON_ARCH64_128 */ - #if VEC_SET == 256 -@@ -15497,7 +15497,7 @@ __forceinline void CONCAT_8ARGS(hh_trafo - #endif /* VEC_SET == 128 */ + #if VEC_SET == AVX_256 || VEC_SET == AVX2_256 + #ifdef DOUBLE_PRECISION_REAL +diff -up mpich/src/elpa2/kernels/real_vsx_4hv_double_precision.c.vsx mpich/src/elpa2/kernels/real_vsx_4hv_double_precision.c +--- mpich/src/elpa2/kernels/real_vsx_4hv_double_precision.c.vsx 2020-05-27 13:16:25.000000000 +0200 ++++ mpich/src/elpa2/kernels/real_vsx_4hv_double_precision.c 2020-09-21 15:15:22.777337971 +0200 +@@ -49,11 +49,11 @@ + #define REALCASE 1 + #define DOUBLE_PRECISION 1 + #define BLOCK4 1 +-#define SIMD_SET VSX_SSE ++#define VEC_SET VSX_SSE + #include "../../general/precision_macros.h" +-#include "real_vsx_4hv_template.c" ++#include "real_128bit_256bit_512bit_BLOCK_template.c" + #undef BLOCK4 +-#undef SIMD_SET ++#undef VEC_SET + #undef REALCASE + #undef DOUBLE_PRECISION - #if VEC_SET == 1282 -- __SIMD_DATATYPE sign = vec_spalts(-1.0); -+ __SIMD_DATATYPE sign = vec_splats(-1.0); - #endif +diff -up mpich/src/elpa2/kernels/real_vsx_4hv_single_precision.c.vsx mpich/src/elpa2/kernels/real_vsx_4hv_single_precision.c +--- mpich/src/elpa2/kernels/real_vsx_4hv_single_precision.c.vsx 2020-05-27 13:16:25.000000000 +0200 ++++ mpich/src/elpa2/kernels/real_vsx_4hv_single_precision.c 2020-09-21 15:15:22.777337971 +0200 +@@ -49,11 +49,11 @@ + #define REALCASE 1 + #define SINGLE_PRECISION 1 + #define BLOCK4 1 +-#define SIMD_SET VSX_SSE ++#define VEC_SET VSX_SSE + #include "../../general/precision_macros.h" +-#include "real_vsx_4hv_template.c" ++#include "real_128bit_256bit_512bit_BLOCK_template.c" + #undef BLOCK4 +-#undef SIMD_SET ++#undef VEC_SET + #undef REALCASE + #undef SINGLE_PRECISION + +diff -up mpich/src/elpa2/kernels/real_vsx_6hv_double_precision.c.vsx mpich/src/elpa2/kernels/real_vsx_6hv_double_precision.c +--- mpich/src/elpa2/kernels/real_vsx_6hv_double_precision.c.vsx 2020-05-27 13:16:25.000000000 +0200 ++++ mpich/src/elpa2/kernels/real_vsx_6hv_double_precision.c 2020-09-21 15:15:22.777337971 +0200 +@@ -49,11 +49,11 @@ + #define REALCASE 1 + #define DOUBLE_PRECISION 1 + #define BLOCK6 1 +-#define SIMD_SET VSX_SSE ++#define VEC_SET VSX_SSE + #include "../../general/precision_macros.h" +-#include "real_vsx_6hv_template.c" ++#include "real_128bit_256bit_512bit_BLOCK_template.c" + #undef BLOCK6 +-#undef SIMD_SET ++#undef VEC_SET + #undef REALCASE + #undef DOUBLE_PRECISION - #if VEC_SET == 256 +diff -up mpich/src/elpa2/kernels/real_vsx_6hv_single_precision.c.vsx mpich/src/elpa2/kernels/real_vsx_6hv_single_precision.c +--- mpich/src/elpa2/kernels/real_vsx_6hv_single_precision.c.vsx 2020-05-27 13:16:25.000000000 +0200 ++++ mpich/src/elpa2/kernels/real_vsx_6hv_single_precision.c 2020-09-21 15:15:22.777337971 +0200 +@@ -51,7 +51,7 @@ + #define BLOCK6 1 + #define VEC_SET VSX_SSE + #include "../../general/precision_macros.h" +-#include "real_vsx_6hv_template.c" ++#include "real_128bit_256bit_512bit_BLOCK_template.c" + #undef VEC_SET + #undef BLOCK6 + #undef REALCASE diff --git a/elpa.spec b/elpa.spec index 5924029..8345bbb 100644 --- a/elpa.spec +++ b/elpa.spec @@ -10,12 +10,12 @@ %bcond_without check -%global sover 14 +%global sover 15 Summary: High-performance library for parallel solution of eigenvalue problems Name: elpa -Version: 2019.05.002 -Release: 6%{?dist} +Version: 2020.05.001 +Release: 1%{?dist} URL: https://elpa.mpcdf.mpg.de/software Source0: https://elpa.mpcdf.mpg.de/html/Releases/%{version}/elpa-%{version}.tar.gz Source1: https://elpa.mpcdf.mpg.de/html/Releases/%{version}/elpa-%{version}.tar.gz.a… @@ -24,18 +24,17 @@ Source2: gpg-keyring-26BC8F899C6A2698BDD6EF6A69260748A5F870B5.gpg Patch1: elpa-onenode.patch # fix typos in VSX code Patch2: elpa-vsx.patch -# fix detection of AVX(2) compiler support and use them only in the library -Patch3: elpa-simd.patch -# fix test errors on aarch64 -Patch4: elpa-aarch64-no-fma.patch -# fix test errors on x86_64 -Patch5: elpa-merge.patch +# fix test failures on x86_64 +Patch3: elpa-c-binding.patch +# add FlexiBLAS support +Patch6: elpa-flexiblas.patch License: LGPLv3+ BuildRequires: %{blaslib}-devel BuildRequires: gcc-gfortran BuildRequires: gnupg2 BuildRequires: libtool BuildRequires: /usr/bin/execstack +BuildRequires: /usr/bin/xxd %if %{with papi} BuildRequires: papi-devel %endif @@ -156,9 +155,8 @@ mv elpa-%{version} mpich pushd mpich %patch1 -p1 -b .onenode %patch2 -p1 -b .vsx -%patch3 -p1 -b .simd -%patch4 -p1 -b .aarch64-no-fma -%patch5 -p1 -b .merge +%patch3 -p1 -b .cb +%patch6 -p1 -b .fb autoreconf -vifs popd cp -pr mpich openmpi @@ -167,7 +165,7 @@ mkdir _openmp cp -pr mpich openmpi serial _openmp/ %build -%global defopts --disable-silent-rules --disable-static --docdir=%{_pkgdocdir} --enable-legacy-interface +%global defopts --disable-silent-rules --disable-static --docdir=%{_pkgdocdir} %global ldflags %{__global_ldflags} %if %{with atlas} %global ldflags %{ldflags} -L%{_libdir}/atlas @@ -178,11 +176,15 @@ cp -pr mpich openmpi serial _openmp/ for mpi in '' mpich openmpi ; do export CFLAGS="%{optflags}" +%ifarch x86_64 + export CFLAGS="${CFLAGS} -mssse3 -mavx" +%endif export LDFLAGS="%{ldflags}" export FCFLAGS="%{fcflags}" if [ -n "$mpi" ]; then module load mpi/${mpi}-%{_arch} export LDFLAGS="${LDFLAGS} -L$MPI_LIB" + export CFLAGS="${CFLAGS} -I$MPI_INCLUDE" export FCFLAGS="${FCFLAGS} -I$MPI_FORTRAN_MOD_DIR" fi for s in '' _openmp ; do @@ -195,20 +197,20 @@ for mpi in '' mpich openmpi ; do mpiflag="--with-mpi=no" fi sed -i -e "s,\${includedir}/elpa@SUFFIX@-@PACKAGE_VERSION@/modules,${fmoddir}," elpa.pc.in - sed -i "s,openblas,flexiblas openblas," configure %configure %{defopts} \ %ifarch aarch64 --enable-neon-arch64 \ %endif %ifarch ppc64le - --enable-vsx \ + --disable-vsx \ %endif %ifnarch x86_64 --disable-sse-assembly \ --disable-sse \ --disable-avx \ - --disable-avx2 \ %endif + --disable-avx2 \ + --disable-avx512 \ ${s:+--enable-openmp} \ %if %{with papi} --with-papi \ @@ -253,19 +255,10 @@ for s in '' _openmp ; do done done echo ".so elpa2_print_kernels.1" > %{buildroot}%{_mandir}/man1/elpa2_print_kernels_openmp.1 +rm %{buildroot}%{_pkgdocdir}/USERS_GUIDE_DEPRECATED_LEGACY_API.md %if %{with check} %check -# Test suite failures -# Build time: minutes -# Number of tests: serial - 83, MPI - 127 -# build time serial serial+omp mpich mpich+omp openmpi openmpi+omp -# aarch64 20 3 9 3 7 3 3 -# armv7hl N/A N/A N/A N/A N/A N/A N/A -# i686 24 0 8 0 8 0 0 -# ppc64le 13 9 16 10 14 10 10 -# s390x 11 0 5 0 2 0 0 -# x86_64 23 0 18 0 12 0 0 . /etc/profile.d/modules.sh for s in '' _openmp ; do for mpi in '' mpich openmpi ; do @@ -320,9 +313,7 @@ done %{_pkgdocdir}/CONTRIBUTING.md %exclude %{_pkgdocdir}/INSTALL.md %{_pkgdocdir}/USERS_GUIDE.md -%{_pkgdocdir}/USERS_GUIDE_DEPRECATED_LEGACY_API.md %{_mandir}/man3/elpa_*.3* -%{_mandir}/man3/solve_evp_*.3* %files devel %{_libdir}/libelpa.so @@ -358,6 +349,13 @@ done %{_fmoddir}/openmpi*/*.mod %changelog +* Tue Sep 15 2020 Dominik Mierzejewski <rpm(a)greysector.net> 2020.05.001-1 +- update to 2020.05.001 (ABI and API break) +- rebase patches and drop obsolete ones +- legacy API removed +- build only SSE3 and AVX SIMD kernels for x86 which should still work on 10yo machines +- disable VSX SIMD as the kernels are broken in this release + * Wed Aug 12 2020 Iñaki Úcar <iucar(a)fedoraproject.org> - 2019.05.002-6 - https://fedoraproject.org/wiki/Changes/FlexiBLAS_as_BLAS/LAPACK_manager diff --git a/sources b/sources index d37d237..b651319 100644 --- a/sources +++ b/sources @@ -1,2 +1,2 @@ -SHA512 (elpa-2019.05.002.tar.gz) = af665a5b22a994d8a1d1f1c97e53706bcd74a90caa2142ad10cd356a790438ae9a9f45d1f2e4df5d485271b0416dff7f7ed70d681d1c67741b30af40c7f787c1 -SHA512 (elpa-2019.05.002.tar.gz.asc) = 96b59ac8a9ca31d156c77c6ca1df0cb09c0c29ad3f8c5d37f42b7ea73e3aa0301950107afaed66309cc5f3d4f084b5cc5d57ca8e4ad5ed87ed3482b62ff54412 +SHA512 (elpa-2020.05.001.tar.gz) = 0bd6bc15256f30df17066df357a109c9620cd423a4f5063a1fc3a3d44c7dfe091ec5f6dacfaacecbc006de220fb44c1cce3398471a00d41c5e93bc6f4023e207 +SHA512 (elpa-2020.05.001.tar.gz.asc) = 7e37ef2be8bbdbdc31205208cd9a718ec952504b7edde763f0cb2d608aca1e1922c7a8bea08f27e00152193011dbe3d95ec28f2e190f215613f885e5ea3c7341

1 0

Architecture specific change in rpms/elpa.git
by githook-noreply＠fedoraproject.org 25 Sep '20

25 Sep '20

The package rpms/elpa.git has added or updated architecture specific content in its spec file (ExclusiveArch/ExcludeArch or %ifarch/%ifnarch) in commit(s): https://src.fedoraproject.org/cgit/rpms/elpa.git/commit/?id=4e8d6a84a4c6b62…. Change: +%ifarch x86_64 Thanks. Full change: ============ commit 4e8d6a84a4c6b62775dc30d2a7358f77a6a39f71 Author: Dominik 'Rathann' Mierzejewski <dominik(a)greysector.net> Date: Fri Sep 25 13:04:45 2020 +0200 update to 2020.05.001 (ABI and API break) rebase patches and drop obsolete ones legacy API removed build only SSE3 and AVX SIMD kernels for x86 which should still work on 10yo machines disable VSX SIMD as the kernels are broken in this release diff --git a/.gitignore b/.gitignore index 3932767..13ce3a2 100644 --- a/.gitignore +++ b/.gitignore @@ -6,3 +6,5 @@ /elpa-2017.05.003.tar.gz.asc /elpa-2019.05.002.tar.gz /elpa-2019.05.002.tar.gz.asc +/elpa-2020.05.001.tar.gz +/elpa-2020.05.001.tar.gz.asc diff --git a/elpa-aarch64-no-fma.patch b/elpa-aarch64-no-fma.patch deleted file mode 100644 index 8993c06..0000000 --- a/elpa-aarch64-no-fma.patch +++ /dev/null @@ -1,11 +0,0 @@ -diff -up elpa-2019.05.002/src/elpa2/kernels/real_128bit_256bit_512bit_BLOCK_template.c.aarch64-no-fma elpa-2019.05.002/src/elpa2/kernels/real_128bit_256bit_512bit_BLOCK_template.c ---- elpa-2019.05.002/src/elpa2/kernels/real_128bit_256bit_512bit_BLOCK_template.c.aarch64-no-fma 2019-10-08 12:17:31.000000000 +0200 -+++ elpa-2019.05.002/src/elpa2/kernels/real_128bit_256bit_512bit_BLOCK_template.c 2019-12-11 23:23:10.153036398 +0100 -@@ -193,7 +193,6 @@ - #endif /* VEC_SET == 1281 */ - - #if VEC_SET == NEON_ARCH64_128 --#define __ELPA_USE_FMA__ - #ifdef DOUBLE_PRECISION_REAL - #define offset 2 - #define __SIMD_DATATYPE __Float64x2_t diff --git a/elpa-c-binding.patch b/elpa-c-binding.patch new file mode 100644 index 0000000..c6c0171 --- /dev/null +++ b/elpa-c-binding.patch @@ -0,0 +1,12 @@ +diff -up mpich/test/shared/test_blacs_infrastructure.F90.layout mpich/test/shared/test_blacs_infrastructure.F90 +--- mpich/test/shared/test_blacs_infrastructure.F90.layout 2020-06-08 16:09:32.000000000 +0200 ++++ mpich/test/shared/test_blacs_infrastructure.F90 2020-09-24 16:32:01.225307325 +0200 +@@ -84,7 +84,7 @@ module test_blacs_infrastructure + #ifdef SXAURORA + character(len=1), intent(in) :: layout + #else +- character(len=1), intent(in), value :: layout ++ character(kind=c_char), intent(in), value :: layout + #endif + TEST_INT_TYPE, intent(out) :: my_blacs_ctxt, my_prow, my_pcol + diff --git a/elpa-flexiblas.patch b/elpa-flexiblas.patch new file mode 100644 index 0000000..8f6e678 --- /dev/null +++ b/elpa-flexiblas.patch @@ -0,0 +1,12 @@ +diff -up mpich/configure.ac.fb mpich/configure.ac +--- mpich/configure.ac.fb 2020-09-15 13:19:43.467050663 +0200 ++++ mpich/configure.ac 2020-09-15 13:19:43.468050671 +0200 +@@ -527,7 +527,7 @@ if test x"${have_mkl}" = x"yes" ; then + else + + dnl first check blas +- AC_SEARCH_LIBS([dgemm],[openblas satlas blas],[have_blas=yes],[have_blas=no]) ++ AC_SEARCH_LIBS([dgemm],[flexiblas openblas satlas blas],[have_blas=yes],[have_blas=no]) + AC_MSG_CHECKING([whether we can link a program with a blas lib]) + AC_MSG_RESULT([${have_blas}]) + diff --git a/elpa-merge.patch b/elpa-merge.patch deleted file mode 100644 index b303e95..0000000 --- a/elpa-merge.patch +++ /dev/null @@ -1,48 +0,0 @@ -diff --git a/src/elpa1/elpa1_merge_systems_real_template.F90 b/src/elpa1/elpa1_merge_systems_real_template.F90 -index 6bc91a81..9ce49e4e 100644 ---- a/src/elpa1/elpa1_merge_systems_real_template.F90 -+++ b/src/elpa1/elpa1_merge_systems_real_template.F90 -@@ -438,9 +438,9 @@ - #ifdef WITH_OPENMP - - call obj%timer%start("OpenMP parallel" // PRECISION_SUFFIX) --!$OMP PARALLEL PRIVATE(i,my_thread,delta,s,info,j) -- my_thread = omp_get_thread_num() --!$OMP DO -+!!$OMP PARALLEL PRIVATE(i,my_thread,delta,s,info,j) -+ my_thread = 0 -+!!$OMP DO - #endif - DO i = my_proc+1, na1, n_procs ! work distributed over all processors - call obj%timer%start("blas") -@@ -484,7 +484,7 @@ - endif - enddo - #ifdef WITH_OPENMP --!$OMP END PARALLEL -+!!$OMP END PARALLEL - - call obj%timer%stop("OpenMP parallel" // PRECISION_SUFFIX) - -@@ -513,9 +513,9 @@ - - call obj%timer%start("OpenMP parallel" // PRECISION_SUFFIX) - --!$OMP PARALLEL DO PRIVATE(i) SHARED(na1, my_proc, n_procs, & --!$OMP d1,dbase, ddiff, z, ev_scale, obj) & --!$OMP DEFAULT(NONE) -+!!$OMP PARALLEL DO PRIVATE(i) SHARED(na1, my_proc, n_procs, & -+!!$OMP d1,dbase, ddiff, z, ev_scale, obj) & -+!!$OMP DEFAULT(NONE) - - #endif - DO i = my_proc+1, na1, n_procs ! work distributed over all processors -@@ -532,7 +532,7 @@ - ! ev_scale(i) = ev_scale_val - enddo - #ifdef WITH_OPENMP --!$OMP END PARALLEL DO -+!!$OMP END PARALLEL DO - - call obj%timer%stop("OpenMP parallel" // PRECISION_SUFFIX) - diff --git a/elpa-onenode.patch b/elpa-onenode.patch index 83c74b5..ee409cf 100644 --- a/elpa-onenode.patch +++ b/elpa-onenode.patch @@ -1,7 +1,7 @@ diff -up mpich/configure.ac.onenode mpich/configure.ac ---- mpich/configure.ac.onenode 2018-06-22 09:00:16.000000000 +0200 -+++ mpich/configure.ac 2018-07-30 14:59:05.236011016 +0200 -@@ -1211,19 +1211,11 @@ mkdir -p modules private_modules test_mo +--- mpich/configure.ac.onenode 2020-09-15 12:55:04.903053847 +0200 ++++ mpich/configure.ac 2020-09-15 13:18:02.433294919 +0200 +@@ -1696,19 +1696,11 @@ mkdir -p modules private_modules test_mo # into "postdeps_FC" and causes linking errors later on. postdeps_FC=$(echo $postdeps_FC | sed 's/-l //g') @@ -19,17 +19,17 @@ diff -up mpich/configure.ac.onenode mpich/configure.ac - fi -fi - AC_SUBST([SUFFIX]) - AC_SUBST([PKG_CONFIG_FILE],[elpa${SUFFIX}-${PACKAGE_VERSION}.pc]) + dnl store-build-config + AC_ARG_ENABLE([store-build-config], diff -up mpich/INSTALL.md.onenode mpich/INSTALL.md ---- mpich/INSTALL.md.onenode 2018-07-30 14:59:05.236011016 +0200 -+++ mpich/INSTALL.md 2018-07-30 15:00:21.978765980 +0200 -@@ -139,9 +139,6 @@ configure FC=gfortran --with-mpi=no +--- mpich/INSTALL.md.onenode 2020-09-15 12:55:04.903053847 +0200 ++++ mpich/INSTALL.md 2020-09-15 12:55:35.322278705 +0200 +@@ -171,9 +171,6 @@ configure FC=gfortran --with-mpi=no **DO NOT specify a MPI compiler here!** -Note, that the installed *ELPA* library files will be suffixed with --"_onenode", in order to discriminate this build from possible ones with MPI. +-`_onenode`, in order to discriminate this build from possible ones with MPI. - Please continue reading at "C) Enabling GPU support" diff --git a/elpa-simd.patch b/elpa-simd.patch deleted file mode 100644 index 7df0035..0000000 --- a/elpa-simd.patch +++ /dev/null @@ -1,77 +0,0 @@ -diff -up mpich/configure.ac.simd mpich/configure.ac ---- mpich/configure.ac.simd 2019-12-06 12:33:56.084477063 +0100 -+++ mpich/configure.ac 2019-12-06 12:36:48.024825037 +0100 -@@ -947,6 +947,8 @@ int main(int argc, char **argv) { - fi - - -+save_CFLAGS="$CFLAGS" -+CFLAGS="$CFLAGS -msse3" - if test x"${need_sse}" = x"yes"; then - AC_MSG_CHECKING(whether we can compile SSE3 with gcc intrinsics in C) - AC_COMPILE_IFELSE([AC_LANG_SOURCE([ -@@ -965,7 +967,9 @@ int main(int argc, char **argv) { - AC_MSG_ERROR([Could not compile test program, try with --disable-sse, or adjust the C compiler or CFLAGS]) - fi - AC_DEFINE([HAVE_SSE_INTRINSICS],[1],[gcc intrinsics SSE is supported on this CPU]) -+ SSE3CFLAGS="-msse3" - fi -+CFLAGS="$save_CFLAGS" - - - if test x"${need_sse_assembly}" = x"yes"; then -@@ -1007,6 +1011,8 @@ fi - if test x"${need_avx}" = x"yes"; then - dnl check whether one can compile AVX gcc intrinsics - AC_MSG_CHECKING([whether we can compile AVX gcc intrinsics in C]) -+ save_CFLAGS="$CFLAGS" -+ CFLAGS="$CFLAGS -mavx" - AC_COMPILE_IFELSE([AC_LANG_SOURCE([ - #include <x86intrin.h> - int main(int argc, char **argv){ -@@ -1023,11 +1029,15 @@ if test x"${need_avx}" = x"yes"; then - AC_MSG_ERROR([Could not compile a test program with AVX, try with --disable-avx, or adjust the C compiler or CFLAGS]) - fi - AC_DEFINE([HAVE_AVX],[1],[AVX is supported on this CPU]) -+ AVXCFLAGS="-mavx" -+ CFLAGS="$save_CFLAGS" - fi - - - if test x"${need_avx2}" = x"yes"; then - AC_MSG_CHECKING([whether we can compile AVX2 gcc intrinsics in C]) -+ save_CFLAGS="$CFLAGS" -+ CFLAGS="$CFLAGS -mavx2 -mfma" - AC_COMPILE_IFELSE([AC_LANG_SOURCE([ - #include <x86intrin.h> - int main(int argc, char **argv){ -@@ -1045,6 +1055,8 @@ if test x"${need_avx2}" = x"yes"; then - AC_MSG_ERROR([Could not compile a test program with AVX2, try with --disable-avx2, or adjust the C compiler or CFLAGS]) - fi - AC_DEFINE([HAVE_AVX2],[1],[AVX2 is supported on this CPU]) -+ AVX2CFLAGS="-mavx2 -mfma" -+ CFLAGS="$save_CFLAGS" - fi - - -@@ -1335,6 +1347,9 @@ AC_SUBST([WITH_MKL]) - AC_SUBST([WITH_BLACS]) - AC_SUBST([FC_MODINC]) - AC_SUBST([FC_MODOUT]) -+AC_SUBST([SSE3CFLAGS]) -+AC_SUBST([AVXCFLAGS]) -+AC_SUBST([AVX2CFLAGS]) - AC_SUBST([OPENMP_CFLAGS]) - AC_SUBST([OPENMP_FCFLAGS]) - AC_SUBST([OPENMP_LDFLAGS]) -diff -up mpich/Makefile.am.simd mpich/Makefile.am ---- mpich/Makefile.am.simd 2019-10-08 12:17:31.000000000 +0200 -+++ mpich/Makefile.am 2019-12-06 12:33:56.087477086 +0100 -@@ -33,6 +33,7 @@ endif - # internal parts - noinst_LTLIBRARIES += libelpa@SUFFIX@_private.la - libelpa@SUFFIX@_private_la_FCFLAGS = $(AM_FCFLAGS) $(FC_MODOUT)private_modules $(FC_MODINC)private_modules -+libelpa@SUFFIX@_private_la_CFLAGS = $(SSE3CFLAGS) $(AVXCFLAGS) $(AVX2CFLAGS) $(AM_CFLAGS) - libelpa@SUFFIX@_private_la_SOURCES = \ - src/elpa_impl.F90 \ - src/elpa_autotune_impl.F90 \ diff --git a/elpa-vsx.patch b/elpa-vsx.patch index ab4d580..7f3de10 100644 --- a/elpa-vsx.patch +++ b/elpa-vsx.patch @@ -1,7 +1,7 @@ diff -up mpich/src/elpa2/kernels/real_128bit_256bit_512bit_BLOCK_template.c.vsx mpich/src/elpa2/kernels/real_128bit_256bit_512bit_BLOCK_template.c ---- mpich/src/elpa2/kernels/real_128bit_256bit_512bit_BLOCK_template.c.vsx 2019-10-08 10:17:31.000000000 +0000 -+++ mpich/src/elpa2/kernels/real_128bit_256bit_512bit_BLOCK_template.c 2019-12-06 12:42:40.826334062 +0000 -@@ -175,7 +175,7 @@ +--- mpich/src/elpa2/kernels/real_128bit_256bit_512bit_BLOCK_template.c.vsx 2020-05-27 13:16:25.000000000 +0200 ++++ mpich/src/elpa2/kernels/real_128bit_256bit_512bit_BLOCK_template.c 2020-09-21 15:23:52.106489501 +0200 +@@ -184,7 +184,7 @@ #ifdef DOUBLE_PRECISION_REAL #define offset 2 #define __SIMD_DATATYPE __vector double @@ -10,57 +10,164 @@ diff -up mpich/src/elpa2/kernels/real_128bit_256bit_512bit_BLOCK_template.c.vsx #endif #ifdef SINGLE_PRECISION_REAL -@@ -1829,7 +1829,7 @@ __forceinline void CONCAT_8ARGS(hh_trafo - #endif /* VEC_SET == 128 */ +@@ -197,6 +197,7 @@ + #define _SIMD_STORE vec_st + #define _SIMD_ADD vec_add + #define _SIMD_MUL vec_mul ++#define _SIMD_SUB vec_sub + #define _SIMD_SET1 vec_splats - #if VEC_SET == 1282 -- __SIMD_DATATYPE sign = vec_spalts(-1.0); -+ __SIMD_DATATYPE sign = vec_splats(-1.0); + #endif /* VEC_SET == SPARC64_SSE */ +@@ -1629,7 +1630,7 @@ void CONCAT_7ARGS(PREFIX,_hh_trafo_real_ + + + #undef ROW_LENGTH +-#if VEC_SET == SSE_128 || VEC_SET == SPARC64_SSE || VEC_SET == NEON_ARCH64_128 ++#if VEC_SET == SSE_128 || VEC_SET == SPARC64_SSE || VEC_SET == VSX_SSE || VEC_SET == NEON_ARCH64_128 + #ifdef DOUBLE_PRECISION_REAL + #define ROW_LENGTH 6 + #define STEP_SIZE 6 +@@ -1640,7 +1641,7 @@ void CONCAT_7ARGS(PREFIX,_hh_trafo_real_ + #define STEP_SIZE 12 + #define UPPER_BOUND 8 #endif +-#endif /* VEC_SET == SSE_128 || VEC_SET == SPARC64_SSE || VEC_SET == NEON_ARCH64_128 */ ++#endif /* VEC_SET == SSE_128 || VEC_SET == SPARC64_SSE || VEC_SET == VSX_SSE || VEC_SET == NEON_ARCH64_128 */ + #if VEC_SET == AVX_256 || VEC_SET == AVX2_256 + #ifdef DOUBLE_PRECISION_REAL +@@ -1680,14 +1681,14 @@ void CONCAT_7ARGS(PREFIX,_hh_trafo_real_ -@@ -5124,7 +5124,7 @@ __forceinline void CONCAT_8ARGS(hh_trafo - #endif /* VEC_SET == 128 */ - #if VEC_SET == 1282 -- __SIMD_DATATYPE sign = vec_spalts(-1.0); -+ __SIMD_DATATYPE sign = vec_splats(-1.0); + #undef ROW_LENGTH +-#if VEC_SET == SSE_128 || VEC_SET == SPARC64_SSE || VEC_SET == NEON_ARCH64_128 ++#if VEC_SET == SSE_128 || VEC_SET == SPARC64_SSE || VEC_SET == VSX_SSE || VEC_SET == NEON_ARCH64_128 + #ifdef DOUBLE_PRECISION_REAL + #define ROW_LENGTH 4 #endif + #ifdef SINGLE_PRECISION_REAL + #define ROW_LENGTH 8 + #endif +-#endif /* VEC_SET == SSE_128 || VEC_SET == SPARC64_SSE || VEC_SET == NEON_ARCH64_128 */ ++#endif /* VEC_SET == SSE_128 || VEC_SET == SPARC64_SSE || VEC_SET == VSX_SSE || VEC_SET == NEON_ARCH64_128 */ - #if VEC_SET == 256 -@@ -8141,7 +8141,7 @@ __forceinline void CONCAT_8ARGS(hh_trafo - #endif /* VEC_SET == 128 */ + #if VEC_SET == AVX_256 || VEC_SET == AVX2_256 + #ifdef DOUBLE_PRECISION_REAL +@@ -1715,14 +1716,14 @@ void CONCAT_7ARGS(PREFIX,_hh_trafo_real_ + } - #if VEC_SET == 1282 -- __SIMD_DATATYPE sign = vec_spalts(-1.0); -+ __SIMD_DATATYPE sign = vec_splats(-1.0); + #undef ROW_LENGTH +-#if VEC_SET == SSE_128 || VEC_SET == SPARC64_SSE || VEC_SET == NEON_ARCH64_128 ++#if VEC_SET == SSE_128 || VEC_SET == SPARC64_SSE || VEC_SET == VSX_SSE || VEC_SET == NEON_ARCH64_128 + #ifdef DOUBLE_PRECISION_REAL + #define ROW_LENGTH 2 + #endif + #ifdef SINGLE_PRECISION_REAL + #define ROW_LENGTH 4 #endif +-#endif /* VEC_SET == SSE_128 || VEC_SET == SPARC64_SSE || VEC_SET == NEON_ARCH64_128 */ ++#endif /* VEC_SET == SSE_128 || VEC_SET == SPARC64_SSE || VEC_SET == VSX_SSE || VEC_SET == NEON_ARCH64_128 */ - #if VEC_SET == 256 -@@ -10865,7 +10865,7 @@ __forceinline void CONCAT_8ARGS(hh_trafo - #endif /* VEC_SET == 128 */ + #if VEC_SET == AVX_256 || VEC_SET == AVX2_256 + #ifdef DOUBLE_PRECISION_REAL +@@ -1772,7 +1773,7 @@ void CONCAT_7ARGS(PREFIX,_hh_trafo_real_ + #ifdef BLOCK6 - #if VEC_SET == 1282 -- __SIMD_DATATYPE sign = vec_spalts(-1.0); -+ __SIMD_DATATYPE sign = vec_splats(-1.0); + #undef ROW_LENGTH +-#if VEC_SET == SSE_128 || VEC_SET == SPARC64_SSE || VEC_SET == NEON_ARCH64_128 ++#if VEC_SET == SSE_128 || VEC_SET == SPARC64_SSE || VEC_SET == VSX_SSE || VEC_SET == NEON_ARCH64_128 + #ifdef DOUBLE_PRECISION_REAL + #define ROW_LENGTH 4 + #define STEP_SIZE 4 +@@ -1783,7 +1784,7 @@ void CONCAT_7ARGS(PREFIX,_hh_trafo_real_ + #define STEP_SIZE 8 + #define UPPER_BOUND 4 #endif +-#endif /* VEC_SET == SSE_128 || VEC_SET == SPARC64_SSE || VEC_SET == NEON_ARCH64_128 */ ++#endif /* VEC_SET == SSE_128 || VEC_SET == SPARC64_SSE || VEC_SET == VSX_SSE || VEC_SET == NEON_ARCH64_128 */ - #if VEC_SET == 256 -@@ -13324,7 +13324,7 @@ __forceinline void CONCAT_8ARGS(hh_trafo - #endif /* VEC_SET == 128 */ + #if VEC_SET == AVX_256 || VEC_SET == AVX2_256 + #ifdef DOUBLE_PRECISION_REAL +@@ -1822,14 +1823,14 @@ void CONCAT_7ARGS(PREFIX,_hh_trafo_real_ + } - #if VEC_SET == 1282 -- __SIMD_DATATYPE sign = vec_spalts(-1.0); -+ __SIMD_DATATYPE sign = vec_splats(-1.0); + #undef ROW_LENGTH +-#if VEC_SET == SSE_128 || VEC_SET == SPARC64_SSE || VEC_SET == NEON_ARCH64_128 ++#if VEC_SET == SSE_128 || VEC_SET == SPARC64_SSE || VEC_SET == VSX_SSE || VEC_SET == NEON_ARCH64_128 + #ifdef DOUBLE_PRECISION_REAL + #define ROW_LENGTH 2 #endif + #ifdef SINGLE_PRECISION_REAL + #define ROW_LENGTH 4 + #endif +-#endif /* VEC_SET == SSE_128 || VEC_SET == SPARC64_SSE || VEC_SET == NEON_ARCH64_128 */ ++#endif /* VEC_SET == SSE_128 || VEC_SET == SPARC64_SSE || VEC_SET == VSX_SSE || VEC_SET == NEON_ARCH64_128 */ - #if VEC_SET == 256 -@@ -15497,7 +15497,7 @@ __forceinline void CONCAT_8ARGS(hh_trafo - #endif /* VEC_SET == 128 */ + #if VEC_SET == AVX_256 || VEC_SET == AVX2_256 + #ifdef DOUBLE_PRECISION_REAL +diff -up mpich/src/elpa2/kernels/real_vsx_4hv_double_precision.c.vsx mpich/src/elpa2/kernels/real_vsx_4hv_double_precision.c +--- mpich/src/elpa2/kernels/real_vsx_4hv_double_precision.c.vsx 2020-05-27 13:16:25.000000000 +0200 ++++ mpich/src/elpa2/kernels/real_vsx_4hv_double_precision.c 2020-09-21 15:15:22.777337971 +0200 +@@ -49,11 +49,11 @@ + #define REALCASE 1 + #define DOUBLE_PRECISION 1 + #define BLOCK4 1 +-#define SIMD_SET VSX_SSE ++#define VEC_SET VSX_SSE + #include "../../general/precision_macros.h" +-#include "real_vsx_4hv_template.c" ++#include "real_128bit_256bit_512bit_BLOCK_template.c" + #undef BLOCK4 +-#undef SIMD_SET ++#undef VEC_SET + #undef REALCASE + #undef DOUBLE_PRECISION - #if VEC_SET == 1282 -- __SIMD_DATATYPE sign = vec_spalts(-1.0); -+ __SIMD_DATATYPE sign = vec_splats(-1.0); - #endif +diff -up mpich/src/elpa2/kernels/real_vsx_4hv_single_precision.c.vsx mpich/src/elpa2/kernels/real_vsx_4hv_single_precision.c +--- mpich/src/elpa2/kernels/real_vsx_4hv_single_precision.c.vsx 2020-05-27 13:16:25.000000000 +0200 ++++ mpich/src/elpa2/kernels/real_vsx_4hv_single_precision.c 2020-09-21 15:15:22.777337971 +0200 +@@ -49,11 +49,11 @@ + #define REALCASE 1 + #define SINGLE_PRECISION 1 + #define BLOCK4 1 +-#define SIMD_SET VSX_SSE ++#define VEC_SET VSX_SSE + #include "../../general/precision_macros.h" +-#include "real_vsx_4hv_template.c" ++#include "real_128bit_256bit_512bit_BLOCK_template.c" + #undef BLOCK4 +-#undef SIMD_SET ++#undef VEC_SET + #undef REALCASE + #undef SINGLE_PRECISION + +diff -up mpich/src/elpa2/kernels/real_vsx_6hv_double_precision.c.vsx mpich/src/elpa2/kernels/real_vsx_6hv_double_precision.c +--- mpich/src/elpa2/kernels/real_vsx_6hv_double_precision.c.vsx 2020-05-27 13:16:25.000000000 +0200 ++++ mpich/src/elpa2/kernels/real_vsx_6hv_double_precision.c 2020-09-21 15:15:22.777337971 +0200 +@@ -49,11 +49,11 @@ + #define REALCASE 1 + #define DOUBLE_PRECISION 1 + #define BLOCK6 1 +-#define SIMD_SET VSX_SSE ++#define VEC_SET VSX_SSE + #include "../../general/precision_macros.h" +-#include "real_vsx_6hv_template.c" ++#include "real_128bit_256bit_512bit_BLOCK_template.c" + #undef BLOCK6 +-#undef SIMD_SET ++#undef VEC_SET + #undef REALCASE + #undef DOUBLE_PRECISION - #if VEC_SET == 256 +diff -up mpich/src/elpa2/kernels/real_vsx_6hv_single_precision.c.vsx mpich/src/elpa2/kernels/real_vsx_6hv_single_precision.c +--- mpich/src/elpa2/kernels/real_vsx_6hv_single_precision.c.vsx 2020-05-27 13:16:25.000000000 +0200 ++++ mpich/src/elpa2/kernels/real_vsx_6hv_single_precision.c 2020-09-21 15:15:22.777337971 +0200 +@@ -51,7 +51,7 @@ + #define BLOCK6 1 + #define VEC_SET VSX_SSE + #include "../../general/precision_macros.h" +-#include "real_vsx_6hv_template.c" ++#include "real_128bit_256bit_512bit_BLOCK_template.c" + #undef VEC_SET + #undef BLOCK6 + #undef REALCASE diff --git a/elpa.spec b/elpa.spec index 5924029..8345bbb 100644 --- a/elpa.spec +++ b/elpa.spec @@ -10,12 +10,12 @@ %bcond_without check -%global sover 14 +%global sover 15 Summary: High-performance library for parallel solution of eigenvalue problems Name: elpa -Version: 2019.05.002 -Release: 6%{?dist} +Version: 2020.05.001 +Release: 1%{?dist} URL: https://elpa.mpcdf.mpg.de/software Source0: https://elpa.mpcdf.mpg.de/html/Releases/%{version}/elpa-%{version}.tar.gz Source1: https://elpa.mpcdf.mpg.de/html/Releases/%{version}/elpa-%{version}.tar.gz.a… @@ -24,18 +24,17 @@ Source2: gpg-keyring-26BC8F899C6A2698BDD6EF6A69260748A5F870B5.gpg Patch1: elpa-onenode.patch # fix typos in VSX code Patch2: elpa-vsx.patch -# fix detection of AVX(2) compiler support and use them only in the library -Patch3: elpa-simd.patch -# fix test errors on aarch64 -Patch4: elpa-aarch64-no-fma.patch -# fix test errors on x86_64 -Patch5: elpa-merge.patch +# fix test failures on x86_64 +Patch3: elpa-c-binding.patch +# add FlexiBLAS support +Patch6: elpa-flexiblas.patch License: LGPLv3+ BuildRequires: %{blaslib}-devel BuildRequires: gcc-gfortran BuildRequires: gnupg2 BuildRequires: libtool BuildRequires: /usr/bin/execstack +BuildRequires: /usr/bin/xxd %if %{with papi} BuildRequires: papi-devel %endif @@ -156,9 +155,8 @@ mv elpa-%{version} mpich pushd mpich %patch1 -p1 -b .onenode %patch2 -p1 -b .vsx -%patch3 -p1 -b .simd -%patch4 -p1 -b .aarch64-no-fma -%patch5 -p1 -b .merge +%patch3 -p1 -b .cb +%patch6 -p1 -b .fb autoreconf -vifs popd cp -pr mpich openmpi @@ -167,7 +165,7 @@ mkdir _openmp cp -pr mpich openmpi serial _openmp/ %build -%global defopts --disable-silent-rules --disable-static --docdir=%{_pkgdocdir} --enable-legacy-interface +%global defopts --disable-silent-rules --disable-static --docdir=%{_pkgdocdir} %global ldflags %{__global_ldflags} %if %{with atlas} %global ldflags %{ldflags} -L%{_libdir}/atlas @@ -178,11 +176,15 @@ cp -pr mpich openmpi serial _openmp/ for mpi in '' mpich openmpi ; do export CFLAGS="%{optflags}" +%ifarch x86_64 + export CFLAGS="${CFLAGS} -mssse3 -mavx" +%endif export LDFLAGS="%{ldflags}" export FCFLAGS="%{fcflags}" if [ -n "$mpi" ]; then module load mpi/${mpi}-%{_arch} export LDFLAGS="${LDFLAGS} -L$MPI_LIB" + export CFLAGS="${CFLAGS} -I$MPI_INCLUDE" export FCFLAGS="${FCFLAGS} -I$MPI_FORTRAN_MOD_DIR" fi for s in '' _openmp ; do @@ -195,20 +197,20 @@ for mpi in '' mpich openmpi ; do mpiflag="--with-mpi=no" fi sed -i -e "s,\${includedir}/elpa@SUFFIX@-@PACKAGE_VERSION@/modules,${fmoddir}," elpa.pc.in - sed -i "s,openblas,flexiblas openblas," configure %configure %{defopts} \ %ifarch aarch64 --enable-neon-arch64 \ %endif %ifarch ppc64le - --enable-vsx \ + --disable-vsx \ %endif %ifnarch x86_64 --disable-sse-assembly \ --disable-sse \ --disable-avx \ - --disable-avx2 \ %endif + --disable-avx2 \ + --disable-avx512 \ ${s:+--enable-openmp} \ %if %{with papi} --with-papi \ @@ -253,19 +255,10 @@ for s in '' _openmp ; do done done echo ".so elpa2_print_kernels.1" > %{buildroot}%{_mandir}/man1/elpa2_print_kernels_openmp.1 +rm %{buildroot}%{_pkgdocdir}/USERS_GUIDE_DEPRECATED_LEGACY_API.md %if %{with check} %check -# Test suite failures -# Build time: minutes -# Number of tests: serial - 83, MPI - 127 -# build time serial serial+omp mpich mpich+omp openmpi openmpi+omp -# aarch64 20 3 9 3 7 3 3 -# armv7hl N/A N/A N/A N/A N/A N/A N/A -# i686 24 0 8 0 8 0 0 -# ppc64le 13 9 16 10 14 10 10 -# s390x 11 0 5 0 2 0 0 -# x86_64 23 0 18 0 12 0 0 . /etc/profile.d/modules.sh for s in '' _openmp ; do for mpi in '' mpich openmpi ; do @@ -320,9 +313,7 @@ done %{_pkgdocdir}/CONTRIBUTING.md %exclude %{_pkgdocdir}/INSTALL.md %{_pkgdocdir}/USERS_GUIDE.md -%{_pkgdocdir}/USERS_GUIDE_DEPRECATED_LEGACY_API.md %{_mandir}/man3/elpa_*.3* -%{_mandir}/man3/solve_evp_*.3* %files devel %{_libdir}/libelpa.so @@ -358,6 +349,13 @@ done %{_fmoddir}/openmpi*/*.mod %changelog +* Tue Sep 15 2020 Dominik Mierzejewski <rpm(a)greysector.net> 2020.05.001-1 +- update to 2020.05.001 (ABI and API break) +- rebase patches and drop obsolete ones +- legacy API removed +- build only SSE3 and AVX SIMD kernels for x86 which should still work on 10yo machines +- disable VSX SIMD as the kernels are broken in this release + * Wed Aug 12 2020 Iñaki Úcar <iucar(a)fedoraproject.org> - 2019.05.002-6 - https://fedoraproject.org/wiki/Changes/FlexiBLAS_as_BLAS/LAPACK_manager diff --git a/sources b/sources index d37d237..b651319 100644 --- a/sources +++ b/sources @@ -1,2 +1,2 @@ -SHA512 (elpa-2019.05.002.tar.gz) = af665a5b22a994d8a1d1f1c97e53706bcd74a90caa2142ad10cd356a790438ae9a9f45d1f2e4df5d485271b0416dff7f7ed70d681d1c67741b30af40c7f787c1 -SHA512 (elpa-2019.05.002.tar.gz.asc) = 96b59ac8a9ca31d156c77c6ca1df0cb09c0c29ad3f8c5d37f42b7ea73e3aa0301950107afaed66309cc5f3d4f084b5cc5d57ca8e4ad5ed87ed3482b62ff54412 +SHA512 (elpa-2020.05.001.tar.gz) = 0bd6bc15256f30df17066df357a109c9620cd423a4f5063a1fc3a3d44c7dfe091ec5f6dacfaacecbc006de220fb44c1cce3398471a00d41c5e93bc6f4023e207 +SHA512 (elpa-2020.05.001.tar.gz.asc) = 7e37ef2be8bbdbdc31205208cd9a718ec952504b7edde763f0cb2d608aca1e1922c7a8bea08f27e00152193011dbe3d95ec28f2e190f215613f885e5ea3c7341

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Arch-excludes September 2020