June 2025 - Arch-excludes - Fedora mailing-lists

[Report] Packages Restricting Arches
by root 30 Jun '25

30 Jun '25

List of packages currently excluding arches (2453) =========================================== - 0ad ExclusiveArch: %{ix86} x86_64 %{arm} aarch64 ppc64le - 0install ExcludeArch: %{ix86} - 389-ds-base ExcludeArch: i686 - 4ti2 ExcludeArch: %{ix86} - 90-Second-Portraits ExclusiveArch: %{arm} %{ix86} x86_64 aarch64 ppc64le riscv64 - ALL ExcludeArch: %{ix86} s390x - AcetoneISO ExcludeArch: ppc %{power64} s390x - Agda ExcludeArch: %{ix86} armv7hl - Agda-stdlib ExcludeArch: armv7hl %{ix86} - BareBonesBrowserLaunch ExclusiveArch: %{java_arches} noarch - CFR ExclusiveArch: %{java_arches} noarch - COPASI ExcludeArch: %{ix86} - CardManager ExclusiveArch: %{java_arches} noarch - CubicSDR ExcludeArch: i686 - CuraEngine ExcludeArch: %{ix86} - CuraEngine_grpc_definitions ExcludeArch: %{ix86} - DSDP ExcludeArch: %{ix86} - E ExcludeArch: %{ix86} - GAPDoc ExcludeArch: %{ix86} - GoldenCheetah ExclusiveArch: %{qt6_qtwebengine_arches} - GtkAda ExclusiveArch: %{GPRbuild_arches} - GtkAda3 ExclusiveArch: %{GPRbuild_arches} - HPCombi ExclusiveArch: x86_64 %{arm64} - IPAddress ExclusiveArch: %{java_arches} noarch - IQmol ExcludeArch: %{ix86} - InsightToolkit ExcludeArch: %{ix86} - JUnitParams ExclusiveArch: %{java_arches} noarch - Java-WebSocket ExclusiveArch: %{java_arches} noarch - L-function ExcludeArch: %{ix86} - MUSIC ExcludeArch: %{ix86} - Macaulay2 ExcludeArch: %{ix86} %{power64} - Maelstrom ExcludeArch: %{ix86} - Mars ExclusiveArch: %{java_arches} noarch - Mayavi ExcludeArch: %{ix86} - NiaAML-GUI ExcludeArch: %{ix86} - OpenColorIO ExcludeArch: i686 ExclusiveArch: x86_64 ppc64le - OpenImageIO ExcludeArch: i686 ExclusiveArch: x86_64 ppc64le - OpenMolcas ExclusiveArch: x86_64 aarch64 ppc64le s390x - OpenStego ExclusiveArch: %{java_arches} noarch - Pencil2D ExcludeArch: %{ix86} - PragmARC ExclusiveArch: %{GPRbuild_arches} - R-IRkernel ExcludeArch: %{ix86} - R-V8 ExclusiveArch: %{nodejs_arches} - R-ape ExcludeArch: %{ix86} - R-igraph ExcludeArch: %{ix86} - R-kernlab ExcludeArch: %{ix86} s390x - R-rJava ExclusiveArch: %{java_arches} - R-rtracklayer ExcludeArch: i686 - Random123 ExcludeArch: mips64r2 mips32r2 s390 - RdRand ExclusiveArch: %{ix86} x86_64 - SLOF ExclusiveArch: ppc64le - Singular ExcludeArch: %{ix86} - TOPCOM ExcludeArch: %{ix86} - VulkanMemoryAllocator ExcludeArch: %{ix86} - YafaRay ExclusiveArch: %{ix86} x86_64 - aardvark-dns ExclusiveArch: %{golang_arches_future} ExclusiveArch: aarch64 ppc64le s390x x86_64 - abiword ExcludeArch: %{ix86} - accel-config ExclusiveArch: %{ix86} x86_64 - accel-ppp ExcludeArch: %{ix86} - acpica-tools ExcludeArch: i686 armv7hl s390x - acpid ExclusiveArch: x86_64 aarch64 riscv64 - act ExcludeArch: %{ix86} - admesh ExcludeArch: %{ix86} - admeshgui ExcludeArch: %{ix86} - aegisub ExcludeArch: ppc64le s390x - aemu ExcludeArch: %{ix86} %{power64} s390x - agenda ExcludeArch: %{ix86} - ahven ExclusiveArch: %{GPRbuild_arches} - algobox ExclusiveArch: %{qt5_qtwebengine_arches} - alienarena ExcludeArch: s390x - alizams ExcludeArch: %{power64} %{ix86} s390x - alt-ergo ExcludeArch: %{ix86} - amdsmi ExclusiveArch: x86_64 - american-fuzzy-lop ExclusiveArch: x86_64 - amg4psblas ExcludeArch: %{ix86} - anaconda ExcludeArch: %{ix86} - android-tools ExcludeArch: ppc ppc64 s390x ppc64le - anet ExclusiveArch: %{GPRbuild_arches} - ansible-collection-microsoft-sql ExcludeArch: i686 - ant ExclusiveArch: %{java_arches} noarch - ant-antunit ExclusiveArch: %{java_arches} noarch - ant-contrib ExclusiveArch: %{java_arches} noarch - antlr ExclusiveArch: %{java_arches} - antlr3 ExclusiveArch: %{java_arches} - antlr4-project ExclusiveArch: %{java_arches} - antlrworks ExclusiveArch: %{java_arches} noarch - aopalliance ExclusiveArch: %{java_arches} noarch - apache-commons-beanutils ExclusiveArch: %{java_arches} noarch - apache-commons-cli ExclusiveArch: %{java_arches} noarch - apache-commons-codec ExclusiveArch: %{java_arches} noarch - apache-commons-collections ExclusiveArch: %{java_arches} noarch - apache-commons-collections4 ExclusiveArch: %{java_arches} noarch - apache-commons-compress ExclusiveArch: %{java_arches} noarch - apache-commons-digester ExclusiveArch: %{java_arches} noarch - apache-commons-exec ExclusiveArch: %{java_arches} noarch - apache-commons-io ExclusiveArch: %{java_arches} noarch - apache-commons-jxpath ExclusiveArch: %{java_arches} noarch - apache-commons-lang3 ExclusiveArch: %{java_arches} noarch - apache-commons-logging ExclusiveArch: %{java_arches} noarch - apache-commons-math ExclusiveArch: %{java_arches} noarch - apache-commons-modeler ExclusiveArch: %{java_arches} noarch - apache-commons-net ExclusiveArch: %{java_arches} noarch - apache-commons-parent ExclusiveArch: %{java_arches} noarch - apache-commons-pool ExclusiveArch: %{java_arches} noarch - apache-commons-vfs ExclusiveArch: %{java_arches} noarch - apache-ivy ExclusiveArch: %{java_arches} noarch - apache-logging-parent ExclusiveArch: %{java_arches} noarch - apache-parent ExclusiveArch: %{java_arches} noarch - apache-resource-bundles ExclusiveArch: %{java_arches} noarch - apache-sshd ExclusiveArch: %{java_arches} noarch - apiguardian ExclusiveArch: %{java_arches} noarch - appeditor ExcludeArch: %{ix86} - appstream-generator ExclusiveArch: %{ldc_arches} - apricots ExcludeArch: ppc64le aarch64 - apron ExcludeArch: %{ix86} - aquamarine ExcludeArch: %{ix86} - aqute-bnd ExclusiveArch: %{java_arches} noarch - arbor ExcludeArch: mips64r2 mips32r2 s390x %{ix86} - arc-theme ExcludeArch: %{ix86} - argparse ExcludeArch: %{ix86} - args4j ExclusiveArch: %{java_arches} noarch - arianna ExclusiveArch: %{qt6_qtwebengine_arches} - arm-compute-library ExcludeArch: i686 ppc64le s390x - arm-none-eabi-binutils-cs ExcludeArch: %{ix86} - arm-none-eabi-gcc-cs ExcludeArch: %{ix86} - arpwatch ExcludeArch: %{ix86} - asahi-installer ExcludeArch: s390x - asdcplib ExcludeArch: %{ix86} %{arm} - asmjit ExclusiveArch: aarch64 x86_64 - assertj-core ExclusiveArch: %{java_arches} noarch - astromenace ExcludeArch: ppc64 s390x - astrometry ExcludeArch: %{ix86} - asv ExcludeArch: %{ix86} - atlantik ExcludeArch: %{ix86} - atomic-queue ExcludeArch: %{ix86} - aubit4gl ExcludeArch: i686 s390x ppc64le - audacity ExcludeArch: %{ix86} s390x - audiocd-kio ExclusiveArch: x86_64 ppc64le aarch64 %{arm} - aunit ExclusiveArch: %{GPRbuild_arches} - auryn ExcludeArch: %{ix86} - auto ExclusiveArch: %{java_arches} noarch - autolink-java ExclusiveArch: noarch %{java_arches} - avgtime ExclusiveArch: %{ldc_arches} - avr-gcc ExcludeArch: %{ix86} - avrdude ExcludeArch: s390x - aws ExclusiveArch: %{GPRbuild_arches} - aws-c-auth ExcludeArch: %{ix86} ExcludeArch: s390x - aws-c-cal ExcludeArch: s390x - aws-c-common ExcludeArch: s390x - aws-c-compression ExcludeArch: s390x - aws-c-event-stream ExcludeArch: %{ix86} ExcludeArch: s390x - aws-c-http ExcludeArch: %{ix86} ExcludeArch: s390x - aws-c-io ExcludeArch: %{ix86} ExcludeArch: s390x - aws-c-mqtt ExcludeArch: %{ix86} ExcludeArch: s390x - aws-c-s3 ExcludeArch: %{ix86} ExcludeArch: s390x - aws-c-sdkutils ExcludeArch: s390x - aws-checksums ExcludeArch: s390x - awscli2 ExcludeArch: s390x - azove ExcludeArch: %{ix86} - azure-cli ExclusiveArch: %{java_arches} noarch - batik ExclusiveArch: %{java_arches} noarch - bcachefs-tools ExcludeArch: %{ix86} %{arm32} - bcal ExclusiveArch: x86_64 aarch64 ppc64le s390x riscv64 - bcc ExclusiveArch: x86_64 %{power64} aarch64 s390x armv7hl riscv64 - bcel ExclusiveArch: %{java_arches} noarch - bcftools ExcludeArch: s390x - bcm283x-firmware ExclusiveArch: aarch64 - beansbinding ExclusiveArch: %{java_arches} noarch - bear ExcludeArch: %{ix86} - bear-factory ExcludeArch: ppc64le - berusky2 ExclusiveArch: %{ix86} x86_64 %{arm} aarch64 %{mips} riscv64 - beust-jcommander ExclusiveArch: %{java_arches} noarch - bibletime ExclusiveArch: %{qt6_qtwebengine_arches} - bigloo ExcludeArch: %{ix86} - binaryen ExcludeArch: ppc64 s390x - binutils ExcludeArch: aarch64-linux-gnu aarch64-redhat-linux ExcludeArch: ppc64le-linux-gnu ppc64le-redhat-linux ExcludeArch: s390x-linux-gnu s390x-redhat-linux ExcludeArch: x86_64-linux-gnu x86_64-redhat-linux i686-linux-gnu i686-redhat-linux - biosdevname ExclusiveArch: %{ix86} x86_64 - biosig4c++ ExcludeArch: %{ix86} - blender ExcludeArch: %{ix86} %{arm} - bless ExclusiveArch: %mono_arches - bliss ExcludeArch: %{ix86} - bloaty ExcludeArch: %{ix86} - blogc ExcludeArch: %{ix86} - bluez-hcidump ExcludeArch: s390 s390x - bochs ExcludeArch: s390x i686 - boinc-client ExcludeArch: s390x - bolzplatz2006 ExclusiveArch: %{java_arches} - bootc ExcludeArch: %{ix86} - bouncycastle ExclusiveArch: %{java_arches} noarch - bout++ ExcludeArch: %{ix86} - bowtie ExcludeArch: i686 armv7hl - bowtie2 ExcludeArch: %{ix86} %{arm} s390x - box64 ExclusiveArch: aarch64 riscv64 ppc64le %{x86_64} - boxes ExcludeArch: %{ix86} - bpfilter ExclusiveArch: %{x86_64} %{arm64} - bpfman ExcludeArch: %{ix86} - bpftool ExcludeArch: %{ix86} - bpftop ExcludeArch: %{ix86} - bpftrace ExclusiveArch: x86_64 %{power64} aarch64 s390x riscv64 - brazil ExclusiveArch: %{java_arches} noarch - breakid ExcludeArch: %{ix86} - brewtarget ExcludeArch: %{ix86} - bsf ExclusiveArch: %{java_arches} noarch - bsh ExclusiveArch: %{java_arches} noarch - btrfs-efi ExclusiveArch: %{efi} - build-helper-maven-plugin ExclusiveArch: %{java_arches} noarch - buildah ExclusiveArch: %{golang_arches_future} ExclusiveArch: aarch64 ppc64le s390x x86_64 - buildbox ExcludeArch: %{ix86} - buildstream ExcludeArch: %{ix86} - buildstream-plugins ExcludeArch: %{ix86} - busybox ExcludeArch: i686 s390x - bvi ExcludeArch: %{ix86} - bwping ExcludeArch: %{ix86} - byebyebios ExclusiveArch: x86_64 - byte-buddy ExclusiveArch: %{java_arches} noarch - byteman ExclusiveArch: %{java_arches} noarch - c4core ExcludeArch: %{ix86} - c4fs ExcludeArch: %{ix86} - c4log ExcludeArch: %{ix86} - cachelib ExclusiveArch: x86_64 aarch64 ppc64le - caddy ExclusiveArch: %{golang_arches} ExclusiveArch: %{golang_arches_future} - cadical ExcludeArch: %{ix86} - calamares ExclusiveArch: %{ix86} x86_64 aarch64 riscv64 - calceph ExcludeArch: %{ix86} - calibre ExclusiveArch: aarch64 x86_64 - calligra ExcludeArch: %{ix86} - calls ExcludeArch: i686 - cambozola ExclusiveArch: %{java_arches} noarch - canl-java ExclusiveArch: %{java_arches} noarch - cantera ExcludeArch: %{ix86} - carat ExcludeArch: %{ix86} - casc ExcludeArch: %{ix86} - cataclysm-dda ExcludeArch: i686 - catatonit ExclusiveArch: %{golang_arches_future} ExclusiveArch: aarch64 ppc64le s390x x86_64 - ccdciel ExclusiveArch: %{fpc_arches} ExcludeArch: %{ix86} - ccluster ExcludeArch: %{ix86} - cdcollect ExclusiveArch: %{mono_arches} - cdrdao ExcludeArch: s390 s390x - cef ExclusiveArch: x86_64 aarch64 - ceph ExcludeArch: i686 armv7hl ExclusiveArch: x86_64 aarch64 ppc64le s390x - ceres-solver ExcludeArch: ppc64 - cfn-lint ExcludeArch: %{ix86} - cglib ExclusiveArch: %{java_arches} noarch - cgreen ExcludeArch: s390x - chafa ExcludeArch: %{ix86} - chatterino2 ExcludeArch: %{ix86} - chatty ExcludeArch: i686 - checkpointctl ExclusiveArch: %{golang_arches_future} - chibicc ExclusiveArch: x86_64 - chromium ExclusiveArch: x86_64 aarch64 ppc64le ExclusiveArch: x86_64 aarch64 - cinnamon ExcludeArch: %{ix86} - cinnamon-control-center ExcludeArch: %{ix86} - cinnamon-desktop ExcludeArch: %{ix86} - cinnamon-menus ExcludeArch: %{ix86} - cinnamon-screensaver ExcludeArch: %{ix86} - cinnamon-session ExcludeArch: %{ix86} - cinnamon-settings-daemon ExcludeArch: %{ix86} - cjdns ExclusiveArch: %{nodejs_arches} - cjs ExcludeArch: %{ix86} - classloader-leak-test-framework ExclusiveArch: %{java_arches} noarch - classpathless-compiler ExclusiveArch: %{java_arches} noarch - cld2 ExcludeArch: ppc64 s390x - clibs-list ExcludeArch: %{ix86} - clojure ExclusiveArch: %{java_arches} noarch - clojure-core-specs-alpha ExclusiveArch: %{java_arches} noarch - clojure-maven-plugin ExclusiveArch: %{java_arches} noarch - clojure-spec-alpha ExclusiveArch: %{java_arches} noarch - cloudcompare ExcludeArch: %{ix86} - clover2 ExcludeArch: armv7hl - cmospwd ExclusiveArch: %{ix86} x86_64 - cmrt ExclusiveArch: %{ix86} x86_64 ia64 - coan ExcludeArch: ppc64 s390x - coccinelle ExcludeArch: %{ix86} - cockpit ExcludeArch: %{ix86} - cockpit-ostree ExcludeArch: %{ix86} - cocoalib ExcludeArch: %{ix86} - codeblocks ExcludeArch: %{ix86} - codehaus-parent ExclusiveArch: %{java_arches} noarch - coeurl ExcludeArch: %{ix86} - cohomCalg ExcludeArch: %{ix86} - coin-or-Bonmin ExcludeArch: %{ix86} - coin-or-HiGHS ExcludeArch: %{ix86} - coin-or-Ipopt ExcludeArch: %{ix86} - coin-or-lemon ExcludeArch: %{ix86} - colorful ExclusiveArch: %{fpc_arches} - colossus ExclusiveArch: %{java_arches} noarch - compiz-plugins-experimental ExcludeArch: s390 s390x - conmon ExclusiveArch: %{golang_arches_future} - console-image-viewer ExclusiveArch: %{java_arches} noarch - containernetworking-plugins ExclusiveArch: %{golang_arches} - containers-common ExclusiveArch: %{golang_arches} noarch - contour-terminal ExclusiveArch: x86_64 aarch64 - contractor ExcludeArch: %{ix86} - conu ExcludeArch: ppc64 - coolreader ExcludeArch: %{ix86} - copr-rpmbuild ExcludeArch: %{ix86} - coq ExclusiveArch: %{ocaml_native_compiler} - corectrl ExcludeArch: %{ix86} - cortado ExclusiveArch: %{java_arches} noarch - cosmic-app-library ExcludeArch: %{ix86} - cosmic-applets ExcludeArch: %{ix86} - cosmic-bg ExcludeArch: %{ix86} - cosmic-comp ExcludeArch: %{ix86} - cosmic-edit ExcludeArch: %{ix86} - cosmic-files ExcludeArch: %{ix86} - cosmic-greeter ExcludeArch: %{ix86} - cosmic-idle ExcludeArch: %{ix86} - cosmic-launcher ExcludeArch: %{ix86} - cosmic-notifications ExcludeArch: %{ix86} - cosmic-osd ExcludeArch: %{ix86} - cosmic-panel ExcludeArch: %{ix86} - cosmic-player ExcludeArch: %{ix86} - cosmic-randr ExcludeArch: %{ix86} - cosmic-screenshot ExcludeArch: %{ix86} - cosmic-session ExcludeArch: %{ix86} - cosmic-settings ExcludeArch: %{ix86} - cosmic-settings-daemon ExcludeArch: %{ix86} - cosmic-store ExcludeArch: %{ix86} - cosmic-term ExcludeArch: %{ix86} - cosmic-workspaces ExcludeArch: %{ix86} - cp2k ExcludeArch: %{ix86} s390x - cproc ExclusiveArch: aarch64 riscv64 x86_64 - cpu-x ExclusiveArch: i686 x86_64 aarch64 - cpufetch ExclusiveArch: %{arm} aarch64 x86_64 ppc ppc64 ppc64le %{riscv} - cpuid ExclusiveArch: %{ix86} x86_64 - cpuinfo ExclusiveArch: x86_64 aarch64 - cqrlog ExclusiveArch: %{fpc_arches} - cramjam-cli ExcludeArch: %{ix86} - crash ExclusiveArch: %{ix86} ia64 x86_64 ppc ppc64 s390 s390x %{arm} aarch64 ppc64le - crash-gcore-command ExclusiveArch: aarch64 ppc64le x86_64 - crash-trace-command ExclusiveArch: aarch64 ppc64le s390x x86_64 - credentials-fetcher ExclusiveArch: x86_64 aarch64 s390x - crest ExcludeArch: s390x - cri-o ExclusiveArch: %{?go_arches:%{go_arches}}%{!?go_arches:%{ix86} x86_64 aarch64 %{arm}} - cri-tools ExclusiveArch: %{?go_arches:%{go_arches}}%{!?go_arches:%{ix86} x86_64 aarch64 %{arm}} - criu ExclusiveArch: x86_64 %{arm} ppc64le aarch64 s390x riscv64 - crosswords ExcludeArch: s390x - crun ExclusiveArch: %{golang_arches_future} ExclusiveArch: aarch64 ppc64le riscv64 s390x x86_64 - crun-vm ExcludeArch: %{ix86} - cryfs ExcludeArch: i686 - cryptlib ExclusiveArch: x86_64 aarch64 ppc64le riscv64 - crypto-policies ExclusiveArch: %{java_arches} noarch - cryptobone ExclusiveArch: x86_64 ppc64le aarch64 riscv64 - cryptominisat ExcludeArch: %{ix86} - csdp ExcludeArch: %{ix86} - csslint ExclusiveArch: %{nodejs_arches} noarch - cucumber-messages ExcludeArch: %{ix86} - cura ExcludeArch: %{ix86} - cura-fdm-materials ExcludeArch: %{ix86} - cvc5 ExcludeArch: %{ix86} - cxsc ExcludeArch: %{ix86} - daggy ExcludeArch: s390x - dapl ExcludeArch: s390, armv7hl - daq ExclusiveArch: x86_64 aarch64 - darktable ExcludeArch: armv7hl i686 s390x - dbus-sharp ExclusiveArch: %mono_arches - dbus-sharp-glib ExclusiveArch: %mono_arches - ddccontrol ExcludeArch: s390 s390x - ddcutil ExcludeArch: s390 s390x - ddd ExcludeArch: %{ix86} - debugbreak ExcludeArch: %{ix86} - decentxml ExclusiveArch: %{java_arches} noarch - deepin-daemon ExcludeArch: s390x - diffoscope ExcludeArch: %{ix86} - digikam ExclusiveArch: %{qt6_qtwebengine_arches} ExclusiveArch: %{qt5_qtwebengine_arches} - dippi ExcludeArch: %{ix86} - directory-maven-plugin ExclusiveArch: %{java_arches} noarch - direwolf ExcludeArch: i686 - dirgra ExclusiveArch: %{java_arches} noarch - disruptor ExclusiveArch: %{java_arches} noarch - ditaa ExclusiveArch: %{java_arches} noarch - dl-fedora ExcludeArch: %{ix86} - dl_poly ExcludeArch: i686 - dlib ExcludeArch: %{ix86} s390x - dlm ExclusiveArch: i686 x86_64 - dmidecode ExclusiveArch: %{ix86} x86_64 ia64 aarch64 riscv64 - dmtcp ExclusiveArch: x86_64 - dnsdist ExcludeArch: %{ix86} #1994125 ExcludeArch: armv7hl #1994125 - docker-distribution ExclusiveArch: %{?go_arches:%{go_arches}}%{!?go_arches:%{ix86} x86_64 %{arm}} - dogtag-pki ExclusiveArch: %{java_arches} ExcludeArch: i686 - dola ExclusiveArch: %{java_arches} noarch - dola-gleaner ExclusiveArch: %{java_arches} noarch - dola-transformer ExclusiveArch: %{java_arches} noarch - dolfin ExcludeArch: %{ix86} - dolphin-emu ExclusiveArch: x86_64 aarch64 - dom4j ExclusiveArch: %{java_arches} noarch - dosbox-staging ExcludeArch: %{ix86} - dotnet8.0 ExclusiveArch: aarch64 ppc64le s390x x86_64 - dotnet9.0 ExclusiveArch: aarch64 ppc64le s390x x86_64 - doublecmd ExclusiveArch: %{ix86} x86_64 - dovecot ExcludeArch: %{ix86} - dovecot-fts-xapian ExcludeArch: %{ix86} - dpdk ExclusiveArch: x86_64 i686 aarch64 ppc64le - dragonbox ExcludeArch: %{ix86} - drat-trim ExcludeArch: %{ix86} - drat2er ExcludeArch: %{ix86} - dub ExclusiveArch: %{ldc_arches} - duperemove ExcludeArch: %{ix86} - dvdauthor ExcludeArch: %{ix86} - dvgrab ExcludeArch: s390 s390x - dxvk-native ExclusiveArch: %{ix86} x86_64 - dyninst ExclusiveArch: x86_64 ppc64le aarch64 - e-antic ExcludeArch: %{ix86} - e00compr ExcludeArch: %{ix86} - e3 ExclusiveArch: %{ix86} x86_64 - easymock ExclusiveArch: %{java_arches} noarch - eccodes ExcludeArch: i686 - ecj ExclusiveArch: %{java_arches} noarch - eclipse-swt ExclusiveArch: %{java_arches} - ecryptfs-utils ExcludeArch: %{ix86} - ed25519-java ExclusiveArch: %{java_arches} noarch - edac-utils ExcludeArch: %{ix86} - edflib ExcludeArch: s390x %{ix86} - edwin-fonts ExcludeArch: %{ix86} - eegdev ExcludeArch: %{ix86} - efax ExcludeArch: s390 s390x - efibootmgr ExclusiveArch: %{efi} - efifs ExclusiveArch: %{efi} - efivar ExclusiveArch: %{efi} - electron-cash ExcludeArch: %{ix86} - electrum ExcludeArch: %{ix86} - elementary-icon-theme ExcludeArch: s390x - elk ExclusiveArch: x86_64 %{ix86} ExclusiveArch: x86_64 aarch64 %{arm} %{power64} ExclusiveArch: x86_64 %{ix86} aarch64 %{arm} %{power64} - emacs-common-proofgeneral ExcludeArch: %{ix86} - emacs-company-mode ExcludeArch: %{ix86} - emacs-iedit ExcludeArch: %{ix86} - emacs-slime ExclusiveArch: %{arm} %{ix86} x86_64 ppc sparcv9 aarch64 - embree ExclusiveArch: aarch64 x86_64 - embree3 ExclusiveArch: aarch64 x86_64 - enjarify ExclusiveArch: %{java_arches} noarch - enki ExclusiveArch: %{qt5_qtwebengine_arches} noarch - envytools ExclusiveArch: %{ix86} x86_64 %{arm} aarch64 riscv64 - eot-utils ExcludeArch: %{ix86} - ergo ExcludeArch: %{ix86} ExcludeArch: ppc64le - eric ExclusiveArch: %{qt6_qtwebengine_arches} noarch - erlang-corba ExclusiveArch: %{java_arches} - erlang-riak_ensemble ExcludeArch: ppc64le - esmi_ib_library ExclusiveArch: x86_64 - espresso ExcludeArch: s390x i686 armv7hl - eth-tools ExclusiveArch: x86_64 - ethos ExcludeArch: %{ix86} - exec-maven-plugin ExclusiveArch: %{java_arches} noarch - external-editor-revived ExclusiveArch: %{rust_arches} - extra-enforcer-rules ExclusiveArch: %{java_arches} noarch - f3d ExcludeArch: %{ix86} - fasterxml-oss-parent ExclusiveArch: %{java_arches} noarch - fastfetch ExcludeArch: %{ix86} - fastnetmon ExcludeArch: %{ix86} - fatcat ExcludeArch: %{ix86} - fb303 ExclusiveArch: x86_64 aarch64 ppc64le riscv64 - fbgemm ExclusiveArch: x86_64 - fbreader ExcludeArch: %{ix86} ExcludeArch: armv7hl - fbthrift ExclusiveArch: x86_64 aarch64 ppc64le riscv64 - fcgiwrap ExcludeArch: %{ix86} - fcitx-libpinyin ExclusiveArch: %{qt5_qtwebengine_arches} - fcitx5-mozc ExcludeArch: ppc ppc64 sparcv9 sparc64 s390x %{ix86} - fcoe-utils ExcludeArch: ppc s390 ExcludeArch: %{ix86} - feather ExcludeArch: %{arm} %{ix86} - feedbackd ExcludeArch: i686 - felix-parent ExclusiveArch: %{java_arches} noarch - felix-utils ExclusiveArch: %{java_arches} noarch - fernflower ExclusiveArch: %{java_arches} noarch - fex-emu ExclusiveArch: %{arm64} %{x86_64} ExclusiveArch: %{arm64} - fido-device-onboard ExcludeArch: %{ix86} - filezilla ExcludeArch: s390x - firecracker ExclusiveArch: aarch64 x86_64 - firefox ExcludeArch: i686 - fish ExcludeArch: %{ix86} %{arm32} - fishbowl ExclusiveArch: %{java_arches} noarch - fizz ExclusiveArch: x86_64 aarch64 ppc64le riscv64 - flang ExcludeArch: i686 s390x - flashrom ExcludeArch: s390 s390x - flatbuffers ExcludeArch: %{ix86} - flatpak ExcludeArch: %{ix86} - flatpak-builder ExcludeArch: %{ix86} - flatpak-module-tools ExcludeArch: %{ix86} - fldigi ExcludeArch: i686 - flexmark-java ExclusiveArch: noarch %{java_arches} - flickcurl ExcludeArch: %{ix86} - flint ExcludeArch: %{ix86} - flocq ExclusiveArch: %{ocaml_native_compiler} - floppy-support ExcludeArch: %{arm} aarch64 s390x - florist ExclusiveArch: %{GPRbuild_arches} - flterm ExcludeArch: s390 s390x sparcv9 - fluent-bit ExclusiveArch: x86_64 aarch64 - flute ExclusiveArch: %{java_arches} noarch - fmidi ExcludeArch: %{ix86} - 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ocamlmod ExcludeArch: %{ix86} - oci-seccomp-bpf-hook ExclusiveArch: x86_64 %{power64} aarch64 s390x armv7hl ExclusiveArch: %{golang_arches_future} - ocrmypdf ExcludeArch: %{ix86} - octave-communications ExcludeArch: s390x - octave-iso2mesh ExcludeArch: armv7hl - octave-signal ExcludeArch: s390x - oidc-agent ExcludeArch: %{ix86} - oidn ExclusiveArch: x86_64 - olive ExcludeArch: i686 - oneapi-level-zero ExclusiveArch: x86_64 - onednn ExclusiveArch: x86_64 aarch64 ppc64le s390x - onedrive ExclusiveArch: %{ldc_arches} - ongres-scram ExclusiveArch: %{java_arches} noarch - ongres-stringprep ExclusiveArch: %{java_arches} noarch - onnx ExcludeArch: s390x ExcludeArch: %{ix86} - onnxruntime ExcludeArch: s390x %{arm} %{ix86} - oomd ExcludeArch: i686 armv7hl - opae ExclusiveArch: x86_64 - opal-prd ExclusiveArch: ppc64le - opam ExcludeArch: %{ix86} - open-vm-tools ExclusiveArch: %{ix86} x86_64 aarch64 ExclusiveArch: x86_64 - openblas ExclusiveArch: %{openblas_arches} - opencsg ExcludeArch: %{ix86} - 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php-pecl-rpminfo ExcludeArch: %{ix86} - php-pecl-rrd ExcludeArch: %{ix86} - php-pecl-selinux ExcludeArch: %{ix86} - php-pecl-ssdeep ExcludeArch: %{ix86} - php-pecl-ssh2 ExcludeArch: %{ix86} - php-pecl-uuid ExcludeArch: %{ix86} - php-pecl-var-representation ExcludeArch: %{ix86} - php-pecl-xattr ExcludeArch: %{ix86} - php-pecl-xdebug3 ExcludeArch: %{ix86} - php-pecl-xmldiff ExcludeArch: %{ix86} - php-pecl-xmlrpc ExcludeArch: %{ix86} - php-pecl-xpass ExcludeArch: %{ix86} - php-pecl-yac ExcludeArch: %{ix86} - php-pecl-yaml ExcludeArch: %{ix86} - php-pecl-zip ExcludeArch: %{ix86} - php-phpiredis ExcludeArch: %{ix86} - php-smbclient ExcludeArch: %{ix86} - php-zmq ExcludeArch: %{ix86} - php-zstd ExcludeArch: %{ix86} - picard ExcludeArch: ppc64 - picocli ExclusiveArch: %{java_arches} noarch - picom ExcludeArch: %{ix86} - pigeonascent ExcludeArch: ppc64le ExcludeArch: s390x - pilot-link ExcludeArch: s390 s390x - pinta ExclusiveArch: %mono_arches ExcludeArch: armv7hl - pioneer ExclusiveArch: %{ix86} x86_64 - pl ExcludeArch: %{ix86} - planets ExcludeArch: %{ix86} - plantri ExcludeArch: %{ix86} - plantuml ExclusiveArch: %{java_arches} noarch - plasma-dialer ExclusiveArch: %{java_arches} - plasma-discover ExcludeArch: %{ix86} - plasma-disks ExcludeArch: %{ix86} - playonlinux ExclusiveArch: %{arm} aarch64 %{ix86} x86_64 - plee-the-bear ExcludeArch: %{power64} - plexus-archiver ExclusiveArch: %{java_arches} noarch - plexus-build-api ExclusiveArch: %{java_arches} noarch - plexus-build-api0 ExclusiveArch: %{java_arches} noarch - plexus-cipher ExclusiveArch: %{java_arches} noarch - plexus-classworlds ExclusiveArch: %{java_arches} noarch - plexus-compiler ExclusiveArch: %{java_arches} noarch - plexus-component-api ExclusiveArch: %{java_arches} noarch - plexus-components-pom ExclusiveArch: %{java_arches} noarch - plexus-containers ExclusiveArch: %{java_arches} noarch - plexus-i18n ExclusiveArch: %{java_arches} noarch - plexus-interactivity ExclusiveArch: %{java_arches} noarch - plexus-interpolation ExclusiveArch: %{java_arches} noarch - plexus-io ExclusiveArch: %{java_arches} noarch - plexus-languages ExclusiveArch: %{java_arches} noarch - plexus-pom ExclusiveArch: %{java_arches} noarch - plexus-resources ExclusiveArch: %{java_arches} noarch - plexus-sec-dispatcher ExclusiveArch: %{java_arches} noarch - plexus-sec-dispatcher4 ExclusiveArch: %{java_arches} noarch - plexus-testing ExclusiveArch: %{java_arches} noarch - plexus-utils ExclusiveArch: %{java_arches} noarch - plexus-utils4 ExclusiveArch: %{java_arches} noarch - plexus-velocity ExclusiveArch: %{java_arches} noarch - plexus-xml ExclusiveArch: %{java_arches} noarch - pmbootstrap ExclusiveArch: %x86_64 %arm64 armv6l armv7l armv8l noarch - pmix ExcludeArch: %{ix86} - pngcheck ExcludeArch: %{ix86} - pocl ExcludeArch: %{ix86} - podman ExclusiveArch: %{golang_arches_future} ExclusiveArch: aarch64 ppc64le s390x x86_64 riscv64 ExclusiveArch: x86_64 aarch64 - polymake ExcludeArch: %{ix86} - polyml ExcludeArch: %{ix86} - pop-launcher ExcludeArch: %{ix86} - poppler-sharp ExclusiveArch: %mono_arches - popub ExclusiveArch: %{?go_arches:%{go_arches}}%{!?go_arches:%{ix86} x86_64 %{arm}} - postgresql-jdbc ExclusiveArch: %{java_arches} noarch - postgresql-pgpool-II ExcludeArch: %{ix86} ExcludeArch: %{ix86} ExcludeArch: %{ix86} - powerpc-utils ExclusiveArch: ppc %{power64} - powerstat ExclusiveArch: %{ix86} x86_64 - ppc64-diag ExclusiveArch: ppc %{power64} - ppl ExcludeArch: %{ix86} - pplite ExcludeArch: %{ix86} - prestopalette ExcludeArch: i686 - printer-driver-brlaser ExcludeArch: %{ix86} - printrun ExcludeArch: %{ix86} - procdump ExclusiveArch: x86_64 aarch64 - procyon ExclusiveArch: %{java_arches} noarch ExclusiveArch: %{java_arches} noarch ExclusiveArch: %{java_arches} noarch ExclusiveArch: %{java_arches} noarch ExclusiveArch: %{java_arches} noarch ExclusiveArch: %{java_arches} noarch - prooftree ExcludeArch: %{ix86} - proxmark3 ExcludeArch: ppc64le s390x i686 - proxygen ExclusiveArch: x86_64 aarch64 ppc64le - proxysql ExcludeArch: %{power64} s390x %{ix86} - prrte ExcludeArch: %{ix86} - prusa-slicer ExcludeArch: %{ix86} - psblas3 ExcludeArch: %{ix86} - psi-plus ExcludeArch: %{ix86} - psi4 ExcludeArch: %{ix86} - ptyxis ExcludeArch: %{ix86} - pveclib ExclusiveArch: ppc %{power64} - pygrib ExcludeArch: i686 ExcludeArch: armv7hl - pygsl ExcludeArch: %{ix86} - pyosmium ExcludeArch: %{ix86} - pypy ExcludeArch: %{ix86} - pypy3.10 ExcludeArch: %{ix86} - pypy3.11 ExcludeArch: %{ix86} - pyqtwebengine ExclusiveArch: %{qt5_qtwebengine_arches} - python-admesh ExcludeArch: %{ix86} - python-aiokafka ExcludeArch: %{ix86} - python-aioresponses ExcludeArch: s390x - python-annarchy ExcludeArch: %{ix86} ppc64le - python-asn1tools ExcludeArch: s390x - python-ast-monitor ExclusiveArch: %{qt6_qtwebengine_arches} noarch - python-astroplan ExcludeArch: %{ix86} - python-astropy ExcludeArch: %{ix86} - python-astropy-healpix ExcludeArch: %{ix86} - python-astroscrappy ExcludeArch: %{ix86} - python-asyncmy ExcludeArch: %{ix86} - python-aws-sam-translator ExcludeArch: %{ix86} - python-awscrt ExcludeArch: s390x - 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1 0

Architecture specific change in rpms/ghc9.10.git
by githook-noreply＠fedoraproject.org 30 Jun '25

30 Jun '25

The package rpms/ghc9.10.git has added or updated architecture specific content in its spec file (ExclusiveArch/ExcludeArch or %ifarch/%ifnarch) in commit(s): https://src.fedoraproject.org/cgit/rpms/ghc9.10.git/commit/?id=837746e95a66… https://src.fedoraproject.org/cgit/rpms/ghc9.10.git/commit/?id=307c0c2b466f…. Change: +%ifarch %{ghc_unregisterized_arches} +%ifarch riscv64 Thanks. Full change: ============ commit 837746e95a66af919f7c3efb709f51e4e6614731 Author: Jens Petersen <petersen(a)redhat.com> Date: Sun Jun 29 20:43:51 2025 +0800 riscv64 already bootstrapped with llvm: so drop the rts -qg patch diff --git a/ghc9.10.spec b/ghc9.10.spec index 153a38e..6f1f122 100644 --- a/ghc9.10.spec +++ b/ghc9.10.spec @@ -415,7 +415,7 @@ rm libffi-tarballs/libffi-*.tar.gz %patch -P10 -p1 -b .orig %endif -%ifarch %{ghc_unregisterized_arches} riscv64 +%ifarch %{ghc_unregisterized_arches} %patch -P16 -p1 -b .orig %endif # remove if epel9 ghc using llvm commit 4fa111060a8d92449fc06c8d5ff2e7408f8193f0 Author: Jens Petersen <petersen(a)redhat.com> Date: Sun Jun 29 15:06:48 2025 +0800 f40 was EOL so drop its ghc9.6 boot diff --git a/ghc9.10.spec b/ghc9.10.spec index 4c3069b..153a38e 100644 --- a/ghc9.10.spec +++ b/ghc9.10.spec @@ -33,7 +33,7 @@ # bootstrap needs 9.6+ (& hadrian needs Cabal-3.10) # epel9 ghc too old to build hadrian -%if 0%{?fedora} == 40 || %{defined el9} +%if %{defined el9} %global ghcboot_major 9.6 %endif %global ghcboot ghc%{?ghcboot_major} commit 64bb972abaafdd260fe4c5eaa0bfdd3f45395c06 Author: Jens Petersen <petersen(a)redhat.com> Date: Sun Jun 29 15:06:29 2025 +0800 add conflicts for other ghcX.Y-compiler-default packages diff --git a/ghc9.10.spec b/ghc9.10.spec index 052afac..4c3069b 100644 --- a/ghc9.10.spec +++ b/ghc9.10.spec @@ -256,6 +256,13 @@ install the main ghc package. Summary: Makes %{name} default ghc Requires: %{name}-compiler%{?_isa} = %{version}-%{release} Conflicts: ghc-compiler +Conflicts: ghc8.10-compiler-default +Conflicts: ghc9.0-compiler-default +Conflicts: ghc9.2-compiler-default +Conflicts: ghc9.4-compiler-default +Conflicts: ghc9.6-compiler-default +Conflicts: ghc9.8-compiler-default +Conflicts: ghc9.12-compiler-default %description compiler-default The package contains symlinks to make %{name} the default GHC compiler. @@ -852,6 +859,7 @@ make test %changelog * Sun Jun 29 2025 Jens Petersen <petersen(a)redhat.com> - 9.10.2-9 - add openSUSE's backport of riscv64 NCG +- add conflicts for other ghcX.Y-compiler-default packages * Sat May 03 2025 Jens Petersen <petersen(a)redhat.com> - 9.10.2-8 - https://downloads.haskell.org/~ghc/9.10.2/docs/users_guide/9.10.2-notes.html commit 307c0c2b466f663c03680580b655802174ab424b Author: Jens Petersen <petersen(a)redhat.com> Date: Sun Jun 29 14:44:12 2025 +0800 add openSUSE's backport of riscv64 NCG diff --git a/ghc9.10.spec b/ghc9.10.spec index 528e3a7..052afac 100644 --- a/ghc9.10.spec +++ b/ghc9.10.spec @@ -57,7 +57,7 @@ %else %global llvm_major 15 %endif -%global ghc_llvm_archs s390x riscv64 +%global ghc_llvm_archs s390x %global ghc_unregisterized_arches s390 %{mips} Name: %{ghc_name} @@ -66,7 +66,7 @@ Version: %{ghc_major}.%{ghc_patchlevel} # - release can only be reset if *all* library versions get bumped simultaneously # (sometimes after a major release) # - minor release numbers for a branch should be incremented monotonically -Release: 8%{?dist} +Release: 9%{?dist} Summary: Glasgow Haskell Compiler License: BSD-3-Clause AND HaskellReport @@ -96,6 +96,9 @@ Patch16: ghc-hadrian-s390x-rts--qg.patch Patch26: no-missing-haddock-file-warning.patch Patch27: haddock-remove-googleapis-fonts.patch +# riscv64 +Patch40: https://src.opensuse.org/pool/ghc/raw/branch/factory/riscv64-ncg.patch + # https://gitlab.haskell.org/ghc/ghc/-/wikis/platforms # fedora ghc has been bootstrapped on @@ -419,6 +422,9 @@ rm libffi-tarballs/libffi-*.tar.gz %patch -P26 -p1 -b .orig %patch -P27 -p1 -b .orig +%ifarch riscv64 +%patch -P40 -p1 -b .orig +%endif # https://github.com/haskell/directory/pull/184 rm libraries/directory/directory.buildinfo @@ -844,6 +850,9 @@ make test %changelog +* Sun Jun 29 2025 Jens Petersen <petersen(a)redhat.com> - 9.10.2-9 +- add openSUSE's backport of riscv64 NCG + * Sat May 03 2025 Jens Petersen <petersen(a)redhat.com> - 9.10.2-8 - https://downloads.haskell.org/~ghc/9.10.2/docs/users_guide/9.10.2-notes.html diff --git a/riscv64-ncg.patch b/riscv64-ncg.patch new file mode 100644 index 0000000..ab04ae0 --- /dev/null +++ b/riscv64-ncg.patch @@ -0,0 +1,6242 @@ +Index: ghc-9.10.2/CODEOWNERS +=================================================================== +--- ghc-9.10.2.orig/CODEOWNERS ++++ ghc-9.10.2/CODEOWNERS +@@ -40,6 +40,7 @@ + /compiler/GHC/HsToCore/Foreign/Wasm.hs @TerrorJack + /compiler/GHC/Tc/Deriv/ @RyanGlScott + /compiler/GHC/CmmToAsm/ @simonmar @bgamari @AndreasK ++/compiler/GHC/CmmToAsm/RV64/ @supersven @angerman + /compiler/GHC/CmmToAsm/Wasm/ @TerrorJack + /compiler/GHC/CmmToLlvm/ @angerman + /compiler/GHC/StgToCmm/ @simonmar @osa1 +Index: ghc-9.10.2/compiler/CodeGen.Platform.h +=================================================================== +--- ghc-9.10.2.orig/compiler/CodeGen.Platform.h ++++ ghc-9.10.2/compiler/CodeGen.Platform.h +@@ -1,7 +1,8 @@ + + import GHC.Cmm.Expr + #if !(defined(MACHREGS_i386) || defined(MACHREGS_x86_64) \ +- || defined(MACHREGS_powerpc) || defined(MACHREGS_aarch64)) ++ || defined(MACHREGS_powerpc) || defined(MACHREGS_aarch64) \ ++ || defined(MACHREGS_riscv64)) + import GHC.Utils.Panic.Plain + #endif + import GHC.Platform.Reg +@@ -1041,6 +1042,105 @@ freeReg 18 = False + + # if defined(REG_Base) + freeReg REG_Base = False ++# endif ++# if defined(REG_Sp) ++freeReg REG_Sp = False ++# endif ++# if defined(REG_SpLim) ++freeReg REG_SpLim = False ++# endif ++# if defined(REG_Hp) ++freeReg REG_Hp = False ++# endif ++# if defined(REG_HpLim) ++freeReg REG_HpLim = False ++# endif ++ ++# if defined(REG_R1) ++freeReg REG_R1 = False ++# endif ++# if defined(REG_R2) ++freeReg REG_R2 = False ++# endif ++# if defined(REG_R3) ++freeReg REG_R3 = False ++# endif ++# if defined(REG_R4) ++freeReg REG_R4 = False ++# endif ++# if defined(REG_R5) ++freeReg REG_R5 = False ++# endif ++# if defined(REG_R6) ++freeReg REG_R6 = False ++# endif ++# if defined(REG_R7) ++freeReg REG_R7 = False ++# endif ++# if defined(REG_R8) ++freeReg REG_R8 = False ++# endif ++ ++# if defined(REG_F1) ++freeReg REG_F1 = False ++# endif ++# if defined(REG_F2) ++freeReg REG_F2 = False ++# endif ++# if defined(REG_F3) ++freeReg REG_F3 = False ++# endif ++# if defined(REG_F4) ++freeReg REG_F4 = False ++# endif ++# if defined(REG_F5) ++freeReg REG_F5 = False ++# endif ++# if defined(REG_F6) ++freeReg REG_F6 = False ++# endif ++ ++# if defined(REG_D1) ++freeReg REG_D1 = False ++# endif ++# if defined(REG_D2) ++freeReg REG_D2 = False ++# endif ++# if defined(REG_D3) ++freeReg REG_D3 = False ++# endif ++# if defined(REG_D4) ++freeReg REG_D4 = False ++# endif ++# if defined(REG_D5) ++freeReg REG_D5 = False ++# endif ++# if defined(REG_D6) ++freeReg REG_D6 = False ++# endif ++ ++freeReg _ = True ++ ++#elif defined(MACHREGS_riscv64) ++ ++-- zero reg ++freeReg 0 = False ++-- link register ++freeReg 1 = False ++-- stack pointer ++freeReg 2 = False ++-- global pointer ++freeReg 3 = False ++-- thread pointer ++freeReg 4 = False ++-- frame pointer ++freeReg 8 = False ++-- made-up inter-procedural (ip) register ++-- See Note [The made-up RISCV64 TMP (IP) register] ++freeReg 31 = False ++ ++# if defined(REG_Base) ++freeReg REG_Base = False + # endif + # if defined(REG_Sp) + freeReg REG_Sp = False +Index: ghc-9.10.2/compiler/GHC/Cmm/CLabel.hs +=================================================================== +--- ghc-9.10.2.orig/compiler/GHC/Cmm/CLabel.hs ++++ ghc-9.10.2/compiler/GHC/Cmm/CLabel.hs +@@ -1720,6 +1720,8 @@ pprDynamicLinkerAsmLabel !platform dllIn + | platformArch platform == ArchAArch64 + = ppLbl + ++ | platformArch platform == ArchRISCV64 ++ = ppLbl + + | platformArch platform == ArchX86_64 + = case dllInfo of +Index: ghc-9.10.2/compiler/GHC/CmmToAsm.hs +=================================================================== +--- ghc-9.10.2.orig/compiler/GHC/CmmToAsm.hs ++++ ghc-9.10.2/compiler/GHC/CmmToAsm.hs +@@ -67,6 +67,7 @@ import qualified GHC.CmmToAsm.X86 as X + import qualified GHC.CmmToAsm.PPC as PPC + import qualified GHC.CmmToAsm.AArch64 as AArch64 + import qualified GHC.CmmToAsm.Wasm as Wasm32 ++import qualified GHC.CmmToAsm.RV64 as RV64 + + import GHC.CmmToAsm.Reg.Liveness + import qualified GHC.CmmToAsm.Reg.Linear as Linear +@@ -148,7 +149,7 @@ nativeCodeGen logger ts config modLoc h + ArchAlpha -> panic "nativeCodeGen: No NCG for Alpha" + ArchMipseb -> panic "nativeCodeGen: No NCG for mipseb" + ArchMipsel -> panic "nativeCodeGen: No NCG for mipsel" +- ArchRISCV64 -> panic "nativeCodeGen: No NCG for RISCV64" ++ ArchRISCV64 -> nCG' (RV64.ncgRV64 config) + ArchLoongArch64->panic "nativeCodeGen: No NCG for LoongArch64" + ArchUnknown -> panic "nativeCodeGen: No NCG for unknown arch" + ArchJavaScript-> panic "nativeCodeGen: No NCG for JavaScript" +Index: ghc-9.10.2/compiler/GHC/CmmToAsm/Dwarf/Constants.hs +=================================================================== +--- ghc-9.10.2.orig/compiler/GHC/CmmToAsm/Dwarf/Constants.hs ++++ ghc-9.10.2/compiler/GHC/CmmToAsm/Dwarf/Constants.hs +@@ -240,6 +240,7 @@ dwarfRegNo p r = case platformArch p of + | r == xmm15 -> 32 + ArchPPC_64 _ -> fromIntegral $ toRegNo r + ArchAArch64 -> fromIntegral $ toRegNo r ++ ArchRISCV64 -> fromIntegral $ toRegNo r + _other -> error "dwarfRegNo: Unsupported platform or unknown register!" + + -- | Virtual register number to use for return address. +@@ -252,5 +253,6 @@ dwarfReturnRegNo p + ArchX86 -> 8 -- eip + ArchX86_64 -> 16 -- rip + ArchPPC_64 ELF_V2 -> 65 -- lr (link register) +- ArchAArch64-> 30 ++ ArchAArch64 -> 30 ++ ArchRISCV64 -> 1 -- ra (return address) + _other -> error "dwarfReturnRegNo: Unsupported platform!" +Index: ghc-9.10.2/compiler/GHC/CmmToAsm/PIC.hs +=================================================================== +--- ghc-9.10.2.orig/compiler/GHC/CmmToAsm/PIC.hs ++++ ghc-9.10.2/compiler/GHC/CmmToAsm/PIC.hs +@@ -132,6 +132,11 @@ cmmMakeDynamicReference config reference + addImport symbolPtr + return $ cmmMakePicReference config symbolPtr + ++ AccessViaSymbolPtr | ArchRISCV64 <- platformArch platform -> do ++ let symbolPtr = mkDynamicLinkerLabel SymbolPtr lbl ++ addImport symbolPtr ++ return $ cmmMakePicReference config symbolPtr ++ + AccessViaSymbolPtr -> do + let symbolPtr = mkDynamicLinkerLabel SymbolPtr lbl + addImport symbolPtr +@@ -164,6 +169,10 @@ cmmMakePicReference config lbl + | ArchAArch64 <- platformArch platform + = CmmLit $ CmmLabel lbl + ++ -- as on AArch64, there's no pic base register. ++ | ArchRISCV64 <- platformArch platform ++ = CmmLit $ CmmLabel lbl ++ + | OSAIX <- platformOS platform + = CmmMachOp (MO_Add W32) + [ CmmReg (CmmGlobal $ GlobalRegUse PicBaseReg (bWord platform)) +Index: ghc-9.10.2/compiler/GHC/CmmToAsm/RV64.hs +=================================================================== +--- /dev/null ++++ ghc-9.10.2/compiler/GHC/CmmToAsm/RV64.hs +@@ -0,0 +1,58 @@ ++{-# OPTIONS_GHC -fno-warn-orphans #-} ++ ++-- | Native code generator for RiscV64 architectures ++module GHC.CmmToAsm.RV64 (ncgRV64) where ++ ++import GHC.CmmToAsm.Config ++import GHC.CmmToAsm.Instr ++import GHC.CmmToAsm.Monad ++import GHC.CmmToAsm.RV64.CodeGen qualified as RV64 ++import GHC.CmmToAsm.RV64.Instr qualified as RV64 ++import GHC.CmmToAsm.RV64.Ppr qualified as RV64 ++import GHC.CmmToAsm.RV64.RegInfo qualified as RV64 ++import GHC.CmmToAsm.RV64.Regs qualified as RV64 ++import GHC.CmmToAsm.Types ++import GHC.Prelude ++import GHC.Utils.Outputable (ftext) ++ ++ncgRV64 :: NCGConfig -> NcgImpl RawCmmStatics RV64.Instr RV64.JumpDest ++ncgRV64 config = ++ NcgImpl ++ { ncgConfig = config, ++ cmmTopCodeGen = RV64.cmmTopCodeGen, ++ generateJumpTableForInstr = RV64.generateJumpTableForInstr config, ++ getJumpDestBlockId = RV64.getJumpDestBlockId, ++ canShortcut = RV64.canShortcut, ++ shortcutStatics = RV64.shortcutStatics, ++ shortcutJump = RV64.shortcutJump, ++ pprNatCmmDeclS = RV64.pprNatCmmDecl config, ++ pprNatCmmDeclH = RV64.pprNatCmmDecl config, ++ maxSpillSlots = RV64.maxSpillSlots config, ++ allocatableRegs = RV64.allocatableRegs platform, ++ ncgAllocMoreStack = RV64.allocMoreStack platform, ++ ncgMakeFarBranches = RV64.makeFarBranches, ++ extractUnwindPoints = const [], ++ invertCondBranches = \_ _ -> id ++ } ++ where ++ platform = ncgPlatform config ++ ++-- | `Instruction` instance for RV64 ++instance Instruction RV64.Instr where ++ regUsageOfInstr = RV64.regUsageOfInstr ++ patchRegsOfInstr = RV64.patchRegsOfInstr ++ isJumpishInstr = RV64.isJumpishInstr ++ canFallthroughTo = RV64.canFallthroughTo ++ jumpDestsOfInstr = RV64.jumpDestsOfInstr ++ patchJumpInstr = RV64.patchJumpInstr ++ mkSpillInstr = RV64.mkSpillInstr ++ mkLoadInstr = RV64.mkLoadInstr ++ takeDeltaInstr = RV64.takeDeltaInstr ++ isMetaInstr = RV64.isMetaInstr ++ mkRegRegMoveInstr _ = RV64.mkRegRegMoveInstr ++ takeRegRegMoveInstr = RV64.takeRegRegMoveInstr ++ mkJumpInstr = RV64.mkJumpInstr ++ mkStackAllocInstr = RV64.mkStackAllocInstr ++ mkStackDeallocInstr = RV64.mkStackDeallocInstr ++ mkComment = pure . RV64.COMMENT . ftext ++ pprInstr = RV64.pprInstr +Index: ghc-9.10.2/compiler/GHC/CmmToAsm/RV64/CodeGen.hs +=================================================================== +--- /dev/null ++++ ghc-9.10.2/compiler/GHC/CmmToAsm/RV64/CodeGen.hs +@@ -0,0 +1,2208 @@ ++{-# LANGUAGE BangPatterns #-} ++{-# LANGUAGE BinaryLiterals #-} ++{-# LANGUAGE GADTs #-} ++{-# LANGUAGE OverloadedStrings #-} ++ ++module GHC.CmmToAsm.RV64.CodeGen ++ ( cmmTopCodeGen, ++ generateJumpTableForInstr, ++ makeFarBranches, ++ ) ++where ++ ++import Control.Monad ++import Data.Maybe ++import Data.Word ++import GHC.Cmm ++import GHC.Cmm.BlockId ++import GHC.Cmm.CLabel ++import GHC.Cmm.Dataflow.Block ++import GHC.Cmm.Dataflow.Graph ++import GHC.Cmm.Dataflow.Label ++import GHC.Cmm.DebugBlock ++import GHC.Cmm.Switch ++import GHC.Cmm.Utils ++import GHC.CmmToAsm.CPrim ++import GHC.CmmToAsm.Config ++import GHC.CmmToAsm.Format ++import GHC.CmmToAsm.Monad ++ ( NatM, ++ getBlockIdNat, ++ getConfig, ++ getDebugBlock, ++ getFileId, ++ getNewLabelNat, ++ getNewRegNat, ++ getPicBaseMaybeNat, ++ getPlatform, ++ ) ++import GHC.CmmToAsm.PIC ++import GHC.CmmToAsm.RV64.Cond ++import GHC.CmmToAsm.RV64.Instr ++import GHC.CmmToAsm.RV64.Regs ++import GHC.CmmToAsm.Types ++import GHC.Data.FastString ++import GHC.Data.OrdList ++import GHC.Float ++import GHC.Platform ++import GHC.Platform.Reg ++import GHC.Platform.Regs ++import GHC.Prelude hiding (EQ) ++import GHC.Types.Basic ++import GHC.Types.ForeignCall ++import GHC.Types.SrcLoc (srcSpanFile, srcSpanStartCol, srcSpanStartLine) ++import GHC.Types.Tickish (GenTickish (..)) ++import GHC.Types.Unique.Supply ++import GHC.Utils.Constants (debugIsOn) ++import GHC.Utils.Misc ++import GHC.Utils.Monad ++import GHC.Utils.Outputable ++import GHC.Utils.Panic ++ ++-- For an overview of an NCG's structure, see Note [General layout of an NCG] ++ ++cmmTopCodeGen :: ++ RawCmmDecl -> ++ NatM [NatCmmDecl RawCmmStatics Instr] ++-- Thus we'll have to deal with either CmmProc ... ++cmmTopCodeGen _cmm@(CmmProc info lab live graph) = do ++ picBaseMb <- getPicBaseMaybeNat ++ when (isJust picBaseMb) $ panic "RV64.cmmTopCodeGen: Unexpected PIC base register (RISCV ISA does not define one)" ++ ++ let blocks = toBlockListEntryFirst graph ++ (nat_blocks, statics) <- mapAndUnzipM basicBlockCodeGen blocks ++ ++ let proc = CmmProc info lab live (ListGraph $ concat nat_blocks) ++ tops = proc : concat statics ++ ++ pure tops ++ ++-- ... or CmmData. ++cmmTopCodeGen (CmmData sec dat) = pure [CmmData sec dat] -- no translation, we just use CmmStatic ++ ++basicBlockCodeGen :: ++ Block CmmNode C C -> ++ NatM ++ ( [NatBasicBlock Instr], ++ [NatCmmDecl RawCmmStatics Instr] ++ ) ++basicBlockCodeGen block = do ++ config <- getConfig ++ let (_, nodes, tail) = blockSplit block ++ id = entryLabel block ++ stmts = blockToList nodes ++ ++ header_comment_instr ++ | debugIsOn = ++ unitOL ++ $ MULTILINE_COMMENT ++ ( text "-- --------------------------- basicBlockCodeGen --------------------------- --\n" ++ $+$ withPprStyle defaultDumpStyle (pdoc (ncgPlatform config) block) ++ ) ++ | otherwise = nilOL ++ ++ -- Generate location directive `.loc` (DWARF debug location info) ++ loc_instrs <- genLocInstrs ++ ++ -- Generate other instructions ++ mid_instrs <- stmtsToInstrs stmts ++ (!tail_instrs) <- stmtToInstrs tail ++ ++ let instrs = header_comment_instr `appOL` loc_instrs `appOL` mid_instrs `appOL` tail_instrs ++ ++ -- TODO: Then x86 backend runs @verifyBasicBlock@ here. How important it is to ++ -- have a valid CFG is an open question: This and the AArch64 and PPC NCGs ++ -- work fine without it. ++ ++ -- Code generation may introduce new basic block boundaries, which are ++ -- indicated by the NEWBLOCK instruction. We must split up the instruction ++ -- stream into basic blocks again. Also, we extract LDATAs here too. ++ (top, other_blocks, statics) = foldrOL mkBlocks ([], [], []) instrs ++ ++ return (BasicBlock id top : other_blocks, statics) ++ where ++ genLocInstrs :: NatM (OrdList Instr) ++ genLocInstrs = do ++ dbg <- getDebugBlock (entryLabel block) ++ case dblSourceTick =<< dbg of ++ Just (SourceNote span name) -> ++ do ++ fileId <- getFileId (srcSpanFile span) ++ let line = srcSpanStartLine span; col = srcSpanStartCol span ++ pure $ unitOL $ LOCATION fileId line col name ++ _ -> pure nilOL ++ ++mkBlocks :: ++ Instr -> ++ ([Instr], [GenBasicBlock Instr], [GenCmmDecl RawCmmStatics h g]) -> ++ ([Instr], [GenBasicBlock Instr], [GenCmmDecl RawCmmStatics h g]) ++mkBlocks (NEWBLOCK id) (instrs, blocks, statics) = ++ ([], BasicBlock id instrs : blocks, statics) ++mkBlocks (LDATA sec dat) (instrs, blocks, statics) = ++ (instrs, blocks, CmmData sec dat : statics) ++mkBlocks instr (instrs, blocks, statics) = ++ (instr : instrs, blocks, statics) ++ ++-- ----------------------------------------------------------------------------- ++ ++-- | Utilities ++ ++-- | Annotate an `Instr` with a `SDoc` comment ++ann :: SDoc -> Instr -> Instr ++ann doc instr {- debugIsOn -} = ANN doc instr ++{-# INLINE ann #-} ++ ++-- Using pprExpr will hide the AST, @ANN@ will end up in the assembly with ++-- -dppr-debug. The idea is that we can trivially see how a cmm expression ++-- ended up producing the assembly we see. By having the verbatim AST printed ++-- we can simply check the patterns that were matched to arrive at the assembly ++-- we generated. ++-- ++-- pprExpr will hide a lot of noise of the underlying data structure and print ++-- the expression into something that can be easily read by a human. However ++-- going back to the exact CmmExpr representation can be laborious and adds ++-- indirections to find the matches that lead to the assembly. ++-- ++-- An improvement could be to have ++-- ++-- (pprExpr genericPlatform e) <> parens (text. show e) ++-- ++-- to have the best of both worlds. ++-- ++-- Note: debugIsOn is too restrictive, it only works for debug compilers. ++-- However, we do not only want to inspect this for debug compilers. Ideally ++-- we'd have a check for -dppr-debug here already, such that we don't even ++-- generate the ANN expressions. However, as they are lazy, they shouldn't be ++-- forced until we actually force them, and without -dppr-debug they should ++-- never end up being forced. ++annExpr :: CmmExpr -> Instr -> Instr ++annExpr e {- debugIsOn -} = ANN (text . show $ e) ++-- annExpr e instr {- debugIsOn -} = ANN (pprExpr genericPlatform e) instr ++-- annExpr _ instr = instr ++{-# INLINE annExpr #-} ++ ++-- ----------------------------------------------------------------------------- ++-- Generating a table-branch ++ ++-- Note [RISCV64 Jump Tables] ++-- ~~~~~~~~~~~~~~~~~~~~~~~~~~ ++-- ++-- Jump tables are implemented by generating a table of relative addresses, ++-- where each entry is the relative offset to the target block from the first ++-- entry / table label (`generateJumpTableForInstr`). Using the jump table means ++-- loading the entry's value and jumping to the calculated absolute address ++-- (`genSwitch`). ++-- ++-- For example, this Cmm switch ++-- ++-- switch [1 .. 10] _s2wn::I64 { ++-- case 1 : goto c347; ++-- case 2 : goto c348; ++-- case 3 : goto c349; ++-- case 4 : goto c34a; ++-- case 5 : goto c34b; ++-- case 6 : goto c34c; ++-- case 7 : goto c34d; ++-- case 8 : goto c34e; ++-- case 9 : goto c34f; ++-- case 10 : goto c34g; ++-- } // CmmSwitch ++-- ++-- leads to this jump table in Assembly ++-- ++-- .section .rodata ++-- .balign 8 ++-- .Ln34G: ++-- .quad 0 ++-- .quad .Lc347-(.Ln34G)+0 ++-- .quad .Lc348-(.Ln34G)+0 ++-- .quad .Lc349-(.Ln34G)+0 ++-- .quad .Lc34a-(.Ln34G)+0 ++-- .quad .Lc34b-(.Ln34G)+0 ++-- .quad .Lc34c-(.Ln34G)+0 ++-- .quad .Lc34d-(.Ln34G)+0 ++-- .quad .Lc34e-(.Ln34G)+0 ++-- .quad .Lc34f-(.Ln34G)+0 ++-- .quad .Lc34g-(.Ln34G)+0 ++-- ++-- and this indexing code where the jump should be done (register t0 contains ++-- the index) ++-- ++-- addi t0, t0, 0 // silly move (ignore it) ++-- la t1, .Ln34G // load the table's address ++-- sll t0, t0, 3 // index * 8 -> offset in bytes ++-- add t0, t0, t1 // address of the table's entry ++-- ld t0, 0(t0) // load entry ++-- add t0, t0, t1 // relative to absolute address ++-- jalr zero, t0, 0 // jump to the block ++-- ++-- In object code (disassembled) the table looks like ++-- ++-- 0000000000000000 <.Ln34G>: ++-- ... ++-- 8: R_RISCV_ADD64 .Lc347 ++-- 8: R_RISCV_SUB64 .Ln34G ++-- 10: R_RISCV_ADD64 .Lc348 ++-- 10: R_RISCV_SUB64 .Ln34G ++-- 18: R_RISCV_ADD64 .Lc349 ++-- 18: R_RISCV_SUB64 .Ln34G ++-- 20: R_RISCV_ADD64 .Lc34a ++-- 20: R_RISCV_SUB64 .Ln34G ++-- 28: R_RISCV_ADD64 .Lc34b ++-- 28: R_RISCV_SUB64 .Ln34G ++-- 30: R_RISCV_ADD64 .Lc34c ++-- 30: R_RISCV_SUB64 .Ln34G ++-- 38: R_RISCV_ADD64 .Lc34d ++-- 38: R_RISCV_SUB64 .Ln34G ++-- 40: R_RISCV_ADD64 .Lc34e ++-- 40: R_RISCV_SUB64 .Ln34G ++-- 48: R_RISCV_ADD64 .Lc34f ++-- 48: R_RISCV_SUB64 .Ln34G ++-- 50: R_RISCV_ADD64 .Lc34g ++-- 50: R_RISCV_SUB64 .Ln34G ++-- ++-- I.e. the relative offset calculations are done by the linker via relocations. ++-- This seems to be PIC compatible; at least `scanelf` (pax-utils) does not ++-- complain. ++ ++ ++-- | Generate jump to jump table target ++-- ++-- The index into the jump table is calulated by evaluating @expr@. The ++-- corresponding table entry contains the relative address to jump to (relative ++-- to the jump table's first entry / the table's own label). ++genSwitch :: NCGConfig -> CmmExpr -> SwitchTargets -> NatM InstrBlock ++genSwitch config expr targets = do ++ (reg, fmt1, e_code) <- getSomeReg indexExpr ++ let fmt = II64 ++ targetReg <- getNewRegNat fmt ++ lbl <- getNewLabelNat ++ dynRef <- cmmMakeDynamicReference config DataReference lbl ++ (tableReg, fmt2, t_code) <- getSomeReg dynRef ++ let code = ++ toOL ++ [ COMMENT (text "indexExpr" <+> (text . show) indexExpr), ++ COMMENT (text "dynRef" <+> (text . show) dynRef) ++ ] ++ `appOL` e_code ++ `appOL` t_code ++ `appOL` toOL ++ [ COMMENT (ftext "Jump table for switch"), ++ -- index to offset into the table (relative to tableReg) ++ annExpr expr (SLL (OpReg (formatToWidth fmt1) reg) (OpReg (formatToWidth fmt1) reg) (OpImm (ImmInt 3))), ++ -- calculate table entry address ++ ADD (OpReg W64 targetReg) (OpReg (formatToWidth fmt1) reg) (OpReg (formatToWidth fmt2) tableReg), ++ -- load table entry (relative offset from tableReg (first entry) to target label) ++ LDRU II64 (OpReg W64 targetReg) (OpAddr (AddrRegImm targetReg (ImmInt 0))), ++ -- calculate absolute address of the target label ++ ADD (OpReg W64 targetReg) (OpReg W64 targetReg) (OpReg W64 tableReg), ++ -- prepare jump to target label ++ J_TBL ids (Just lbl) targetReg ++ ] ++ return code ++ where ++ -- See Note [Sub-word subtlety during jump-table indexing] in ++ -- GHC.CmmToAsm.X86.CodeGen for why we must first offset, then widen. ++ indexExpr0 = cmmOffset platform expr offset ++ -- We widen to a native-width register to sanitize the high bits ++ indexExpr = ++ CmmMachOp ++ (MO_UU_Conv expr_w (platformWordWidth platform)) ++ [indexExpr0] ++ expr_w = cmmExprWidth platform expr ++ (offset, ids) = switchTargetsToTable targets ++ platform = ncgPlatform config ++ ++-- | Generate jump table data (if required) ++-- ++-- The idea is to emit one table entry per case. The entry is the relative ++-- address of the block to jump to (relative to the table's first entry / ++-- table's own label.) The calculation itself is done by the linker. ++generateJumpTableForInstr :: ++ NCGConfig -> ++ Instr -> ++ Maybe (NatCmmDecl RawCmmStatics Instr) ++generateJumpTableForInstr config (J_TBL ids (Just lbl) _) = ++ let jumpTable = ++ map jumpTableEntryRel ids ++ where ++ jumpTableEntryRel Nothing = ++ CmmStaticLit (CmmInt 0 (ncgWordWidth config)) ++ jumpTableEntryRel (Just blockid) = ++ CmmStaticLit ++ ( CmmLabelDiffOff ++ blockLabel ++ lbl ++ 0 ++ (ncgWordWidth config) ++ ) ++ where ++ blockLabel = blockLbl blockid ++ in Just (CmmData (Section ReadOnlyData lbl) (CmmStaticsRaw lbl jumpTable)) ++generateJumpTableForInstr _ _ = Nothing ++ ++-- ----------------------------------------------------------------------------- ++-- Top-level of the instruction selector ++ ++stmtsToInstrs :: ++ -- | Cmm Statements ++ [CmmNode O O] -> ++ -- | Resulting instruction ++ NatM InstrBlock ++stmtsToInstrs stmts = concatOL <$> mapM stmtToInstrs stmts ++ ++stmtToInstrs :: ++ CmmNode e x -> ++ -- | Resulting instructions ++ NatM InstrBlock ++stmtToInstrs stmt = do ++ config <- getConfig ++ platform <- getPlatform ++ case stmt of ++ CmmUnsafeForeignCall target result_regs args -> ++ genCCall target result_regs args ++ CmmComment s -> pure (unitOL (COMMENT (ftext s))) ++ CmmTick {} -> pure nilOL ++ CmmAssign reg src ++ | isFloatType ty -> assignReg_FltCode format reg src ++ | otherwise -> assignReg_IntCode format reg src ++ where ++ ty = cmmRegType reg ++ format = cmmTypeFormat ty ++ CmmStore addr src _alignment ++ | isFloatType ty -> assignMem_FltCode format addr src ++ | otherwise -> assignMem_IntCode format addr src ++ where ++ ty = cmmExprType platform src ++ format = cmmTypeFormat ty ++ CmmBranch id -> genBranch id ++ -- We try to arrange blocks such that the likely branch is the fallthrough ++ -- in GHC.Cmm.ContFlowOpt. So we can assume the condition is likely false here. ++ CmmCondBranch arg true false _prediction -> ++ genCondBranch true false arg ++ CmmSwitch arg ids -> genSwitch config arg ids ++ CmmCall {cml_target = arg} -> genJump arg ++ CmmUnwind _regs -> pure nilOL ++ -- Intentionally not have a default case here: If anybody adds a ++ -- constructor, the compiler should force them to think about this here. ++ CmmForeignCall {} -> pprPanic "stmtToInstrs: statement should have been cps'd away" (pdoc platform stmt) ++ CmmEntry {} -> pprPanic "stmtToInstrs: statement should have been cps'd away" (pdoc platform stmt) ++ ++-------------------------------------------------------------------------------- ++ ++-- | 'InstrBlock's are the insn sequences generated by the insn selectors. ++-- ++-- They are really trees of insns to facilitate fast appending, where a ++-- left-to-right traversal yields the insns in the correct order. ++type InstrBlock = ++ OrdList Instr ++ ++-- | Register's passed up the tree. ++-- ++-- If the stix code forces the register to live in a pre-decided machine ++-- register, it comes out as @Fixed@; otherwise, it comes out as @Any@, and the ++-- parent can decide which register to put it in. ++data Register ++ = Fixed Format Reg InstrBlock ++ | Any Format (Reg -> InstrBlock) ++ ++-- | Sometimes we need to change the Format of a register. Primarily during ++-- conversion. ++swizzleRegisterRep :: Format -> Register -> Register ++swizzleRegisterRep format' (Fixed _format reg code) = Fixed format' reg code ++swizzleRegisterRep format' (Any _format codefn) = Any format' codefn ++ ++-- | Grab a `Reg` for a `CmmReg` ++-- ++-- `LocalReg`s are assigned virtual registers (`RegVirtual`), `GlobalReg`s are ++-- assigned real registers (`RegReal`). It is an error if a `GlobalReg` is not a ++-- STG register. ++getRegisterReg :: Platform -> CmmReg -> Reg ++getRegisterReg _ (CmmLocal (LocalReg u pk)) = ++ RegVirtual $ mkVirtualReg u (cmmTypeFormat pk) ++getRegisterReg platform (CmmGlobal mid) = ++ case globalRegMaybe platform (globalRegUseGlobalReg mid) of ++ Just reg -> RegReal reg ++ Nothing -> pprPanic "getRegisterReg-memory" (ppr $ CmmGlobal mid) ++ ++-- ----------------------------------------------------------------------------- ++-- General things for putting together code sequences ++ ++-- | Compute an expression into any register ++getSomeReg :: CmmExpr -> NatM (Reg, Format, InstrBlock) ++getSomeReg expr = do ++ r <- getRegister expr ++ case r of ++ Any rep code -> do ++ newReg <- getNewRegNat rep ++ return (newReg, rep, code newReg) ++ Fixed rep reg code -> ++ return (reg, rep, code) ++ ++-- | Compute an expression into any floating-point register ++-- ++-- If the initial expression is not a floating-point expression, finally move ++-- the result into a floating-point register. ++getFloatReg :: (HasCallStack) => CmmExpr -> NatM (Reg, Format, InstrBlock) ++getFloatReg expr = do ++ r <- getRegister expr ++ case r of ++ Any rep code | isFloatFormat rep -> do ++ newReg <- getNewRegNat rep ++ return (newReg, rep, code newReg) ++ Any II32 code -> do ++ newReg <- getNewRegNat FF32 ++ return (newReg, FF32, code newReg) ++ Any II64 code -> do ++ newReg <- getNewRegNat FF64 ++ return (newReg, FF64, code newReg) ++ Any _w _code -> do ++ config <- getConfig ++ pprPanic "can't do getFloatReg on" (pdoc (ncgPlatform config) expr) ++ -- can't do much for fixed. ++ Fixed rep reg code -> ++ return (reg, rep, code) ++ ++-- | Map `CmmLit` to `OpImm` ++-- ++-- N.B. this is a partial function, because not all `CmmLit`s have an immediate ++-- representation. ++litToImm' :: CmmLit -> Operand ++litToImm' = OpImm . litToImm ++ ++-- | Compute a `CmmExpr` into a `Register` ++getRegister :: CmmExpr -> NatM Register ++getRegister e = do ++ config <- getConfig ++ getRegister' config (ncgPlatform config) e ++ ++-- | The register width to be used for an operation on the given width ++-- operand. ++opRegWidth :: Width -> Width ++opRegWidth W64 = W64 ++opRegWidth W32 = W32 ++opRegWidth W16 = W32 ++opRegWidth W8 = W32 ++opRegWidth w = pprPanic "opRegWidth" (text "Unsupported width" <+> ppr w) ++ ++-- Note [Signed arithmetic on RISCV64] ++-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ++-- Handling signed arithmetic on sub-word-size values on RISCV64 is a bit ++-- tricky as Cmm's type system does not capture signedness. While 32-bit values ++-- are fairly easy to handle due to RISCV64's 32-bit instruction variants ++-- (denoted by use of %wN registers), 16- and 8-bit values require quite some ++-- care. ++-- ++-- We handle 16-and 8-bit values by using the 32-bit operations and ++-- sign-/zero-extending operands and truncate results as necessary. For ++-- simplicity we maintain the invariant that a register containing a ++-- sub-word-size value always contains the zero-extended form of that value ++-- in between operations. ++-- ++-- For instance, consider the program, ++-- ++-- test(bits64 buffer) ++-- bits8 a = bits8[buffer]; ++-- bits8 b = %mul(a, 42); ++-- bits8 c = %not(b); ++-- bits8 d = %shrl(c, 4::bits8); ++-- return (d); ++-- } ++-- ++-- This program begins by loading `a` from memory, for which we use a ++-- zero-extended byte-size load. We next sign-extend `a` to 32-bits, and use a ++-- 32-bit multiplication to compute `b`, and truncate the result back down to ++-- 8-bits. ++-- ++-- Next we compute `c`: The `%not` requires no extension of its operands, but ++-- we must still truncate the result back down to 8-bits. Finally the `%shrl` ++-- requires no extension and no truncate since we can assume that ++-- `c` is zero-extended. ++-- ++-- The "RISC-V Sign Extension Optimizations" LLVM tech talk presentation by ++-- Craig Topper covers possible future improvements ++-- (https://llvm.org/devmtg/2022-11/slides/TechTalk21-RISC-VSignExtensionOptimi…) ++-- ++-- ++-- Note [Handling PIC on RV64] ++-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ++-- RV64 does not have a special PIC register, the general approach is to simply ++-- do PC-relative addressing or go through the GOT. There is assembly support ++-- for both. ++-- ++-- rv64 assembly has a `la` (load address) pseudo-instruction, that allows ++-- loading a label's address into a register. The instruction is desugared into ++-- different addressing modes, e.g. PC-relative addressing: ++-- ++-- 1: lui rd1, %pcrel_hi(label) ++-- addi rd1, %pcrel_lo(1b) ++-- ++-- See https://sourceware.org/binutils/docs/as/RISC_002dV_002dModifiers.html, ++-- PIC can be enabled/disabled through ++-- ++-- .option pic ++-- ++-- See https://sourceware.org/binutils/docs/as/RISC_002dV_002dDirectives.html#RISC… ++-- ++-- CmmGlobal @PicBaseReg@'s are generated in @GHC.CmmToAsm.PIC@ in the ++-- @cmmMakePicReference@. This is in turn called from @cmmMakeDynamicReference@ ++-- also in @Cmm.CmmToAsm.PIC@ from where it is also exported. There are two ++-- callsites for this. One is in this module to produce the @target@ in @genCCall@ ++-- the other is in @GHC.CmmToAsm@ in @cmmExprNative@. ++-- ++-- Conceptually we do not want any special PicBaseReg to be used on RV64. If ++-- we want to distinguish between symbol loading, we need to address this through ++-- the way we load it, not through a register. ++-- ++ ++getRegister' :: NCGConfig -> Platform -> CmmExpr -> NatM Register ++-- OPTIMIZATION WARNING: CmmExpr rewrites ++-- 1. Rewrite: Reg + (-n) => Reg - n ++-- TODO: this expression shouldn't even be generated to begin with. ++getRegister' config plat (CmmMachOp (MO_Add w0) [x, CmmLit (CmmInt i w1)]) ++ | i < 0 = ++ getRegister' config plat (CmmMachOp (MO_Sub w0) [x, CmmLit (CmmInt (-i) w1)]) ++getRegister' config plat (CmmMachOp (MO_Sub w0) [x, CmmLit (CmmInt i w1)]) ++ | i < 0 = ++ getRegister' config plat (CmmMachOp (MO_Add w0) [x, CmmLit (CmmInt (-i) w1)]) ++-- Generic case. ++getRegister' config plat expr = ++ case expr of ++ CmmReg (CmmGlobal (GlobalRegUse PicBaseReg _)) -> ++ -- See Note [Handling PIC on RV64] ++ pprPanic "getRegister': There's no PIC base register on RISCV" (ppr PicBaseReg) ++ CmmLit lit -> ++ case lit of ++ CmmInt 0 w -> pure $ Fixed (intFormat w) zeroReg nilOL ++ CmmInt i w -> ++ -- narrowU is important: Negative immediates may be ++ -- sign-extended on load! ++ let imm = OpImm . ImmInteger $ narrowU w i ++ in pure (Any (intFormat w) (\dst -> unitOL $ annExpr expr (MOV (OpReg w dst) imm))) ++ CmmFloat 0 w -> do ++ let op = litToImm' lit ++ pure (Any (floatFormat w) (\dst -> unitOL $ annExpr expr (MOV (OpReg w dst) op))) ++ CmmFloat _f W8 -> pprPanic "getRegister' (CmmLit:CmmFloat), no support for bytes" (pdoc plat expr) ++ CmmFloat _f W16 -> pprPanic "getRegister' (CmmLit:CmmFloat), no support for halfs" (pdoc plat expr) ++ CmmFloat f W32 -> do ++ let word = castFloatToWord32 (fromRational f) :: Word32 ++ intReg <- getNewRegNat (intFormat W32) ++ return ++ ( Any ++ (floatFormat W32) ++ ( \dst -> ++ toOL ++ [ annExpr expr ++ $ MOV (OpReg W32 intReg) (OpImm (ImmInteger (fromIntegral word))), ++ MOV (OpReg W32 dst) (OpReg W32 intReg) ++ ] ++ ) ++ ) ++ CmmFloat f W64 -> do ++ let word = castDoubleToWord64 (fromRational f) :: Word64 ++ intReg <- getNewRegNat (intFormat W64) ++ return ++ ( Any ++ (floatFormat W64) ++ ( \dst -> ++ toOL ++ [ annExpr expr ++ $ MOV (OpReg W64 intReg) (OpImm (ImmInteger (fromIntegral word))), ++ MOV (OpReg W64 dst) (OpReg W64 intReg) ++ ] ++ ) ++ ) ++ CmmFloat _f _w -> pprPanic "getRegister' (CmmLit:CmmFloat), unsupported float lit" (pdoc plat expr) ++ CmmVec _lits -> pprPanic "getRegister' (CmmLit:CmmVec): " (pdoc plat expr) ++ CmmLabel lbl -> do ++ let op = OpImm (ImmCLbl lbl) ++ rep = cmmLitType plat lit ++ format = cmmTypeFormat rep ++ return (Any format (\dst -> unitOL $ annExpr expr (LDR format (OpReg (formatToWidth format) dst) op))) ++ CmmLabelOff lbl off | isNbitEncodeable 12 (fromIntegral off) -> do ++ let op = OpImm (ImmIndex lbl off) ++ rep = cmmLitType plat lit ++ format = cmmTypeFormat rep ++ return (Any format (\dst -> unitOL $ LDR format (OpReg (formatToWidth format) dst) op)) ++ CmmLabelOff lbl off -> do ++ let op = litToImm' (CmmLabel lbl) ++ rep = cmmLitType plat lit ++ format = cmmTypeFormat rep ++ width = typeWidth rep ++ (off_r, _off_format, off_code) <- getSomeReg $ CmmLit (CmmInt (fromIntegral off) width) ++ return ++ ( Any ++ format ++ ( \dst -> ++ off_code ++ `snocOL` LDR format (OpReg (formatToWidth format) dst) op ++ `snocOL` ADD (OpReg width dst) (OpReg width dst) (OpReg width off_r) ++ ) ++ ) ++ CmmLabelDiffOff {} -> pprPanic "getRegister' (CmmLit:CmmLabelOff): " (pdoc plat expr) ++ CmmBlock _ -> pprPanic "getRegister' (CmmLit:CmmLabelOff): " (pdoc plat expr) ++ CmmHighStackMark -> pprPanic "getRegister' (CmmLit:CmmLabelOff): " (pdoc plat expr) ++ CmmLoad mem rep _ -> do ++ let format = cmmTypeFormat rep ++ width = typeWidth rep ++ Amode addr addr_code <- getAmode plat width mem ++ case width of ++ w ++ | w <= W64 -> ++ -- Load without sign-extension. See Note [Signed arithmetic on RISCV64] ++ pure ++ ( Any ++ format ++ ( \dst -> ++ addr_code ++ `snocOL` LDRU format (OpReg width dst) (OpAddr addr) ++ ) ++ ) ++ _ -> ++ pprPanic ("Width too big! Cannot load: " ++ show width) (pdoc plat expr) ++ CmmStackSlot _ _ -> ++ pprPanic "getRegister' (CmmStackSlot): " (pdoc plat expr) ++ CmmReg reg -> ++ return ++ ( Fixed ++ (cmmTypeFormat (cmmRegType reg)) ++ (getRegisterReg plat reg) ++ nilOL ++ ) ++ CmmRegOff reg off | isNbitEncodeable 12 (fromIntegral off) -> do ++ getRegister' config plat ++ $ CmmMachOp (MO_Add width) [CmmReg reg, CmmLit (CmmInt (fromIntegral off) width)] ++ where ++ width = typeWidth (cmmRegType reg) ++ CmmRegOff reg off -> do ++ (off_r, _off_format, off_code) <- getSomeReg $ CmmLit (CmmInt (fromIntegral off) width) ++ (reg, _format, code) <- getSomeReg $ CmmReg reg ++ return ++ $ Any ++ (intFormat width) ++ ( \dst -> ++ off_code ++ `appOL` code ++ `snocOL` ADD (OpReg width dst) (OpReg width reg) (OpReg width off_r) ++ ) ++ where ++ width = typeWidth (cmmRegType reg) ++ ++ -- Handle MO_RelaxedRead as a normal CmmLoad, to allow ++ -- non-trivial addressing modes to be used. ++ CmmMachOp (MO_RelaxedRead w) [e] -> ++ getRegister (CmmLoad e (cmmBits w) NaturallyAligned) ++ -- for MachOps, see GHC.Cmm.MachOp ++ -- For CmmMachOp, see GHC.Cmm.Expr ++ CmmMachOp op [e] -> do ++ (reg, _format, code) <- getSomeReg e ++ case op of ++ MO_Not w -> return $ Any (intFormat w) $ \dst -> ++ let w' = opRegWidth w ++ in code ++ `snocOL` ++ -- pseudo instruction `not` is `xori rd, rs, -1` ++ ann (text "not") (XORI (OpReg w' dst) (OpReg w' reg) (OpImm (ImmInt (-1)))) ++ `appOL` truncateReg w' w dst -- See Note [Signed arithmetic on RISCV64] ++ MO_S_Neg w -> negate code w reg ++ MO_F_Neg w -> ++ return ++ $ Any ++ (floatFormat w) ++ ( \dst -> ++ code ++ `snocOL` NEG (OpReg w dst) (OpReg w reg) ++ ) ++ -- TODO: Can this case happen? ++ MO_SF_Conv from to | from < W32 -> do ++ -- extend to the smallest available representation ++ (reg_x, code_x) <- signExtendReg from W32 reg ++ pure ++ $ Any ++ (floatFormat to) ++ ( \dst -> ++ code ++ `appOL` code_x ++ `snocOL` annExpr expr (FCVT IntToFloat (OpReg to dst) (OpReg from reg_x)) -- (Signed ConVerT Float) ++ ) ++ MO_SF_Conv from to -> ++ pure ++ $ Any ++ (floatFormat to) ++ ( \dst -> ++ code ++ `snocOL` annExpr expr (FCVT IntToFloat (OpReg to dst) (OpReg from reg)) -- (Signed ConVerT Float) ++ ) ++ MO_FS_Conv from to ++ | to < W32 -> ++ pure ++ $ Any ++ (intFormat to) ++ ( \dst -> ++ code ++ `snocOL` ++ -- W32 is the smallest width to convert to. Decrease width afterwards. ++ annExpr expr (FCVT FloatToInt (OpReg W32 dst) (OpReg from reg)) ++ `appOL` signExtendAdjustPrecission W32 to dst dst -- (float convert (-> zero) signed) ++ ) ++ MO_FS_Conv from to -> ++ pure ++ $ Any ++ (intFormat to) ++ ( \dst -> ++ code ++ `snocOL` annExpr expr (FCVT FloatToInt (OpReg to dst) (OpReg from reg)) ++ `appOL` truncateReg from to dst -- (float convert (-> zero) signed) ++ ) ++ MO_UU_Conv from to ++ | from <= to -> ++ pure ++ $ Any ++ (intFormat to) ++ ( \dst -> ++ code ++ `snocOL` annExpr e (MOV (OpReg to dst) (OpReg from reg)) ++ ) ++ MO_UU_Conv from to -> ++ pure ++ $ Any ++ (intFormat to) ++ ( \dst -> ++ code ++ `snocOL` annExpr e (MOV (OpReg from dst) (OpReg from reg)) ++ `appOL` truncateReg from to dst ++ ) ++ MO_SS_Conv from to -> ss_conv from to reg code ++ MO_FF_Conv from to -> return $ Any (floatFormat to) (\dst -> code `snocOL` annExpr e (FCVT FloatToFloat (OpReg to dst) (OpReg from reg))) ++ -- Conversions ++ -- TODO: Duplication with MO_UU_Conv ++ MO_XX_Conv from to ++ | to < from -> ++ pure ++ $ Any ++ (intFormat to) ++ ( \dst -> ++ code ++ `snocOL` annExpr e (MOV (OpReg from dst) (OpReg from reg)) ++ `appOL` truncateReg from to dst ++ ) ++ MO_XX_Conv _from to -> swizzleRegisterRep (intFormat to) <$> getRegister e ++ MO_AlignmentCheck align wordWidth -> do ++ reg <- getRegister' config plat e ++ addAlignmentCheck align wordWidth reg ++ x -> pprPanic ("getRegister' (monadic CmmMachOp): " ++ show x) (pdoc plat expr) ++ where ++ -- In the case of 16- or 8-bit values we need to sign-extend to 32-bits ++ -- See Note [Signed arithmetic on RISCV64]. ++ negate code w reg = do ++ let w' = opRegWidth w ++ (reg', code_sx) <- signExtendReg w w' reg ++ return $ Any (intFormat w) $ \dst -> ++ code ++ `appOL` code_sx ++ `snocOL` NEG (OpReg w' dst) (OpReg w' reg') ++ `appOL` truncateReg w' w dst ++ ++ ss_conv from to reg code ++ | from < to = do ++ pure $ Any (intFormat to) $ \dst -> ++ code ++ `appOL` signExtend from to reg dst ++ `appOL` truncateReg from to dst ++ | from > to = ++ pure $ Any (intFormat to) $ \dst -> ++ code ++ `appOL` toOL ++ [ ann ++ (text "MO_SS_Conv: narrow register signed" <+> ppr reg <+> ppr from <> text "->" <> ppr to) ++ (SLL (OpReg to dst) (OpReg from reg) (OpImm (ImmInt shift))), ++ -- signed right shift ++ SRA (OpReg to dst) (OpReg to dst) (OpImm (ImmInt shift)) ++ ] ++ `appOL` truncateReg from to dst ++ | otherwise = ++ -- No conversion necessary: Just copy. ++ pure $ Any (intFormat from) $ \dst -> ++ code `snocOL` MOV (OpReg from dst) (OpReg from reg) ++ where ++ shift = 64 - (widthInBits from - widthInBits to) ++ ++ -- Dyadic machops: ++ -- ++ -- The general idea is: ++ -- compute x<i> <- x ++ -- compute x<j> <- y ++ -- OP x<r>, x<i>, x<j> ++ -- ++ -- TODO: for now we'll only implement the 64bit versions. And rely on the ++ -- fallthrough to alert us if things go wrong! ++ -- OPTIMIZATION WARNING: Dyadic CmmMachOp destructuring ++ -- 0. TODO This should not exist! Rewrite: Reg +- 0 -> Reg ++ CmmMachOp (MO_Add _) [expr'@(CmmReg (CmmGlobal _r)), CmmLit (CmmInt 0 _)] -> getRegister' config plat expr' ++ CmmMachOp (MO_Sub _) [expr'@(CmmReg (CmmGlobal _r)), CmmLit (CmmInt 0 _)] -> getRegister' config plat expr' ++ -- 1. Compute Reg +/- n directly. ++ -- For Add/Sub we can directly encode 12bits, or 12bits lsl #12. ++ CmmMachOp (MO_Add w) [CmmReg reg, CmmLit (CmmInt n _)] ++ | fitsIn12bitImm n -> return $ Any (intFormat w) (\d -> unitOL $ annExpr expr (ADD (OpReg w d) (OpReg w' r') (OpImm (ImmInteger n)))) ++ where ++ -- TODO: 12bits lsl #12; e.g. lower 12 bits of n are 0; shift n >> 12, and set lsl to #12. ++ w' = formatToWidth (cmmTypeFormat (cmmRegType reg)) ++ r' = getRegisterReg plat reg ++ CmmMachOp (MO_Sub w) [CmmReg reg, CmmLit (CmmInt n _)] ++ | fitsIn12bitImm n -> return $ Any (intFormat w) (\d -> unitOL $ annExpr expr (SUB (OpReg w d) (OpReg w' r') (OpImm (ImmInteger n)))) ++ where ++ -- TODO: 12bits lsl #12; e.g. lower 12 bits of n are 0; shift n >> 12, and set lsl to #12. ++ w' = formatToWidth (cmmTypeFormat (cmmRegType reg)) ++ r' = getRegisterReg plat reg ++ CmmMachOp (MO_U_Quot w) [x, y] | w == W8 || w == W16 -> do ++ (reg_x, format_x, code_x) <- getSomeReg x ++ (reg_y, format_y, code_y) <- getSomeReg y ++ return ++ $ Any ++ (intFormat w) ++ ( \dst -> ++ code_x ++ `appOL` truncateReg (formatToWidth format_x) w reg_x ++ `appOL` code_y ++ `appOL` truncateReg (formatToWidth format_y) w reg_y ++ `snocOL` annExpr expr (DIVU (OpReg w dst) (OpReg w reg_x) (OpReg w reg_y)) ++ ) ++ ++ -- 2. Shifts. x << n, x >> n. ++ CmmMachOp (MO_Shl w) [x, CmmLit (CmmInt n _)] ++ | w == W32, ++ 0 <= n, ++ n < 32 -> do ++ (reg_x, _format_x, code_x) <- getSomeReg x ++ return ++ $ Any ++ (intFormat w) ++ ( \dst -> ++ code_x ++ `snocOL` annExpr expr (SLL (OpReg w dst) (OpReg w reg_x) (OpImm (ImmInteger n))) ++ `appOL` truncateReg w w dst ++ ) ++ CmmMachOp (MO_Shl w) [x, CmmLit (CmmInt n _)] ++ | w == W64, ++ 0 <= n, ++ n < 64 -> do ++ (reg_x, _format_x, code_x) <- getSomeReg x ++ return ++ $ Any ++ (intFormat w) ++ ( \dst -> ++ code_x ++ `snocOL` annExpr expr (SLL (OpReg w dst) (OpReg w reg_x) (OpImm (ImmInteger n))) ++ `appOL` truncateReg w w dst ++ ) ++ CmmMachOp (MO_S_Shr w) [x, CmmLit (CmmInt n _)] | fitsIn12bitImm n -> do ++ (reg_x, format_x, code_x) <- getSomeReg x ++ (reg_x', code_x') <- signExtendReg (formatToWidth format_x) w reg_x ++ return ++ $ Any ++ (intFormat w) ++ ( \dst -> ++ code_x ++ `appOL` code_x' ++ `snocOL` annExpr expr (SRA (OpReg w dst) (OpReg w reg_x') (OpImm (ImmInteger n))) ++ ) ++ CmmMachOp (MO_S_Shr w) [x, y] -> do ++ (reg_x, format_x, code_x) <- getSomeReg x ++ (reg_y, _format_y, code_y) <- getSomeReg y ++ (reg_x', code_x') <- signExtendReg (formatToWidth format_x) w reg_x ++ return ++ $ Any ++ (intFormat w) ++ ( \dst -> ++ code_x ++ `appOL` code_x' ++ `appOL` code_y ++ `snocOL` annExpr expr (SRA (OpReg w dst) (OpReg w reg_x') (OpReg w reg_y)) ++ ) ++ CmmMachOp (MO_U_Shr w) [x, CmmLit (CmmInt n _)] ++ | w == W8, ++ 0 <= n, ++ n < 8 -> do ++ (reg_x, format_x, code_x) <- getSomeReg x ++ return ++ $ Any ++ (intFormat w) ++ ( \dst -> ++ code_x ++ `appOL` truncateReg (formatToWidth format_x) w reg_x ++ `snocOL` annExpr expr (SRL (OpReg w dst) (OpReg w reg_x) (OpImm (ImmInteger n))) ++ ) ++ CmmMachOp (MO_U_Shr w) [x, CmmLit (CmmInt n _)] ++ | w == W16, ++ 0 <= n, ++ n < 16 -> do ++ (reg_x, format_x, code_x) <- getSomeReg x ++ return ++ $ Any ++ (intFormat w) ++ ( \dst -> ++ code_x ++ `appOL` truncateReg (formatToWidth format_x) w reg_x ++ `snocOL` annExpr expr (SRL (OpReg w dst) (OpReg w reg_x) (OpImm (ImmInteger n))) ++ ) ++ CmmMachOp (MO_U_Shr w) [x, y] | w == W8 || w == W16 -> do ++ (reg_x, format_x, code_x) <- getSomeReg x ++ (reg_y, _format_y, code_y) <- getSomeReg y ++ return ++ $ Any ++ (intFormat w) ++ ( \dst -> ++ code_x ++ `appOL` code_y ++ `appOL` truncateReg (formatToWidth format_x) w reg_x ++ `snocOL` annExpr expr (SRL (OpReg w dst) (OpReg w reg_x) (OpReg w reg_y)) ++ ) ++ CmmMachOp (MO_U_Shr w) [x, CmmLit (CmmInt n _)] ++ | w == W32, ++ 0 <= n, ++ n < 32 -> do ++ (reg_x, _format_x, code_x) <- getSomeReg x ++ return ++ $ Any ++ (intFormat w) ++ ( \dst -> ++ code_x ++ `snocOL` annExpr expr (SRL (OpReg w dst) (OpReg w reg_x) (OpImm (ImmInteger n))) ++ ) ++ CmmMachOp (MO_U_Shr w) [x, CmmLit (CmmInt n _)] ++ | w == W64, ++ 0 <= n, ++ n < 64 -> do ++ (reg_x, _format_x, code_x) <- getSomeReg x ++ return ++ $ Any ++ (intFormat w) ++ ( \dst -> ++ code_x ++ `snocOL` annExpr expr (SRL (OpReg w dst) (OpReg w reg_x) (OpImm (ImmInteger n))) ++ ) ++ ++ -- 3. Logic &&, || ++ CmmMachOp (MO_And w) [CmmReg reg, CmmLit (CmmInt n _)] ++ | fitsIn12bitImm n -> ++ return $ Any (intFormat w) (\d -> unitOL $ annExpr expr (AND (OpReg w d) (OpReg w' r') (OpImm (ImmInteger n)))) ++ where ++ w' = formatToWidth (cmmTypeFormat (cmmRegType reg)) ++ r' = getRegisterReg plat reg ++ CmmMachOp (MO_Or w) [CmmReg reg, CmmLit (CmmInt n _)] ++ | fitsIn12bitImm n -> ++ return $ Any (intFormat w) (\d -> unitOL $ annExpr expr (ORI (OpReg w d) (OpReg w' r') (OpImm (ImmInteger n)))) ++ where ++ w' = formatToWidth (cmmTypeFormat (cmmRegType reg)) ++ r' = getRegisterReg plat reg ++ ++ -- Generic binary case. ++ CmmMachOp op [x, y] -> do ++ let -- A "plain" operation. ++ bitOp w op = do ++ -- compute x<m> <- x ++ -- compute x<o> <- y ++ -- <OP> x<n>, x<m>, x<o> ++ (reg_x, format_x, code_x) <- getSomeReg x ++ (reg_y, format_y, code_y) <- getSomeReg y ++ massertPpr (isIntFormat format_x == isIntFormat format_y) $ text "bitOp: incompatible" ++ return ++ $ Any ++ (intFormat w) ++ ( \dst -> ++ code_x ++ `appOL` code_y ++ `appOL` op (OpReg w dst) (OpReg w reg_x) (OpReg w reg_y) ++ ) ++ ++ -- A (potentially signed) integer operation. ++ -- In the case of 8- and 16-bit signed arithmetic we must first ++ -- sign-extend both arguments to 32-bits. ++ -- See Note [Signed arithmetic on RISCV64]. ++ intOp is_signed w op = do ++ -- compute x<m> <- x ++ -- compute x<o> <- y ++ -- <OP> x<n>, x<m>, x<o> ++ (reg_x, format_x, code_x) <- getSomeReg x ++ (reg_y, format_y, code_y) <- getSomeReg y ++ massertPpr (isIntFormat format_x && isIntFormat format_y) $ text "intOp: non-int" ++ -- This is the width of the registers on which the operation ++ -- should be performed. ++ let w' = opRegWidth w ++ signExt r ++ | not is_signed = return (r, nilOL) ++ | otherwise = signExtendReg w w' r ++ (reg_x_sx, code_x_sx) <- signExt reg_x ++ (reg_y_sx, code_y_sx) <- signExt reg_y ++ return $ Any (intFormat w) $ \dst -> ++ code_x ++ `appOL` code_y ++ `appOL` ++ -- sign-extend both operands ++ code_x_sx ++ `appOL` code_y_sx ++ `appOL` op (OpReg w' dst) (OpReg w' reg_x_sx) (OpReg w' reg_y_sx) ++ `appOL` truncateReg w' w dst -- truncate back to the operand's original width ++ floatOp w op = do ++ (reg_fx, format_x, code_fx) <- getFloatReg x ++ (reg_fy, format_y, code_fy) <- getFloatReg y ++ massertPpr (isFloatFormat format_x && isFloatFormat format_y) $ text "floatOp: non-float" ++ return ++ $ Any ++ (floatFormat w) ++ ( \dst -> ++ code_fx ++ `appOL` code_fy ++ `appOL` op (OpReg w dst) (OpReg w reg_fx) (OpReg w reg_fy) ++ ) ++ ++ -- need a special one for conditionals, as they return ints ++ floatCond w op = do ++ (reg_fx, format_x, code_fx) <- getFloatReg x ++ (reg_fy, format_y, code_fy) <- getFloatReg y ++ massertPpr (isFloatFormat format_x && isFloatFormat format_y) $ text "floatCond: non-float" ++ return ++ $ Any ++ (intFormat w) ++ ( \dst -> ++ code_fx ++ `appOL` code_fy ++ `appOL` op (OpReg w dst) (OpReg w reg_fx) (OpReg w reg_fy) ++ ) ++ ++ case op of ++ -- Integer operations ++ -- Add/Sub should only be Integer Options. ++ MO_Add w -> intOp False w (\d x y -> unitOL $ annExpr expr (ADD d x y)) ++ -- TODO: Handle sub-word case ++ MO_Sub w -> intOp False w (\d x y -> unitOL $ annExpr expr (SUB d x y)) ++ -- N.B. We needn't sign-extend sub-word size (in)equality comparisons ++ -- since we don't care about ordering. ++ MO_Eq w -> bitOp w (\d x y -> unitOL $ annExpr expr (CSET d x y EQ)) ++ MO_Ne w -> bitOp w (\d x y -> unitOL $ annExpr expr (CSET d x y NE)) ++ -- Signed multiply/divide ++ MO_Mul w -> intOp True w (\d x y -> unitOL $ annExpr expr (MUL d x y)) ++ MO_S_MulMayOflo w -> do_mul_may_oflo w x y ++ MO_S_Quot w -> intOp True w (\d x y -> unitOL $ annExpr expr (DIV d x y)) ++ MO_S_Rem w -> intOp True w (\d x y -> unitOL $ annExpr expr (REM d x y)) ++ -- Unsigned multiply/divide ++ MO_U_Quot w -> intOp False w (\d x y -> unitOL $ annExpr expr (DIVU d x y)) ++ MO_U_Rem w -> intOp False w (\d x y -> unitOL $ annExpr expr (REMU d x y)) ++ -- Signed comparisons ++ MO_S_Ge w -> intOp True w (\d x y -> unitOL $ annExpr expr (CSET d x y SGE)) ++ MO_S_Le w -> intOp True w (\d x y -> unitOL $ annExpr expr (CSET d x y SLE)) ++ MO_S_Gt w -> intOp True w (\d x y -> unitOL $ annExpr expr (CSET d x y SGT)) ++ MO_S_Lt w -> intOp True w (\d x y -> unitOL $ annExpr expr (CSET d x y SLT)) ++ -- Unsigned comparisons ++ MO_U_Ge w -> intOp False w (\d x y -> unitOL $ annExpr expr (CSET d x y UGE)) ++ MO_U_Le w -> intOp False w (\d x y -> unitOL $ annExpr expr (CSET d x y ULE)) ++ MO_U_Gt w -> intOp False w (\d x y -> unitOL $ annExpr expr (CSET d x y UGT)) ++ MO_U_Lt w -> intOp False w (\d x y -> unitOL $ annExpr expr (CSET d x y ULT)) ++ -- Floating point arithmetic ++ MO_F_Add w -> floatOp w (\d x y -> unitOL $ annExpr expr (ADD d x y)) ++ MO_F_Sub w -> floatOp w (\d x y -> unitOL $ annExpr expr (SUB d x y)) ++ MO_F_Mul w -> floatOp w (\d x y -> unitOL $ annExpr expr (MUL d x y)) ++ MO_F_Quot w -> floatOp w (\d x y -> unitOL $ annExpr expr (DIV d x y)) ++ -- Floating point comparison ++ MO_F_Eq w -> floatCond w (\d x y -> unitOL $ annExpr expr (CSET d x y EQ)) ++ MO_F_Ne w -> floatCond w (\d x y -> unitOL $ annExpr expr (CSET d x y NE)) ++ MO_F_Ge w -> floatCond w (\d x y -> unitOL $ annExpr expr (CSET d x y FGE)) ++ MO_F_Le w -> floatCond w (\d x y -> unitOL $ annExpr expr (CSET d x y FLE)) -- x <= y <=> y > x ++ MO_F_Gt w -> floatCond w (\d x y -> unitOL $ annExpr expr (CSET d x y FGT)) ++ MO_F_Lt w -> floatCond w (\d x y -> unitOL $ annExpr expr (CSET d x y FLT)) -- x < y <=> y >= x ++ ++ -- Bitwise operations ++ MO_And w -> bitOp w (\d x y -> unitOL $ annExpr expr (AND d x y)) ++ MO_Or w -> bitOp w (\d x y -> unitOL $ annExpr expr (OR d x y)) ++ MO_Xor w -> bitOp w (\d x y -> unitOL $ annExpr expr (XOR d x y)) ++ MO_Shl w -> intOp False w (\d x y -> unitOL $ annExpr expr (SLL d x y)) ++ MO_U_Shr w -> intOp False w (\d x y -> unitOL $ annExpr expr (SRL d x y)) ++ MO_S_Shr w -> intOp True w (\d x y -> unitOL $ annExpr expr (SRA d x y)) ++ op -> pprPanic "getRegister' (unhandled dyadic CmmMachOp): " $ pprMachOp op <+> text "in" <+> pdoc plat expr ++ ++ -- Generic ternary case. ++ CmmMachOp op [x, y, z] -> ++ case op of ++ -- Floating-point fused multiply-add operations ++ -- ++ -- x86 fmadd x * y + z <=> RISCV64 fmadd : d = r1 * r2 + r3 ++ -- x86 fmsub x * y - z <=> RISCV64 fnmsub: d = r1 * r2 - r3 ++ -- x86 fnmadd - x * y + z <=> RISCV64 fmsub : d = - r1 * r2 + r3 ++ -- x86 fnmsub - x * y - z <=> RISCV64 fnmadd: d = - r1 * r2 - r3 ++ MO_FMA var w -> case var of ++ FMAdd -> float3Op w (\d n m a -> unitOL $ FMA FMAdd d n m a) ++ FMSub -> float3Op w (\d n m a -> unitOL $ FMA FMSub d n m a) ++ FNMAdd -> float3Op w (\d n m a -> unitOL $ FMA FNMSub d n m a) ++ FNMSub -> float3Op w (\d n m a -> unitOL $ FMA FNMAdd d n m a) ++ _ -> ++ pprPanic "getRegister' (unhandled ternary CmmMachOp): " ++ $ pprMachOp op ++ <+> text "in" ++ <+> pdoc plat expr ++ where ++ float3Op w op = do ++ (reg_fx, format_x, code_fx) <- getFloatReg x ++ (reg_fy, format_y, code_fy) <- getFloatReg y ++ (reg_fz, format_z, code_fz) <- getFloatReg z ++ massertPpr (isFloatFormat format_x && isFloatFormat format_y && isFloatFormat format_z) ++ $ text "float3Op: non-float" ++ pure ++ $ Any (floatFormat w) ++ $ \dst -> ++ code_fx ++ `appOL` code_fy ++ `appOL` code_fz ++ `appOL` op (OpReg w dst) (OpReg w reg_fx) (OpReg w reg_fy) (OpReg w reg_fz) ++ CmmMachOp _op _xs -> ++ pprPanic "getRegister' (variadic CmmMachOp): " (pdoc plat expr) ++ where ++ isNbitEncodeable :: Int -> Integer -> Bool ++ isNbitEncodeable n i = let shift = n - 1 in (-1 `shiftL` shift) <= i && i < (1 `shiftL` shift) ++ -- N.B. MUL does not set the overflow flag. ++ -- Return 0 when the operation cannot overflow, /= 0 otherwise ++ do_mul_may_oflo :: Width -> CmmExpr -> CmmExpr -> NatM Register ++ do_mul_may_oflo w _x _y | w > W64 = pprPanic "Cannot multiply larger than 64bit" (ppr w) ++ do_mul_may_oflo w@W64 x y = do ++ (reg_x, format_x, code_x) <- getSomeReg x ++ (reg_y, format_y, code_y) <- getSomeReg y ++ -- TODO: Can't we clobber reg_x and reg_y to save registers? ++ lo <- getNewRegNat II64 ++ hi <- getNewRegNat II64 ++ -- TODO: Overhaul CSET: 3rd operand isn't needed for SNEZ ++ let nonSense = OpImm (ImmInt 0) ++ pure ++ $ Any ++ (intFormat w) ++ ( \dst -> ++ code_x ++ `appOL` signExtend (formatToWidth format_x) W64 reg_x reg_x ++ `appOL` code_y ++ `appOL` signExtend (formatToWidth format_y) W64 reg_y reg_y ++ `appOL` toOL ++ [ annExpr expr (MULH (OpReg w hi) (OpReg w reg_x) (OpReg w reg_y)), ++ MUL (OpReg w lo) (OpReg w reg_x) (OpReg w reg_y), ++ SRA (OpReg w lo) (OpReg w lo) (OpImm (ImmInt (widthInBits W64 - 1))), ++ ann ++ (text "Set flag if result of MULH contains more than sign bits.") ++ (XOR (OpReg w hi) (OpReg w hi) (OpReg w lo)), ++ CSET (OpReg w dst) (OpReg w hi) nonSense NE ++ ] ++ ) ++ do_mul_may_oflo w x y = do ++ (reg_x, format_x, code_x) <- getSomeReg x ++ (reg_y, format_y, code_y) <- getSomeReg y ++ let width_x = formatToWidth format_x ++ width_y = formatToWidth format_y ++ if w > width_x && w > width_y ++ then ++ pure ++ $ Any ++ (intFormat w) ++ ( \dst -> ++ -- 8bit * 8bit cannot overflow 16bit ++ -- 16bit * 16bit cannot overflow 32bit ++ -- 32bit * 32bit cannot overflow 64bit ++ unitOL $ annExpr expr (ADD (OpReg w dst) zero (OpImm (ImmInt 0))) ++ ) ++ else do ++ let use32BitMul = w <= W32 && width_x <= W32 && width_y <= W32 ++ nonSense = OpImm (ImmInt 0) ++ if use32BitMul ++ then do ++ narrowedReg <- getNewRegNat II64 ++ pure ++ $ Any ++ (intFormat w) ++ ( \dst -> ++ code_x ++ `appOL` signExtend (formatToWidth format_x) W32 reg_x reg_x ++ `appOL` code_y ++ `appOL` signExtend (formatToWidth format_y) W32 reg_y reg_y ++ `snocOL` annExpr expr (MUL (OpReg W32 dst) (OpReg W32 reg_x) (OpReg W32 reg_y)) ++ `appOL` signExtendAdjustPrecission W32 w dst narrowedReg ++ `appOL` toOL ++ [ ann ++ (text "Check if the multiplied value fits in the narrowed register") ++ (SUB (OpReg w dst) (OpReg w dst) (OpReg w narrowedReg)), ++ CSET (OpReg w dst) (OpReg w dst) nonSense NE ++ ] ++ ) ++ else ++ pure ++ $ Any ++ (intFormat w) ++ ( \dst -> ++ -- Do not handle this unlikely case. Just tell that it may overflow. ++ unitOL $ annExpr expr (ADD (OpReg w dst) zero (OpImm (ImmInt 1))) ++ ) ++ ++-- | Instructions to sign-extend the value in the given register from width @w@ ++-- up to width @w'@. ++signExtendReg :: Width -> Width -> Reg -> NatM (Reg, OrdList Instr) ++signExtendReg w _w' r | w == W64 = pure (r, nilOL) ++signExtendReg w w' r = do ++ r' <- getNewRegNat (intFormat w') ++ let instrs = signExtend w w' r r' ++ pure (r', instrs) ++ ++-- | Sign extends to 64bit, if needed ++-- ++-- Source `Reg` @r@ stays untouched, while the conversion happens on destination ++-- `Reg` @r'@. ++signExtend :: Width -> Width -> Reg -> Reg -> OrdList Instr ++signExtend w w' _r _r' | w > w' = pprPanic "This is not a sign extension, but a truncation." $ ppr w <> text "->" <+> ppr w' ++signExtend w w' _r _r' | w > W64 || w' > W64 = pprPanic "Unexpected width (max is 64bit):" $ ppr w <> text "->" <+> ppr w' ++signExtend w w' r r' | w == W64 && w' == W64 && r == r' = nilOL ++signExtend w w' r r' | w == W64 && w' == W64 = unitOL $ MOV (OpReg w' r') (OpReg w r) ++signExtend w w' r r' ++ | w == W32 && w' == W64 = ++ unitOL ++ $ ann ++ (text "sign-extend register (SEXT.W)" <+> ppr r <+> ppr w <> text "->" <> ppr w') ++ -- `ADDIW r r 0` is the pseudo-op SEXT.W ++ (ADD (OpReg w' r') (OpReg w r) (OpImm (ImmInt 0))) ++signExtend w w' r r' = ++ toOL ++ [ ann ++ (text "narrow register signed" <+> ppr r <> char ':' <> ppr w <> text "->" <> ppr r <> char ':' <> ppr w') ++ (SLL (OpReg w' r') (OpReg w r) (OpImm (ImmInt shift))), ++ -- signed (arithmetic) right shift ++ SRA (OpReg w' r') (OpReg w' r') (OpImm (ImmInt shift)) ++ ] ++ where ++ shift = 64 - widthInBits w ++ ++-- | Sign extends to 64bit, if needed and reduces the precission to the target `Width` (@w'@) ++-- ++-- Source `Reg` @r@ stays untouched, while the conversion happens on destination ++-- `Reg` @r'@. ++signExtendAdjustPrecission :: Width -> Width -> Reg -> Reg -> OrdList Instr ++signExtendAdjustPrecission w w' _r _r' | w > W64 || w' > W64 = pprPanic "Unexpected width (max is 64bit):" $ ppr w <> text "->" <+> ppr w' ++signExtendAdjustPrecission w w' r r' | w == W64 && w' == W64 && r == r' = nilOL ++signExtendAdjustPrecission w w' r r' | w == W64 && w' == W64 = unitOL $ MOV (OpReg w' r') (OpReg w r) ++signExtendAdjustPrecission w w' r r' ++ | w == W32 && w' == W64 = ++ unitOL ++ $ ann ++ (text "sign-extend register (SEXT.W)" <+> ppr r <+> ppr w <> text "->" <> ppr w') ++ -- `ADDIW r r 0` is the pseudo-op SEXT.W ++ (ADD (OpReg w' r') (OpReg w r) (OpImm (ImmInt 0))) ++signExtendAdjustPrecission w w' r r' ++ | w > w' = ++ toOL ++ [ ann ++ (text "narrow register signed" <+> ppr r <> char ':' <> ppr w <> text "->" <> ppr r <> char ':' <> ppr w') ++ (SLL (OpReg w' r') (OpReg w r) (OpImm (ImmInt shift))), ++ -- signed (arithmetic) right shift ++ SRA (OpReg w' r') (OpReg w' r') (OpImm (ImmInt shift)) ++ ] ++ where ++ shift = 64 - widthInBits w' ++signExtendAdjustPrecission w w' r r' = ++ toOL ++ [ ann ++ (text "sign extend register" <+> ppr r <> char ':' <> ppr w <> text "->" <> ppr r <> char ':' <> ppr w') ++ (SLL (OpReg w' r') (OpReg w r) (OpImm (ImmInt shift))), ++ -- signed (arithmetic) right shift ++ SRA (OpReg w' r') (OpReg w' r') (OpImm (ImmInt shift)) ++ ] ++ where ++ shift = 64 - widthInBits w ++ ++-- | Instructions to truncate the value in the given register from width @w@ ++-- to width @w'@. ++-- ++-- In other words, it just cuts the width out of the register. N.B.: This ++-- ignores signedness (no sign extension takes place)! ++truncateReg :: Width -> Width -> Reg -> OrdList Instr ++truncateReg _w w' _r | w' == W64 = nilOL ++truncateReg _w w' r | w' > W64 = pprPanic "Cannot truncate to width bigger than register size (max is 64bit):" $ text (show r) <> char ':' <+> ppr w' ++truncateReg w _w' r | w > W64 = pprPanic "Unexpected register size (max is 64bit):" $ text (show r) <> char ':' <+> ppr w ++truncateReg w w' r = ++ toOL ++ [ ann ++ (text "truncate register" <+> ppr r <+> ppr w <> text "->" <> ppr w') ++ (SLL (OpReg w' r) (OpReg w r) (OpImm (ImmInt shift))), ++ -- SHL ignores signedness! ++ SRL (OpReg w' r) (OpReg w r) (OpImm (ImmInt shift)) ++ ] ++ where ++ shift = 64 - widthInBits w' ++ ++-- | Given a 'Register', produce a new 'Register' with an instruction block ++-- which will check the value for alignment. Used for @-falignment-sanitisation@. ++addAlignmentCheck :: Int -> Width -> Register -> NatM Register ++addAlignmentCheck align wordWidth reg = do ++ jumpReg <- getNewRegNat II64 ++ cmpReg <- getNewRegNat II64 ++ okayLblId <- getBlockIdNat ++ ++ pure $ case reg of ++ Fixed fmt reg code -> Fixed fmt reg (code `appOL` check fmt jumpReg cmpReg okayLblId reg) ++ Any fmt f -> Any fmt (\reg -> f reg `appOL` check fmt jumpReg cmpReg okayLblId reg) ++ where ++ check :: Format -> Reg -> Reg -> BlockId -> Reg -> InstrBlock ++ check fmt jumpReg cmpReg okayLblId reg = ++ let width = formatToWidth fmt ++ in assert (not $ isFloatFormat fmt) ++ $ toOL ++ [ ann ++ (text "Alignment check - alignment: " <> int align <> text ", word width: " <> text (show wordWidth)) ++ (AND (OpReg width cmpReg) (OpReg width reg) (OpImm $ ImmInt $ align - 1)), ++ BCOND EQ (OpReg width cmpReg) zero (TBlock okayLblId), ++ COMMENT (text "Alignment check failed"), ++ LDR II64 (OpReg W64 jumpReg) (OpImm $ ImmCLbl mkBadAlignmentLabel), ++ B (TReg jumpReg), ++ NEWBLOCK okayLblId ++ ] ++ ++-- ----------------------------------------------------------------------------- ++-- The 'Amode' type: Memory addressing modes passed up the tree. ++data Amode = Amode AddrMode InstrBlock ++ ++-- | Provide the value of a `CmmExpr` with an `Amode` ++-- ++-- N.B. this function should be used to provide operands to load and store ++-- instructions with signed 12bit wide immediates (S & I types). For other ++-- immediate sizes and formats (e.g. B type uses multiples of 2) this function ++-- would need to be adjusted. ++getAmode :: ++ Platform -> ++ -- | width of loaded value ++ Width -> ++ CmmExpr -> ++ NatM Amode ++-- TODO: Specialize stuff we can destructure here. ++ ++-- LDR/STR: Immediate can be represented with 12bits ++getAmode platform w (CmmRegOff reg off) ++ | w <= W64, ++ fitsIn12bitImm off = ++ return $ Amode (AddrRegImm reg' off') nilOL ++ where ++ reg' = getRegisterReg platform reg ++ off' = ImmInt off ++ ++-- For Stores we often see something like this: ++-- CmmStore (CmmMachOp (MO_Add w) [CmmLoad expr, CmmLit (CmmInt n w')]) (expr2) ++-- E.g. a CmmStoreOff really. This can be translated to `str $expr2, [$expr, #n ] ++-- for `n` in range. ++getAmode _platform _ (CmmMachOp (MO_Add _w) [expr, CmmLit (CmmInt off _w')]) ++ | fitsIn12bitImm off = ++ do ++ (reg, _format, code) <- getSomeReg expr ++ return $ Amode (AddrRegImm reg (ImmInteger off)) code ++getAmode _platform _ (CmmMachOp (MO_Sub _w) [expr, CmmLit (CmmInt off _w')]) ++ | fitsIn12bitImm (-off) = ++ do ++ (reg, _format, code) <- getSomeReg expr ++ return $ Amode (AddrRegImm reg (ImmInteger (-off))) code ++ ++-- Generic case ++getAmode _platform _ expr = ++ do ++ (reg, _format, code) <- getSomeReg expr ++ return $ Amode (AddrReg reg) code ++ ++-- ----------------------------------------------------------------------------- ++-- Generating assignments ++ ++-- Assignments are really at the heart of the whole code generation ++-- business. Almost all top-level nodes of any real importance are ++-- assignments, which correspond to loads, stores, or register ++-- transfers. If we're really lucky, some of the register transfers ++-- will go away, because we can use the destination register to ++-- complete the code generation for the right hand side. This only ++-- fails when the right hand side is forced into a fixed register ++-- (e.g. the result of a call). ++ ++assignMem_IntCode :: Format -> CmmExpr -> CmmExpr -> NatM InstrBlock ++assignReg_IntCode :: Format -> CmmReg -> CmmExpr -> NatM InstrBlock ++assignMem_FltCode :: Format -> CmmExpr -> CmmExpr -> NatM InstrBlock ++assignReg_FltCode :: Format -> CmmReg -> CmmExpr -> NatM InstrBlock ++assignMem_IntCode rep addrE srcE = ++ do ++ (src_reg, _format, code) <- getSomeReg srcE ++ platform <- getPlatform ++ let w = formatToWidth rep ++ Amode addr addr_code <- getAmode platform w addrE ++ return $ COMMENT (text "CmmStore" <+> parens (text (show addrE)) <+> parens (text (show srcE))) ++ `consOL` ( code ++ `appOL` addr_code ++ `snocOL` STR rep (OpReg w src_reg) (OpAddr addr) ++ ) ++ ++assignReg_IntCode _ reg src = ++ do ++ platform <- getPlatform ++ let dst = getRegisterReg platform reg ++ r <- getRegister src ++ return $ case r of ++ Any _ code -> ++ COMMENT (text "CmmAssign" <+> parens (text (show reg)) <+> parens (text (show src))) ++ `consOL` code dst ++ Fixed format freg fcode -> ++ COMMENT (text "CmmAssign" <+> parens (text (show reg)) <+> parens (text (show src))) ++ `consOL` ( fcode ++ `snocOL` MOV (OpReg (formatToWidth format) dst) (OpReg (formatToWidth format) freg) ++ ) ++ ++-- Let's treat Floating point stuff ++-- as integer code for now. Opaque. ++assignMem_FltCode = assignMem_IntCode ++ ++assignReg_FltCode = assignReg_IntCode ++ ++-- ----------------------------------------------------------------------------- ++-- Jumps ++-- AArch64 has 26bits for targets, whereas RiscV only has 20. ++-- Thus we need to distinguish between far (outside of the) ++-- current compilation unit. And regular branches. ++-- RiscV has ±2MB of displacement, whereas AArch64 has ±128MB. ++-- Thus for most branches we can get away with encoding it ++-- directly in the instruction rather than always loading the ++-- address into a register and then using that to jump. ++-- Under the assumption that our linked build product is less than ++-- ~2*128MB of TEXT, and there are no jump that span the whole ++-- TEXT segment. ++-- Something where riscv's compressed instruction might come in ++-- handy. ++genJump :: CmmExpr {-the branch target-} -> NatM InstrBlock ++genJump expr = do ++ (target, _format, code) <- getSomeReg expr ++ return (code `appOL` unitOL (annExpr expr (J (TReg target)))) ++ ++-- ----------------------------------------------------------------------------- ++-- Unconditional branches ++genBranch :: BlockId -> NatM InstrBlock ++genBranch = return . toOL . mkJumpInstr ++ ++-- ----------------------------------------------------------------------------- ++-- Conditional branches ++genCondJump :: ++ BlockId -> ++ CmmExpr -> ++ NatM InstrBlock ++genCondJump bid expr = do ++ case expr of ++ -- Optimized == 0 case. ++ CmmMachOp (MO_Eq w) [x, CmmLit (CmmInt 0 _)] -> do ++ (reg_x, _format_x, code_x) <- getSomeReg x ++ return $ code_x `snocOL` annExpr expr (BCOND EQ zero (OpReg w reg_x) (TBlock bid)) ++ ++ -- Optimized /= 0 case. ++ CmmMachOp (MO_Ne w) [x, CmmLit (CmmInt 0 _)] -> do ++ (reg_x, _format_x, code_x) <- getSomeReg x ++ return $ code_x `snocOL` annExpr expr (BCOND NE zero (OpReg w reg_x) (TBlock bid)) ++ ++ -- Generic case. ++ CmmMachOp mop [x, y] -> do ++ let ubcond w cmp = do ++ -- compute both sides. ++ (reg_x, format_x, code_x) <- getSomeReg x ++ (reg_y, format_y, code_y) <- getSomeReg y ++ let x' = OpReg w reg_x ++ y' = OpReg w reg_y ++ return $ case w of ++ w ++ | w == W8 || w == W16 -> ++ code_x ++ `appOL` truncateReg (formatToWidth format_x) w reg_x ++ `appOL` code_y ++ `appOL` truncateReg (formatToWidth format_y) w reg_y ++ `appOL` code_y ++ `snocOL` annExpr expr (BCOND cmp x' y' (TBlock bid)) ++ _ -> ++ code_x ++ `appOL` code_y ++ `snocOL` annExpr expr (BCOND cmp x' y' (TBlock bid)) ++ ++ sbcond w cmp = do ++ -- compute both sides. ++ (reg_x, format_x, code_x) <- getSomeReg x ++ (reg_y, format_y, code_y) <- getSomeReg y ++ let x' = OpReg w reg_x ++ y' = OpReg w reg_y ++ return $ case w of ++ w ++ | w `elem` [W8, W16, W32] -> ++ code_x ++ `appOL` signExtend (formatToWidth format_x) W64 reg_x reg_x ++ `appOL` code_y ++ `appOL` signExtend (formatToWidth format_y) W64 reg_y reg_y ++ `appOL` unitOL (annExpr expr (BCOND cmp x' y' (TBlock bid))) ++ _ -> code_x `appOL` code_y `appOL` unitOL (annExpr expr (BCOND cmp x' y' (TBlock bid))) ++ ++ fbcond w cmp = do ++ -- ensure we get float regs ++ (reg_fx, _format_fx, code_fx) <- getFloatReg x ++ (reg_fy, _format_fy, code_fy) <- getFloatReg y ++ condOpReg <- OpReg W64 <$> getNewRegNat II64 ++ oneReg <- getNewRegNat II64 ++ return $ code_fx ++ `appOL` code_fy ++ `snocOL` annExpr expr (CSET condOpReg (OpReg w reg_fx) (OpReg w reg_fy) cmp) ++ `snocOL` MOV (OpReg W64 oneReg) (OpImm (ImmInt 1)) ++ `snocOL` BCOND EQ condOpReg (OpReg w oneReg) (TBlock bid) ++ ++ case mop of ++ MO_F_Eq w -> fbcond w EQ ++ MO_F_Ne w -> fbcond w NE ++ MO_F_Gt w -> fbcond w FGT ++ MO_F_Ge w -> fbcond w FGE ++ MO_F_Lt w -> fbcond w FLT ++ MO_F_Le w -> fbcond w FLE ++ MO_Eq w -> sbcond w EQ ++ MO_Ne w -> sbcond w NE ++ MO_S_Gt w -> sbcond w SGT ++ MO_S_Ge w -> sbcond w SGE ++ MO_S_Lt w -> sbcond w SLT ++ MO_S_Le w -> sbcond w SLE ++ MO_U_Gt w -> ubcond w UGT ++ MO_U_Ge w -> ubcond w UGE ++ MO_U_Lt w -> ubcond w ULT ++ MO_U_Le w -> ubcond w ULE ++ _ -> pprPanic "RV64.genCondJump:case mop: " (text $ show expr) ++ _ -> pprPanic "RV64.genCondJump: " (text $ show expr) ++ ++-- | Generate conditional branching instructions ++-- ++-- This is basically an "if with else" statement. ++genCondBranch :: ++ -- | the true branch target ++ BlockId -> ++ -- | the false branch target ++ BlockId -> ++ -- | the condition on which to branch ++ CmmExpr -> ++ -- | Instructions ++ NatM InstrBlock ++genCondBranch true false expr = ++ appOL ++ <$> genCondJump true expr ++ <*> genBranch false ++ ++-- ----------------------------------------------------------------------------- ++-- Generating C calls ++ ++-- | Generate a call to a C function. ++-- ++-- - Integer values are passed in GP registers a0-a7. ++-- - Floating point values are passed in FP registers fa0-fa7. ++-- - If there are no free floating point registers, the FP values are passed in GP registers. ++-- - If all GP registers are taken, the values are spilled as whole words (!) onto the stack. ++-- - For integers/words, the return value is in a0. ++-- - The return value is in fa0 if the return type is a floating point value. ++genCCall :: ++ ForeignTarget -> -- function to call ++ [CmmFormal] -> -- where to put the result ++ [CmmActual] -> -- arguments (of mixed type) ++ NatM InstrBlock ++-- TODO: Specialize where we can. ++-- Generic impl ++genCCall target@(ForeignTarget expr _cconv) dest_regs arg_regs = do ++ -- we want to pass arg_regs into allArgRegs ++ -- The target :: ForeignTarget call can either ++ -- be a foreign procedure with an address expr ++ -- and a calling convention. ++ (call_target_reg, call_target_code) <- ++ -- Compute the address of the call target into a register. This ++ -- addressing enables us to jump through the whole address space ++ -- without further ado. PC-relative addressing would involve ++ -- instructions to do similar, though. ++ do ++ (reg, _format, reg_code) <- getSomeReg expr ++ pure (reg, reg_code) ++ -- compute the code and register logic for all arg_regs. ++ -- this will give us the format information to match on. ++ arg_regs' <- mapM getSomeReg arg_regs ++ ++ -- Now this is stupid. Our Cmm expressions doesn't carry the proper sizes ++ -- so while in Cmm we might get W64 incorrectly for an int, that is W32 in ++ -- STG; this then breaks packing of stack arguments, if we need to pack ++ -- for the pcs, e.g. darwinpcs. Option one would be to fix the Int type ++ -- in Cmm proper. Option two, which we choose here is to use extended Hint ++ -- information to contain the size information and use that when packing ++ -- arguments, spilled onto the stack. ++ let (_res_hints, arg_hints) = foreignTargetHints target ++ arg_regs'' = zipWith (\(r, f, c) h -> (r, f, h, c)) arg_regs' arg_hints ++ ++ (stackSpaceWords, passRegs, passArgumentsCode) <- passArguments allGpArgRegs allFpArgRegs arg_regs'' 0 [] nilOL ++ ++ readResultsCode <- readResults allGpArgRegs allFpArgRegs dest_regs [] nilOL ++ ++ let moveStackDown 0 = ++ toOL ++ [ PUSH_STACK_FRAME, ++ DELTA (-16) ++ ] ++ moveStackDown i | odd i = moveStackDown (i + 1) ++ moveStackDown i = ++ toOL ++ [ PUSH_STACK_FRAME, ++ SUB (OpReg W64 spMachReg) (OpReg W64 spMachReg) (OpImm (ImmInt (8 * i))), ++ DELTA (-8 * i - 16) ++ ] ++ moveStackUp 0 = ++ toOL ++ [ POP_STACK_FRAME, ++ DELTA 0 ++ ] ++ moveStackUp i | odd i = moveStackUp (i + 1) ++ moveStackUp i = ++ toOL ++ [ ADD (OpReg W64 spMachReg) (OpReg W64 spMachReg) (OpImm (ImmInt (8 * i))), ++ POP_STACK_FRAME, ++ DELTA 0 ++ ] ++ ++ let code = ++ call_target_code -- compute the label (possibly into a register) ++ `appOL` moveStackDown stackSpaceWords ++ `appOL` passArgumentsCode -- put the arguments into x0, ... ++ `snocOL` BL call_target_reg passRegs -- branch and link (C calls aren't tail calls, but return) ++ `appOL` readResultsCode -- parse the results into registers ++ `appOL` moveStackUp stackSpaceWords ++ return code ++ where ++ -- Implementiation of the RISCV ABI calling convention. ++ -- https://github.com/riscv-non-isa/riscv-elf-psabi-doc/blob/948463cd5dbebea7c… ++ passArguments :: [Reg] -> [Reg] -> [(Reg, Format, ForeignHint, InstrBlock)] -> Int -> [Reg] -> InstrBlock -> NatM (Int, [Reg], InstrBlock) ++ -- Base case: no more arguments to pass (left) ++ passArguments _ _ [] stackSpaceWords accumRegs accumCode = return (stackSpaceWords, accumRegs, accumCode) ++ -- Still have GP regs, and we want to pass an GP argument. ++ passArguments (gpReg : gpRegs) fpRegs ((r, format, hint, code_r) : args) stackSpaceWords accumRegs accumCode | isIntFormat format = do ++ -- RISCV64 Integer Calling Convention: "When passed in registers or on the ++ -- stack, integer scalars narrower than XLEN bits are widened according to ++ -- the sign of their type up to 32 bits, then sign-extended to XLEN bits." ++ let w = formatToWidth format ++ assignArg = ++ if hint == SignedHint ++ then ++ COMMENT (text "Pass gp argument sign-extended (SignedHint): " <> ppr r) ++ `consOL` signExtend w W64 r gpReg ++ else ++ toOL ++ [ COMMENT (text "Pass gp argument sign-extended (SignedHint): " <> ppr r), ++ MOV (OpReg w gpReg) (OpReg w r) ++ ] ++ accumCode' = ++ accumCode ++ `appOL` code_r ++ `appOL` assignArg ++ passArguments gpRegs fpRegs args stackSpaceWords (gpReg : accumRegs) accumCode' ++ ++ -- Still have FP regs, and we want to pass an FP argument. ++ passArguments gpRegs (fpReg : fpRegs) ((r, format, _hint, code_r) : args) stackSpaceWords accumRegs accumCode | isFloatFormat format = do ++ let w = formatToWidth format ++ mov = MOV (OpReg w fpReg) (OpReg w r) ++ accumCode' = ++ accumCode ++ `appOL` code_r ++ `snocOL` ann (text "Pass fp argument: " <> ppr r) mov ++ passArguments gpRegs fpRegs args stackSpaceWords (fpReg : accumRegs) accumCode' ++ ++ -- No mor regs left to pass. Must pass on stack. ++ passArguments [] [] ((r, format, hint, code_r) : args) stackSpaceWords accumRegs accumCode = do ++ let w = formatToWidth format ++ spOffet = 8 * stackSpaceWords ++ str = STR format (OpReg w r) (OpAddr (AddrRegImm spMachReg (ImmInt spOffet))) ++ stackCode = ++ if hint == SignedHint ++ then ++ code_r ++ `appOL` signExtend w W64 r tmpReg ++ `snocOL` ann (text "Pass signed argument (size " <> ppr w <> text ") on the stack: " <> ppr tmpReg) str ++ else ++ code_r ++ `snocOL` ann (text "Pass unsigned argument (size " <> ppr w <> text ") on the stack: " <> ppr r) str ++ passArguments [] [] args (stackSpaceWords + 1) accumRegs (stackCode `appOL` accumCode) ++ ++ -- Still have fpRegs left, but want to pass a GP argument. Must be passed on the stack then. ++ passArguments [] fpRegs ((r, format, _hint, code_r) : args) stackSpaceWords accumRegs accumCode | isIntFormat format = do ++ let w = formatToWidth format ++ spOffet = 8 * stackSpaceWords ++ str = STR format (OpReg w r) (OpAddr (AddrRegImm spMachReg (ImmInt spOffet))) ++ stackCode = ++ code_r ++ `snocOL` ann (text "Pass argument (size " <> ppr w <> text ") on the stack: " <> ppr r) str ++ passArguments [] fpRegs args (stackSpaceWords + 1) accumRegs (stackCode `appOL` accumCode) ++ ++ -- Still have gpRegs left, but want to pass a FP argument. Must be passed in gpReg then. ++ passArguments (gpReg : gpRegs) [] ((r, format, _hint, code_r) : args) stackSpaceWords accumRegs accumCode | isFloatFormat format = do ++ let w = formatToWidth format ++ mov = MOV (OpReg w gpReg) (OpReg w r) ++ accumCode' = ++ accumCode ++ `appOL` code_r ++ `snocOL` ann (text "Pass fp argument in gpReg: " <> ppr r) mov ++ passArguments gpRegs [] args stackSpaceWords (gpReg : accumRegs) accumCode' ++ passArguments _ _ _ _ _ _ = pprPanic "passArguments" (text "invalid state") ++ ++ readResults :: [Reg] -> [Reg] -> [LocalReg] -> [Reg] -> InstrBlock -> NatM InstrBlock ++ readResults _ _ [] _ accumCode = return accumCode ++ readResults [] _ _ _ _ = do ++ platform <- getPlatform ++ pprPanic "genCCall, out of gp registers when reading results" (pdoc platform target) ++ readResults _ [] _ _ _ = do ++ platform <- getPlatform ++ pprPanic "genCCall, out of fp registers when reading results" (pdoc platform target) ++ readResults (gpReg : gpRegs) (fpReg : fpRegs) (dst : dsts) accumRegs accumCode = do ++ -- gp/fp reg -> dst ++ platform <- getPlatform ++ let rep = cmmRegType (CmmLocal dst) ++ format = cmmTypeFormat rep ++ w = cmmRegWidth (CmmLocal dst) ++ r_dst = getRegisterReg platform (CmmLocal dst) ++ if isFloatFormat format ++ then readResults (gpReg : gpRegs) fpRegs dsts (fpReg : accumRegs) (accumCode `snocOL` MOV (OpReg w r_dst) (OpReg w fpReg)) ++ else ++ readResults gpRegs (fpReg : fpRegs) dsts (gpReg : accumRegs) ++ $ accumCode ++ `snocOL` MOV (OpReg w r_dst) (OpReg w gpReg) ++ `appOL` ++ -- truncate, otherwise an unexpectedly big value might be used in upfollowing calculations ++ truncateReg W64 w r_dst ++genCCall (PrimTarget mop) dest_regs arg_regs = do ++ case mop of ++ MO_F32_Fabs ++ | [arg_reg] <- arg_regs, ++ [dest_reg] <- dest_regs -> ++ unaryFloatOp W32 (\d x -> unitOL $ FABS d x) arg_reg dest_reg ++ MO_F64_Fabs ++ | [arg_reg] <- arg_regs, ++ [dest_reg] <- dest_regs -> ++ unaryFloatOp W64 (\d x -> unitOL $ FABS d x) arg_reg dest_reg ++ -- 64 bit float ops ++ MO_F64_Pwr -> mkCCall "pow" ++ MO_F64_Sin -> mkCCall "sin" ++ MO_F64_Cos -> mkCCall "cos" ++ MO_F64_Tan -> mkCCall "tan" ++ MO_F64_Sinh -> mkCCall "sinh" ++ MO_F64_Cosh -> mkCCall "cosh" ++ MO_F64_Tanh -> mkCCall "tanh" ++ MO_F64_Asin -> mkCCall "asin" ++ MO_F64_Acos -> mkCCall "acos" ++ MO_F64_Atan -> mkCCall "atan" ++ MO_F64_Asinh -> mkCCall "asinh" ++ MO_F64_Acosh -> mkCCall "acosh" ++ MO_F64_Atanh -> mkCCall "atanh" ++ MO_F64_Log -> mkCCall "log" ++ MO_F64_Log1P -> mkCCall "log1p" ++ MO_F64_Exp -> mkCCall "exp" ++ MO_F64_ExpM1 -> mkCCall "expm1" ++ MO_F64_Fabs -> mkCCall "fabs" ++ MO_F64_Sqrt -> mkCCall "sqrt" ++ -- 32 bit float ops ++ MO_F32_Pwr -> mkCCall "powf" ++ MO_F32_Sin -> mkCCall "sinf" ++ MO_F32_Cos -> mkCCall "cosf" ++ MO_F32_Tan -> mkCCall "tanf" ++ MO_F32_Sinh -> mkCCall "sinhf" ++ MO_F32_Cosh -> mkCCall "coshf" ++ MO_F32_Tanh -> mkCCall "tanhf" ++ MO_F32_Asin -> mkCCall "asinf" ++ MO_F32_Acos -> mkCCall "acosf" ++ MO_F32_Atan -> mkCCall "atanf" ++ MO_F32_Asinh -> mkCCall "asinhf" ++ MO_F32_Acosh -> mkCCall "acoshf" ++ MO_F32_Atanh -> mkCCall "atanhf" ++ MO_F32_Log -> mkCCall "logf" ++ MO_F32_Log1P -> mkCCall "log1pf" ++ MO_F32_Exp -> mkCCall "expf" ++ MO_F32_ExpM1 -> mkCCall "expm1f" ++ MO_F32_Fabs -> mkCCall "fabsf" ++ MO_F32_Sqrt -> mkCCall "sqrtf" ++ -- 64-bit primops ++ MO_I64_ToI -> mkCCall "hs_int64ToInt" ++ MO_I64_FromI -> mkCCall "hs_intToInt64" ++ MO_W64_ToW -> mkCCall "hs_word64ToWord" ++ MO_W64_FromW -> mkCCall "hs_wordToWord64" ++ MO_x64_Neg -> mkCCall "hs_neg64" ++ MO_x64_Add -> mkCCall "hs_add64" ++ MO_x64_Sub -> mkCCall "hs_sub64" ++ MO_x64_Mul -> mkCCall "hs_mul64" ++ MO_I64_Quot -> mkCCall "hs_quotInt64" ++ MO_I64_Rem -> mkCCall "hs_remInt64" ++ MO_W64_Quot -> mkCCall "hs_quotWord64" ++ MO_W64_Rem -> mkCCall "hs_remWord64" ++ MO_x64_And -> mkCCall "hs_and64" ++ MO_x64_Or -> mkCCall "hs_or64" ++ MO_x64_Xor -> mkCCall "hs_xor64" ++ MO_x64_Not -> mkCCall "hs_not64" ++ MO_x64_Shl -> mkCCall "hs_uncheckedShiftL64" ++ MO_I64_Shr -> mkCCall "hs_uncheckedIShiftRA64" ++ MO_W64_Shr -> mkCCall "hs_uncheckedShiftRL64" ++ MO_x64_Eq -> mkCCall "hs_eq64" ++ MO_x64_Ne -> mkCCall "hs_ne64" ++ MO_I64_Ge -> mkCCall "hs_geInt64" ++ MO_I64_Gt -> mkCCall "hs_gtInt64" ++ MO_I64_Le -> mkCCall "hs_leInt64" ++ MO_I64_Lt -> mkCCall "hs_ltInt64" ++ MO_W64_Ge -> mkCCall "hs_geWord64" ++ MO_W64_Gt -> mkCCall "hs_gtWord64" ++ MO_W64_Le -> mkCCall "hs_leWord64" ++ MO_W64_Lt -> mkCCall "hs_ltWord64" ++ -- Conversion ++ MO_UF_Conv w -> mkCCall (word2FloatLabel w) ++ -- Optional MachOps ++ -- These are enabled/disabled by backend flags: GHC.StgToCmm.Config ++ MO_S_Mul2 _w -> unsupported mop ++ MO_S_QuotRem _w -> unsupported mop ++ MO_U_QuotRem _w -> unsupported mop ++ MO_U_QuotRem2 _w -> unsupported mop ++ MO_Add2 _w -> unsupported mop ++ MO_AddWordC _w -> unsupported mop ++ MO_SubWordC _w -> unsupported mop ++ MO_AddIntC _w -> unsupported mop ++ MO_SubIntC _w -> unsupported mop ++ MO_U_Mul2 _w -> unsupported mop ++ -- Memory Ordering ++ -- The related C functions are: ++ -- #include <stdatomic.h> ++ -- atomic_thread_fence(memory_order_acquire); ++ -- atomic_thread_fence(memory_order_release); ++ -- atomic_thread_fence(memory_order_seq_cst); ++ MO_AcquireFence -> pure (unitOL (FENCE FenceRead FenceReadWrite)) ++ MO_ReleaseFence -> pure (unitOL (FENCE FenceReadWrite FenceWrite)) ++ MO_SeqCstFence -> pure (unitOL (FENCE FenceReadWrite FenceReadWrite)) ++ MO_Touch -> pure nilOL -- Keep variables live (when using interior pointers) ++ -- Prefetch ++ MO_Prefetch_Data _n -> pure nilOL -- Prefetch hint. ++ ++ -- Memory copy/set/move/cmp, with alignment for optimization ++ MO_Memcpy _align -> mkCCall "memcpy" ++ MO_Memset _align -> mkCCall "memset" ++ MO_Memmove _align -> mkCCall "memmove" ++ MO_Memcmp _align -> mkCCall "memcmp" ++ MO_SuspendThread -> mkCCall "suspendThread" ++ MO_ResumeThread -> mkCCall "resumeThread" ++ MO_PopCnt w -> mkCCall (popCntLabel w) ++ MO_Pdep w -> mkCCall (pdepLabel w) ++ MO_Pext w -> mkCCall (pextLabel w) ++ MO_Clz w -> mkCCall (clzLabel w) ++ MO_Ctz w -> mkCCall (ctzLabel w) ++ MO_BSwap w -> mkCCall (bSwapLabel w) ++ MO_BRev w -> mkCCall (bRevLabel w) ++ -- Atomic read-modify-write. ++ mo@(MO_AtomicRead w ord) ++ | [p_reg] <- arg_regs, ++ [dst_reg] <- dest_regs -> do ++ (p, _fmt_p, code_p) <- getSomeReg p_reg ++ platform <- getPlatform ++ -- Analog to the related MachOps (above) ++ -- The related C functions are: ++ -- #include <stdatomic.h> ++ -- __atomic_load_n(&a, __ATOMIC_ACQUIRE); ++ -- __atomic_load_n(&a, __ATOMIC_SEQ_CST); ++ let instrs = case ord of ++ MemOrderRelaxed -> unitOL $ ann moDescr (LDR (intFormat w) (OpReg w dst) (OpAddr $ AddrReg p)) ++ MemOrderAcquire -> ++ toOL ++ [ ann moDescr (LDR (intFormat w) (OpReg w dst) (OpAddr $ AddrReg p)), ++ FENCE FenceRead FenceReadWrite ++ ] ++ MemOrderSeqCst -> ++ toOL ++ [ ann moDescr (FENCE FenceReadWrite FenceReadWrite), ++ LDR (intFormat w) (OpReg w dst) (OpAddr $ AddrReg p), ++ FENCE FenceRead FenceReadWrite ++ ] ++ MemOrderRelease -> panic $ "Unexpected MemOrderRelease on an AtomicRead: " ++ show mo ++ dst = getRegisterReg platform (CmmLocal dst_reg) ++ moDescr = (text . show) mo ++ code = code_p `appOL` instrs ++ return code ++ | otherwise -> panic "mal-formed AtomicRead" ++ mo@(MO_AtomicWrite w ord) ++ | [p_reg, val_reg] <- arg_regs -> do ++ (p, _fmt_p, code_p) <- getSomeReg p_reg ++ (val, fmt_val, code_val) <- getSomeReg val_reg ++ -- Analog to the related MachOps (above) ++ -- The related C functions are: ++ -- #include <stdatomic.h> ++ -- __atomic_store_n(&a, 23, __ATOMIC_SEQ_CST); ++ -- __atomic_store_n(&a, 23, __ATOMIC_RELEASE); ++ let instrs = case ord of ++ MemOrderRelaxed -> unitOL $ ann moDescr (STR fmt_val (OpReg w val) (OpAddr $ AddrReg p)) ++ MemOrderSeqCst -> ++ toOL ++ [ ann moDescr (FENCE FenceReadWrite FenceWrite), ++ STR fmt_val (OpReg w val) (OpAddr $ AddrReg p), ++ FENCE FenceReadWrite FenceReadWrite ++ ] ++ MemOrderRelease -> ++ toOL ++ [ ann moDescr (FENCE FenceReadWrite FenceWrite), ++ STR fmt_val (OpReg w val) (OpAddr $ AddrReg p) ++ ] ++ MemOrderAcquire -> panic $ "Unexpected MemOrderAcquire on an AtomicWrite" ++ show mo ++ moDescr = (text . show) mo ++ code = ++ code_p ++ `appOL` code_val ++ `appOL` instrs ++ pure code ++ | otherwise -> panic "mal-formed AtomicWrite" ++ MO_AtomicRMW w amop -> mkCCall (atomicRMWLabel w amop) ++ MO_Cmpxchg w -> mkCCall (cmpxchgLabel w) ++ -- -- Should be an AtomicRMW variant eventually. ++ -- -- Sequential consistent. ++ -- TODO: this should be implemented properly! ++ MO_Xchg w -> mkCCall (xchgLabel w) ++ where ++ unsupported :: (Show a) => a -> b ++ unsupported mop = ++ panic ++ ( "outOfLineCmmOp: " ++ ++ show mop ++ ++ " not supported here" ++ ) ++ mkCCall :: FastString -> NatM InstrBlock ++ mkCCall name = do ++ config <- getConfig ++ target <- ++ cmmMakeDynamicReference config CallReference ++ $ mkForeignLabel name Nothing ForeignLabelInThisPackage IsFunction ++ let cconv = ForeignConvention CCallConv [NoHint] [NoHint] CmmMayReturn ++ genCCall (ForeignTarget target cconv) dest_regs arg_regs ++ ++ unaryFloatOp w op arg_reg dest_reg = do ++ platform <- getPlatform ++ (reg_fx, _format_x, code_fx) <- getFloatReg arg_reg ++ let dst = getRegisterReg platform (CmmLocal dest_reg) ++ let code = code_fx `appOL` op (OpReg w dst) (OpReg w reg_fx) ++ pure code ++ ++{- Note [RISCV64 far jumps] ++~~~~~~~~~~~~~~~~~~~~~~~~~~~ ++ ++RISCV64 conditional jump instructions can only encode an offset of +/-4KiB ++(12bits) which is usually enough but can be exceeded in edge cases. In these ++cases we will replace: ++ ++ b.cond <cond> foo ++ ++with the sequence: ++ ++ b.cond <cond> <lbl_true> ++ b <lbl_false> ++ <lbl_true>: ++ la reg foo ++ b reg ++ <lbl_false>: ++ ++and ++ ++ b foo ++ ++with the sequence: ++ ++ la reg foo ++ b reg ++ ++Compared to AArch64 the target label is loaded to a register, because ++unconditional jump instructions can only address +/-1MiB. The LA ++pseudo-instruction will be replaced by up to two real instructions, ensuring ++correct addressing. ++ ++One could surely find more efficient replacements, taking PC-relative addressing ++into account. This could be a future improvement. (As far branches are pretty ++rare, one might question and measure the value of such improvement.) ++ ++RISCV has many pseudo-instructions which emit more than one real instructions. ++Thus, we count the real instructions after the Assembler has seen them. ++ ++We make some simplifications in the name of performance which can result in ++overestimating jump <-> label offsets: ++ ++\* To avoid having to recalculate the label offsets once we replaced a jump we simply ++ assume all label jumps will be expanded to a three instruction far jump sequence. ++\* For labels associated with a info table we assume the info table is 64byte large. ++ Most info tables are smaller than that but it means we don't have to distinguish ++ between multiple types of info tables. ++ ++In terms of implementation we walk the instruction stream at least once calculating ++label offsets, and if we determine during this that the functions body is big enough ++to potentially contain out of range jumps we walk the instructions a second time, replacing ++out of range jumps with the sequence of instructions described above. ++ ++-} ++ ++-- | A conditional jump to a far target ++-- ++-- By loading the far target into a register for the jump, we can address the ++-- whole memory range. ++genCondFarJump :: (MonadUnique m) => Cond -> Operand -> Operand -> BlockId -> m InstrBlock ++genCondFarJump cond op1 op2 far_target = do ++ skip_lbl_id <- newBlockId ++ jmp_lbl_id <- newBlockId ++ ++ -- TODO: We can improve this by inverting the condition ++ -- but it's not quite trivial since we don't know if we ++ -- need to consider float orderings. ++ -- So we take the hit of the additional jump in the false ++ -- case for now. ++ return ++ $ toOL ++ [ ann (text "Conditional far jump to: " <> ppr far_target) ++ $ BCOND cond op1 op2 (TBlock jmp_lbl_id), ++ B (TBlock skip_lbl_id), ++ NEWBLOCK jmp_lbl_id, ++ LDR II64 (OpReg W64 tmpReg) (OpImm (ImmCLbl (blockLbl far_target))), ++ B (TReg tmpReg), ++ NEWBLOCK skip_lbl_id ++ ] ++ ++-- | An unconditional jump to a far target ++-- ++-- By loading the far target into a register for the jump, we can address the ++-- whole memory range. ++genFarJump :: (MonadUnique m) => BlockId -> m InstrBlock ++genFarJump far_target = ++ return ++ $ toOL ++ [ ann (text "Unconditional far jump to: " <> ppr far_target) ++ $ LDR II64 (OpReg W64 tmpReg) (OpImm (ImmCLbl (blockLbl far_target))), ++ B (TReg tmpReg) ++ ] ++ ++-- See Note [RISCV64 far jumps] ++data BlockInRange = InRange | NotInRange BlockId ++ ++-- See Note [RISCV64 far jumps] ++makeFarBranches :: ++ Platform -> ++ LabelMap RawCmmStatics -> ++ [NatBasicBlock Instr] -> ++ UniqSM [NatBasicBlock Instr] ++makeFarBranches {- only used when debugging -} _platform statics basic_blocks = do ++ -- All offsets/positions are counted in multiples of 4 bytes (the size of RISCV64 instructions) ++ -- That is an offset of 1 represents a 4-byte/one instruction offset. ++ let (func_size, lblMap) = foldl' calc_lbl_positions (0, mapEmpty) basic_blocks ++ if func_size < max_jump_dist ++ then pure basic_blocks ++ else do ++ (_, blocks) <- mapAccumLM (replace_blk lblMap) 0 basic_blocks ++ pure $ concat blocks ++ where ++ -- pprTrace "lblMap" (ppr lblMap) $ basic_blocks ++ ++ -- 2^11, 12 bit immediate with one bit is reserved for the sign ++ max_jump_dist = 2 ^ (11 :: Int) - 1 :: Int ++ -- Currently all inline info tables fit into 64 bytes. ++ max_info_size = 16 :: Int ++ long_bc_jump_size = 5 :: Int ++ long_b_jump_size = 2 :: Int ++ ++ -- Replace out of range conditional jumps with unconditional jumps. ++ replace_blk :: LabelMap Int -> Int -> GenBasicBlock Instr -> UniqSM (Int, [GenBasicBlock Instr]) ++ replace_blk !m !pos (BasicBlock lbl instrs) = do ++ -- Account for a potential info table before the label. ++ let !block_pos = pos + infoTblSize_maybe lbl ++ (!pos', instrs') <- mapAccumLM (replace_jump m) block_pos instrs ++ let instrs'' = concat instrs' ++ -- We might have introduced new labels, so split the instructions into basic blocks again if neccesary. ++ let (top, split_blocks, no_data) = foldr mkBlocks ([], [], []) instrs'' ++ -- There should be no data in the instruction stream at this point ++ massert (null no_data) ++ ++ let final_blocks = BasicBlock lbl top : split_blocks ++ pure (pos', final_blocks) ++ ++ replace_jump :: LabelMap Int -> Int -> Instr -> UniqSM (Int, [Instr]) ++ replace_jump !m !pos instr = do ++ case instr of ++ ANN ann instr -> do ++ (idx, instr' : instrs') <- replace_jump m pos instr ++ pure (idx, ANN ann instr' : instrs') ++ BCOND cond op1 op2 t -> ++ case target_in_range m t pos of ++ InRange -> pure (pos + instr_size instr, [instr]) ++ NotInRange far_target -> do ++ jmp_code <- genCondFarJump cond op1 op2 far_target ++ pure (pos + instr_size instr, fromOL jmp_code) ++ B t -> ++ case target_in_range m t pos of ++ InRange -> pure (pos + instr_size instr, [instr]) ++ NotInRange far_target -> do ++ jmp_code <- genFarJump far_target ++ pure (pos + instr_size instr, fromOL jmp_code) ++ _ -> pure (pos + instr_size instr, [instr]) ++ ++ target_in_range :: LabelMap Int -> Target -> Int -> BlockInRange ++ target_in_range m target src = ++ case target of ++ (TReg {}) -> InRange ++ (TBlock bid) -> block_in_range m src bid ++ ++ block_in_range :: LabelMap Int -> Int -> BlockId -> BlockInRange ++ block_in_range m src_pos dest_lbl = ++ case mapLookup dest_lbl m of ++ Nothing -> ++ pprTrace "not in range" (ppr dest_lbl) ++ $ NotInRange dest_lbl ++ Just dest_pos -> ++ if abs (dest_pos - src_pos) < max_jump_dist ++ then InRange ++ else NotInRange dest_lbl ++ ++ calc_lbl_positions :: (Int, LabelMap Int) -> GenBasicBlock Instr -> (Int, LabelMap Int) ++ calc_lbl_positions (pos, m) (BasicBlock lbl instrs) = ++ let !pos' = pos + infoTblSize_maybe lbl ++ in foldl' instr_pos (pos', mapInsert lbl pos' m) instrs ++ ++ instr_pos :: (Int, LabelMap Int) -> Instr -> (Int, LabelMap Int) ++ instr_pos (pos, m) instr = (pos + instr_size instr, m) ++ ++ infoTblSize_maybe bid = ++ case mapLookup bid statics of ++ Nothing -> 0 :: Int ++ Just _info_static -> max_info_size ++ ++ instr_size :: Instr -> Int ++ instr_size i = case i of ++ COMMENT {} -> 0 ++ MULTILINE_COMMENT {} -> 0 ++ ANN _ instr -> instr_size instr ++ LOCATION {} -> 0 ++ DELTA {} -> 0 ++ -- At this point there should be no NEWBLOCK in the instruction stream (pos, mapInsert bid pos m) ++ NEWBLOCK {} -> panic "mkFarBranched - Unexpected" ++ LDATA {} -> panic "mkFarBranched - Unexpected" ++ PUSH_STACK_FRAME -> 4 ++ POP_STACK_FRAME -> 4 ++ ADD {} -> 1 ++ MUL {} -> 1 ++ MULH {} -> 1 ++ NEG {} -> 1 ++ DIV {} -> 1 ++ REM {} -> 1 ++ REMU {} -> 1 ++ SUB {} -> 1 ++ DIVU {} -> 1 ++ AND {} -> 1 ++ OR {} -> 1 ++ SRA {} -> 1 ++ XOR {} -> 1 ++ SLL {} -> 1 ++ SRL {} -> 1 ++ MOV {} -> 2 ++ ORI {} -> 1 ++ XORI {} -> 1 ++ CSET {} -> 2 ++ STR {} -> 1 ++ LDR {} -> 3 ++ LDRU {} -> 1 ++ FENCE {} -> 1 ++ FCVT {} -> 1 ++ FABS {} -> 1 ++ FMA {} -> 1 ++ -- estimate the subsituted size for jumps to lables ++ -- jumps to registers have size 1 ++ BCOND {} -> long_bc_jump_size ++ B (TBlock _) -> long_b_jump_size ++ B (TReg _) -> 1 ++ J op -> instr_size (B op) ++ BL _ _ -> 1 ++ J_TBL {} -> 1 +Index: ghc-9.10.2/compiler/GHC/CmmToAsm/RV64/Cond.hs +=================================================================== +--- /dev/null ++++ ghc-9.10.2/compiler/GHC/CmmToAsm/RV64/Cond.hs +@@ -0,0 +1,42 @@ ++module GHC.CmmToAsm.RV64.Cond ++ ( Cond (..), ++ ) ++where ++ ++import GHC.Prelude hiding (EQ) ++ ++-- | Condition codes. ++-- ++-- Used in conditional branches and bit setters. According to the available ++-- instruction set, some conditions are encoded as their negated opposites. I.e. ++-- these are logical things that don't necessarily map 1:1 to hardware/ISA. ++data Cond ++ = -- | int and float ++ EQ ++ | -- | int and float ++ NE ++ | -- | signed less than ++ SLT ++ | -- | signed less than or equal ++ SLE ++ | -- | signed greater than or equal ++ SGE ++ | -- | signed greater than ++ SGT ++ | -- | unsigned less than ++ ULT ++ | -- | unsigned less than or equal ++ ULE ++ | -- | unsigned greater than or equal ++ UGE ++ | -- | unsigned greater than ++ UGT ++ | -- | floating point instruction @flt@ ++ FLT ++ | -- | floating point instruction @fle@ ++ FLE ++ | -- | floating point instruction @fge@ ++ FGE ++ | -- | floating point instruction @fgt@ ++ FGT ++ deriving (Eq, Show) +Index: ghc-9.10.2/compiler/GHC/CmmToAsm/RV64/Instr.hs +=================================================================== +--- /dev/null ++++ ghc-9.10.2/compiler/GHC/CmmToAsm/RV64/Instr.hs +@@ -0,0 +1,845 @@ ++-- All instructions will be rendered eventually. Thus, there's no benefit in ++-- being lazy in data types. ++{-# LANGUAGE StrictData #-} ++{-# OPTIONS_GHC -fno-warn-orphans #-} ++ ++module GHC.CmmToAsm.RV64.Instr where ++ ++import Data.Maybe ++import GHC.Cmm ++import GHC.Cmm.BlockId ++import GHC.Cmm.CLabel ++import GHC.Cmm.Dataflow.Label ++import GHC.CmmToAsm.Config ++import GHC.CmmToAsm.Format ++import GHC.CmmToAsm.Instr (RegUsage (..)) ++import GHC.CmmToAsm.RV64.Cond ++import GHC.CmmToAsm.RV64.Regs ++import GHC.CmmToAsm.Types ++import GHC.CmmToAsm.Utils ++import GHC.Data.FastString (LexicalFastString) ++import GHC.Platform ++import GHC.Platform.Reg ++import GHC.Platform.Regs ++import GHC.Prelude ++import GHC.Stack ++import GHC.Types.Unique.Supply ++import GHC.Utils.Outputable ++import GHC.Utils.Panic ++ ++-- | Stack frame header size in bytes. ++-- ++-- The stack frame header is made of the values that are always saved ++-- (regardless of the context.) It consists of the saved return address and a ++-- pointer to the previous frame. Thus, its size is two stack frame slots which ++-- equals two addresses/words (2 * 8 byte). ++stackFrameHeaderSize :: Int ++stackFrameHeaderSize = 2 * spillSlotSize ++ ++-- | All registers are 8 byte wide. ++spillSlotSize :: Int ++spillSlotSize = 8 ++ ++-- | The number of bytes that the stack pointer should be aligned to. ++stackAlign :: Int ++stackAlign = 16 ++ ++-- | The number of spill slots available without allocating more. ++maxSpillSlots :: NCGConfig -> Int ++maxSpillSlots config = ++ ( (ncgSpillPreallocSize config - stackFrameHeaderSize) ++ `div` spillSlotSize ++ ) ++ - 1 ++ ++-- | Convert a spill slot number to a *byte* offset. ++spillSlotToOffset :: Int -> Int ++spillSlotToOffset slot = ++ stackFrameHeaderSize + spillSlotSize * slot ++ ++instance Outputable RegUsage where ++ ppr (RU reads writes) = text "RegUsage(reads:" <+> ppr reads <> comma <+> text "writes:" <+> ppr writes <> char ')' ++ ++-- | Get the registers that are being used by this instruction. ++-- regUsage doesn't need to do any trickery for jumps and such. ++-- Just state precisely the regs read and written by that insn. ++-- The consequences of control flow transfers, as far as register ++-- allocation goes, are taken care of by the register allocator. ++-- ++-- RegUsage = RU [<read regs>] [<write regs>] ++regUsageOfInstr :: Platform -> Instr -> RegUsage ++regUsageOfInstr platform instr = case instr of ++ ANN _ i -> regUsageOfInstr platform i ++ COMMENT {} -> usage ([], []) ++ MULTILINE_COMMENT {} -> usage ([], []) ++ PUSH_STACK_FRAME -> usage ([], []) ++ POP_STACK_FRAME -> usage ([], []) ++ LOCATION {} -> usage ([], []) ++ DELTA {} -> usage ([], []) ++ ADD dst src1 src2 -> usage (regOp src1 ++ regOp src2, regOp dst) ++ MUL dst src1 src2 -> usage (regOp src1 ++ regOp src2, regOp dst) ++ NEG dst src -> usage (regOp src, regOp dst) ++ MULH dst src1 src2 -> usage (regOp src1 ++ regOp src2, regOp dst) ++ DIV dst src1 src2 -> usage (regOp src1 ++ regOp src2, regOp dst) ++ REM dst src1 src2 -> usage (regOp src1 ++ regOp src2, regOp dst) ++ REMU dst src1 src2 -> usage (regOp src1 ++ regOp src2, regOp dst) ++ SUB dst src1 src2 -> usage (regOp src1 ++ regOp src2, regOp dst) ++ DIVU dst src1 src2 -> usage (regOp src1 ++ regOp src2, regOp dst) ++ AND dst src1 src2 -> usage (regOp src1 ++ regOp src2, regOp dst) ++ OR dst src1 src2 -> usage (regOp src1 ++ regOp src2, regOp dst) ++ SRA dst src1 src2 -> usage (regOp src1 ++ regOp src2, regOp dst) ++ XOR dst src1 src2 -> usage (regOp src1 ++ regOp src2, regOp dst) ++ SLL dst src1 src2 -> usage (regOp src1 ++ regOp src2, regOp dst) ++ SRL dst src1 src2 -> usage (regOp src1 ++ regOp src2, regOp dst) ++ MOV dst src -> usage (regOp src, regOp dst) ++ -- ORI's third operand is always an immediate ++ ORI dst src1 _ -> usage (regOp src1, regOp dst) ++ XORI dst src1 _ -> usage (regOp src1, regOp dst) ++ J_TBL _ _ t -> usage ([t], []) ++ J t -> usage (regTarget t, []) ++ B t -> usage (regTarget t, []) ++ BCOND _ l r t -> usage (regTarget t ++ regOp l ++ regOp r, []) ++ BL t ps -> usage (t : ps, callerSavedRegisters) ++ CSET dst l r _ -> usage (regOp l ++ regOp r, regOp dst) ++ STR _ src dst -> usage (regOp src ++ regOp dst, []) ++ LDR _ dst src -> usage (regOp src, regOp dst) ++ LDRU _ dst src -> usage (regOp src, regOp dst) ++ FENCE _ _ -> usage ([], []) ++ FCVT _variant dst src -> usage (regOp src, regOp dst) ++ FABS dst src -> usage (regOp src, regOp dst) ++ FMA _ dst src1 src2 src3 -> ++ usage (regOp src1 ++ regOp src2 ++ regOp src3, regOp dst) ++ _ -> panic $ "regUsageOfInstr: " ++ instrCon instr ++ where ++ -- filtering the usage is necessary, otherwise the register ++ -- allocator will try to allocate pre-defined fixed stg ++ -- registers as well, as they show up. ++ usage :: ([Reg], [Reg]) -> RegUsage ++ usage (srcRegs, dstRegs) = ++ RU ++ (filter (interesting platform) srcRegs) ++ (filter (interesting platform) dstRegs) ++ ++ regAddr :: AddrMode -> [Reg] ++ regAddr (AddrRegImm r1 _imm) = [r1] ++ regAddr (AddrReg r1) = [r1] ++ ++ regOp :: Operand -> [Reg] ++ regOp (OpReg _w r1) = [r1] ++ regOp (OpAddr a) = regAddr a ++ regOp (OpImm _imm) = [] ++ ++ regTarget :: Target -> [Reg] ++ regTarget (TBlock _bid) = [] ++ regTarget (TReg r1) = [r1] ++ ++ -- Is this register interesting for the register allocator? ++ interesting :: Platform -> Reg -> Bool ++ interesting _ (RegVirtual _) = True ++ interesting platform (RegReal (RealRegSingle i)) = freeReg platform i ++ ++-- | Caller-saved registers (according to calling convention) ++-- ++-- These registers may be clobbered after a jump. ++callerSavedRegisters :: [Reg] ++callerSavedRegisters = ++ [regSingle raRegNo] ++ ++ map regSingle [t0RegNo .. t2RegNo] ++ ++ map regSingle [a0RegNo .. a7RegNo] ++ ++ map regSingle [t3RegNo .. t6RegNo] ++ ++ map regSingle [ft0RegNo .. ft7RegNo] ++ ++ map regSingle [fa0RegNo .. fa7RegNo] ++ ++-- | Apply a given mapping to all the register references in this instruction. ++patchRegsOfInstr :: Instr -> (Reg -> Reg) -> Instr ++patchRegsOfInstr instr env = case instr of ++ ANN d i -> ANN d (patchRegsOfInstr i env) ++ COMMENT {} -> instr ++ MULTILINE_COMMENT {} -> instr ++ PUSH_STACK_FRAME -> instr ++ POP_STACK_FRAME -> instr ++ LOCATION {} -> instr ++ DELTA {} -> instr ++ ADD o1 o2 o3 -> ADD (patchOp o1) (patchOp o2) (patchOp o3) ++ MUL o1 o2 o3 -> MUL (patchOp o1) (patchOp o2) (patchOp o3) ++ NEG o1 o2 -> NEG (patchOp o1) (patchOp o2) ++ MULH o1 o2 o3 -> MULH (patchOp o1) (patchOp o2) (patchOp o3) ++ DIV o1 o2 o3 -> DIV (patchOp o1) (patchOp o2) (patchOp o3) ++ REM o1 o2 o3 -> REM (patchOp o1) (patchOp o2) (patchOp o3) ++ REMU o1 o2 o3 -> REMU (patchOp o1) (patchOp o2) (patchOp o3) ++ SUB o1 o2 o3 -> SUB (patchOp o1) (patchOp o2) (patchOp o3) ++ DIVU o1 o2 o3 -> DIVU (patchOp o1) (patchOp o2) (patchOp o3) ++ AND o1 o2 o3 -> AND (patchOp o1) (patchOp o2) (patchOp o3) ++ OR o1 o2 o3 -> OR (patchOp o1) (patchOp o2) (patchOp o3) ++ SRA o1 o2 o3 -> SRA (patchOp o1) (patchOp o2) (patchOp o3) ++ XOR o1 o2 o3 -> XOR (patchOp o1) (patchOp o2) (patchOp o3) ++ SLL o1 o2 o3 -> SLL (patchOp o1) (patchOp o2) (patchOp o3) ++ SRL o1 o2 o3 -> SRL (patchOp o1) (patchOp o2) (patchOp o3) ++ MOV o1 o2 -> MOV (patchOp o1) (patchOp o2) ++ -- o3 cannot be a register for ORI (always an immediate) ++ ORI o1 o2 o3 -> ORI (patchOp o1) (patchOp o2) (patchOp o3) ++ XORI o1 o2 o3 -> XORI (patchOp o1) (patchOp o2) (patchOp o3) ++ J_TBL ids mbLbl t -> J_TBL ids mbLbl (env t) ++ J t -> J (patchTarget t) ++ B t -> B (patchTarget t) ++ BL t ps -> BL (patchReg t) ps ++ BCOND c o1 o2 t -> BCOND c (patchOp o1) (patchOp o2) (patchTarget t) ++ CSET o l r c -> CSET (patchOp o) (patchOp l) (patchOp r) c ++ STR f o1 o2 -> STR f (patchOp o1) (patchOp o2) ++ LDR f o1 o2 -> LDR f (patchOp o1) (patchOp o2) ++ LDRU f o1 o2 -> LDRU f (patchOp o1) (patchOp o2) ++ FENCE o1 o2 -> FENCE o1 o2 ++ FCVT variant o1 o2 -> FCVT variant (patchOp o1) (patchOp o2) ++ FABS o1 o2 -> FABS (patchOp o1) (patchOp o2) ++ FMA s o1 o2 o3 o4 -> ++ FMA s (patchOp o1) (patchOp o2) (patchOp o3) (patchOp o4) ++ _ -> panic $ "patchRegsOfInstr: " ++ instrCon instr ++ where ++ patchOp :: Operand -> Operand ++ patchOp (OpReg w r) = OpReg w (env r) ++ patchOp (OpAddr a) = OpAddr (patchAddr a) ++ patchOp opImm = opImm ++ ++ patchTarget :: Target -> Target ++ patchTarget (TReg r) = TReg (env r) ++ patchTarget tBlock = tBlock ++ ++ patchAddr :: AddrMode -> AddrMode ++ patchAddr (AddrRegImm r1 imm) = AddrRegImm (env r1) imm ++ patchAddr (AddrReg r) = AddrReg (env r) ++ ++ patchReg :: Reg -> Reg ++ patchReg = env ++ ++-- | Checks whether this instruction is a jump/branch instruction. ++-- ++-- One that can change the flow of control in a way that the ++-- register allocator needs to worry about. ++isJumpishInstr :: Instr -> Bool ++isJumpishInstr instr = case instr of ++ ANN _ i -> isJumpishInstr i ++ J_TBL {} -> True ++ J {} -> True ++ B {} -> True ++ BL {} -> True ++ BCOND {} -> True ++ _ -> False ++ ++canFallthroughTo :: Instr -> BlockId -> Bool ++canFallthroughTo insn bid = ++ case insn of ++ J (TBlock target) -> bid == target ++ B (TBlock target) -> bid == target ++ BCOND _ _ _ (TBlock target) -> bid == target ++ J_TBL targets _ _ -> all isTargetBid targets ++ _ -> False ++ where ++ isTargetBid target = case target of ++ Nothing -> True ++ Just target -> target == bid ++ ++ ++-- | Get the `BlockId`s of the jump destinations (if any) ++jumpDestsOfInstr :: Instr -> [BlockId] ++jumpDestsOfInstr (ANN _ i) = jumpDestsOfInstr i ++jumpDestsOfInstr (J_TBL ids _mbLbl _r) = catMaybes ids ++jumpDestsOfInstr (J t) = [id | TBlock id <- [t]] ++jumpDestsOfInstr (B t) = [id | TBlock id <- [t]] ++jumpDestsOfInstr (BCOND _ _ _ t) = [id | TBlock id <- [t]] ++jumpDestsOfInstr _ = [] ++ ++-- | Change the destination of this (potential) jump instruction. ++-- ++-- Used in the linear allocator when adding fixup blocks for join ++-- points. ++patchJumpInstr :: Instr -> (BlockId -> BlockId) -> Instr ++patchJumpInstr instr patchF = ++ case instr of ++ ANN d i -> ANN d (patchJumpInstr i patchF) ++ J_TBL ids mbLbl r -> J_TBL (map (fmap patchF) ids) mbLbl r ++ J (TBlock bid) -> J (TBlock (patchF bid)) ++ B (TBlock bid) -> B (TBlock (patchF bid)) ++ BCOND c o1 o2 (TBlock bid) -> BCOND c o1 o2 (TBlock (patchF bid)) ++ _ -> panic $ "patchJumpInstr: " ++ instrCon instr ++ ++-- ----------------------------------------------------------------------------- ++-- Note [RISCV64 Spills and Reloads] ++-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ++-- ++-- We reserve @RESERVED_C_STACK_BYTES@ on the C stack for spilling and reloading ++-- registers. The load and store instructions of RISCV64 address with a signed ++-- 12-bit immediate + a register; machine stackpointer (sp/x2) in this case. ++-- ++-- The @RESERVED_C_STACK_BYTES@ is 16k, so we can't always address into it in a ++-- single load/store instruction. There are offsets to sp (not to be confused ++-- with STG's SP!) which need a register to be calculated. ++-- ++-- Using sp to compute the offset would violate assumptions about the stack pointer ++-- pointing to the top of the stack during signal handling. As we can't force ++-- every signal to use its own stack, we have to ensure that the stack pointer ++-- always points to the top of the stack, and we can't use it for computation. ++-- ++-- So, we reserve one register (TMP) for this purpose (and other, unrelated ++-- intermediate operations.) See Note [The made-up RISCV64 TMP (IP) register] ++ ++-- | Generate instructions to spill a register into a spill slot. ++mkSpillInstr :: ++ (HasCallStack) => ++ NCGConfig -> ++ -- | register to spill ++ Reg -> ++ -- | current stack delta ++ Int -> ++ -- | spill slot to use ++ Int -> ++ [Instr] ++mkSpillInstr _config reg delta slot = ++ case off - delta of ++ imm | fitsIn12bitImm imm -> [mkStrSpImm imm] ++ imm -> ++ [ movImmToTmp imm, ++ addSpToTmp, ++ mkStrTmp ++ ] ++ where ++ fmt = case reg of ++ RegReal (RealRegSingle n) | n < d0RegNo -> II64 ++ _ -> FF64 ++ mkStrSpImm imm = ++ ANN (text "Spill@" <> int (off - delta)) ++ $ STR fmt (OpReg W64 reg) (OpAddr (AddrRegImm spMachReg (ImmInt imm))) ++ movImmToTmp imm = ++ ANN (text "Spill: TMP <- " <> int imm) ++ $ MOV tmp (OpImm (ImmInt imm)) ++ addSpToTmp = ++ ANN (text "Spill: TMP <- SP + TMP ") ++ $ ADD tmp tmp sp ++ mkStrTmp = ++ ANN (text "Spill@" <> int (off - delta)) ++ $ STR fmt (OpReg W64 reg) (OpAddr (AddrReg tmpReg)) ++ ++ off = spillSlotToOffset slot ++ ++-- | Generate instructions to load a register from a spill slot. ++mkLoadInstr :: ++ NCGConfig -> ++ -- | register to load ++ Reg -> ++ -- | current stack delta ++ Int -> ++ -- | spill slot to use ++ Int -> ++ [Instr] ++mkLoadInstr _config reg delta slot = ++ case off - delta of ++ imm | fitsIn12bitImm imm -> [mkLdrSpImm imm] ++ imm -> ++ [ movImmToTmp imm, ++ addSpToTmp, ++ mkLdrTmp ++ ] ++ where ++ fmt = case reg of ++ RegReal (RealRegSingle n) | n < d0RegNo -> II64 ++ _ -> FF64 ++ mkLdrSpImm imm = ++ ANN (text "Reload@" <> int (off - delta)) ++ $ LDR fmt (OpReg W64 reg) (OpAddr (AddrRegImm spMachReg (ImmInt imm))) ++ movImmToTmp imm = ++ ANN (text "Reload: TMP <- " <> int imm) ++ $ MOV tmp (OpImm (ImmInt imm)) ++ addSpToTmp = ++ ANN (text "Reload: TMP <- SP + TMP ") ++ $ ADD tmp tmp sp ++ mkLdrTmp = ++ ANN (text "Reload@" <> int (off - delta)) ++ $ LDR fmt (OpReg W64 reg) (OpAddr (AddrReg tmpReg)) ++ ++ off = spillSlotToOffset slot ++ ++-- | See if this instruction is telling us the current C stack delta ++takeDeltaInstr :: Instr -> Maybe Int ++takeDeltaInstr (ANN _ i) = takeDeltaInstr i ++takeDeltaInstr (DELTA i) = Just i ++takeDeltaInstr _ = Nothing ++ ++-- | Not real instructions. Just meta data ++isMetaInstr :: Instr -> Bool ++isMetaInstr instr = ++ case instr of ++ ANN _ i -> isMetaInstr i ++ COMMENT {} -> True ++ MULTILINE_COMMENT {} -> True ++ LOCATION {} -> True ++ LDATA {} -> True ++ NEWBLOCK {} -> True ++ DELTA {} -> True ++ PUSH_STACK_FRAME -> True ++ POP_STACK_FRAME -> True ++ _ -> False ++ ++-- | Copy the value in a register to another one. ++-- ++-- Must work for all register classes. ++mkRegRegMoveInstr :: Reg -> Reg -> Instr ++mkRegRegMoveInstr src dst = ANN desc instr ++ where ++ desc = text "Reg->Reg Move: " <> ppr src <> text " -> " <> ppr dst ++ instr = MOV (operandFromReg dst) (operandFromReg src) ++ ++-- | Take the source and destination from this (potential) reg -> reg move instruction ++-- ++-- We have to be a bit careful here: A `MOV` can also mean an implicit ++-- conversion. This case is filtered out. ++takeRegRegMoveInstr :: Instr -> Maybe (Reg, Reg) ++takeRegRegMoveInstr (MOV (OpReg width dst) (OpReg width' src)) ++ | width == width' && (isFloatReg dst == isFloatReg src) = pure (src, dst) ++takeRegRegMoveInstr _ = Nothing ++ ++-- | Make an unconditional jump instruction. ++mkJumpInstr :: BlockId -> [Instr] ++mkJumpInstr = pure . B . TBlock ++ ++-- | Decrement @sp@ to allocate stack space. ++-- ++-- The stack grows downwards, so we decrement the stack pointer by @n@ (bytes). ++-- This is dual to `mkStackDeallocInstr`. @sp@ is the RISCV stack pointer, not ++-- to be confused with the STG stack pointer. ++mkStackAllocInstr :: Platform -> Int -> [Instr] ++mkStackAllocInstr _platform = moveSp . negate ++ ++-- | Increment SP to deallocate stack space. ++-- ++-- The stack grows downwards, so we increment the stack pointer by @n@ (bytes). ++-- This is dual to `mkStackAllocInstr`. @sp@ is the RISCV stack pointer, not to ++-- be confused with the STG stack pointer. ++mkStackDeallocInstr :: Platform -> Int -> [Instr] ++mkStackDeallocInstr _platform = moveSp ++ ++moveSp :: Int -> [Instr] ++moveSp n ++ | n == 0 = [] ++ | n /= 0 && fitsIn12bitImm n = pure . ANN desc $ ADD sp sp (OpImm (ImmInt n)) ++ | otherwise = ++ -- This ends up in three effective instructions. We could get away with ++ -- two for intMax12bit < n < 3 * intMax12bit by recursing once. However, ++ -- this way is likely less surprising. ++ [ ANN desc (MOV tmp (OpImm (ImmInt n))), ++ ADD sp sp tmp ++ ] ++ where ++ desc = text "Move SP:" <+> int n ++ ++-- ++-- See Note [extra spill slots] in X86/Instr.hs ++-- ++allocMoreStack :: ++ Platform -> ++ Int -> ++ NatCmmDecl statics GHC.CmmToAsm.RV64.Instr.Instr -> ++ UniqSM (NatCmmDecl statics GHC.CmmToAsm.RV64.Instr.Instr, [(BlockId, BlockId)]) ++allocMoreStack _ _ top@(CmmData _ _) = return (top, []) ++allocMoreStack platform slots proc@(CmmProc info lbl live (ListGraph code)) = do ++ let entries = entryBlocks proc ++ ++ uniqs <- getUniquesM ++ ++ let delta = ((x + stackAlign - 1) `quot` stackAlign) * stackAlign -- round up ++ where ++ x = slots * spillSlotSize -- sp delta ++ alloc = mkStackAllocInstr platform delta ++ dealloc = mkStackDeallocInstr platform delta ++ ++ retargetList = zip entries (map mkBlockId uniqs) ++ ++ new_blockmap :: LabelMap BlockId ++ new_blockmap = mapFromList retargetList ++ ++ insert_stack_insn (BasicBlock id insns) ++ | Just new_blockid <- mapLookup id new_blockmap = ++ [ BasicBlock id $ alloc ++ [B (TBlock new_blockid)], ++ BasicBlock new_blockid block' ++ ] ++ | otherwise = ++ [BasicBlock id block'] ++ where ++ block' = foldr insert_dealloc [] insns ++ ++ insert_dealloc insn r = case insn of ++ J {} -> dealloc ++ (insn : r) ++ ANN _ e -> insert_dealloc e r ++ _other ++ | jumpDestsOfInstr insn /= [] -> ++ patchJumpInstr insn retarget : r ++ _other -> insn : r ++ where ++ retarget b = fromMaybe b (mapLookup b new_blockmap) ++ ++ new_code = concatMap insert_stack_insn code ++ return (CmmProc info lbl live (ListGraph new_code), retargetList) ++ ++data Instr ++ = -- | Comment pseudo-op ++ COMMENT SDoc ++ | -- | Multi-line comment pseudo-op ++ MULTILINE_COMMENT SDoc ++ | -- | Annotated instruction. Should print <instr> # <doc> ++ ANN SDoc Instr ++ | -- | Location pseudo-op @.loc@ (file, line, col, name) ++ LOCATION Int Int Int LexicalFastString ++ | -- | Static data spat out during code generation. ++ LDATA Section RawCmmStatics ++ | -- | Start a new basic block. ++ -- ++ -- Useful during codegen, removed later. Preceding instruction should be a ++ -- jump, as per the invariants for a BasicBlock (see Cmm). ++ NEWBLOCK BlockId ++ | -- | Specify current stack offset for benefit of subsequent passes ++ DELTA Int ++ | -- | Push a minimal stack frame consisting of the return address (RA) and the frame pointer (FP). ++ PUSH_STACK_FRAME ++ | -- | Pop the minimal stack frame of prior `PUSH_STACK_FRAME`. ++ POP_STACK_FRAME ++ | -- | Arithmetic addition (both integer and floating point) ++ -- ++ -- @rd = rs1 + rs2@ ++ ADD Operand Operand Operand ++ | -- | Arithmetic subtraction (both integer and floating point) ++ -- ++ -- @rd = rs1 - rs2@ ++ SUB Operand Operand Operand ++ | -- | Logical AND (integer only) ++ -- ++ -- @rd = rs1 & rs2@ ++ AND Operand Operand Operand ++ | -- | Logical OR (integer only) ++ -- ++ -- @rd = rs1 | rs2@ ++ OR Operand Operand Operand ++ | -- | Logical left shift (zero extened, integer only) ++ -- ++ -- @rd = rs1 << rs2@ ++ SLL Operand Operand Operand ++ | -- | Logical right shift (zero extened, integer only) ++ -- ++ -- @rd = rs1 >> rs2@ ++ SRL Operand Operand Operand ++ | -- | Arithmetic right shift (sign-extened, integer only) ++ -- ++ -- @rd = rs1 >> rs2@ ++ SRA Operand Operand Operand ++ | -- | Store to memory (both, integer and floating point) ++ STR Format Operand Operand ++ | -- | Load from memory (sign-extended, integer and floating point) ++ LDR Format Operand Operand ++ | -- | Load from memory (unsigned, integer and floating point) ++ LDRU Format Operand Operand ++ | -- | Arithmetic multiplication (both, integer and floating point) ++ -- ++ -- @rd = rn × rm@ ++ MUL Operand Operand Operand ++ | -- | Negation (both, integer and floating point) ++ -- ++ -- @rd = -op2@ ++ NEG Operand Operand ++ | -- | Division (both, integer and floating point) ++ -- ++ -- @rd = rn ÷ rm@ ++ DIV Operand Operand Operand ++ | -- | Remainder (integer only, signed) ++ -- ++ -- @rd = rn % rm@ ++ REM Operand Operand Operand -- ++ | -- | Remainder (integer only, unsigned) ++ -- ++ -- @rd = |rn % rm|@ ++ REMU Operand Operand Operand ++ | -- | High part of a multiplication that doesn't fit into 64bits (integer only) ++ -- ++ -- E.g. for a multiplication with 64bits width: @rd = (rs1 * rs2) >> 64@. ++ MULH Operand Operand Operand ++ | -- | Unsigned division (integer only) ++ -- ++ -- @rd = |rn ÷ rm|@ ++ DIVU Operand Operand Operand ++ | -- | XOR (integer only) ++ -- ++ -- @rd = rn ⊕ op2@ ++ XOR Operand Operand Operand ++ | -- | ORI with immediate (integer only) ++ -- ++ -- @rd = rn | op2@ ++ ORI Operand Operand Operand ++ | -- | OR with immediate (integer only) ++ -- ++ -- @rd = rn ⊕ op2@ ++ XORI Operand Operand Operand ++ | -- | Move to register (integer and floating point) ++ -- ++ -- @rd = rn@ or @rd = #imm@ ++ MOV Operand Operand ++ | -- | Pseudo-op for conditional setting of a register. ++ -- ++ -- @if(o2 cond o3) op <- 1 else op <- 0@ ++ CSET Operand Operand Operand Cond ++ -- | Like B, but only used for non-local jumps. Used to distinguish genJumps from others. ++ | J Target ++ | -- | A jump instruction with data for switch/jump tables ++ J_TBL [Maybe BlockId] (Maybe CLabel) Reg ++ | -- | Unconditional jump (no linking) ++ B Target ++ | -- | Unconditional jump, links return address (sets @ra@/@x1@) ++ BL Reg [Reg] ++ | -- | branch with condition (integer only) ++ BCOND Cond Operand Operand Target ++ | -- | Fence instruction ++ -- ++ -- Memory barrier. ++ FENCE FenceType FenceType ++ | -- | Floating point conversion ++ FCVT FcvtVariant Operand Operand ++ | -- | Floating point ABSolute value ++ FABS Operand Operand ++ | -- | Floating-point fused multiply-add instructions ++ -- ++ -- - fmadd : d = r1 * r2 + r3 ++ -- - fnmsub: d = r1 * r2 - r3 ++ -- - fmsub : d = - r1 * r2 + r3 ++ -- - fnmadd: d = - r1 * r2 - r3 ++ FMA FMASign Operand Operand Operand Operand ++ ++-- | Operand of a FENCE instruction (@r@, @w@ or @rw@) ++data FenceType = FenceRead | FenceWrite | FenceReadWrite ++ ++-- | Variant of a floating point conversion instruction ++data FcvtVariant = FloatToFloat | IntToFloat | FloatToInt ++ ++instrCon :: Instr -> String ++instrCon i = ++ case i of ++ COMMENT {} -> "COMMENT" ++ MULTILINE_COMMENT {} -> "COMMENT" ++ ANN {} -> "ANN" ++ LOCATION {} -> "LOCATION" ++ LDATA {} -> "LDATA" ++ NEWBLOCK {} -> "NEWBLOCK" ++ DELTA {} -> "DELTA" ++ PUSH_STACK_FRAME {} -> "PUSH_STACK_FRAME" ++ POP_STACK_FRAME {} -> "POP_STACK_FRAME" ++ ADD {} -> "ADD" ++ OR {} -> "OR" ++ MUL {} -> "MUL" ++ NEG {} -> "NEG" ++ DIV {} -> "DIV" ++ REM {} -> "REM" ++ REMU {} -> "REMU" ++ MULH {} -> "MULH" ++ SUB {} -> "SUB" ++ DIVU {} -> "DIVU" ++ AND {} -> "AND" ++ SRA {} -> "SRA" ++ XOR {} -> "XOR" ++ SLL {} -> "SLL" ++ SRL {} -> "SRL" ++ MOV {} -> "MOV" ++ ORI {} -> "ORI" ++ XORI {} -> "ORI" ++ STR {} -> "STR" ++ LDR {} -> "LDR" ++ LDRU {} -> "LDRU" ++ CSET {} -> "CSET" ++ J_TBL {} -> "J_TBL" ++ J {} -> "J" ++ B {} -> "B" ++ BL {} -> "BL" ++ BCOND {} -> "BCOND" ++ FENCE {} -> "FENCE" ++ FCVT {} -> "FCVT" ++ FABS {} -> "FABS" ++ FMA variant _ _ _ _ -> ++ case variant of ++ FMAdd -> "FMADD" ++ FMSub -> "FMSUB" ++ FNMAdd -> "FNMADD" ++ FNMSub -> "FNMSUB" ++ ++data Target ++ = TBlock BlockId ++ | TReg Reg ++ ++data Operand ++ = -- | register ++ OpReg Width Reg ++ | -- | immediate value ++ OpImm Imm ++ | -- | memory reference ++ OpAddr AddrMode ++ deriving (Eq, Show) ++ ++operandFromReg :: Reg -> Operand ++operandFromReg = OpReg W64 ++ ++operandFromRegNo :: RegNo -> Operand ++operandFromRegNo = operandFromReg . regSingle ++ ++zero, ra, sp, gp, tp, fp, tmp :: Operand ++zero = operandFromReg zeroReg ++ra = operandFromReg raReg ++sp = operandFromReg spMachReg ++gp = operandFromRegNo 3 ++tp = operandFromRegNo 4 ++fp = operandFromRegNo 8 ++tmp = operandFromReg tmpReg ++ ++x0, x1, x2, x3, x4, x5, x6, x7 :: Operand ++x8, x9, x10, x11, x12, x13, x14, x15 :: Operand ++x16, x17, x18, x19, x20, x21, x22, x23 :: Operand ++x24, x25, x26, x27, x28, x29, x30, x31 :: Operand ++x0 = operandFromRegNo x0RegNo ++x1 = operandFromRegNo 1 ++x2 = operandFromRegNo 2 ++x3 = operandFromRegNo 3 ++x4 = operandFromRegNo 4 ++x5 = operandFromRegNo x5RegNo ++x6 = operandFromRegNo 6 ++x7 = operandFromRegNo x7RegNo ++ ++x8 = operandFromRegNo 8 ++ ++x9 = operandFromRegNo 9 ++ ++x10 = operandFromRegNo x10RegNo ++ ++x11 = operandFromRegNo 11 ++ ++x12 = operandFromRegNo 12 ++ ++x13 = operandFromRegNo 13 ++ ++x14 = operandFromRegNo 14 ++ ++x15 = operandFromRegNo 15 ++ ++x16 = operandFromRegNo 16 ++ ++x17 = operandFromRegNo x17RegNo ++ ++x18 = operandFromRegNo 18 ++ ++x19 = operandFromRegNo 19 ++ ++x20 = operandFromRegNo 20 ++ ++x21 = operandFromRegNo 21 ++ ++x22 = operandFromRegNo 22 ++ ++x23 = operandFromRegNo 23 ++ ++x24 = operandFromRegNo 24 ++ ++x25 = operandFromRegNo 25 ++ ++x26 = operandFromRegNo 26 ++ ++x27 = operandFromRegNo 27 ++ ++x28 = operandFromRegNo x28RegNo ++ ++x29 = operandFromRegNo 29 ++ ++x30 = operandFromRegNo 30 ++ ++x31 = operandFromRegNo x31RegNo ++ ++d0, d1, d2, d3, d4, d5, d6, d7 :: Operand ++d8, d9, d10, d11, d12, d13, d14, d15 :: Operand ++d16, d17, d18, d19, d20, d21, d22, d23 :: Operand ++d24, d25, d26, d27, d28, d29, d30, d31 :: Operand ++d0 = operandFromRegNo d0RegNo ++d1 = operandFromRegNo 33 ++d2 = operandFromRegNo 34 ++d3 = operandFromRegNo 35 ++d4 = operandFromRegNo 36 ++d5 = operandFromRegNo 37 ++d6 = operandFromRegNo 38 ++d7 = operandFromRegNo d7RegNo ++ ++d8 = operandFromRegNo 40 ++ ++d9 = operandFromRegNo 41 ++ ++d10 = operandFromRegNo d10RegNo ++ ++d11 = operandFromRegNo 43 ++ ++d12 = operandFromRegNo 44 ++ ++d13 = operandFromRegNo 45 ++ ++d14 = operandFromRegNo 46 ++ ++d15 = operandFromRegNo 47 ++ ++d16 = operandFromRegNo 48 ++ ++d17 = operandFromRegNo d17RegNo ++ ++d18 = operandFromRegNo 50 ++ ++d19 = operandFromRegNo 51 ++ ++d20 = operandFromRegNo 52 ++ ++d21 = operandFromRegNo 53 ++ ++d22 = operandFromRegNo 54 ++ ++d23 = operandFromRegNo 55 ++ ++d24 = operandFromRegNo 56 ++ ++d25 = operandFromRegNo 57 ++ ++d26 = operandFromRegNo 58 ++ ++d27 = operandFromRegNo 59 ++ ++d28 = operandFromRegNo 60 ++ ++d29 = operandFromRegNo 61 ++ ++d30 = operandFromRegNo 62 ++ ++d31 = operandFromRegNo d31RegNo ++ ++fitsIn12bitImm :: (Num a, Ord a) => a -> Bool ++fitsIn12bitImm off = off >= intMin12bit && off <= intMax12bit ++ ++intMin12bit :: (Num a) => a ++intMin12bit = -2048 ++ ++intMax12bit :: (Num a) => a ++intMax12bit = 2047 ++ ++fitsIn32bits :: (Num a, Ord a, Bits a) => a -> Bool ++fitsIn32bits i = (-1 `shiftL` 31) <= i && i <= (1 `shiftL` 31 - 1) ++ ++isNbitEncodeable :: Int -> Integer -> Bool ++isNbitEncodeable n i = let shift = n - 1 in (-1 `shiftL` shift) <= i && i < (1 `shiftL` shift) ++ ++isEncodeableInWidth :: Width -> Integer -> Bool ++isEncodeableInWidth = isNbitEncodeable . widthInBits ++ ++isIntOp :: Operand -> Bool ++isIntOp = not . isFloatOp ++ ++isFloatOp :: Operand -> Bool ++isFloatOp (OpReg _ reg) | isFloatReg reg = True ++isFloatOp _ = False ++ ++isFloatReg :: Reg -> Bool ++isFloatReg (RegReal (RealRegSingle i)) | i > 31 = True ++isFloatReg (RegVirtual (VirtualRegF _)) = True ++isFloatReg (RegVirtual (VirtualRegD _)) = True ++isFloatReg _ = False +Index: ghc-9.10.2/compiler/GHC/CmmToAsm/RV64/Ppr.hs +=================================================================== +--- /dev/null ++++ ghc-9.10.2/compiler/GHC/CmmToAsm/RV64/Ppr.hs +@@ -0,0 +1,716 @@ ++{-# LANGUAGE ScopedTypeVariables #-} ++ ++module GHC.CmmToAsm.RV64.Ppr (pprNatCmmDecl, pprInstr) where ++ ++import GHC.Cmm hiding (topInfoTable) ++import GHC.Cmm.BlockId ++import GHC.Cmm.CLabel ++import GHC.Cmm.Dataflow.Label ++import GHC.CmmToAsm.Config ++import GHC.CmmToAsm.Format ++import GHC.CmmToAsm.Ppr ++import GHC.CmmToAsm.RV64.Cond ++import GHC.CmmToAsm.RV64.Instr ++import GHC.CmmToAsm.RV64.Regs ++import GHC.CmmToAsm.Types ++import GHC.CmmToAsm.Utils ++import GHC.Platform ++import GHC.Platform.Reg ++import GHC.Prelude hiding (EQ) ++import GHC.Types.Basic (Alignment, alignmentBytes, mkAlignment) ++import GHC.Types.Unique (getUnique, pprUniqueAlways) ++import GHC.Utils.Outputable ++import GHC.Utils.Panic ++ ++pprNatCmmDecl :: forall doc. (IsDoc doc) => NCGConfig -> NatCmmDecl RawCmmStatics Instr -> doc ++pprNatCmmDecl config (CmmData section dats) = ++ pprSectionAlign config section $$ pprDatas config dats ++pprNatCmmDecl config proc@(CmmProc top_info lbl _ (ListGraph blocks)) = ++ let platform = ncgPlatform config ++ ++ pprProcAlignment :: doc ++ pprProcAlignment = maybe empty (pprAlign . mkAlignment) (ncgProcAlignment config) ++ in pprProcAlignment ++ $$ case topInfoTable proc of ++ Nothing -> ++ -- special case for code without info table: ++ pprSectionAlign config (Section Text lbl) ++ $$ ++ -- do not ++ -- pprProcAlignment config $$ ++ pprLabel platform lbl ++ $$ vcat (map (pprBasicBlock config top_info) blocks) -- blocks guaranteed not null, so label needed ++ $$ ppWhen ++ (ncgDwarfEnabled config) ++ (line (pprBlockEndLabel platform lbl) $$ line (pprProcEndLabel platform lbl)) ++ $$ pprSizeDecl platform lbl ++ Just (CmmStaticsRaw info_lbl _) -> ++ pprSectionAlign config (Section Text info_lbl) ++ $$ ++ -- pprProcAlignment config $$ ++ ( if platformHasSubsectionsViaSymbols platform ++ then line (pprAsmLabel platform (mkDeadStripPreventer info_lbl) <> char ':') ++ else empty ++ ) ++ $$ vcat (map (pprBasicBlock config top_info) blocks) ++ $$ ppWhen (ncgDwarfEnabled config) (line (pprProcEndLabel platform info_lbl)) ++ $$ ++ -- above: Even the first block gets a label, because with branch-chain ++ -- elimination, it might be the target of a goto. ++ ( if platformHasSubsectionsViaSymbols platform ++ then -- See Note [Subsections Via Symbols] ++ ++ line ++ $ text "\t.long " ++ <+> pprAsmLabel platform info_lbl ++ <+> char '-' ++ <+> pprAsmLabel platform (mkDeadStripPreventer info_lbl) ++ else empty ++ ) ++ $$ pprSizeDecl platform info_lbl ++{-# SPECIALIZE pprNatCmmDecl :: NCGConfig -> NatCmmDecl RawCmmStatics Instr -> SDoc #-} ++{-# SPECIALIZE pprNatCmmDecl :: NCGConfig -> NatCmmDecl RawCmmStatics Instr -> HDoc #-} -- see Note [SPECIALIZE to HDoc] in GHC.Utils.Outputable ++ ++pprLabel :: (IsDoc doc) => Platform -> CLabel -> doc ++pprLabel platform lbl = ++ pprGloblDecl platform lbl ++ $$ pprTypeDecl platform lbl ++ $$ line (pprAsmLabel platform lbl <> char ':') ++ ++pprAlign :: (IsDoc doc) => Alignment -> doc ++pprAlign alignment = ++ -- "The .align directive for RISC-V is an alias to .p2align, which aligns to a ++ -- power of two, so .align 2 means align to 4 bytes. Because the definition of ++ -- the .align directive varies by architecture, it is recommended to use the ++ -- unambiguous .p2align or .balign directives instead." ++ -- (https://github.com/riscv-non-isa/riscv-asm-manual/blob/main/riscv-asm.md#-a…) ++ line $ text "\t.balign " <> int (alignmentBytes alignment) ++ ++-- | Print appropriate alignment for the given section type. ++-- ++-- Currently, this always aligns to a full machine word (8 byte.) A future ++-- improvement could be to really do this per section type (though, it's ++-- probably not a big gain.) ++pprAlignForSection :: (IsDoc doc) => SectionType -> doc ++pprAlignForSection _seg = pprAlign . mkAlignment $ 8 ++ ++-- | Print section header and appropriate alignment for that section. ++-- ++-- This will e.g. emit a header like: ++-- ++-- .section .text ++-- .balign 8 ++pprSectionAlign :: (IsDoc doc) => NCGConfig -> Section -> doc ++pprSectionAlign _config (Section (OtherSection _) _) = ++ panic "RV64.Ppr.pprSectionAlign: unknown section" ++pprSectionAlign config sec@(Section seg _) = ++ line (pprSectionHeader config sec) ++ $$ pprAlignForSection seg ++ ++pprProcEndLabel :: ++ (IsLine doc) => ++ Platform -> ++ -- | Procedure name ++ CLabel -> ++ doc ++pprProcEndLabel platform lbl = ++ pprAsmLabel platform (mkAsmTempProcEndLabel lbl) <> colon ++ ++pprBlockEndLabel :: ++ (IsLine doc) => ++ Platform -> ++ -- | Block name ++ CLabel -> ++ doc ++pprBlockEndLabel platform lbl = ++ pprAsmLabel platform (mkAsmTempEndLabel lbl) <> colon ++ ++-- | Output the ELF .size directive (if needed.) ++pprSizeDecl :: (IsDoc doc) => Platform -> CLabel -> doc ++pprSizeDecl platform lbl ++ | osElfTarget (platformOS platform) = ++ line $ text "\t.size" <+> asmLbl <> text ", .-" <> asmLbl ++ where ++ asmLbl = pprAsmLabel platform lbl ++pprSizeDecl _ _ = empty ++ ++pprBasicBlock :: ++ (IsDoc doc) => ++ NCGConfig -> ++ LabelMap RawCmmStatics -> ++ NatBasicBlock Instr -> ++ doc ++pprBasicBlock config info_env (BasicBlock blockid instrs) = ++ maybe_infotable ++ $ pprLabel platform asmLbl ++ $$ vcat (map (pprInstr platform) (id {-detectTrivialDeadlock-} optInstrs)) ++ $$ ppWhen ++ (ncgDwarfEnabled config) ++ ( -- Emit both end labels since this may end up being a standalone ++ -- top-level block ++ line ++ ( pprBlockEndLabel platform asmLbl ++ <> pprProcEndLabel platform asmLbl ++ ) ++ ) ++ where ++ -- TODO: Check if we can filter more instructions here. ++ -- TODO: Shouldn't this be a more general check on a higher level? ++ -- Filter out identity moves. E.g. mov x18, x18 will be dropped. ++ optInstrs = filter f instrs ++ where ++ f (MOV o1 o2) | o1 == o2 = False ++ f _ = True ++ ++ asmLbl = blockLbl blockid ++ platform = ncgPlatform config ++ maybe_infotable c = case mapLookup blockid info_env of ++ Nothing -> c ++ Just (CmmStaticsRaw info_lbl info) -> ++ -- pprAlignForSection platform Text $$ ++ infoTableLoc ++ $$ vcat (map (pprData config) info) ++ $$ pprLabel platform info_lbl ++ $$ c ++ $$ ppWhen ++ (ncgDwarfEnabled config) ++ (line (pprBlockEndLabel platform info_lbl)) ++ -- Make sure the info table has the right .loc for the block ++ -- coming right after it. See Note [Info Offset] ++ infoTableLoc = case instrs of ++ (l@LOCATION {} : _) -> pprInstr platform l ++ _other -> empty ++ ++pprDatas :: (IsDoc doc) => NCGConfig -> RawCmmStatics -> doc ++-- See Note [emit-time elimination of static indirections] in "GHC.Cmm.CLabel". ++pprDatas config (CmmStaticsRaw alias [CmmStaticLit (CmmLabel lbl), CmmStaticLit ind, _, _]) ++ | lbl == mkIndStaticInfoLabel, ++ let labelInd (CmmLabelOff l _) = Just l ++ labelInd (CmmLabel l) = Just l ++ labelInd _ = Nothing, ++ Just ind' <- labelInd ind, ++ alias `mayRedirectTo` ind' = ++ pprGloblDecl (ncgPlatform config) alias ++ $$ line (text ".equiv" <+> pprAsmLabel (ncgPlatform config) alias <> comma <> pprAsmLabel (ncgPlatform config) ind') ++pprDatas config (CmmStaticsRaw lbl dats) = ++ vcat (pprLabel platform lbl : map (pprData config) dats) ++ where ++ platform = ncgPlatform config ++ ++pprData :: (IsDoc doc) => NCGConfig -> CmmStatic -> doc ++pprData _config (CmmString str) = line (pprString str) ++pprData _config (CmmFileEmbed path _) = line (pprFileEmbed path) ++-- TODO: AFAIK there no Darwin for RISCV, so we may consider to simplify this. ++pprData config (CmmUninitialised bytes) = ++ line ++ $ let platform = ncgPlatform config ++ in if platformOS platform == OSDarwin ++ then text ".space " <> int bytes ++ else text ".skip " <> int bytes ++pprData config (CmmStaticLit lit) = pprDataItem config lit ++ ++pprGloblDecl :: (IsDoc doc) => Platform -> CLabel -> doc ++pprGloblDecl platform lbl ++ | not (externallyVisibleCLabel lbl) = empty ++ | otherwise = line (text "\t.globl " <> pprAsmLabel platform lbl) ++ ++-- Note [Always use objects for info tables] ++-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ++-- See discussion in X86.Ppr for why this is necessary. Essentially we need to ++-- ensure that we never pass function symbols when we might want to lookup the ++-- info table. If we did, we could end up with procedure linking tables ++-- (PLT)s, and thus the lookup wouldn't point to the function, but into the ++-- jump table. ++-- ++-- Fun fact: The LLVMMangler exists to patch this issue on the LLVM side as ++-- well. ++pprLabelType' :: (IsLine doc) => Platform -> CLabel -> doc ++pprLabelType' platform lbl = ++ if isCFunctionLabel lbl || functionOkInfoTable ++ then text "@function" ++ else text "@object" ++ where ++ functionOkInfoTable = ++ platformTablesNextToCode platform ++ && isInfoTableLabel lbl ++ && not (isCmmInfoTableLabel lbl) ++ && not (isConInfoTableLabel lbl) ++ ++-- this is called pprTypeAndSizeDecl in PPC.Ppr ++pprTypeDecl :: (IsDoc doc) => Platform -> CLabel -> doc ++pprTypeDecl platform lbl = ++ if osElfTarget (platformOS platform) && externallyVisibleCLabel lbl ++ then line (text ".type " <> pprAsmLabel platform lbl <> text ", " <> pprLabelType' platform lbl) ++ else empty ++ ++pprDataItem :: (IsDoc doc) => NCGConfig -> CmmLit -> doc ++pprDataItem config lit = ++ lines_ (ppr_item (cmmTypeFormat $ cmmLitType platform lit) lit) ++ where ++ platform = ncgPlatform config ++ ++ imm = litToImm lit ++ ++ ppr_item II8 _ = [text "\t.byte\t" <> pprDataImm platform imm] ++ ppr_item II16 _ = [text "\t.short\t" <> pprDataImm platform imm] ++ ppr_item II32 _ = [text "\t.long\t" <> pprDataImm platform imm] ++ ppr_item II64 _ = [text "\t.quad\t" <> pprDataImm platform imm] ++ ppr_item FF32 (CmmFloat r _) = ++ let bs = floatToBytes (fromRational r) ++ in map (\b -> text "\t.byte\t" <> int (fromIntegral b)) bs ++ ppr_item FF64 (CmmFloat r _) = ++ let bs = doubleToBytes (fromRational r) ++ in map (\b -> text "\t.byte\t" <> int (fromIntegral b)) bs ++ ppr_item _ _ = pprPanic "pprDataItem:ppr_item" (text $ show lit) ++ ++-- | Pretty print an immediate value in the @data@ section ++-- ++-- This does not include any checks. We rely on the Assembler to check for ++-- errors. Use `pprOpImm` for immediates in instructions (operands.) ++pprDataImm :: (IsLine doc) => Platform -> Imm -> doc ++pprDataImm _ (ImmInt i) = int i ++pprDataImm _ (ImmInteger i) = integer i ++pprDataImm p (ImmCLbl l) = pprAsmLabel p l ++pprDataImm p (ImmIndex l i) = pprAsmLabel p l <> char '+' <> int i ++pprDataImm _ (ImmLit s) = ftext s ++pprDataImm _ (ImmFloat f) = float (fromRational f) ++pprDataImm _ (ImmDouble d) = double (fromRational d) ++pprDataImm p (ImmConstantSum a b) = pprDataImm p a <> char '+' <> pprDataImm p b ++pprDataImm p (ImmConstantDiff a b) = ++ pprDataImm p a ++ <> char '-' ++ <> lparen ++ <> pprDataImm p b ++ <> rparen ++ ++-- | Comment @c@ with @# c@ ++asmComment :: SDoc -> SDoc ++asmComment c = text "#" <+> c ++ ++-- | Commen @c@ with @// c@ ++asmDoubleslashComment :: SDoc -> SDoc ++asmDoubleslashComment c = text "//" <+> c ++ ++-- | Comment @c@ with @/* c */@ (multiline comment) ++asmMultilineComment :: SDoc -> SDoc ++asmMultilineComment c = text "/*" $+$ c $+$ text "*/" ++ ++-- | Pretty print an immediate operand of an instruction ++-- ++-- The kinds of immediates we can use here is pretty limited: RISCV doesn't ++-- support index expressions (as e.g. Aarch64 does.) Floating points need to ++-- fit in range. As we don't need them, forbit them to save us from future ++-- troubles. ++pprOpImm :: (IsLine doc) => Platform -> Imm -> doc ++pprOpImm platform im = case im of ++ ImmInt i -> int i ++ ImmInteger i -> integer i ++ ImmCLbl l -> char '=' <> pprAsmLabel platform l ++ _ -> pprPanic "RV64.Ppr.pprOpImm" (text "Unsupported immediate for instruction operands" <> colon <+> (text . show) im) ++ ++-- | Negate integer immediate operand ++-- ++-- This function is partial and will panic if the operand is not an integer. ++negOp :: Operand -> Operand ++negOp (OpImm (ImmInt i)) = OpImm (ImmInt (negate i)) ++negOp (OpImm (ImmInteger i)) = OpImm (ImmInteger (negate i)) ++negOp op = pprPanic "RV64.negOp" (text $ show op) ++ ++-- | Pretty print an operand ++pprOp :: (IsLine doc) => Platform -> Operand -> doc ++pprOp plat op = case op of ++ OpReg w r -> pprReg w r ++ OpImm im -> pprOpImm plat im ++ OpAddr (AddrRegImm r1 im) -> pprOpImm plat im <> char '(' <> pprReg W64 r1 <> char ')' ++ OpAddr (AddrReg r1) -> text "0(" <+> pprReg W64 r1 <+> char ')' ++ ++-- | Pretty print register with calling convention name ++-- ++-- This representation makes it easier to reason about the emitted assembly ++-- code. ++pprReg :: forall doc. (IsLine doc) => Width -> Reg -> doc ++pprReg w r = case r of ++ RegReal (RealRegSingle i) -> ppr_reg_no i ++ -- virtual regs should not show up, but this is helpful for debugging. ++ RegVirtual (VirtualRegI u) -> text "%vI_" <> pprUniqueAlways u ++ RegVirtual (VirtualRegF u) -> text "%vF_" <> pprUniqueAlways u ++ RegVirtual (VirtualRegD u) -> text "%vD_" <> pprUniqueAlways u ++ _ -> pprPanic "RiscV64.pprReg" (text (show r) <+> ppr w) ++ where ++ ppr_reg_no :: Int -> doc ++ -- General Purpose Registers ++ ppr_reg_no 0 = text "zero" ++ ppr_reg_no 1 = text "ra" ++ ppr_reg_no 2 = text "sp" ++ ppr_reg_no 3 = text "gp" ++ ppr_reg_no 4 = text "tp" ++ ppr_reg_no 5 = text "t0" ++ ppr_reg_no 6 = text "t1" ++ ppr_reg_no 7 = text "t2" ++ ppr_reg_no 8 = text "s0" ++ ppr_reg_no 9 = text "s1" ++ ppr_reg_no 10 = text "a0" ++ ppr_reg_no 11 = text "a1" ++ ppr_reg_no 12 = text "a2" ++ ppr_reg_no 13 = text "a3" ++ ppr_reg_no 14 = text "a4" ++ ppr_reg_no 15 = text "a5" ++ ppr_reg_no 16 = text "a6" ++ ppr_reg_no 17 = text "a7" ++ ppr_reg_no 18 = text "s2" ++ ppr_reg_no 19 = text "s3" ++ ppr_reg_no 20 = text "s4" ++ ppr_reg_no 21 = text "s5" ++ ppr_reg_no 22 = text "s6" ++ ppr_reg_no 23 = text "s7" ++ ppr_reg_no 24 = text "s8" ++ ppr_reg_no 25 = text "s9" ++ ppr_reg_no 26 = text "s10" ++ ppr_reg_no 27 = text "s11" ++ ppr_reg_no 28 = text "t3" ++ ppr_reg_no 29 = text "t4" ++ ppr_reg_no 30 = text "t5" ++ ppr_reg_no 31 = text "t6" ++ -- Floating Point Registers ++ ppr_reg_no 32 = text "ft0" ++ ppr_reg_no 33 = text "ft1" ++ ppr_reg_no 34 = text "ft2" ++ ppr_reg_no 35 = text "ft3" ++ ppr_reg_no 36 = text "ft4" ++ ppr_reg_no 37 = text "ft5" ++ ppr_reg_no 38 = text "ft6" ++ ppr_reg_no 39 = text "ft7" ++ ppr_reg_no 40 = text "fs0" ++ ppr_reg_no 41 = text "fs1" ++ ppr_reg_no 42 = text "fa0" ++ ppr_reg_no 43 = text "fa1" ++ ppr_reg_no 44 = text "fa2" ++ ppr_reg_no 45 = text "fa3" ++ ppr_reg_no 46 = text "fa4" ++ ppr_reg_no 47 = text "fa5" ++ ppr_reg_no 48 = text "fa6" ++ ppr_reg_no 49 = text "fa7" ++ ppr_reg_no 50 = text "fs2" ++ ppr_reg_no 51 = text "fs3" ++ ppr_reg_no 52 = text "fs4" ++ ppr_reg_no 53 = text "fs5" ++ ppr_reg_no 54 = text "fs6" ++ ppr_reg_no 55 = text "fs7" ++ ppr_reg_no 56 = text "fs8" ++ ppr_reg_no 57 = text "fs9" ++ ppr_reg_no 58 = text "fs10" ++ ppr_reg_no 59 = text "fs11" ++ ppr_reg_no 60 = text "ft8" ++ ppr_reg_no 61 = text "ft9" ++ ppr_reg_no 62 = text "ft10" ++ ppr_reg_no 63 = text "ft11" ++ ppr_reg_no i ++ | i < 0 = pprPanic "Unexpected register number (min is 0)" (ppr w <+> int i) ++ | i > 63 = pprPanic "Unexpected register number (max is 63)" (ppr w <+> int i) ++ -- no support for widths > W64. ++ | otherwise = pprPanic "Unsupported width in register (max is 64)" (ppr w <+> int i) ++ ++-- | Single precission `Operand` (floating-point) ++isSingleOp :: Operand -> Bool ++isSingleOp (OpReg W32 _) = True ++isSingleOp _ = False ++ ++-- | Double precission `Operand` (floating-point) ++isDoubleOp :: Operand -> Bool ++isDoubleOp (OpReg W64 _) = True ++isDoubleOp _ = False ++ ++-- | `Operand` is an immediate value ++isImmOp :: Operand -> Bool ++isImmOp (OpImm _) = True ++isImmOp _ = False ++ ++-- | `Operand` is an immediate @0@ value ++isImmZero :: Operand -> Bool ++isImmZero (OpImm (ImmFloat 0)) = True ++isImmZero (OpImm (ImmDouble 0)) = True ++isImmZero (OpImm (ImmInt 0)) = True ++isImmZero _ = False ++ ++-- | `Target` represents a label ++isLabel :: Target -> Bool ++isLabel (TBlock _) = True ++isLabel _ = False ++ ++-- | Get the pretty-printed label from a `Target` ++-- ++-- This function is partial and will panic if the `Target` is not a label. ++getLabel :: (IsLine doc) => Platform -> Target -> doc ++getLabel platform (TBlock bid) = pprBlockId platform bid ++ where ++ pprBlockId :: (IsLine doc) => Platform -> BlockId -> doc ++ pprBlockId platform bid = pprAsmLabel platform (mkLocalBlockLabel (getUnique bid)) ++getLabel _platform _other = panic "Cannot turn this into a label" ++ ++-- | Pretty-print an `Instr` ++-- ++-- This function is partial and will panic if the `Instr` is not supported. This ++-- can happen due to invalid operands or unexpected meta instructions. ++pprInstr :: (IsDoc doc) => Platform -> Instr -> doc ++pprInstr platform instr = case instr of ++ -- see Note [dualLine and dualDoc] in GHC.Utils.Outputable ++ COMMENT s -> dualDoc (asmComment s) empty ++ MULTILINE_COMMENT s -> dualDoc (asmMultilineComment s) empty ++ ANN d i -> dualDoc (pprInstr platform i <+> asmDoubleslashComment d) (pprInstr platform i) ++ LOCATION file line' col _name -> ++ line (text "\t.loc" <+> int file <+> int line' <+> int col) ++ DELTA d -> dualDoc (asmComment $ text "\tdelta = " <> int d) empty ++ NEWBLOCK _ -> panic "PprInstr: NEWBLOCK" ++ LDATA _ _ -> panic "pprInstr: LDATA" ++ PUSH_STACK_FRAME -> ++ lines_ ++ [ text "\taddi sp, sp, -16", ++ text "\tsd x1, 8(sp)", -- store RA ++ text "\tsd x8, 0(sp)", -- store FP/s0 ++ text "\taddi x8, sp, 16" ++ ] ++ POP_STACK_FRAME -> ++ lines_ ++ [ text "\tld x8, 0(sp)", -- restore FP/s0 ++ text "\tld x1, 8(sp)", -- restore RA ++ text "\taddi sp, sp, 16" ++ ] ++ ADD o1 o2 o3 ++ | isFloatOp o1 && isFloatOp o2 && isFloatOp o3 -> op3 (text "\tfadd." <> if isSingleOp o1 then text "s" else text "d") o1 o2 o3 ++ -- This case is used for sign extension: SEXT.W op ++ | OpReg W64 _ <- o1, OpReg W32 _ <- o2, isImmOp o3 -> op3 (text "\taddiw") o1 o2 o3 ++ | otherwise -> op3 (text "\tadd") o1 o2 o3 ++ MUL o1 o2 o3 ++ | isFloatOp o1 && isFloatOp o2 && isFloatOp o3 -> op3 (text "\tfmul." <> if isSingleOp o1 then text "s" else text "d") o1 o2 o3 ++ | otherwise -> op3 (text "\tmul") o1 o2 o3 ++ MULH o1 o2 o3 -> op3 (text "\tmulh") o1 o2 o3 ++ NEG o1 o2 | isFloatOp o1 && isFloatOp o2 && isSingleOp o2 -> op2 (text "\tfneg.s") o1 o2 ++ NEG o1 o2 | isFloatOp o1 && isFloatOp o2 && isDoubleOp o2 -> op2 (text "\tfneg.d") o1 o2 ++ NEG o1 o2 -> op2 (text "\tneg") o1 o2 ++ DIV o1 o2 o3 ++ | isFloatOp o1 && isFloatOp o2 && isFloatOp o3 -> ++ -- TODO: This must (likely) be refined regarding width ++ op3 (text "\tfdiv." <> if isSingleOp o1 then text "s" else text "d") o1 o2 o3 ++ DIV o1 o2 o3 -> op3 (text "\tdiv") o1 o2 o3 ++ REM o1 o2 o3 ++ | isFloatOp o1 || isFloatOp o2 || isFloatOp o3 -> ++ panic "pprInstr - REM not implemented for floats (yet)" ++ REM o1 o2 o3 -> op3 (text "\trem") o1 o2 o3 ++ REMU o1 o2 o3 -> op3 (text "\tremu") o1 o2 o3 ++ SUB o1 o2 o3 ++ | isFloatOp o1 && isFloatOp o2 && isFloatOp o3 -> op3 (text "\tfsub." <> if isSingleOp o1 then text "s" else text "d") o1 o2 o3 ++ | isImmOp o3 -> op3 (text "\taddi") o1 o2 (negOp o3) ++ | otherwise -> op3 (text "\tsub") o1 o2 o3 ++ DIVU o1 o2 o3 -> op3 (text "\tdivu") o1 o2 o3 ++ AND o1 o2 o3 ++ | isImmOp o3 -> op3 (text "\tandi") o1 o2 o3 ++ | otherwise -> op3 (text "\tand") o1 o2 o3 ++ OR o1 o2 o3 -> op3 (text "\tor") o1 o2 o3 ++ SRA o1 o2 o3 | isImmOp o3 -> op3 (text "\tsrai") o1 o2 o3 ++ SRA o1 o2 o3 -> op3 (text "\tsra") o1 o2 o3 ++ XOR o1 o2 o3 -> op3 (text "\txor") o1 o2 o3 ++ SLL o1 o2 o3 -> op3 (text "\tsll") o1 o2 o3 ++ SRL o1 o2 o3 -> op3 (text "\tsrl") o1 o2 o3 ++ MOV o1 o2 ++ | isFloatOp o1 && isFloatOp o2 && isDoubleOp o2 -> op2 (text "\tfmv.d") o1 o2 -- fmv.d rd, rs is pseudo op fsgnj.d rd, rs, rs ++ | isFloatOp o1 && isFloatOp o2 && isSingleOp o2 -> op2 (text "\tfmv.s") o1 o2 -- fmv.s rd, rs is pseudo op fsgnj.s rd, rs, rs ++ | isFloatOp o1 && isImmZero o2 && isDoubleOp o1 -> op2 (text "\tfcvt.d.w") o1 zero ++ | isFloatOp o1 && isImmZero o2 && isSingleOp o1 -> op2 (text "\tfcvt.s.w") o1 zero ++ | isFloatOp o1 && not (isFloatOp o2) && isSingleOp o1 -> op2 (text "\tfmv.w.x") o1 o2 ++ | isFloatOp o1 && not (isFloatOp o2) && isDoubleOp o1 -> op2 (text "\tfmv.d.x") o1 o2 ++ | not (isFloatOp o1) && isFloatOp o2 && isSingleOp o2 -> op2 (text "\tfmv.x.w") o1 o2 ++ | not (isFloatOp o1) && isFloatOp o2 && isDoubleOp o2 -> op2 (text "\tfmv.x.d") o1 o2 ++ | (OpImm (ImmInteger i)) <- o2, ++ fitsIn12bitImm i -> ++ lines_ [text "\taddi" <+> pprOp platform o1 <> comma <+> pprOp platform x0 <> comma <+> pprOp platform o2] ++ | (OpImm (ImmInt i)) <- o2, ++ fitsIn12bitImm i -> ++ lines_ [text "\taddi" <+> pprOp platform o1 <> comma <+> pprOp platform x0 <> comma <+> pprOp platform o2] ++ | (OpImm (ImmInteger i)) <- o2, ++ fitsIn32bits i -> ++ lines_ ++ [ text "\tlui" <+> pprOp platform o1 <> comma <+> text "%hi(" <> pprOp platform o2 <> text ")", ++ text "\taddw" <+> pprOp platform o1 <> comma <+> pprOp platform o1 <> comma <+> text "%lo(" <> pprOp platform o2 <> text ")" ++ ] ++ | (OpImm (ImmInt i)) <- o2, ++ fitsIn32bits i -> ++ lines_ ++ [ text "\tlui" <+> pprOp platform o1 <> comma <+> text "%hi(" <> pprOp platform o2 <> text ")", ++ text "\taddw" <+> pprOp platform o1 <> comma <+> pprOp platform o1 <> comma <+> text "%lo(" <> pprOp platform o2 <> text ")" ++ ] ++ | isImmOp o2 -> ++ -- Surrender! Let the assembler figure out the right expressions with pseudo-op LI. ++ lines_ [text "\tli" <+> pprOp platform o1 <> comma <+> pprOp platform o2] ++ | otherwise -> op3 (text "\taddi") o1 o2 (OpImm (ImmInt 0)) ++ ORI o1 o2 o3 -> op3 (text "\tori") o1 o2 o3 ++ XORI o1 o2 o3 -> op3 (text "\txori") o1 o2 o3 ++ J o1 -> pprInstr platform (B o1) ++ J_TBL _ _ r -> pprInstr platform (B (TReg r)) ++ B l | isLabel l -> line $ text "\tjal" <+> pprOp platform x0 <> comma <+> getLabel platform l ++ B (TReg r) -> line $ text "\tjalr" <+> pprOp platform x0 <> comma <+> pprReg W64 r <> comma <+> text "0" ++ BL r _ -> line $ text "\tjalr" <+> text "x1" <> comma <+> pprReg W64 r <> comma <+> text "0" ++ BCOND c l r t ++ | isLabel t -> ++ line $ text "\t" <> pprBcond c <+> pprOp platform l <> comma <+> pprOp platform r <> comma <+> getLabel platform t ++ BCOND _ _ _ (TReg _) -> panic "RV64.ppr: No conditional branching to registers!" ++ CSET o l r c -> case c of ++ EQ ++ | isIntOp l && isIntOp r -> ++ lines_ ++ [ subFor l r, ++ text "\tseqz" <+> pprOp platform o <> comma <+> pprOp platform o ++ ] ++ EQ | isFloatOp l && isFloatOp r -> line $ binOp ("\tfeq." ++ floatOpPrecision platform l r) ++ NE ++ | isIntOp l && isIntOp r -> ++ lines_ ++ [ subFor l r, ++ text "\tsnez" <+> pprOp platform o <> comma <+> pprOp platform o ++ ] ++ NE ++ | isFloatOp l && isFloatOp r -> ++ lines_ ++ [ binOp ("\tfeq." ++ floatOpPrecision platform l r), ++ text "\txori" <+> pprOp platform o <> comma <+> pprOp platform o <> comma <+> text "1" ++ ] ++ SLT -> lines_ [sltFor l r <+> pprOp platform o <> comma <+> pprOp platform l <> comma <+> pprOp platform r] ++ SLE -> ++ lines_ ++ [ sltFor l r <+> pprOp platform o <> comma <+> pprOp platform r <> comma <+> pprOp platform l, ++ text "\txori" <+> pprOp platform o <> comma <+> pprOp platform o <> comma <+> text "1" ++ ] ++ SGE -> ++ lines_ ++ [ sltFor l r <+> pprOp platform o <> comma <+> pprOp platform l <> comma <+> pprOp platform r, ++ text "\txori" <+> pprOp platform o <> comma <+> pprOp platform o <> comma <+> text "1" ++ ] ++ SGT -> lines_ [sltFor l r <+> pprOp platform o <> comma <+> pprOp platform r <> comma <+> pprOp platform l] ++ ULT -> lines_ [sltuFor l r <+> pprOp platform o <> comma <+> pprOp platform l <> comma <+> pprOp platform r] ++ ULE -> ++ lines_ ++ [ sltuFor l r <+> pprOp platform o <> comma <+> pprOp platform r <> comma <+> pprOp platform l, ++ text "\txori" <+> pprOp platform o <> comma <+> pprOp platform o <> comma <+> text "1" ++ ] ++ UGE -> ++ lines_ ++ [ sltuFor l r <+> pprOp platform o <> comma <+> pprOp platform l <> comma <+> pprOp platform r, ++ text "\txori" <+> pprOp platform o <> comma <+> pprOp platform o <> comma <+> text "1" ++ ] ++ UGT -> lines_ [sltuFor l r <+> pprOp platform o <> comma <+> pprOp platform r <> comma <+> pprOp platform l] ++ FLT | isFloatOp l && isFloatOp r -> line $ binOp ("\tflt." ++ floatOpPrecision platform l r) ++ FLE | isFloatOp l && isFloatOp r -> line $ binOp ("\tfle." ++ floatOpPrecision platform l r) ++ FGT | isFloatOp l && isFloatOp r -> line $ binOp ("\tfgt." ++ floatOpPrecision platform l r) ++ FGE | isFloatOp l && isFloatOp r -> line $ binOp ("\tfge." ++ floatOpPrecision platform l r) ++ x -> pprPanic "RV64.ppr: unhandled CSET conditional" (text (show x) <+> pprOp platform o <> comma <+> pprOp platform r <> comma <+> pprOp platform l) ++ where ++ subFor l r ++ | (OpImm _) <- r = text "\taddi" <+> pprOp platform o <> comma <+> pprOp platform l <> comma <+> pprOp platform (negOp r) ++ | (OpImm _) <- l = panic "RV64.ppr: Cannot SUB IMM _" ++ | otherwise = text "\tsub" <+> pprOp platform o <> comma <+> pprOp platform l <> comma <+> pprOp platform r ++ sltFor l r ++ | (OpImm _) <- r = text "\tslti" ++ | (OpImm _) <- l = panic "PV64.ppr: Cannot SLT IMM _" ++ | otherwise = text "\tslt" ++ sltuFor l r ++ | (OpImm _) <- r = text "\tsltui" ++ | (OpImm _) <- l = panic "PV64.ppr: Cannot SLTU IMM _" ++ | otherwise = text "\tsltu" ++ binOp :: (IsLine doc) => String -> doc ++ binOp op = text op <+> pprOp platform o <> comma <+> pprOp platform l <> comma <+> pprOp platform r ++ STR II8 o1 o2 -> op2 (text "\tsb") o1 o2 ++ STR II16 o1 o2 -> op2 (text "\tsh") o1 o2 ++ STR II32 o1 o2 -> op2 (text "\tsw") o1 o2 ++ STR II64 o1 o2 -> op2 (text "\tsd") o1 o2 ++ STR FF32 o1 o2 -> op2 (text "\tfsw") o1 o2 ++ STR FF64 o1 o2 -> op2 (text "\tfsd") o1 o2 ++ LDR _f o1 (OpImm (ImmIndex lbl off)) -> ++ lines_ ++ [ text "\tla" <+> pprOp platform o1 <> comma <+> pprAsmLabel platform lbl, ++ text "\taddi" <+> pprOp platform o1 <> comma <+> pprOp platform o1 <> comma <+> int off ++ ] ++ LDR _f o1 (OpImm (ImmCLbl lbl)) -> ++ line $ text "\tla" <+> pprOp platform o1 <> comma <+> pprAsmLabel platform lbl ++ LDR II8 o1 o2 -> op2 (text "\tlb") o1 o2 ++ LDR II16 o1 o2 -> op2 (text "\tlh") o1 o2 ++ LDR II32 o1 o2 -> op2 (text "\tlw") o1 o2 ++ LDR II64 o1 o2 -> op2 (text "\tld") o1 o2 ++ LDR FF32 o1 o2 -> op2 (text "\tflw") o1 o2 ++ LDR FF64 o1 o2 -> op2 (text "\tfld") o1 o2 ++ LDRU II8 o1 o2 -> op2 (text "\tlbu") o1 o2 ++ LDRU II16 o1 o2 -> op2 (text "\tlhu") o1 o2 ++ LDRU II32 o1 o2 -> op2 (text "\tlwu") o1 o2 ++ -- double words (64bit) cannot be sign extended by definition ++ LDRU II64 o1 o2 -> op2 (text "\tld") o1 o2 ++ LDRU FF32 o1 o2@(OpAddr (AddrReg _)) -> op2 (text "\tflw") o1 o2 ++ LDRU FF32 o1 o2@(OpAddr (AddrRegImm _ _)) -> op2 (text "\tflw") o1 o2 ++ LDRU FF64 o1 o2@(OpAddr (AddrReg _)) -> op2 (text "\tfld") o1 o2 ++ LDRU FF64 o1 o2@(OpAddr (AddrRegImm _ _)) -> op2 (text "\tfld") o1 o2 ++ LDRU f o1 o2 -> pprPanic "Unsupported unsigned load" ((text . show) f <+> pprOp platform o1 <+> pprOp platform o2) ++ FENCE r w -> line $ text "\tfence" <+> pprFenceType r <> char ',' <+> pprFenceType w ++ FCVT FloatToFloat o1@(OpReg W32 _) o2@(OpReg W64 _) -> op2 (text "\tfcvt.s.d") o1 o2 ++ FCVT FloatToFloat o1@(OpReg W64 _) o2@(OpReg W32 _) -> op2 (text "\tfcvt.d.s") o1 o2 ++ FCVT FloatToFloat o1 o2 -> ++ pprPanic "RV64.pprInstr - impossible float to float conversion" ++ $ line (pprOp platform o1 <> text "->" <> pprOp platform o2) ++ FCVT IntToFloat o1@(OpReg W32 _) o2@(OpReg W32 _) -> op2 (text "\tfcvt.s.w") o1 o2 ++ FCVT IntToFloat o1@(OpReg W32 _) o2@(OpReg W64 _) -> op2 (text "\tfcvt.s.l") o1 o2 ++ FCVT IntToFloat o1@(OpReg W64 _) o2@(OpReg W32 _) -> op2 (text "\tfcvt.d.w") o1 o2 ++ FCVT IntToFloat o1@(OpReg W64 _) o2@(OpReg W64 _) -> op2 (text "\tfcvt.d.l") o1 o2 ++ FCVT IntToFloat o1 o2 -> ++ pprPanic "RV64.pprInstr - impossible integer to float conversion" ++ $ line (pprOp platform o1 <> text "->" <> pprOp platform o2) ++ FCVT FloatToInt o1@(OpReg W32 _) o2@(OpReg W32 _) -> op2 (text "\tfcvt.w.s") o1 o2 ++ FCVT FloatToInt o1@(OpReg W32 _) o2@(OpReg W64 _) -> op2 (text "\tfcvt.w.d") o1 o2 ++ FCVT FloatToInt o1@(OpReg W64 _) o2@(OpReg W32 _) -> op2 (text "\tfcvt.l.s") o1 o2 ++ FCVT FloatToInt o1@(OpReg W64 _) o2@(OpReg W64 _) -> op2 (text "\tfcvt.l.d") o1 o2 ++ FCVT FloatToInt o1 o2 -> ++ pprPanic "RV64.pprInstr - impossible float to integer conversion" ++ $ line (pprOp platform o1 <> text "->" <> pprOp platform o2) ++ FABS o1 o2 | isSingleOp o2 -> op2 (text "\tfabs.s") o1 o2 ++ FABS o1 o2 | isDoubleOp o2 -> op2 (text "\tfabs.d") o1 o2 ++ FMA variant d r1 r2 r3 -> ++ let fma = case variant of ++ FMAdd -> text "\tfmadd" <> dot <> floatPrecission d ++ FMSub -> text "\tfmsub" <> dot <> floatPrecission d ++ FNMAdd -> text "\tfnmadd" <> dot <> floatPrecission d ++ FNMSub -> text "\tfnmsub" <> dot <> floatPrecission d ++ in op4 fma d r1 r2 r3 ++ instr -> panic $ "RV64.pprInstr - Unknown instruction: " ++ instrCon instr ++ where ++ op2 op o1 o2 = line $ op <+> pprOp platform o1 <> comma <+> pprOp platform o2 ++ op3 op o1 o2 o3 = line $ op <+> pprOp platform o1 <> comma <+> pprOp platform o2 <> comma <+> pprOp platform o3 ++ op4 op o1 o2 o3 o4 = line $ op <+> pprOp platform o1 <> comma <+> pprOp platform o2 <> comma <+> pprOp platform o3 <> comma <+> pprOp platform o4 ++ pprFenceType FenceRead = text "r" ++ pprFenceType FenceWrite = text "w" ++ pprFenceType FenceReadWrite = text "rw" ++ floatPrecission o ++ | isSingleOp o = text "s" ++ | isDoubleOp o = text "d" ++ | otherwise = pprPanic "Impossible floating point precission: " (pprOp platform o) ++ ++floatOpPrecision :: Platform -> Operand -> Operand -> String ++floatOpPrecision _p l r | isFloatOp l && isFloatOp r && isSingleOp l && isSingleOp r = "s" -- single precision ++floatOpPrecision _p l r | isFloatOp l && isFloatOp r && isDoubleOp l && isDoubleOp r = "d" -- double precision ++floatOpPrecision p l r = pprPanic "Cannot determine floating point precission" (text "op1" <+> pprOp p l <+> text "op2" <+> pprOp p r) ++ ++-- | Pretty print a conditional branch ++-- ++-- This function is partial and will panic if the conditional is not supported; ++-- i.e. if its floating point related. ++pprBcond :: (IsLine doc) => Cond -> doc ++pprBcond c = text "b" <> pprCond c ++ where ++ pprCond :: (IsLine doc) => Cond -> doc ++ pprCond c = case c of ++ EQ -> text "eq" ++ NE -> text "ne" ++ SLT -> text "lt" ++ SLE -> text "le" ++ SGE -> text "ge" ++ SGT -> text "gt" ++ ULT -> text "ltu" ++ ULE -> text "leu" ++ UGE -> text "geu" ++ UGT -> text "gtu" ++ -- BCOND cannot handle floating point comparisons / registers ++ _ -> panic $ "RV64.ppr: unhandled BCOND conditional: " ++ show c +Index: ghc-9.10.2/compiler/GHC/CmmToAsm/RV64/RegInfo.hs +=================================================================== +--- /dev/null ++++ ghc-9.10.2/compiler/GHC/CmmToAsm/RV64/RegInfo.hs +@@ -0,0 +1,41 @@ ++-- | Minimum viable implementation of jump short-cutting: No short-cutting. ++-- ++-- The functions here simply implement the no-short-cutting case. Implementing ++-- the real behaviour would be a great optimization in future. ++module GHC.CmmToAsm.RV64.RegInfo ++ ( getJumpDestBlockId, ++ canShortcut, ++ shortcutStatics, ++ shortcutJump, ++ JumpDest (..), ++ ) ++where ++ ++import GHC.Cmm ++import GHC.Cmm.BlockId ++import GHC.CmmToAsm.RV64.Instr ++import GHC.Prelude ++import GHC.Utils.Outputable ++ ++newtype JumpDest = DestBlockId BlockId ++ ++instance Outputable JumpDest where ++ ppr (DestBlockId bid) = text "jd<blk>:" <> ppr bid ++ ++-- | Extract BlockId ++-- ++-- Never `Nothing` for Riscv64 NCG. ++getJumpDestBlockId :: JumpDest -> Maybe BlockId ++getJumpDestBlockId (DestBlockId bid) = Just bid ++ ++-- No `Instr`s can bet shortcut (for now) ++canShortcut :: Instr -> Maybe JumpDest ++canShortcut _ = Nothing ++ ++-- Identity of the provided `RawCmmStatics` ++shortcutStatics :: (BlockId -> Maybe JumpDest) -> RawCmmStatics -> RawCmmStatics ++shortcutStatics _ other_static = other_static ++ ++-- Identity of the provided `Instr` ++shortcutJump :: (BlockId -> Maybe JumpDest) -> Instr -> Instr ++shortcutJump _ other = other +Index: ghc-9.10.2/compiler/GHC/CmmToAsm/RV64/Regs.hs +=================================================================== +--- /dev/null ++++ ghc-9.10.2/compiler/GHC/CmmToAsm/RV64/Regs.hs +@@ -0,0 +1,230 @@ ++module GHC.CmmToAsm.RV64.Regs where ++ ++import GHC.Cmm ++import GHC.Cmm.CLabel (CLabel) ++import GHC.CmmToAsm.Format ++import GHC.Data.FastString ++import GHC.Platform ++import GHC.Platform.Reg ++import GHC.Platform.Reg.Class ++import GHC.Platform.Regs ++import GHC.Prelude ++import GHC.Types.Unique ++import GHC.Utils.Outputable ++import GHC.Utils.Panic ++ ++-- * Registers ++ ++-- | First integer register number. @zero@ register. ++x0RegNo :: RegNo ++x0RegNo = 0 ++ ++-- | return address register ++x1RegNo, raRegNo :: RegNo ++x1RegNo = 1 ++raRegNo = x1RegNo ++ ++x5RegNo, t0RegNo :: RegNo ++x5RegNo = 5 ++t0RegNo = x5RegNo ++ ++x7RegNo, t2RegNo :: RegNo ++x7RegNo = 7 ++t2RegNo = x7RegNo ++ ++x28RegNo, t3RegNo :: RegNo ++x28RegNo = 28 ++t3RegNo = x28RegNo ++ ++-- | Last integer register number. Used as TMP (IP) register. ++x31RegNo, t6RegNo, tmpRegNo :: RegNo ++x31RegNo = 31 ++t6RegNo = x31RegNo ++tmpRegNo = x31RegNo ++ ++-- | First floating point register. ++d0RegNo, ft0RegNo :: RegNo ++d0RegNo = 32 ++ft0RegNo = d0RegNo ++ ++d7RegNo, ft7RegNo :: RegNo ++d7RegNo = 39 ++ft7RegNo = d7RegNo ++ ++-- | Last floating point register. ++d31RegNo :: RegNo ++d31RegNo = 63 ++ ++a0RegNo, x10RegNo :: RegNo ++x10RegNo = 10 ++a0RegNo = x10RegNo ++ ++a7RegNo, x17RegNo :: RegNo ++x17RegNo = 17 ++a7RegNo = x17RegNo ++ ++fa0RegNo, d10RegNo :: RegNo ++d10RegNo = 42 ++fa0RegNo = d10RegNo ++ ++fa7RegNo, d17RegNo :: RegNo ++d17RegNo = 49 ++fa7RegNo = d17RegNo ++ ++-- Note [The made-up RISCV64 TMP (IP) register] ++-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ++-- ++-- RISCV64 has no inter-procedural register in its ABI. However, we need one to ++-- make register spills/loads to/from high number slots. I.e. slot numbers that ++-- do not fit in a 12bit integer which is used as immediate in the arithmetic ++-- operations. Thus, we're marking one additional register (x31) as permanently ++-- non-free and call it TMP. ++-- ++-- TMP can be used as temporary register in all operations. Just be aware that ++-- it may be clobbered as soon as you loose direct control over it (i.e. using ++-- TMP by-passes the register allocation/spilling mechanisms.) It should be fine ++-- to use it as temporary register in a MachOp translation as long as you don't ++-- rely on its value beyond this limited scope. ++-- ++-- X31 is a caller-saved register. I.e. there are no guarantees about what the ++-- callee does with it. That's exactly what we want here. ++ ++zeroReg, raReg, spMachReg, tmpReg :: Reg ++zeroReg = regSingle x0RegNo ++raReg = regSingle 1 ++ ++-- | Not to be confused with the `CmmReg` `spReg` ++spMachReg = regSingle 2 ++ ++tmpReg = regSingle tmpRegNo ++ ++-- | All machine register numbers. ++allMachRegNos :: [RegNo] ++allMachRegNos = intRegs ++ fpRegs ++ where ++ intRegs = [x0RegNo .. x31RegNo] ++ fpRegs = [d0RegNo .. d31RegNo] ++ ++-- | Registers available to the register allocator. ++-- ++-- These are all registers minus those with a fixed role in RISCV ABI (zero, lr, ++-- sp, gp, tp, fp, tmp) and GHC RTS (Base, Sp, Hp, HpLim, R1..R8, F1..F6, ++-- D1..D6.) ++allocatableRegs :: Platform -> [RealReg] ++allocatableRegs platform = ++ let isFree = freeReg platform ++ in map RealRegSingle $ filter isFree allMachRegNos ++ ++-- | Integer argument registers according to the calling convention ++allGpArgRegs :: [Reg] ++allGpArgRegs = map regSingle [a0RegNo .. a7RegNo] ++ ++-- | Floating point argument registers according to the calling convention ++allFpArgRegs :: [Reg] ++allFpArgRegs = map regSingle [fa0RegNo .. fa7RegNo] ++ ++-- * Addressing modes ++ ++-- | Addressing modes ++data AddrMode ++ = -- | A register plus some immediate integer, e.g. @8(sp)@ or @-16(sp)@. The ++ -- offset needs to fit into 12bits. ++ AddrRegImm Reg Imm ++ | -- | A register ++ AddrReg Reg ++ deriving (Eq, Show) ++ ++-- * Immediates ++ ++data Imm ++ = ImmInt Int ++ | ImmInteger Integer -- Sigh. ++ | ImmCLbl CLabel -- AbstractC Label (with baggage) ++ | ImmLit FastString ++ | ImmIndex CLabel Int ++ | ImmFloat Rational ++ | ImmDouble Rational ++ | ImmConstantSum Imm Imm ++ | ImmConstantDiff Imm Imm ++ deriving (Eq, Show) ++ ++-- | Map `CmmLit` to `Imm` ++-- ++-- N.B. this is a partial function, because not all `CmmLit`s have an immediate ++-- representation. ++litToImm :: CmmLit -> Imm ++litToImm (CmmInt i w) = ImmInteger (narrowS w i) ++-- narrow to the width: a CmmInt might be out of ++-- range, but we assume that ImmInteger only contains ++-- in-range values. A signed value should be fine here. ++litToImm (CmmFloat f W32) = ImmFloat f ++litToImm (CmmFloat f W64) = ImmDouble f ++litToImm (CmmLabel l) = ImmCLbl l ++litToImm (CmmLabelOff l off) = ImmIndex l off ++litToImm (CmmLabelDiffOff l1 l2 off _) = ++ ImmConstantSum ++ (ImmConstantDiff (ImmCLbl l1) (ImmCLbl l2)) ++ (ImmInt off) ++litToImm l = panic $ "RV64.Regs.litToImm: no match for " ++ show l ++ ++-- == To satisfy GHC.CmmToAsm.Reg.Target ======================================= ++ ++-- squeese functions for the graph allocator ----------------------------------- ++ ++-- | regSqueeze_class reg ++-- Calculate the maximum number of register colors that could be ++-- denied to a node of this class due to having this reg ++-- as a neighbour. ++{-# INLINE virtualRegSqueeze #-} ++virtualRegSqueeze :: RegClass -> VirtualReg -> Int ++virtualRegSqueeze cls vr = ++ case cls of ++ RcInteger -> ++ case vr of ++ VirtualRegI {} -> 1 ++ VirtualRegHi {} -> 1 ++ _other -> 0 ++ RcDouble -> ++ case vr of ++ VirtualRegD {} -> 1 ++ VirtualRegF {} -> 0 ++ _other -> 0 ++ _other -> 0 ++ ++{-# INLINE realRegSqueeze #-} ++realRegSqueeze :: RegClass -> RealReg -> Int ++realRegSqueeze cls rr = ++ case cls of ++ RcInteger -> ++ case rr of ++ RealRegSingle regNo ++ | regNo < d0RegNo -> 1 ++ | otherwise -> 0 ++ RcDouble -> ++ case rr of ++ RealRegSingle regNo ++ | regNo < d0RegNo -> 0 ++ | otherwise -> 1 ++ _other -> 0 ++ ++mkVirtualReg :: Unique -> Format -> VirtualReg ++mkVirtualReg u format ++ | not (isFloatFormat format) = VirtualRegI u ++ | otherwise = ++ case format of ++ FF32 -> VirtualRegD u ++ FF64 -> VirtualRegD u ++ _ -> panic "RV64.mkVirtualReg" ++ ++{-# INLINE classOfRealReg #-} ++classOfRealReg :: RealReg -> RegClass ++classOfRealReg (RealRegSingle i) ++ | i < d0RegNo = RcInteger ++ | otherwise = RcDouble ++ ++regDotColor :: RealReg -> SDoc ++regDotColor reg = ++ case classOfRealReg reg of ++ RcInteger -> text "blue" ++ RcFloat -> text "red" ++ RcDouble -> text "green" +Index: ghc-9.10.2/compiler/GHC/CmmToAsm/Reg/Graph/TrivColorable.hs +=================================================================== +--- ghc-9.10.2.orig/compiler/GHC/CmmToAsm/Reg/Graph/TrivColorable.hs ++++ ghc-9.10.2/compiler/GHC/CmmToAsm/Reg/Graph/TrivColorable.hs +@@ -119,7 +119,7 @@ trivColorable platform virtualRegSqueeze + ArchMipseb -> panic "trivColorable ArchMipseb" + ArchMipsel -> panic "trivColorable ArchMipsel" + ArchS390X -> panic "trivColorable ArchS390X" +- ArchRISCV64 -> panic "trivColorable ArchRISCV64" ++ ArchRISCV64 -> 14 + ArchLoongArch64->panic "trivColorable ArchLoongArch64" + ArchJavaScript-> panic "trivColorable ArchJavaScript" + ArchWasm32 -> panic "trivColorable ArchWasm32" +@@ -154,7 +154,7 @@ trivColorable platform virtualRegSqueeze + ArchMipseb -> panic "trivColorable ArchMipseb" + ArchMipsel -> panic "trivColorable ArchMipsel" + ArchS390X -> panic "trivColorable ArchS390X" +- ArchRISCV64 -> panic "trivColorable ArchRISCV64" ++ ArchRISCV64 -> 0 + ArchLoongArch64->panic "trivColorable ArchLoongArch64" + ArchJavaScript-> panic "trivColorable ArchJavaScript" + ArchWasm32 -> panic "trivColorable ArchWasm32" +@@ -189,7 +189,7 @@ trivColorable platform virtualRegSqueeze + ArchMipseb -> panic "trivColorable ArchMipseb" + ArchMipsel -> panic "trivColorable ArchMipsel" + ArchS390X -> panic "trivColorable ArchS390X" +- ArchRISCV64 -> panic "trivColorable ArchRISCV64" ++ ArchRISCV64 -> 20 + ArchLoongArch64->panic "trivColorable ArchLoongArch64" + ArchJavaScript-> panic "trivColorable ArchJavaScript" + ArchWasm32 -> panic "trivColorable ArchWasm32" +Index: ghc-9.10.2/compiler/GHC/CmmToAsm/Reg/Linear.hs +=================================================================== +--- ghc-9.10.2.orig/compiler/GHC/CmmToAsm/Reg/Linear.hs ++++ ghc-9.10.2/compiler/GHC/CmmToAsm/Reg/Linear.hs +@@ -112,6 +112,7 @@ import qualified GHC.CmmToAsm.Reg.Linear + import qualified GHC.CmmToAsm.Reg.Linear.X86 as X86 + import qualified GHC.CmmToAsm.Reg.Linear.X86_64 as X86_64 + import qualified GHC.CmmToAsm.Reg.Linear.AArch64 as AArch64 ++import qualified GHC.CmmToAsm.Reg.Linear.RV64 as RV64 + import GHC.CmmToAsm.Reg.Target + import GHC.CmmToAsm.Reg.Liveness + import GHC.CmmToAsm.Reg.Utils +@@ -221,7 +222,7 @@ linearRegAlloc config entry_ids block_li + ArchAlpha -> panic "linearRegAlloc ArchAlpha" + ArchMipseb -> panic "linearRegAlloc ArchMipseb" + ArchMipsel -> panic "linearRegAlloc ArchMipsel" +- ArchRISCV64 -> panic "linearRegAlloc ArchRISCV64" ++ ArchRISCV64 -> go (frInitFreeRegs platform :: RV64.FreeRegs) + ArchLoongArch64-> panic "linearRegAlloc ArchLoongArch64" + ArchJavaScript -> panic "linearRegAlloc ArchJavaScript" + ArchWasm32 -> panic "linearRegAlloc ArchWasm32" +Index: ghc-9.10.2/compiler/GHC/CmmToAsm/Reg/Linear/FreeRegs.hs +=================================================================== +--- ghc-9.10.2.orig/compiler/GHC/CmmToAsm/Reg/Linear/FreeRegs.hs ++++ ghc-9.10.2/compiler/GHC/CmmToAsm/Reg/Linear/FreeRegs.hs +@@ -29,10 +29,12 @@ import qualified GHC.CmmToAsm.Reg.Linear + import qualified GHC.CmmToAsm.Reg.Linear.X86 as X86 + import qualified GHC.CmmToAsm.Reg.Linear.X86_64 as X86_64 + import qualified GHC.CmmToAsm.Reg.Linear.AArch64 as AArch64 ++import qualified GHC.CmmToAsm.Reg.Linear.RV64 as RV64 + + import qualified GHC.CmmToAsm.PPC.Instr as PPC.Instr + import qualified GHC.CmmToAsm.X86.Instr as X86.Instr + import qualified GHC.CmmToAsm.AArch64.Instr as AArch64.Instr ++import qualified GHC.CmmToAsm.RV64.Instr as RV64.Instr + + class Show freeRegs => FR freeRegs where + frAllocateReg :: Platform -> RealReg -> freeRegs -> freeRegs +@@ -64,6 +66,12 @@ instance FR AArch64.FreeRegs where + frInitFreeRegs = AArch64.initFreeRegs + frReleaseReg = \_ -> AArch64.releaseReg + ++instance FR RV64.FreeRegs where ++ frAllocateReg = const RV64.allocateReg ++ frGetFreeRegs = const RV64.getFreeRegs ++ frInitFreeRegs = RV64.initFreeRegs ++ frReleaseReg = const RV64.releaseReg ++ + maxSpillSlots :: NCGConfig -> Int + maxSpillSlots config = case platformArch (ncgPlatform config) of + ArchX86 -> X86.Instr.maxSpillSlots config +@@ -76,7 +84,7 @@ maxSpillSlots config = case platformArch + ArchAlpha -> panic "maxSpillSlots ArchAlpha" + ArchMipseb -> panic "maxSpillSlots ArchMipseb" + ArchMipsel -> panic "maxSpillSlots ArchMipsel" +- ArchRISCV64 -> panic "maxSpillSlots ArchRISCV64" ++ ArchRISCV64 -> RV64.Instr.maxSpillSlots config + ArchLoongArch64->panic "maxSpillSlots ArchLoongArch64" + ArchJavaScript-> panic "maxSpillSlots ArchJavaScript" + ArchWasm32 -> panic "maxSpillSlots ArchWasm32" +Index: ghc-9.10.2/compiler/GHC/CmmToAsm/Reg/Linear/RV64.hs +=================================================================== +--- /dev/null ++++ ghc-9.10.2/compiler/GHC/CmmToAsm/Reg/Linear/RV64.hs +@@ -0,0 +1,96 @@ ++-- | Functions to implement the @FR@ (as in "free regs") type class. ++-- ++-- For LLVM GHC calling convention (used registers), see ++-- https://github.com/llvm/llvm-project/blob/6ab900f8746e7d8e24afafb5886a40801… ++module GHC.CmmToAsm.Reg.Linear.RV64 ++ ( allocateReg, ++ getFreeRegs, ++ initFreeRegs, ++ releaseReg, ++ FreeRegs (..), ++ ) ++where ++ ++import Data.Word ++import GHC.CmmToAsm.RV64.Regs ++import GHC.Platform ++import GHC.Platform.Reg ++import GHC.Platform.Reg.Class ++import GHC.Prelude ++import GHC.Stack ++import GHC.Utils.Outputable ++import GHC.Utils.Panic ++ ++-- | Bitmaps to indicate which registers are free (currently unused) ++-- ++-- The bit index represents the `RegNo`, in case of floating point registers ++-- with an offset of 32. The register is free when the bit is set. ++data FreeRegs ++ = FreeRegs ++ -- | integer/general purpose registers (`RcInteger`) ++ !Word32 ++ -- | floating point registers (`RcDouble`) ++ !Word32 ++ ++instance Show FreeRegs where ++ show (FreeRegs g f) = "FreeRegs 0b" ++ showBits g ++ " 0b" ++ showBits f ++ ++-- | Show bits as a `String` of @1@s and @0@s ++showBits :: Word32 -> String ++showBits w = map (\i -> if testBit w i then '1' else '0') [0 .. 31] ++ ++instance Outputable FreeRegs where ++ ppr (FreeRegs g f) = ++ text " " ++ <+> foldr (\i x -> pad_int i <+> x) (text "") [0 .. 31] ++ $$ text "GPR" ++ <+> foldr (\i x -> show_bit g i <+> x) (text "") [0 .. 31] ++ $$ text "FPR" ++ <+> foldr (\i x -> show_bit f i <+> x) (text "") [0 .. 31] ++ where ++ pad_int i | i < 10 = char ' ' <> int i ++ pad_int i = int i ++ -- remember bit = 1 means it's available. ++ show_bit bits bit | testBit bits bit = text " " ++ show_bit _ _ = text " x" ++ ++-- | Set bits of all allocatable registers to 1 ++initFreeRegs :: Platform -> FreeRegs ++initFreeRegs platform = foldl' (flip releaseReg) noFreeRegs (allocatableRegs platform) ++ where ++ noFreeRegs :: FreeRegs ++ noFreeRegs = FreeRegs 0 0 ++ ++-- | Get all free `RealReg`s (i.e. those where the corresponding bit is 1) ++getFreeRegs :: RegClass -> FreeRegs -> [RealReg] ++getFreeRegs cls (FreeRegs g f) ++ | RcFloat <- cls = [] -- For now we only support double and integer registers, floats will need to be promoted. ++ | RcDouble <- cls = go 32 f allocatableDoubleRegs ++ | RcInteger <- cls = go 0 g allocatableIntRegs ++ where ++ go _ _ [] = [] ++ go off x (i : is) ++ | testBit x i = RealRegSingle (off + i) : (go off x $! is) ++ | otherwise = go off x $! is ++ -- The lists of allocatable registers are manually crafted: Register ++ -- allocation is pretty hot code. We don't want to iterate and map like ++ -- `initFreeRegs` all the time! (The register mappings aren't supposed to ++ -- change often.) ++ allocatableIntRegs = [5 .. 7] ++ [10 .. 17] ++ [28 .. 30] ++ allocatableDoubleRegs = [0 .. 7] ++ [10 .. 17] ++ [28 .. 31] ++ ++-- | Set corresponding register bit to 0 ++allocateReg :: (HasCallStack) => RealReg -> FreeRegs -> FreeRegs ++allocateReg (RealRegSingle r) (FreeRegs g f) ++ | r > 31 && testBit f (r - 32) = FreeRegs g (clearBit f (r - 32)) ++ | r < 32 && testBit g r = FreeRegs (clearBit g r) f ++ | r > 31 = panic $ "Linear.RV64.allocReg: double allocation of float reg v" ++ show (r - 32) ++ "; " ++ showBits f ++ | otherwise = pprPanic "Linear.RV64.allocReg" $ text ("double allocation of gp reg x" ++ show r ++ "; " ++ showBits g) ++ ++-- | Set corresponding register bit to 1 ++releaseReg :: (HasCallStack) => RealReg -> FreeRegs -> FreeRegs ++releaseReg (RealRegSingle r) (FreeRegs g f) ++ | r > 31 && testBit f (r - 32) = pprPanic "Linear.RV64.releaseReg" (text "can't release non-allocated reg v" <> int (r - 32)) ++ | r < 32 && testBit g r = pprPanic "Linear.RV64.releaseReg" (text "can't release non-allocated reg x" <> int r) ++ | r > 31 = FreeRegs g (setBit f (r - 32)) ++ | otherwise = FreeRegs (setBit g r) f +Index: ghc-9.10.2/compiler/GHC/CmmToAsm/Reg/Target.hs +=================================================================== +--- ghc-9.10.2.orig/compiler/GHC/CmmToAsm/Reg/Target.hs ++++ ghc-9.10.2/compiler/GHC/CmmToAsm/Reg/Target.hs +@@ -34,7 +34,7 @@ import qualified GHC.CmmToAsm.X86.Regs + import qualified GHC.CmmToAsm.X86.RegInfo as X86 + import qualified GHC.CmmToAsm.PPC.Regs as PPC + import qualified GHC.CmmToAsm.AArch64.Regs as AArch64 +- ++import qualified GHC.CmmToAsm.RV64.Regs as RV64 + + targetVirtualRegSqueeze :: Platform -> RegClass -> VirtualReg -> Int + targetVirtualRegSqueeze platform +@@ -49,7 +49,7 @@ targetVirtualRegSqueeze platform + ArchAlpha -> panic "targetVirtualRegSqueeze ArchAlpha" + ArchMipseb -> panic "targetVirtualRegSqueeze ArchMipseb" + ArchMipsel -> panic "targetVirtualRegSqueeze ArchMipsel" +- ArchRISCV64 -> panic "targetVirtualRegSqueeze ArchRISCV64" ++ ArchRISCV64 -> RV64.virtualRegSqueeze + ArchLoongArch64->panic "targetVirtualRegSqueeze ArchLoongArch64" + ArchJavaScript-> panic "targetVirtualRegSqueeze ArchJavaScript" + ArchWasm32 -> panic "targetVirtualRegSqueeze ArchWasm32" +@@ -69,7 +69,7 @@ targetRealRegSqueeze platform + ArchAlpha -> panic "targetRealRegSqueeze ArchAlpha" + ArchMipseb -> panic "targetRealRegSqueeze ArchMipseb" + ArchMipsel -> panic "targetRealRegSqueeze ArchMipsel" +- ArchRISCV64 -> panic "targetRealRegSqueeze ArchRISCV64" ++ ArchRISCV64 -> RV64.realRegSqueeze + ArchLoongArch64->panic "targetRealRegSqueeze ArchLoongArch64" + ArchJavaScript-> panic "targetRealRegSqueeze ArchJavaScript" + ArchWasm32 -> panic "targetRealRegSqueeze ArchWasm32" +@@ -88,7 +88,7 @@ targetClassOfRealReg platform + ArchAlpha -> panic "targetClassOfRealReg ArchAlpha" + ArchMipseb -> panic "targetClassOfRealReg ArchMipseb" + ArchMipsel -> panic "targetClassOfRealReg ArchMipsel" +- ArchRISCV64 -> panic "targetClassOfRealReg ArchRISCV64" ++ ArchRISCV64 -> RV64.classOfRealReg + ArchLoongArch64->panic "targetClassOfRealReg ArchLoongArch64" + ArchJavaScript-> panic "targetClassOfRealReg ArchJavaScript" + ArchWasm32 -> panic "targetClassOfRealReg ArchWasm32" +@@ -107,7 +107,7 @@ targetMkVirtualReg platform + ArchAlpha -> panic "targetMkVirtualReg ArchAlpha" + ArchMipseb -> panic "targetMkVirtualReg ArchMipseb" + ArchMipsel -> panic "targetMkVirtualReg ArchMipsel" +- ArchRISCV64 -> panic "targetMkVirtualReg ArchRISCV64" ++ ArchRISCV64 -> RV64.mkVirtualReg + ArchLoongArch64->panic "targetMkVirtualReg ArchLoongArch64" + ArchJavaScript-> panic "targetMkVirtualReg ArchJavaScript" + ArchWasm32 -> panic "targetMkVirtualReg ArchWasm32" +@@ -126,7 +126,7 @@ targetRegDotColor platform + ArchAlpha -> panic "targetRegDotColor ArchAlpha" + ArchMipseb -> panic "targetRegDotColor ArchMipseb" + ArchMipsel -> panic "targetRegDotColor ArchMipsel" +- ArchRISCV64 -> panic "targetRegDotColor ArchRISCV64" ++ ArchRISCV64 -> RV64.regDotColor + ArchLoongArch64->panic "targetRegDotColor ArchLoongArch64" + ArchJavaScript-> panic "targetRegDotColor ArchJavaScript" + ArchWasm32 -> panic "targetRegDotColor ArchWasm32" +Index: ghc-9.10.2/compiler/GHC/Driver/Backend.hs +=================================================================== +--- ghc-9.10.2.orig/compiler/GHC/Driver/Backend.hs ++++ ghc-9.10.2/compiler/GHC/Driver/Backend.hs +@@ -213,6 +213,7 @@ platformNcgSupported platform = if + ArchPPC_64 {} -> True + ArchAArch64 -> True + ArchWasm32 -> True ++ ArchRISCV64 -> True + _ -> False + + -- | Is the platform supported by the JS backend? +Index: ghc-9.10.2/compiler/GHC/Driver/DynFlags.hs +=================================================================== +--- ghc-9.10.2.orig/compiler/GHC/Driver/DynFlags.hs ++++ ghc-9.10.2/compiler/GHC/Driver/DynFlags.hs +@@ -1327,6 +1327,7 @@ default_PIC platform = + (OSDarwin, ArchAArch64) -> [Opt_PIC] + (OSLinux, ArchAArch64) -> [Opt_PIC, Opt_ExternalDynamicRefs] + (OSLinux, ArchARM {}) -> [Opt_PIC, Opt_ExternalDynamicRefs] ++ (OSLinux, ArchRISCV64 {}) -> [Opt_PIC, Opt_ExternalDynamicRefs] + (OSOpenBSD, ArchX86_64) -> [Opt_PIC] -- Due to PIE support in + -- OpenBSD since 5.3 release + -- (1 May 2013) we need to +Index: ghc-9.10.2/compiler/GHC/Platform.hs +=================================================================== +--- ghc-9.10.2.orig/compiler/GHC/Platform.hs ++++ ghc-9.10.2/compiler/GHC/Platform.hs +@@ -250,7 +250,6 @@ platformHasRTSLinker p = case archOS_arc + ArchPPC_64 ELF_V1 -> False -- powerpc64 + ArchPPC_64 ELF_V2 -> False -- powerpc64le + ArchS390X -> False +- ArchRISCV64 -> False + ArchLoongArch64 -> False + ArchJavaScript -> False + ArchWasm32 -> False +Index: ghc-9.10.2/compiler/ghc.cabal.in +=================================================================== +--- ghc-9.10.2.orig/compiler/ghc.cabal.in ++++ ghc-9.10.2/compiler/ghc.cabal.in +@@ -290,6 +290,7 @@ Library + GHC.CmmToAsm.Reg.Linear.FreeRegs + GHC.CmmToAsm.Reg.Linear.JoinToTargets + GHC.CmmToAsm.Reg.Linear.PPC ++ GHC.CmmToAsm.Reg.Linear.RV64 + GHC.CmmToAsm.Reg.Linear.StackMap + GHC.CmmToAsm.Reg.Linear.State + GHC.CmmToAsm.Reg.Linear.Stats +@@ -298,6 +299,13 @@ Library + GHC.CmmToAsm.Reg.Liveness + GHC.CmmToAsm.Reg.Target + GHC.CmmToAsm.Reg.Utils ++ GHC.CmmToAsm.RV64 ++ GHC.CmmToAsm.RV64.CodeGen ++ GHC.CmmToAsm.RV64.Cond ++ GHC.CmmToAsm.RV64.Instr ++ GHC.CmmToAsm.RV64.Ppr ++ GHC.CmmToAsm.RV64.RegInfo ++ GHC.CmmToAsm.RV64.Regs + GHC.CmmToAsm.Types + GHC.CmmToAsm.Utils + GHC.CmmToAsm.X86 +Index: ghc-9.10.2/hadrian/bindist/config.mk.in +=================================================================== +--- ghc-9.10.2.orig/hadrian/bindist/config.mk.in ++++ ghc-9.10.2/hadrian/bindist/config.mk.in +@@ -153,7 +153,7 @@ GhcWithSMP := $(strip $(if $(filter YESN + # Whether to include GHCi in the compiler. Depends on whether the RTS linker + # has support for this OS/ARCH combination. + OsSupportsGHCi=$(strip $(patsubst $(TargetOS_CPP), YES, $(findstring $(TargetOS_CPP), mingw32 linux solaris2 freebsd dragonfly netbsd openbsd darwin kfreebsdgnu))) +-ArchSupportsGHCi=$(strip $(patsubst $(TargetArch_CPP), YES, $(findstring $(TargetArch_CPP), i386 x86_64 powerpc powerpc64 powerpc64le sparc sparc64 arm aarch64))) ++ArchSupportsGHCi=$(strip $(patsubst $(TargetArch_CPP), YES, $(findstring $(TargetArch_CPP), i386 x86_64 powerpc powerpc64 powerpc64le sparc sparc64 arm aarch64 riscv64))) + + ifeq "$(OsSupportsGHCi)$(ArchSupportsGHCi)" "YESYES" + GhcWithInterpreter=YES +Index: ghc-9.10.2/hadrian/src/Settings/Builders/RunTest.hs +=================================================================== +--- ghc-9.10.2.orig/hadrian/src/Settings/Builders/RunTest.hs ++++ ghc-9.10.2/hadrian/src/Settings/Builders/RunTest.hs +@@ -118,7 +118,7 @@ inTreeCompilerArgs stg = do + + os <- queryHostTarget queryOS + arch <- queryTargetTarget queryArch +- let codegen_arches = ["x86_64", "i386", "powerpc", "powerpc64", "powerpc64le", "aarch64", "wasm32"] ++ let codegen_arches = ["x86_64", "i386", "powerpc", "powerpc64", "powerpc64le", "aarch64", "wasm32", "riscv64"] + let withNativeCodeGen + | unregisterised = False + | arch `elem` codegen_arches = True +@@ -139,7 +139,7 @@ inTreeCompilerArgs stg = do + -- For this information, we need to query ghc --info, however, that would + -- require building ghc, which we don't want to do here. Therefore, the + -- logic from `platformHasRTSLinker` is duplicated here. +- let rtsLinker = not $ arch `elem` ["powerpc", "powerpc64", "powerpc64le", "s390x", "riscv64", "loongarch64", "javascript", "wasm32"] ++ let rtsLinker = not $ arch `elem` ["powerpc", "powerpc64", "powerpc64le", "s390x", "loongarch64", "javascript", "wasm32"] + + return TestCompilerArgs{..} + +Index: ghc-9.10.2/rts/LinkerInternals.h +=================================================================== +--- ghc-9.10.2.orig/rts/LinkerInternals.h ++++ ghc-9.10.2/rts/LinkerInternals.h +@@ -208,7 +208,7 @@ typedef struct _Segment { + int n_sections; + } Segment; + +-#if defined(powerpc_HOST_ARCH) || defined(x86_64_HOST_ARCH) || defined(arm_HOST_ARCH) || defined(aarch64_HOST_ARCH) ++#if defined(powerpc_HOST_ARCH) || defined(x86_64_HOST_ARCH) || defined(arm_HOST_ARCH) || defined(aarch64_HOST_ARCH) || defined(riscv64_HOST_ARCH) + #define NEED_SYMBOL_EXTRAS 1 + #endif + +@@ -220,8 +220,9 @@ typedef struct _Segment { + #define NEED_M32 1 + #endif + +-/* Jump Islands are sniplets of machine code required for relative +- * address relocations on the PowerPC, x86_64 and ARM. ++/* Jump Islands are sniplets of machine code required for relative address ++ * relocations on the PowerPC, x86_64 and ARM. On RISCV64 we use symbolextras ++ * like a GOT for locals where SymbolExtra represents one entry. + */ + typedef struct { + #if defined(powerpc_HOST_ARCH) +@@ -237,6 +238,8 @@ typedef struct { + uint8_t jumpIsland[8]; + #elif defined(arm_HOST_ARCH) + uint8_t jumpIsland[16]; ++#elif defined(riscv64_HOST_ARCH) ++ uint64_t addr; + #endif + } SymbolExtra; + +Index: ghc-9.10.2/rts/RtsSymbols.c +=================================================================== +--- ghc-9.10.2.orig/rts/RtsSymbols.c ++++ ghc-9.10.2/rts/RtsSymbols.c +@@ -983,6 +983,17 @@ extern char **environ; + #define RTS_LIBGCC_SYMBOLS + #endif + ++#if defined(riscv64_HOST_ARCH) ++// See https://gcc.gnu.org/onlinedocs/gccint/Integer-library-routines.html as ++// reference for the following built-ins. __clzdi2 and __ctzdi2 probably relate ++// to __builtin-s in libraries/ghc-prim/cbits/ctz.c. ++#define RTS_ARCH_LIBGCC_SYMBOLS \ ++ SymI_NeedsProto(__clzdi2) \ ++ SymI_NeedsProto(__ctzdi2) ++#else ++#define RTS_ARCH_LIBGCC_SYMBOLS ++#endif ++ + // Symbols defined by libgcc/compiler-rt for AArch64's outline atomics. + #if defined(HAVE_ARM_OUTLINE_ATOMICS) + #include "ARMOutlineAtomicsSymbols.h" +@@ -1035,6 +1046,7 @@ RTS_DARWIN_ONLY_SYMBOLS + RTS_OPENBSD_ONLY_SYMBOLS + RTS_LIBC_SYMBOLS + RTS_LIBGCC_SYMBOLS ++RTS_ARCH_LIBGCC_SYMBOLS + RTS_FINI_ARRAY_SYMBOLS + RTS_LIBFFI_SYMBOLS + RTS_ARM_OUTLINE_ATOMIC_SYMBOLS +@@ -1077,6 +1089,7 @@ RtsSymbolVal rtsSyms[] = { + RTS_DARWIN_ONLY_SYMBOLS + RTS_OPENBSD_ONLY_SYMBOLS + RTS_LIBGCC_SYMBOLS ++ RTS_ARCH_LIBGCC_SYMBOLS + RTS_FINI_ARRAY_SYMBOLS + RTS_LIBFFI_SYMBOLS + RTS_ARM_OUTLINE_ATOMIC_SYMBOLS +Index: ghc-9.10.2/rts/adjustor/LibffiAdjustor.c +=================================================================== +--- ghc-9.10.2.orig/rts/adjustor/LibffiAdjustor.c ++++ ghc-9.10.2/rts/adjustor/LibffiAdjustor.c +@@ -12,6 +12,7 @@ + #include "Adjustor.h" + + #include "rts/ghc_ffi.h" ++#include <stdint.h> + #include <string.h> + + // Note that ffi_alloc_prep_closure is a non-standard libffi closure +@@ -187,5 +188,21 @@ createAdjustor (int cconv, + barf("createAdjustor: failed to allocate memory"); + } + +- return (void*)code; ++#if defined(riscv64_HOST_ARCH) ++ // Synchronize the memory and instruction cache to prevent illegal ++ // instruction exceptions. ++ ++ // We expect two instructions for address loading, one for the jump. ++ int instrCount = 3; ++ // On Linux the parameters of __builtin___clear_cache are currently unused. ++ // Add them anyways for future compatibility. (I.e. the parameters couldn't ++ // be checked during development.) ++ // TODO: Check the upper boundary e.g. with a debugger. ++ __builtin___clear_cache((void *)code, ++ (void *)((uint64_t *) code + instrCount)); ++ // Memory barrier to ensure nothing circumvents the fence.i / cache flush. ++ SEQ_CST_FENCE(); ++#endif ++ ++ return (void *)code; + } +Index: ghc-9.10.2/rts/linker/Elf.c +=================================================================== +--- ghc-9.10.2.orig/rts/linker/Elf.c ++++ ghc-9.10.2/rts/linker/Elf.c +@@ -107,7 +107,8 @@ + + #include "elf_got.h" + +-#if defined(arm_HOST_ARCH) || defined(aarch64_HOST_ARCH) ++#if defined(arm_HOST_ARCH) || defined(aarch64_HOST_ARCH) || defined (riscv64_HOST_ARCH) ++# define NEED_GOT + # define NEED_PLT + # include "elf_plt.h" + # include "elf_reloc.h" +@@ -434,10 +435,7 @@ ocVerifyImage_ELF ( ObjectCode* oc ) + case EM_AARCH64: IF_DEBUG(linker,debugBelch( "aarch64" )); break; + #endif + #if defined(EM_RISCV) +- case EM_RISCV: IF_DEBUG(linker,debugBelch( "riscv" )); +- errorBelch("%s: RTS linker not implemented on riscv", +- oc->fileName); +- return 0; ++ case EM_RISCV: IF_DEBUG(linker,debugBelch( "riscv" )); break; + #endif + #if defined(EM_LOONGARCH) + case EM_LOONGARCH: IF_DEBUG(linker,debugBelch( "loongarch64" )); +@@ -1132,9 +1130,10 @@ end: + return result; + } + +-// the aarch64 linker uses relocacteObjectCodeAarch64, +-// see elf_reloc_aarch64.{h,c} +-#if !defined(aarch64_HOST_ARCH) ++// the aarch64 and riscv64 linkers use relocateObjectCodeAarch64() and ++// relocateObjectCodeRISCV64() (respectively), see elf_reloc_aarch64.{h,c} and ++// elf_reloc_riscv64.{h,c} ++#if !defined(aarch64_HOST_ARCH) && !defined(riscv64_HOST_ARCH) + + /* Do ELF relocations which lack an explicit addend. All x86-linux + and arm-linux relocations appear to be of this form. */ +@@ -1361,7 +1360,7 @@ do_Elf_Rel_relocations ( ObjectCode* oc, + /* try to locate an existing stub for this target */ + if(findStub(&oc->sections[target_shndx], (void**)&S, 0)) { + /* didn't find any. Need to create one */ +- if(makeStub(&oc->sections[target_shndx], (void**)&S, 0)) { ++ if(makeStub(&oc->sections[target_shndx], (void**)&S, NULL, 0)) { + errorBelch("Unable to create veneer for ARM_CALL\n"); + return 0; + } +@@ -1453,7 +1452,7 @@ do_Elf_Rel_relocations ( ObjectCode* oc, + /* try to locate an existing stub for this target */ + if(findStub(&oc->sections[target_shndx], (void**)&S, 1)) { + /* didn't find any. Need to create one */ +- if(makeStub(&oc->sections[target_shndx], (void**)&S, 1)) { ++ if(makeStub(&oc->sections[target_shndx], (void**)&S, NULL, 1)) { + errorBelch("Unable to create veneer for ARM_THM_CALL\n"); + return 0; + } +@@ -1993,7 +1992,7 @@ ocResolve_ELF ( ObjectCode* oc ) + (void) shnum; + (void) shdr; + +-#if defined(aarch64_HOST_ARCH) ++#if defined(aarch64_HOST_ARCH) || defined(riscv64_HOST_ARCH) + /* use new relocation design */ + if(relocateObjectCode( oc )) + return 0; +@@ -2016,6 +2015,9 @@ ocResolve_ELF ( ObjectCode* oc ) + + #if defined(powerpc_HOST_ARCH) + ocFlushInstructionCache( oc ); ++#elif defined(riscv64_HOST_ARCH) ++ /* New-style pseudo-polymorph (by architecture) call */ ++ flushInstructionCache( oc ); + #endif + + return ocMprotect_Elf(oc); +Index: ghc-9.10.2/rts/linker/ElfTypes.h +=================================================================== +--- ghc-9.10.2.orig/rts/linker/ElfTypes.h ++++ ghc-9.10.2/rts/linker/ElfTypes.h +@@ -150,6 +150,7 @@ typedef + struct _Stub { + void * addr; + void * target; ++ void* got_addr; + /* flags can hold architecture specific information they are used during + * lookup of stubs as well. Thus two stubs for the same target with + * different flags are considered unequal. +Index: ghc-9.10.2/rts/linker/SymbolExtras.c +=================================================================== +--- ghc-9.10.2.orig/rts/linker/SymbolExtras.c ++++ ghc-9.10.2/rts/linker/SymbolExtras.c +@@ -153,7 +153,7 @@ void ocProtectExtras(ObjectCode* oc) + } + + +-#if defined(powerpc_HOST_ARCH) || defined(x86_64_HOST_ARCH) ++#if defined(powerpc_HOST_ARCH) || defined(x86_64_HOST_ARCH) || defined(riscv64_HOST_ARCH) + SymbolExtra* makeSymbolExtra( ObjectCode const* oc, + unsigned long symbolNumber, + unsigned long target ) +@@ -189,9 +189,12 @@ SymbolExtra* makeSymbolExtra( ObjectCode + extra->addr = target; + memcpy(extra->jumpIsland, jmp, 8); + #endif /* x86_64_HOST_ARCH */ +- ++#if defined(riscv64_HOST_ARCH) ++ // Fake GOT entry (used like GOT, but located in symbol extras) ++ extra->addr = target; ++#endif + return extra; + } +-#endif /* powerpc_HOST_ARCH || x86_64_HOST_ARCH */ ++#endif /* powerpc_HOST_ARCH || x86_64_HOST_ARCH || riscv64_HOST_ARCH */ + #endif /* !x86_64_HOST_ARCH) || !mingw32_HOST_OS */ + #endif // NEED_SYMBOL_EXTRAS +Index: ghc-9.10.2/rts/linker/SymbolExtras.h +=================================================================== +--- ghc-9.10.2.orig/rts/linker/SymbolExtras.h ++++ ghc-9.10.2/rts/linker/SymbolExtras.h +@@ -16,7 +16,7 @@ SymbolExtra* makeArmSymbolExtra( ObjectC + unsigned long target, + bool fromThumb, + bool toThumb ); +-#elif defined(powerpc_HOST_ARCH) || defined(x86_64_HOST_ARCH) ++#elif defined(powerpc_HOST_ARCH) || defined(x86_64_HOST_ARCH) || defined(riscv64_HOST_ARCH) + SymbolExtra* makeSymbolExtra( ObjectCode const* oc, + unsigned long symbolNumber, + unsigned long target ); +Index: ghc-9.10.2/rts/linker/elf_plt.c +=================================================================== +--- ghc-9.10.2.orig/rts/linker/elf_plt.c ++++ ghc-9.10.2/rts/linker/elf_plt.c +@@ -5,7 +5,7 @@ + #include <stdint.h> + #include <stdlib.h> + +-#if defined(arm_HOST_ARCH) || defined(aarch64_HOST_ARCH) ++#if defined(arm_HOST_ARCH) || defined(aarch64_HOST_ARCH) || defined(riscv64_HOST_ARCH) + #if defined(OBJFORMAT_ELF) + + #define STRINGIFY(x) #x +@@ -49,11 +49,13 @@ findStub(Section * section, + bool + makeStub(Section * section, + void* * addr, ++ void* got_addr, + uint8_t flags) { + + Stub * s = calloc(1, sizeof(Stub)); + ASSERT(s != NULL); + s->target = *addr; ++ s->got_addr = got_addr; + s->flags = flags; + s->next = NULL; + s->addr = (uint8_t *)section->info->stub_offset + STUB_SIZE * section->info->nstubs; +Index: ghc-9.10.2/rts/linker/elf_plt.h +=================================================================== +--- ghc-9.10.2.orig/rts/linker/elf_plt.h ++++ ghc-9.10.2/rts/linker/elf_plt.h +@@ -4,8 +4,9 @@ + + #include "elf_plt_arm.h" + #include "elf_plt_aarch64.h" ++#include "elf_plt_riscv64.h" + +-#if defined(arm_HOST_ARCH) || defined(aarch64_HOST_ARCH) ++#if defined(arm_HOST_ARCH) || defined(aarch64_HOST_ARCH) || defined (riscv64_HOST_ARCH) + + #if defined(OBJFORMAT_ELF) + +@@ -21,6 +22,8 @@ + #define __suffix__ Arm + #elif defined(__mips__) + #define __suffix__ Mips ++#elif defined(__riscv) ++#define __suffix__ RISCV64 + #else + #error "unknown architecture" + #endif +@@ -34,10 +37,10 @@ unsigned numberOfStubsForSection( Objec + #define STUB_SIZE ADD_SUFFIX(stubSize) + + bool findStub(Section * section, void* * addr, uint8_t flags); +-bool makeStub(Section * section, void* * addr, uint8_t flags); ++bool makeStub(Section * section, void* * addr, void* got_addr, uint8_t flags); + + void freeStubs(Section * section); + + #endif // OBJECTFORMAT_ELF + +-#endif // arm/aarch64_HOST_ARCH ++#endif // arm/aarch64_HOST_ARCH/riscv64_HOST_ARCH +Index: ghc-9.10.2/rts/linker/elf_plt_riscv64.c +=================================================================== +--- /dev/null ++++ ghc-9.10.2/rts/linker/elf_plt_riscv64.c +@@ -0,0 +1,90 @@ ++#include "Rts.h" ++#include "elf_compat.h" ++#include "elf_plt_riscv64.h" ++#include "rts/Messages.h" ++#include "linker/ElfTypes.h" ++ ++#include <stdint.h> ++#include <stdlib.h> ++ ++#if defined(riscv64_HOST_ARCH) ++ ++#if defined(OBJFORMAT_ELF) ++ ++const size_t instSizeRISCV64 = 4; ++const size_t stubSizeRISCV64 = 3 * instSizeRISCV64; ++ ++bool needStubForRelRISCV64(Elf_Rel *rel) { ++ switch (ELF64_R_TYPE(rel->r_info)) { ++ case R_RISCV_CALL: ++ case R_RISCV_CALL_PLT: ++ return true; ++ default: ++ return false; ++ } ++} ++ ++bool needStubForRelaRISCV64(Elf_Rela *rela) { ++ switch (ELF64_R_TYPE(rela->r_info)) { ++ case R_RISCV_CALL: ++ case R_RISCV_CALL_PLT: ++ return true; ++ default: ++ return false; ++ } ++} ++ ++// After the global offset table (GOT) has been set up, we can use these three ++// instructions to jump to the target address / function: ++// ++// 1. AUIPC ip, %pcrel_hi(addr) ++// 2. LD ip, %pcrel_lo(addr)(ip) ++// 3. JARL x0, ip, 0 ++// ++// We could use the absolute address of the target (because we know it), but ++// that would require loading a 64-bit constant which is a nightmare to do in ++// riscv64 assembly. (See ++// https://github.com/riscv-non-isa/riscv-elf-psabi-doc/blob/5ffe5b5aeedb37b1c…) ++// ++// So far, PC-relative addressing seems to be good enough. If it ever turns out ++// to be not, one could (additionally for out-of-range cases?) encode absolute ++// addressing here. ++bool makeStubRISCV64(Stub *s) { ++ uint32_t *P = (uint32_t *)s->addr; ++ int32_t addr = (uint64_t)s->got_addr - (uint64_t)P; ++ ++ uint64_t hi = (addr + 0x800) >> 12; ++ uint64_t lo = addr - (hi << 12); ++ ++ IF_DEBUG( ++ linker, ++ debugBelch( ++ "makeStubRISCV64: P = %p, got_addr = %p, target = %p, addr = 0x%x " ++ ", hi = 0x%lx, lo = 0x%lx\n", ++ P, s->got_addr, s->target, addr, hi, lo)); ++ ++ // AUIPC ip, %pcrel_hi(addr) ++ uint32_t auipcInst = 0b0010111; // opcode ++ auipcInst |= 0x1f << 7; // rd = ip (x31) ++ auipcInst |= hi << 12; // imm[31:12] ++ ++ // LD ip, %pcrel_lo(addr)(ip) ++ uint32_t ldInst = 0b0000011; // opcode ++ ldInst |= 0x1f << 7; // rd = ip (x31) ++ ldInst |= 0x1f << 15; // rs = ip (x31) ++ ldInst |= 0b11 << 12; // funct3 = 0x3 (LD) ++ ldInst |= lo << 20; // imm[11:0] ++ ++ // JARL x0, ip, 0 ++ uint32_t jalrInst = 0b1100111; // opcode ++ jalrInst |= 0x1f << 15; // rs = ip (x31) ++ ++ P[0] = auipcInst; ++ P[1] = ldInst; ++ P[2] = jalrInst; ++ ++ return EXIT_SUCCESS; ++} ++ ++#endif ++#endif +Index: ghc-9.10.2/rts/linker/elf_plt_riscv64.h +=================================================================== +--- /dev/null ++++ ghc-9.10.2/rts/linker/elf_plt_riscv64.h +@@ -0,0 +1,12 @@ ++#pragma once ++ ++#include "LinkerInternals.h" ++ ++#if defined(OBJFORMAT_ELF) ++ ++extern const size_t stubSizeRISCV64; ++bool needStubForRelRISCV64(Elf_Rel * rel); ++bool needStubForRelaRISCV64(Elf_Rela * rel); ++bool makeStubRISCV64(Stub * s); ++ ++#endif +Index: ghc-9.10.2/rts/linker/elf_reloc.c +=================================================================== +--- ghc-9.10.2.orig/rts/linker/elf_reloc.c ++++ ghc-9.10.2/rts/linker/elf_reloc.c +@@ -4,13 +4,18 @@ + + #if defined(OBJFORMAT_ELF) + +-/* we currently only use this abstraction for elf/aarch64 */ +-#if defined(aarch64_HOST_ARCH) ++/* we currently only use this abstraction for elf/aarch64 and elf/riscv64 */ ++#if defined(aarch64_HOST_ARCH) | defined(riscv64_HOST_ARCH) + + bool + relocateObjectCode(ObjectCode * oc) { + return ADD_SUFFIX(relocateObjectCode)(oc); + } ++ ++ ++void flushInstructionCache(ObjectCode * oc){ ++ return ADD_SUFFIX(flushInstructionCache)(oc); ++} + #endif + + #endif +Index: ghc-9.10.2/rts/linker/elf_reloc.h +=================================================================== +--- ghc-9.10.2.orig/rts/linker/elf_reloc.h ++++ ghc-9.10.2/rts/linker/elf_reloc.h +@@ -5,9 +5,10 @@ + #if defined(OBJFORMAT_ELF) + + #include "elf_reloc_aarch64.h" ++#include "elf_reloc_riscv64.h" + + bool + relocateObjectCode(ObjectCode * oc); + +- ++void flushInstructionCache(ObjectCode *oc); + #endif /* OBJETFORMAT_ELF */ +Index: ghc-9.10.2/rts/linker/elf_reloc_aarch64.c +=================================================================== +--- ghc-9.10.2.orig/rts/linker/elf_reloc_aarch64.c ++++ ghc-9.10.2/rts/linker/elf_reloc_aarch64.c +@@ -240,7 +240,7 @@ computeAddend(Section * section, Elf_Rel + /* check if we already have that stub */ + if(findStub(section, (void**)&S, 0)) { + /* did not find it. Crete a new stub. */ +- if(makeStub(section, (void**)&S, 0)) { ++ if(makeStub(section, (void**)&S, NULL, 0)) { + abort(/* could not find or make stub */); + } + } +@@ -345,5 +345,10 @@ relocateObjectCodeAarch64(ObjectCode * o + return EXIT_SUCCESS; + } + ++void flushInstructionCacheAarch64(ObjectCode * oc STG_UNUSED) { ++ // Looks like we don't need this on Aarch64. ++ /* no-op */ ++} ++ + #endif /* OBJECTFORMAT_ELF */ + #endif /* aarch64_HOST_ARCH */ +Index: ghc-9.10.2/rts/linker/elf_reloc_aarch64.h +=================================================================== +--- ghc-9.10.2.orig/rts/linker/elf_reloc_aarch64.h ++++ ghc-9.10.2/rts/linker/elf_reloc_aarch64.h +@@ -7,4 +7,5 @@ + bool + relocateObjectCodeAarch64(ObjectCode * oc); + ++void flushInstructionCacheAarch64(ObjectCode *oc); + #endif /* OBJETFORMAT_ELF */ +Index: ghc-9.10.2/rts/linker/elf_reloc_riscv64.c +=================================================================== +--- /dev/null ++++ ghc-9.10.2/rts/linker/elf_reloc_riscv64.c +@@ -0,0 +1,693 @@ ++#include "elf_reloc_riscv64.h" ++#include "LinkerInternals.h" ++#include "Rts.h" ++#include "Stg.h" ++#include "SymbolExtras.h" ++#include "linker/ElfTypes.h" ++#include "elf_plt.h" ++#include "elf_util.h" ++#include "rts/Messages.h" ++#include "util.h" ++ ++#include <stdint.h> ++#include <stdlib.h> ++ ++#if defined(riscv64_HOST_ARCH) ++ ++#if defined(OBJFORMAT_ELF) ++ ++typedef uint64_t addr_t; ++ ++/* regular instructions are 32bit */ ++typedef uint32_t inst_t; ++ ++/* compressed instructions are 16bit */ ++typedef uint16_t cinst_t; ++ ++// TODO: These instances could be static. They are not yet, because we might ++// need their debugging symbols. ++char *relocationTypeToString(Elf64_Xword type); ++int32_t decodeAddendRISCV64(Section *section, Elf_Rel *rel); ++bool encodeAddendRISCV64(Section *section, Elf_Rel *rel, int32_t addend); ++void write8le(uint8_t *p, uint8_t v); ++uint8_t read8le(const uint8_t *P); ++void write16le(cinst_t *p, uint16_t v); ++uint16_t read16le(const cinst_t *P); ++uint32_t read32le(const inst_t *P); ++void write32le(inst_t *p, uint32_t v); ++uint64_t read64le(const uint64_t *P); ++void write64le(uint64_t *p, uint64_t v); ++uint32_t extractBits(uint64_t v, uint32_t begin, uint32_t end); ++void setCJType(cinst_t *loc, uint32_t val); ++void setCBType(cinst_t *loc, uint32_t val); ++void setBType(inst_t *loc, uint32_t val); ++void setSType(inst_t *loc, uint32_t val); ++int32_t computeAddend(ElfRelocationATable * relaTab, unsigned relNo, Elf_Rel *rel, ElfSymbol *symbol, ++ int64_t addend, ObjectCode *oc); ++void setJType(inst_t *loc, uint32_t val); ++void setIType(inst_t *loc, int32_t val); ++void checkInt(inst_t *loc, int32_t v, int n); ++void setUType(inst_t *loc, int32_t val); ++ ++ ++char *relocationTypeToString(Elf64_Xword type) { ++ switch (ELF64_R_TYPE(type)) { ++ case R_RISCV_NONE: ++ return "R_RISCV_NONE"; ++ case R_RISCV_32: ++ return "R_RISCV_32"; ++ case R_RISCV_64: ++ return "R_RISCV_64"; ++ case R_RISCV_RELATIVE: ++ return "R_RISCV_RELATIVE"; ++ case R_RISCV_COPY: ++ return "R_RISCV_COPY"; ++ case R_RISCV_JUMP_SLOT: ++ return "R_RISCV_JUMP_SLOT"; ++ case R_RISCV_TLS_DTPMOD32: ++ return "R_RISCV_TLS_DTPMOD32"; ++ case R_RISCV_TLS_DTPMOD64: ++ return "R_RISCV_TLS_DTPMOD64"; ++ case R_RISCV_TLS_DTPREL32: ++ return "R_RISCV_TLS_DTPREL32"; ++ case R_RISCV_TLS_DTPREL64: ++ return "R_RISCV_TLS_DTPREL64"; ++ case R_RISCV_TLS_TPREL32: ++ return "R_RISCV_TLS_TPREL32"; ++ case R_RISCV_TLS_TPREL64: ++ return "R_RISCV_TLS_TPREL64"; ++ case R_RISCV_BRANCH: ++ return "R_RISCV_BRANCH"; ++ case R_RISCV_JAL: ++ return "R_RISCV_JAL"; ++ case R_RISCV_CALL: ++ return "R_RISCV_CALL"; ++ case R_RISCV_CALL_PLT: ++ return "R_RISCV_CALL_PLT"; ++ case R_RISCV_GOT_HI20: ++ return "R_RISCV_GOT_HI20"; ++ case R_RISCV_PCREL_HI20: ++ return "R_RISCV_PCREL_HI20"; ++ case R_RISCV_LO12_I: ++ return "R_RISCV_LO12_I"; ++ case R_RISCV_PCREL_LO12_I: ++ return "R_RISCV_PCREL_LO12_I"; ++ case R_RISCV_HI20: ++ return "R_RISCV_HI20"; ++ case R_RISCV_LO12_S: ++ return "R_RISCV_LO12_S"; ++ case R_RISCV_PCREL_LO12_S: ++ return "R_RISCV_PCREL_LO12_S"; ++ case R_RISCV_RELAX: ++ return "R_RISCV_RELAX"; ++ case R_RISCV_RVC_BRANCH: ++ return "R_RISCV_RVC_BRANCH"; ++ case R_RISCV_RVC_JUMP: ++ return "R_RISCV_RVC_JUMP"; ++ default: ++ return "Unknown relocation type"; ++ } ++} ++ ++STG_NORETURN ++int32_t decodeAddendRISCV64(Section *section STG_UNUSED, ++ Elf_Rel *rel STG_UNUSED) { ++ barf("decodeAddendRISCV64: Relocations with explicit addend are not supported." ++ " Please open a ticket; providing the causing code/binary."); ++} ++ ++// Make sure that V can be represented as an N bit signed integer. ++void checkInt(inst_t *loc, int32_t v, int n) { ++ if (!isInt(n, v)) { ++ barf("Relocation at 0x%x is out of range. value: 0x%x (%d), " ++ "sign-extended value: 0x%x (%d), max bits 0x%x (%d)\n", ++ *loc, v, v, signExtend32(v, n), signExtend32(v, n), n, n); ++ } ++} ++ ++// RISCV is little-endian by definition: We can rely on (implicit) casts. ++void write8le(uint8_t *p, uint8_t v) { *p = v; } ++ ++// RISCV is little-endian by definition: We can rely on (implicit) casts. ++uint8_t read8le(const uint8_t *p) { return *p; } ++ ++// RISCV is little-endian by definition: We can rely on (implicit) casts. ++void write16le(cinst_t *p, uint16_t v) { *p = v; } ++ ++// RISCV is little-endian by definition: We can rely on (implicit) casts. ++uint16_t read16le(const cinst_t *p) { return *p; } ++ ++// RISCV is little-endian by definition: We can rely on (implicit) casts. ++uint32_t read32le(const inst_t *p) { return *p; } ++ ++// RISCV is little-endian by definition: We can rely on (implicit) casts. ++void write32le(inst_t *p, uint32_t v) { *p = v; } ++ ++// RISCV is little-endian by definition: We can rely on (implicit) casts. ++uint64_t read64le(const uint64_t *p) { return *p; } ++ ++// RISCV is little-endian by definition: We can rely on (implicit) casts. ++void write64le(uint64_t *p, uint64_t v) { *p = v; } ++ ++uint32_t extractBits(uint64_t v, uint32_t begin, uint32_t end) { ++ return (v & ((1ULL << (begin + 1)) - 1)) >> end; ++} ++ ++// Set immediate val in the instruction at *loc. In U-type instructions the ++// upper 20bits carry the upper 20bits of the immediate. ++void setUType(inst_t *loc, int32_t val) { ++ const unsigned bits = 32; ++ uint32_t hi = val + 0x800; ++ checkInt(loc, signExtend32(hi, bits) >> 12, 20); ++ IF_DEBUG(linker, debugBelch("setUType: hi 0x%x val 0x%x\n", hi, val)); ++ ++ uint32_t imm = hi & 0xFFFFF000; ++ write32le(loc, (read32le(loc) & 0xFFF) | imm); ++} ++ ++// Set immediate val in the instruction at *loc. In I-type instructions the ++// upper 12bits carry the lower 12bit of the immediate. ++void setIType(inst_t *loc, int32_t val) { ++ uint64_t hi = (val + 0x800) >> 12; ++ uint64_t lo = val - (hi << 12); ++ ++ IF_DEBUG(linker, debugBelch("setIType: hi 0x%lx lo 0x%lx\n", hi, lo)); ++ IF_DEBUG(linker, debugBelch("setIType: loc %p *loc 0x%x val 0x%x\n", loc, ++ *loc, val)); ++ ++ uint32_t imm = lo & 0xfff; ++ uint32_t instr = (read32le(loc) & 0xfffff) | (imm << 20); ++ ++ IF_DEBUG(linker, debugBelch("setIType: insn 0x%x\n", instr)); ++ write32le(loc, instr); ++ IF_DEBUG(linker, debugBelch("setIType: loc %p *loc' 0x%x val 0x%x\n", loc, ++ *loc, val)); ++} ++ ++// Set immediate val in the instruction at *loc. In S-type instructions the ++// lower 12 bits of the immediate are at bits 7 to 11 ([0:4]) and 25 to 31 ++// ([5:11]). ++void setSType(inst_t *loc, uint32_t val) { ++ uint64_t hi = (val + 0x800) >> 12; ++ uint64_t lo = val - (hi << 12); ++ ++ uint32_t imm = lo; ++ uint32_t instr = (read32le(loc) & 0x1fff07f) | (extractBits(imm, 11, 5) << 25) | ++ (extractBits(imm, 4, 0) << 7); ++ ++ write32le(loc, instr); ++} ++ ++// Set immediate val in the instruction at *loc. In J-type instructions the ++// immediate has 20bits which are pretty scattered: ++// instr bit -> imm bit ++// 31 -> 20 ++// [30:21] -> [10:1] ++// 20 -> 11 ++// [19:12] -> [19:12] ++// ++// N.B. bit 0 of the immediate is missing! ++void setJType(inst_t *loc, uint32_t val) { ++ checkInt(loc, val, 21); ++ ++ uint32_t insn = read32le(loc) & 0xFFF; ++ uint32_t imm20 = extractBits(val, 20, 20) << 31; ++ uint32_t imm10_1 = extractBits(val, 10, 1) << 21; ++ uint32_t imm11 = extractBits(val, 11, 11) << 20; ++ uint32_t imm19_12 = extractBits(val, 19, 12) << 12; ++ insn |= imm20 | imm10_1 | imm11 | imm19_12; ++ ++ write32le(loc, insn); ++} ++ ++// Set immediate val in the instruction at *loc. In B-type instructions the ++// immediate has 12bits which are pretty scattered: ++// instr bit -> imm bit ++// 31 -> 12 ++// [30:25] -> [10:5] ++// [11:8] -> [4:1] ++// 7 -> 11 ++// ++// N.B. bit 0 of the immediate is missing! ++void setBType(inst_t *loc, uint32_t val) { ++ checkInt(loc, val, 13); ++ ++ uint32_t insn = read32le(loc) & 0x1FFF07F; ++ uint32_t imm12 = extractBits(val, 12, 12) << 31; ++ uint32_t imm10_5 = extractBits(val, 10, 5) << 25; ++ uint32_t imm4_1 = extractBits(val, 4, 1) << 8; ++ uint32_t imm11 = extractBits(val, 11, 11) << 7; ++ insn |= imm12 | imm10_5 | imm4_1 | imm11; ++ ++ write32le(loc, insn); ++} ++ ++ ++// Set immediate val in the instruction at *loc. CB-type instructions have a ++// lenght of 16 bits (half-word, compared to the usual 32bit/word instructions.) ++// The immediate has 8bits which are pretty scattered: ++// instr bit -> imm bit ++// 12 -> 8 ++// [11:10] -> [4:3] ++// [6:5] -> [7:6] ++// [4:3] -> [2:1] ++// 2 -> 5 ++// ++// N.B. bit 0 of the immediate is missing! ++void setCBType(cinst_t *loc, uint32_t val) { ++ checkInt((inst_t *)loc, val, 9); ++ uint16_t insn = read16le(loc) & 0xE383; ++ uint16_t imm8 = extractBits(val, 8, 8) << 12; ++ uint16_t imm4_3 = extractBits(val, 4, 3) << 10; ++ uint16_t imm7_6 = extractBits(val, 7, 6) << 5; ++ uint16_t imm2_1 = extractBits(val, 2, 1) << 3; ++ uint16_t imm5 = extractBits(val, 5, 5) << 2; ++ insn |= imm8 | imm4_3 | imm7_6 | imm2_1 | imm5; ++ ++ write16le(loc, insn); ++} ++ ++// Set immediate val in the instruction at *loc. CJ-type instructions have a ++// lenght of 16 bits (half-word, compared to the usual 32bit/word instructions.) ++// The immediate has 11bits which are pretty scattered: ++// instr bit -> imm bit ++// 12 -> 11 ++// 11 -> 4 ++// [10:9] ->[9:8] ++// 8 -> 10 ++// 7 -> 6 ++// 6 -> 7 ++// [5:3] -> [3:1] ++// 2 -> 5 ++// ++// N.B. bit 0 of the immediate is missing! ++void setCJType(cinst_t *loc, uint32_t val) { ++ checkInt((inst_t *)loc, val, 12); ++ uint16_t insn = read16le(loc) & 0xE003; ++ uint16_t imm11 = extractBits(val, 11, 11) << 12; ++ uint16_t imm4 = extractBits(val, 4, 4) << 11; ++ uint16_t imm9_8 = extractBits(val, 9, 8) << 9; ++ uint16_t imm10 = extractBits(val, 10, 10) << 8; ++ uint16_t imm6 = extractBits(val, 6, 6) << 7; ++ uint16_t imm7 = extractBits(val, 7, 7) << 6; ++ uint16_t imm3_1 = extractBits(val, 3, 1) << 3; ++ uint16_t imm5 = extractBits(val, 5, 5) << 2; ++ insn |= imm11 | imm4 | imm9_8 | imm10 | imm6 | imm7 | imm3_1 | imm5; ++ ++ write16le(loc, insn); ++} ++ ++// Encode the addend according to the relocaction into the instruction. ++bool encodeAddendRISCV64(Section *section, Elf_Rel *rel, int32_t addend) { ++ // instruction to rewrite (P: Position of the relocation) ++ addr_t P = (addr_t)((uint8_t *)section->start + rel->r_offset); ++ IF_DEBUG(linker, ++ debugBelch( ++ "Relocation type %s 0x%lx (%lu) symbol 0x%lx addend 0x%x (%u / " ++ "%d) P 0x%lx\n", ++ relocationTypeToString(rel->r_info), ELF64_R_TYPE(rel->r_info), ++ ELF64_R_TYPE(rel->r_info), ELF64_R_SYM(rel->r_info), addend, ++ addend, addend, P)); ++ switch (ELF64_R_TYPE(rel->r_info)) { ++ case R_RISCV_32_PCREL: ++ case R_RISCV_32: ++ write32le((inst_t *)P, addend); ++ break; ++ case R_RISCV_64: ++ write64le((uint64_t *)P, addend); ++ break; ++ case R_RISCV_GOT_HI20: ++ case R_RISCV_PCREL_HI20: ++ case R_RISCV_HI20: { ++ setUType((inst_t *)P, addend); ++ break; ++ } ++ case R_RISCV_PCREL_LO12_I: ++ case R_RISCV_LO12_I: { ++ setIType((inst_t *)P, addend); ++ break; ++ } ++ case R_RISCV_RVC_JUMP: { ++ setCJType((cinst_t *)P, addend); ++ break; ++ } ++ case R_RISCV_RVC_BRANCH: { ++ setCBType((cinst_t *)P, addend); ++ break; ++ } ++ case R_RISCV_BRANCH: { ++ setBType((inst_t *)P, addend); ++ break; ++ } ++ case R_RISCV_CALL: ++ case R_RISCV_CALL_PLT: { ++ // We could relax more (in some cases) but right now most important is to ++ // make it work. ++ setUType((inst_t *)P, addend); ++ setIType(((inst_t *)P) + 1, addend); ++ break; ++ } ++ case R_RISCV_JAL: { ++ setJType((inst_t *)P, addend); ++ break; ++ } ++ case R_RISCV_ADD8: ++ write8le((uint8_t *)P, read8le((uint8_t *)P) + addend); ++ break; ++ case R_RISCV_ADD16: ++ write16le((cinst_t *)P, read16le((cinst_t *)P) + addend); ++ break; ++ case R_RISCV_ADD32: ++ write32le((inst_t *)P, read32le((inst_t *)P) + addend); ++ break; ++ case R_RISCV_ADD64: ++ write64le((uint64_t *)P, read64le((uint64_t *)P) + addend); ++ break; ++ case R_RISCV_SUB6: { ++ uint8_t keep = *((uint8_t *)P) & 0xc0; ++ uint8_t imm = (((*(uint8_t *)P) & 0x3f) - addend) & 0x3f; ++ ++ write8le((uint8_t *)P, keep | imm); ++ break; ++ } ++ case R_RISCV_SUB8: ++ write8le((uint8_t *)P, read8le((uint8_t *)P) - addend); ++ break; ++ case R_RISCV_SUB16: ++ write16le((cinst_t *)P, read16le((cinst_t *)P) - addend); ++ break; ++ case R_RISCV_SUB32: ++ write32le((inst_t *)P, read32le((inst_t *)P) - addend); ++ break; ++ case R_RISCV_SUB64: ++ write64le((uint64_t *)P, read64le((uint64_t *)P) - addend); ++ break; ++ case R_RISCV_SET6: { ++ uint8_t keep = *((uint8_t *)P) & 0xc0; ++ uint8_t imm = (addend & 0x3f) & 0x3f; ++ ++ write8le((uint8_t *)P, keep | imm); ++ break; ++ } ++ case R_RISCV_SET8: ++ write8le((uint8_t *)P, addend); ++ break; ++ case R_RISCV_SET16: ++ write16le((cinst_t *)P, addend); ++ break; ++ case R_RISCV_SET32: ++ write32le((inst_t *)P, addend); ++ break; ++ case R_RISCV_PCREL_LO12_S: ++ case R_RISCV_TPREL_LO12_S: ++ case R_RISCV_LO12_S: { ++ setSType((inst_t *)P, addend); ++ break; ++ } ++ case R_RISCV_RELAX: ++ case R_RISCV_ALIGN: ++ // Implementing relaxations (rewriting instructions to more efficient ones) ++ // could be implemented in future. As the code already is aligned and we do ++ // not change the instruction sizes, we should get away with not aligning ++ // (though, that is cheating.) To align or change the instruction count, we ++ // would need machinery to squeeze or extend memory at the current location. ++ break; ++ default: ++ barf("Missing relocation 0x%lx\n", ELF64_R_TYPE(rel->r_info)); ++ } ++ return EXIT_SUCCESS; ++} ++ ++/** ++ * Compute the *new* addend for a relocation, given a pre-existing addend. ++ * @param section The section the relocation is in. ++ * @param rel The Relocation struct. ++ * @param symbol The target symbol. ++ * @param addend The existing addend. Either explicit or implicit. ++ * @return The new computed addend. ++ */ ++int32_t computeAddend(ElfRelocationATable * relaTab, unsigned relNo, Elf_Rel *rel, ElfSymbol *symbol, ++ int64_t addend, ObjectCode *oc) { ++ Section * section = &oc->sections[relaTab->targetSectionIndex]; ++ ++ // instruction to rewrite (P: Position of the relocation) ++ addr_t P = (addr_t)((uint8_t *)section->start + rel->r_offset); ++ ++ CHECK(0x0 != P); ++ CHECK((uint64_t)section->start <= P); ++ CHECK(P <= (uint64_t)section->start + section->size); ++ // S: Value of the symbol in the symbol table ++ addr_t S = (addr_t)symbol->addr; ++ /* GOT slot for the symbol (G + GOT) */ ++ addr_t GOT_S = (addr_t)symbol->got_addr; ++ ++ // A: Addend field in the relocation entry associated with the symbol ++ int64_t A = addend; ++ ++ IF_DEBUG(linker, debugBelch("%s: P 0x%lx S 0x%lx %s GOT_S 0x%lx A 0x%lx relNo %u\n", ++ relocationTypeToString(rel->r_info), P, S, ++ symbol->name, GOT_S, A, relNo)); ++ switch (ELF64_R_TYPE(rel->r_info)) { ++ case R_RISCV_32: ++ return S + A; ++ case R_RISCV_64: ++ return S + A; ++ case R_RISCV_HI20: ++ return S + A; ++ case R_RISCV_JUMP_SLOT: ++ return S; ++ case R_RISCV_JAL: ++ return S + A - P; ++ case R_RISCV_PCREL_HI20: ++ return S + A - P; ++ case R_RISCV_LO12_I: ++ return S + A; ++ // Quoting LLVM docs: For R_RISCV_PC_INDIRECT (R_RISCV_PCREL_LO12_{I,S}), ++ // the symbol actually points the corresponding R_RISCV_PCREL_HI20 ++ // relocation, and the target VA is calculated using PCREL_HI20's symbol. ++ case R_RISCV_PCREL_LO12_S: ++ FALLTHROUGH; ++ case R_RISCV_PCREL_LO12_I: { ++ // Lookup related HI20 relocation and use that value. I'm still confused why ++ // relocations aren't self-contained, but this is how LLVM does it. And, ++ // calculating the lower 12 bit without any relationship to the GOT entry's ++ // address makes no sense either. ++ for (int64_t i = relNo; i >= 0 ; i--) { ++ Elf_Rela *rel_prime = &relaTab->relocations[i]; ++ ++ addr_t P_prime = ++ (addr_t)((uint8_t *)section->start + rel_prime->r_offset); ++ ++ if (P_prime != S) { ++ // S points to the P of the corresponding *_HI20 relocation. ++ continue; ++ } ++ ++ ElfSymbol *symbol_prime = ++ findSymbol(oc, relaTab->sectionHeader->sh_link, ++ ELF64_R_SYM((Elf64_Xword)rel_prime->r_info)); ++ ++ CHECK(0x0 != symbol_prime); ++ ++ /* take explicit addend */ ++ int64_t addend_prime = rel_prime->r_addend; ++ ++ uint64_t type_prime = ELF64_R_TYPE(rel_prime->r_info); ++ ++ if (type_prime == R_RISCV_PCREL_HI20 || ++ type_prime == R_RISCV_GOT_HI20 || ++ type_prime == R_RISCV_TLS_GD_HI20 || ++ type_prime == R_RISCV_TLS_GOT_HI20) { ++ IF_DEBUG(linker, ++ debugBelch( ++ "Found matching relocation: %s (P: 0x%lx, S: 0x%lx, " ++ "sym-name: %s) -> %s (P: 0x%lx, S: %p, sym-name: %s, relNo: %ld)", ++ relocationTypeToString(rel->r_info), P, S, symbol->name, ++ relocationTypeToString(rel_prime->r_info), P_prime, ++ symbol_prime->addr, symbol_prime->name, i)); ++ int32_t result = computeAddend(relaTab, i, (Elf_Rel *)rel_prime, ++ symbol_prime, addend_prime, oc); ++ IF_DEBUG(linker, debugBelch("Result of computeAddend: 0x%x (%d)\n", ++ result, result)); ++ return result; ++ } ++ } ++ debugBelch("Missing HI relocation for %s: P 0x%lx S 0x%lx %s\n", ++ relocationTypeToString(rel->r_info), P, S, symbol->name); ++ abort(); ++ } ++ ++ case R_RISCV_RVC_JUMP: ++ return S + A - P; ++ case R_RISCV_RVC_BRANCH: ++ return S + A - P; ++ case R_RISCV_BRANCH: ++ return S + A - P; ++ case R_RISCV_CALL: ++ case R_RISCV_CALL_PLT: { ++ addr_t GOT_Target; ++ if (GOT_S != 0) { ++ // 1. Public symbol with GOT entry. ++ GOT_Target = GOT_S; ++ } else { ++ // 2. Fake GOT entry with symbol extra entry. ++ SymbolExtra *symbolExtra = makeSymbolExtra(oc, ELF_R_SYM(rel->r_info), S); ++ addr_t* FAKE_GOT_S = &symbolExtra->addr; ++ IF_DEBUG(linker, debugBelch("R_RISCV_CALL_PLT w/ SymbolExtra = %p , " ++ "entry = %p\n", ++ symbolExtra, FAKE_GOT_S)); ++ GOT_Target = (addr_t) FAKE_GOT_S; ++ } ++ ++ if (findStub(section, (void **)&S, 0)) { ++ /* did not find it. Crete a new stub. */ ++ if (makeStub(section, (void **)&S, (void *)GOT_Target, 0)) { ++ abort(/* could not find or make stub */); ++ } ++ } ++ IF_DEBUG(linker, debugBelch("R_RISCV_CALL_PLT: S = 0x%lx A = 0x%lx P = " ++ "0x%lx (S + A) - P = 0x%lx \n", ++ S, A, P, (S + A) - P)); ++ return (S + A) - P; ++ } ++ case R_RISCV_ADD8: ++ FALLTHROUGH; ++ case R_RISCV_ADD16: ++ FALLTHROUGH; ++ case R_RISCV_ADD32: ++ FALLTHROUGH; ++ case R_RISCV_ADD64: ++ return S + A; // Add V when the value is set ++ case R_RISCV_SUB6: ++ FALLTHROUGH; ++ case R_RISCV_SUB8: ++ FALLTHROUGH; ++ case R_RISCV_SUB16: ++ FALLTHROUGH; ++ case R_RISCV_SUB32: ++ FALLTHROUGH; ++ case R_RISCV_SUB64: ++ return S + A; // Subtract from V when value is set ++ case R_RISCV_SET6: ++ FALLTHROUGH; ++ case R_RISCV_SET8: ++ FALLTHROUGH; ++ case R_RISCV_SET16: ++ FALLTHROUGH; ++ case R_RISCV_SET32: ++ return S + A; ++ case R_RISCV_RELAX: ++ // This "relocation" has no addend. ++ FALLTHROUGH; ++ case R_RISCV_ALIGN: ++ // I guess we don't need to implement this relaxation. Otherwise, this ++ // should return the number of blank bytes to insert via NOPs. ++ return 0; ++ case R_RISCV_32_PCREL: ++ return S + A - P; ++ case R_RISCV_GOT_HI20: { ++ // TODO: Allocating extra memory for every symbol just to play this trick ++ // seems to be a bit obscene. (GOT relocations hitting local symbols ++ // happens, but not very often.) It would be better to allocate only what we ++ // really need. ++ ++ // There are two cases here: 1. The symbol is public and has an entry in the ++ // GOT. 2. It's local and has no corresponding GOT entry. The first case is ++ // easy: We simply calculate the addend with the GOT address. In the second ++ // case we create a symbol extra entry and pretend it's the GOT. ++ if (GOT_S != 0) { ++ // 1. Public symbol with GOT entry. ++ return GOT_S + A - P; ++ } else { ++ // 2. Fake GOT entry with symbol extra entry. ++ SymbolExtra *symbolExtra = makeSymbolExtra(oc, ELF_R_SYM(rel->r_info), S); ++ addr_t* FAKE_GOT_S = &symbolExtra->addr; ++ addr_t res = (addr_t) FAKE_GOT_S + A - P; ++ IF_DEBUG(linker, debugBelch("R_RISCV_GOT_HI20 w/ SymbolExtra = %p , " ++ "entry = %p , reloc-addend = 0x%lu ", ++ symbolExtra, FAKE_GOT_S, res)); ++ return res; ++ } ++ } ++ default: ++ barf("Unimplemented relocation: 0x%lx\n (%lu)", ++ ELF64_R_TYPE(rel->r_info), ELF64_R_TYPE(rel->r_info)); ++ } ++ barf("This should never happen!"); ++} ++ ++// Iterate over all relocations and perform them. ++bool relocateObjectCodeRISCV64(ObjectCode *oc) { ++ for (ElfRelocationTable *relTab = oc->info->relTable; relTab != NULL; ++ relTab = relTab->next) { ++ /* only relocate interesting sections */ ++ if (SECTIONKIND_OTHER == oc->sections[relTab->targetSectionIndex].kind) ++ continue; ++ ++ Section *targetSection = &oc->sections[relTab->targetSectionIndex]; ++ ++ for (unsigned i = 0; i < relTab->n_relocations; i++) { ++ Elf_Rel *rel = &relTab->relocations[i]; ++ ++ ElfSymbol *symbol = findSymbol(oc, relTab->sectionHeader->sh_link, ++ ELF64_R_SYM((Elf64_Xword)rel->r_info)); ++ ++ CHECK(0x0 != symbol); ++ ++ // This always fails, because we don't support Rel locations, yet: Do we ++ // need this case? Leaving it in to spot the potential bug when it ++ // appears. ++ /* decode implicit addend */ ++ int64_t addend = decodeAddendRISCV64(targetSection, rel); ++ ++ addend = computeAddend((ElfRelocationATable*) relTab, i, rel, symbol, addend, oc); ++ encodeAddendRISCV64(targetSection, rel, addend); ++ } ++ } ++ for (ElfRelocationATable *relaTab = oc->info->relaTable; relaTab != NULL; ++ relaTab = relaTab->next) { ++ /* only relocate interesting sections */ ++ if (SECTIONKIND_OTHER == oc->sections[relaTab->targetSectionIndex].kind) ++ continue; ++ ++ Section *targetSection = &oc->sections[relaTab->targetSectionIndex]; ++ ++ for (unsigned i = 0; i < relaTab->n_relocations; i++) { ++ ++ Elf_Rela *rel = &relaTab->relocations[i]; ++ ++ ElfSymbol *symbol = findSymbol(oc, relaTab->sectionHeader->sh_link, ++ ELF64_R_SYM((Elf64_Xword)rel->r_info)); ++ ++ CHECK(0x0 != symbol); ++ ++ /* take explicit addend */ ++ int64_t addend = rel->r_addend; ++ ++ addend = computeAddend(relaTab, i, (Elf_Rel *)rel, symbol, addend, oc); ++ encodeAddendRISCV64(targetSection, (Elf_Rel *)rel, addend); ++ } ++ } ++ return EXIT_SUCCESS; ++} ++ ++void flushInstructionCacheRISCV64(ObjectCode *oc) { ++ // Synchronize the memory and instruction cache to prevent illegal instruction ++ // exceptions. On Linux the parameters of __builtin___clear_cache are ++ // currently unused. Add them anyways for future compatibility. (I.e. the ++ // parameters couldn't be checked during development.) ++ ++ /* The main object code */ ++ void *codeBegin = oc->image + oc->misalignment; ++ __builtin___clear_cache(codeBegin, (void*) ((uint64_t*) codeBegin + oc->fileSize)); ++ ++ /* Jump Islands */ ++ __builtin___clear_cache((void *)oc->symbol_extras, ++ (void *)(oc->symbol_extras + oc->n_symbol_extras)); ++ ++ // Memory barrier to ensure nothing circumvents the fence.i / cache flushes. ++ SEQ_CST_FENCE(); ++} ++ ++#endif /* OBJECTFORMAT_ELF */ ++#endif /* riscv64_HOST_ARCH */ +Index: ghc-9.10.2/rts/linker/elf_reloc_riscv64.h +=================================================================== +--- /dev/null ++++ ghc-9.10.2/rts/linker/elf_reloc_riscv64.h +@@ -0,0 +1,11 @@ ++#pragma once ++ ++#include "LinkerInternals.h" ++ ++#if defined(OBJFORMAT_ELF) ++ ++bool ++relocateObjectCodeRISCV64(ObjectCode * oc); ++ ++void flushInstructionCacheRISCV64(ObjectCode *oc); ++#endif /* OBJETFORMAT_ELF */ +Index: ghc-9.10.2/rts/rts.cabal +=================================================================== +--- ghc-9.10.2.orig/rts/rts.cabal ++++ ghc-9.10.2/rts/rts.cabal +@@ -468,9 +468,11 @@ library + linker/elf_got.c + linker/elf_plt.c + linker/elf_plt_aarch64.c ++ linker/elf_plt_riscv64.c + linker/elf_plt_arm.c + linker/elf_reloc.c + linker/elf_reloc_aarch64.c ++ linker/elf_reloc_riscv64.c + linker/elf_tlsgd.c + linker/elf_util.c + sm/BlockAlloc.c +Index: ghc-9.10.2/testsuite/tests/codeGen/should_run/CCallConv.hs +=================================================================== +--- /dev/null ++++ ghc-9.10.2/testsuite/tests/codeGen/should_run/CCallConv.hs +@@ -0,0 +1,123 @@ ++{-# LANGUAGE ForeignFunctionInterface #-} ++{-# LANGUAGE GHCForeignImportPrim #-} ++{-# LANGUAGE MagicHash #-} ++{-# LANGUAGE UnboxedTuples #-} ++{-# LANGUAGE UnliftedFFITypes #-} ++ ++-- | This test ensures that sub-word signed and unsigned parameters are correctly ++-- handed over to C functions. I.e. it asserts the calling-convention. ++-- ++-- The number of parameters is currently shaped for the RISCV64 calling-convention. ++-- You may need to add more parameters to the C functions in case there are more ++-- registers reserved for parameters in your architecture. ++module Main where ++ ++import Data.Word ++import GHC.Exts ++import GHC.Int ++ ++foreign import ccall "fun8" ++ fun8 :: ++ Int8# -> -- a0 ++ Word8# -> -- a1 ++ Int8# -> -- a2 ++ Int8# -> -- a3 ++ Int8# -> -- a4 ++ Int8# -> -- a5 ++ Int8# -> -- a6 ++ Int8# -> -- a7 ++ Word8# -> -- s0 ++ Int8# -> -- s1 ++ Int64# -- result ++ ++foreign import ccall "fun16" ++ fun16 :: ++ Int16# -> -- a0 ++ Word16# -> -- a1 ++ Int16# -> -- a2 ++ Int16# -> -- a3 ++ Int16# -> -- a4 ++ Int16# -> -- a5 ++ Int16# -> -- a6 ++ Int16# -> -- a7 ++ Word16# -> -- s0 ++ Int16# -> -- s1 ++ Int64# -- result ++ ++foreign import ccall "fun32" ++ fun32 :: ++ Int32# -> -- a0 ++ Word32# -> -- a1 ++ Int32# -> -- a2 ++ Int32# -> -- a3 ++ Int32# -> -- a4 ++ Int32# -> -- a5 ++ Int32# -> -- a6 ++ Int32# -> -- a7 ++ Word32# -> -- s0 ++ Int32# -> -- s1 ++ Int64# -- result ++ ++foreign import ccall "funFloat" ++ funFloat :: ++ Float# -> -- a0 ++ Float# -> -- a1 ++ Float# -> -- a2 ++ Float# -> -- a3 ++ Float# -> -- a4 ++ Float# -> -- a5 ++ Float# -> -- a6 ++ Float# -> -- a7 ++ Float# -> -- s0 ++ Float# -> -- s1 ++ Float# -- result ++ ++foreign import ccall "funDouble" ++ funDouble :: ++ Double# -> -- a0 ++ Double# -> -- a1 ++ Double# -> -- a2 ++ Double# -> -- a3 ++ Double# -> -- a4 ++ Double# -> -- a5 ++ Double# -> -- a6 ++ Double# -> -- a7 ++ Double# -> -- s0 ++ Double# -> -- s1 ++ Double# -- result ++ ++main :: IO () ++main = ++ -- N.B. the values here aren't choosen by accident: -1 means all bits one in ++ -- twos-complement, which is the same as the max word value. ++ let i8 :: Int8# = intToInt8# (-1#) ++ w8 :: Word8# = wordToWord8# (255##) ++ res8 :: Int64# = fun8 i8 w8 i8 i8 i8 i8 i8 i8 w8 i8 ++ expected_res8 :: Int64 = 2 * (fromInteger . fromIntegral) (maxBound :: Word8) + 8 * (-1) ++ i16 :: Int16# = intToInt16# (-1#) ++ w16 :: Word16# = wordToWord16# (65535##) ++ res16 :: Int64# = fun16 i16 w16 i16 i16 i16 i16 i16 i16 w16 i16 ++ expected_res16 :: Int64 = 2 * (fromInteger . fromIntegral) (maxBound :: Word16) + 8 * (-1) ++ i32 :: Int32# = intToInt32# (-1#) ++ w32 :: Word32# = wordToWord32# (4294967295##) ++ res32 :: Int64# = fun32 i32 w32 i32 i32 i32 i32 i32 i32 w32 i32 ++ expected_res32 :: Int64 = 2 * (fromInteger . fromIntegral) (maxBound :: Word32) + 8 * (-1) ++ resFloat :: Float = F# (funFloat 1.0# 1.1# 1.2# 1.3# 1.4# 1.5# 1.6# 1.7# 1.8# 1.9#) ++ resDouble :: Double = D# (funDouble 1.0## 1.1## 1.2## 1.3## 1.4## 1.5## 1.6## 1.7## 1.8## 1.9##) ++ in do ++ print $ "fun8 result:" ++ show (I64# res8) ++ assertEqual expected_res8 (I64# res8) ++ print $ "fun16 result:" ++ show (I64# res16) ++ assertEqual expected_res16 (I64# res16) ++ print $ "fun32 result:" ++ show (I64# res32) ++ assertEqual expected_res32 (I64# res32) ++ print $ "funFloat result:" ++ show resFloat ++ assertEqual (14.5 :: Float) resFloat ++ print $ "funDouble result:" ++ show resDouble ++ assertEqual (14.5 :: Double) resDouble ++ ++assertEqual :: (Eq a, Show a) => a -> a -> IO () ++assertEqual a b = ++ if a == b ++ then pure () ++ else error $ show a ++ " =/= " ++ show b +Index: ghc-9.10.2/testsuite/tests/codeGen/should_run/CCallConv.stdout +=================================================================== +--- /dev/null ++++ ghc-9.10.2/testsuite/tests/codeGen/should_run/CCallConv.stdout +@@ -0,0 +1,60 @@ ++"fun8 result:502" ++"fun16 result:131062" ++"fun32 result:8589934582" ++"funFloat result:14.5" ++"funDouble result:14.5" ++fun32: ++a0: 0xffffffff -1 ++a1: 0xffffffff 4294967295 ++a2: 0xffffffff -1 ++a3: 0xffffffff -1 ++a4: 0xffffffff -1 ++a5: 0xffffffff -1 ++a6: 0xffffffff -1 ++a7: 0xffffffff -1 ++s0: 0xffffffff -1 ++s1: 0xffffffff 4294967295 ++fun16: ++a0: 0xffffffff -1 ++a1: 0xffff 65535 ++a2: 0xffffffff -1 ++a3: 0xffffffff -1 ++a4: 0xffffffff -1 ++a5: 0xffffffff -1 ++a6: 0xffffffff -1 ++a7: 0xffffffff -1 ++s0: 0xffffffff -1 ++s1: 0xffff 65535 ++fun8: ++a0: 0xffffffff -1 ++a1: 0xff 255 ++a2: 0xffffffff -1 ++a3: 0xffffffff -1 ++a4: 0xffffffff -1 ++a5: 0xffffffff -1 ++a6: 0xffffffff -1 ++a7: 0xffffffff -1 ++s0: 0xffffffff -1 ++s1: 0xff 255 ++funFloat: ++a0: 1.000000 ++a1: 1.100000 ++a2: 1.200000 ++a3: 1.300000 ++a4: 1.400000 ++a5: 1.500000 ++a6: 1.600000 ++a7: 1.700000 ++s0: 1.800000 ++s1: 1.900000 ++funDouble: ++a0: 1.000000 ++a1: 1.100000 ++a2: 1.200000 ++a3: 1.300000 ++a4: 1.400000 ++a5: 1.500000 ++a6: 1.600000 ++a7: 1.700000 ++s0: 1.800000 ++s1: 1.900000 +Index: ghc-9.10.2/testsuite/tests/codeGen/should_run/CCallConv_c.c +=================================================================== +--- /dev/null ++++ ghc-9.10.2/testsuite/tests/codeGen/should_run/CCallConv_c.c +@@ -0,0 +1,91 @@ ++#include "stdint.h" ++#include "stdio.h" ++ ++int64_t fun8(int8_t a0, uint8_t a1, int8_t a2, int8_t a3, int8_t a4, int8_t a5, ++ int8_t a6, int8_t a7, int8_t s0, uint8_t s1) { ++ printf("fun8:\n"); ++ printf("a0: %#x %hhd\n", a0, a0); ++ printf("a1: %#x %hhu\n", a1, a1); ++ printf("a2: %#x %hhd\n", a2, a2); ++ printf("a3: %#x %hhd\n", a3, a3); ++ printf("a4: %#x %hhd\n", a4, a4); ++ printf("a5: %#x %hhd\n", a5, a5); ++ printf("a6: %#x %hhd\n", a6, a6); ++ printf("a7: %#x %hhd\n", a7, a7); ++ printf("s0: %#x %hhd\n", s0, s0); ++ printf("s1: %#x %hhu\n", s1, s1); ++ ++ return a0 + a1 + a2 + a3 + a4 + a5 + a6 + a7 + s0 + s1; ++} ++ ++int64_t fun16(int16_t a0, uint16_t a1, int16_t a2, int16_t a3, int16_t a4, ++ int16_t a5, int16_t a6, int16_t a7, int16_t s0, uint16_t s1) { ++ printf("fun16:\n"); ++ printf("a0: %#x %hd\n", a0, a0); ++ printf("a1: %#x %hu\n", a1, a1); ++ printf("a2: %#x %hd\n", a2, a2); ++ printf("a3: %#x %hd\n", a3, a3); ++ printf("a4: %#x %hd\n", a4, a4); ++ printf("a5: %#x %hd\n", a5, a5); ++ printf("a6: %#x %hd\n", a6, a6); ++ printf("a7: %#x %hd\n", a7, a7); ++ printf("s0: %#x %hd\n", s0, s0); ++ printf("s1: %#x %hu\n", s1, s1); ++ ++ return a0 + a1 + a2 + a3 + a4 + a5 + a6 + a7 + s0 + s1; ++} ++ ++int64_t fun32(int32_t a0, uint32_t a1, int32_t a2, int32_t a3, int32_t a4, ++ int32_t a5, int32_t a6, int32_t a7, int32_t s0, uint32_t s1) { ++ printf("fun32:\n"); ++ printf("a0: %#x %d\n", a0, a0); ++ printf("a1: %#x %u\n", a1, a1); ++ printf("a2: %#x %d\n", a2, a2); ++ printf("a3: %#x %d\n", a3, a3); ++ printf("a4: %#x %d\n", a4, a4); ++ printf("a5: %#x %d\n", a5, a5); ++ printf("a6: %#x %d\n", a6, a6); ++ printf("a7: %#x %d\n", a7, a7); ++ printf("s0: %#x %d\n", s0, s0); ++ printf("s1: %#x %u\n", s1, s1); ++ ++ // Ensure the addition happens in long int (not just int) precission. ++ // Otherwise, the result is truncated during the operation. ++ int64_t force_int64_precission = 0; ++ return force_int64_precission + a0 + a1 + a2 + a3 + a4 + a5 + a6 + a7 + s0 + ++ s1; ++} ++ ++float funFloat(float a0, float a1, float a2, float a3, float a4, float a5, ++ float a6, float a7, float s0, float s1) { ++ printf("funFloat:\n"); ++ printf("a0: %f\n", a0); ++ printf("a1: %f\n", a1); ++ printf("a2: %f\n", a2); ++ printf("a3: %f\n", a3); ++ printf("a4: %f\n", a4); ++ printf("a5: %f\n", a5); ++ printf("a6: %f\n", a6); ++ printf("a7: %f\n", a7); ++ printf("s0: %f\n", s0); ++ printf("s1: %f\n", s1); ++ ++ return a0 + a1 + a2 + a3 + a4 + a5 + a6 + a7 + s0 + s1; ++} ++ ++double funDouble(double a0, double a1, double a2, double a3, double a4, double a5, ++ double a6, double a7, double s0, double s1) { ++ printf("funDouble:\n"); ++ printf("a0: %f\n", a0); ++ printf("a1: %f\n", a1); ++ printf("a2: %f\n", a2); ++ printf("a3: %f\n", a3); ++ printf("a4: %f\n", a4); ++ printf("a5: %f\n", a5); ++ printf("a6: %f\n", a6); ++ printf("a7: %f\n", a7); ++ printf("s0: %f\n", s0); ++ printf("s1: %f\n", s1); ++ ++ return a0 + a1 + a2 + a3 + a4 + a5 + a6 + a7 + s0 + s1; ++}

1 0

[Report] Packages Restricting Arches
by root 29 Jun '25

29 Jun '25

Package that edited their arches constraints (1) ============================================= - american-fuzzy-lop was ExclusiveArch: x86_64 s390x is ExclusiveArch: x86_64 List of packages currently excluding arches (2453) =========================================== - 0ad ExclusiveArch: %{ix86} x86_64 %{arm} aarch64 ppc64le - 0install ExcludeArch: %{ix86} - 389-ds-base ExcludeArch: i686 - 4ti2 ExcludeArch: %{ix86} - 90-Second-Portraits ExclusiveArch: %{arm} %{ix86} x86_64 aarch64 ppc64le riscv64 - ALL ExcludeArch: %{ix86} s390x - AcetoneISO ExcludeArch: ppc %{power64} s390x - Agda ExcludeArch: %{ix86} armv7hl - Agda-stdlib ExcludeArch: armv7hl %{ix86} - BareBonesBrowserLaunch ExclusiveArch: %{java_arches} noarch - CFR ExclusiveArch: %{java_arches} noarch - COPASI ExcludeArch: %{ix86} - CardManager ExclusiveArch: %{java_arches} noarch - CubicSDR ExcludeArch: i686 - CuraEngine ExcludeArch: %{ix86} - CuraEngine_grpc_definitions ExcludeArch: %{ix86} - DSDP ExcludeArch: %{ix86} - E ExcludeArch: %{ix86} - GAPDoc ExcludeArch: %{ix86} - GoldenCheetah ExclusiveArch: %{qt6_qtwebengine_arches} - GtkAda ExclusiveArch: %{GPRbuild_arches} - GtkAda3 ExclusiveArch: %{GPRbuild_arches} - HPCombi ExclusiveArch: x86_64 %{arm64} - IPAddress ExclusiveArch: %{java_arches} noarch - IQmol ExcludeArch: %{ix86} - InsightToolkit ExcludeArch: %{ix86} - JUnitParams ExclusiveArch: %{java_arches} noarch - Java-WebSocket ExclusiveArch: %{java_arches} noarch - L-function ExcludeArch: %{ix86} - MUSIC ExcludeArch: %{ix86} - Macaulay2 ExcludeArch: %{ix86} %{power64} - Maelstrom ExcludeArch: %{ix86} - Mars ExclusiveArch: %{java_arches} noarch - Mayavi ExcludeArch: %{ix86} - NiaAML-GUI ExcludeArch: %{ix86} - OpenColorIO ExcludeArch: i686 ExclusiveArch: x86_64 ppc64le - OpenImageIO ExcludeArch: i686 ExclusiveArch: x86_64 ppc64le - OpenMolcas ExclusiveArch: x86_64 aarch64 ppc64le s390x - OpenStego ExclusiveArch: %{java_arches} noarch - Pencil2D ExcludeArch: %{ix86} - PragmARC ExclusiveArch: %{GPRbuild_arches} - R-IRkernel ExcludeArch: %{ix86} - R-V8 ExclusiveArch: %{nodejs_arches} - R-ape ExcludeArch: %{ix86} - R-igraph ExcludeArch: %{ix86} - R-kernlab ExcludeArch: %{ix86} s390x - R-rJava ExclusiveArch: %{java_arches} - R-rtracklayer ExcludeArch: i686 - Random123 ExcludeArch: mips64r2 mips32r2 s390 - RdRand ExclusiveArch: %{ix86} x86_64 - SLOF ExclusiveArch: ppc64le - Singular ExcludeArch: %{ix86} - TOPCOM ExcludeArch: %{ix86} - VulkanMemoryAllocator ExcludeArch: %{ix86} - YafaRay ExclusiveArch: %{ix86} x86_64 - aardvark-dns ExclusiveArch: %{golang_arches_future} ExclusiveArch: aarch64 ppc64le s390x x86_64 - abiword ExcludeArch: %{ix86} - accel-config ExclusiveArch: %{ix86} x86_64 - accel-ppp ExcludeArch: %{ix86} - acpica-tools ExcludeArch: i686 armv7hl s390x - acpid ExclusiveArch: x86_64 aarch64 riscv64 - act ExcludeArch: %{ix86} - admesh ExcludeArch: %{ix86} - admeshgui ExcludeArch: %{ix86} - aegisub ExcludeArch: ppc64le s390x - aemu ExcludeArch: %{ix86} %{power64} s390x - agenda ExcludeArch: %{ix86} - ahven ExclusiveArch: %{GPRbuild_arches} - algobox ExclusiveArch: %{qt5_qtwebengine_arches} - alienarena ExcludeArch: s390x - alizams ExcludeArch: %{power64} %{ix86} s390x - alt-ergo ExcludeArch: %{ix86} - amdsmi ExclusiveArch: x86_64 - american-fuzzy-lop ExclusiveArch: x86_64 - amg4psblas ExcludeArch: %{ix86} - anaconda ExcludeArch: %{ix86} - android-tools ExcludeArch: ppc ppc64 s390x ppc64le - anet ExclusiveArch: %{GPRbuild_arches} - ansible-collection-microsoft-sql ExcludeArch: i686 - ant ExclusiveArch: %{java_arches} noarch - ant-antunit ExclusiveArch: %{java_arches} noarch - ant-contrib ExclusiveArch: %{java_arches} noarch - antlr ExclusiveArch: %{java_arches} - antlr3 ExclusiveArch: %{java_arches} - antlr4-project ExclusiveArch: %{java_arches} - antlrworks ExclusiveArch: %{java_arches} noarch - aopalliance ExclusiveArch: %{java_arches} noarch - apache-commons-beanutils ExclusiveArch: %{java_arches} noarch - apache-commons-cli ExclusiveArch: %{java_arches} noarch - apache-commons-codec ExclusiveArch: %{java_arches} noarch - apache-commons-collections ExclusiveArch: %{java_arches} noarch - apache-commons-collections4 ExclusiveArch: %{java_arches} noarch - apache-commons-compress ExclusiveArch: %{java_arches} noarch - apache-commons-digester ExclusiveArch: %{java_arches} noarch - apache-commons-exec ExclusiveArch: %{java_arches} noarch - apache-commons-io ExclusiveArch: %{java_arches} noarch - apache-commons-jxpath ExclusiveArch: %{java_arches} noarch - apache-commons-lang3 ExclusiveArch: %{java_arches} noarch - apache-commons-logging ExclusiveArch: %{java_arches} noarch - apache-commons-math ExclusiveArch: %{java_arches} noarch - apache-commons-modeler ExclusiveArch: %{java_arches} noarch - apache-commons-net ExclusiveArch: %{java_arches} noarch - apache-commons-parent ExclusiveArch: %{java_arches} noarch - apache-commons-pool ExclusiveArch: %{java_arches} noarch - apache-commons-vfs ExclusiveArch: %{java_arches} noarch - apache-ivy ExclusiveArch: %{java_arches} noarch - apache-logging-parent ExclusiveArch: %{java_arches} noarch - apache-parent ExclusiveArch: %{java_arches} noarch - apache-resource-bundles ExclusiveArch: %{java_arches} noarch - apache-sshd ExclusiveArch: %{java_arches} noarch - apiguardian ExclusiveArch: %{java_arches} noarch - appeditor ExcludeArch: %{ix86} - appstream-generator ExclusiveArch: %{ldc_arches} - apricots ExcludeArch: ppc64le aarch64 - apron ExcludeArch: %{ix86} - aquamarine ExcludeArch: %{ix86} - aqute-bnd ExclusiveArch: %{java_arches} noarch - arbor ExcludeArch: mips64r2 mips32r2 s390x %{ix86} - arc-theme ExcludeArch: %{ix86} - argparse ExcludeArch: %{ix86} - args4j ExclusiveArch: %{java_arches} noarch - arianna ExclusiveArch: %{qt6_qtwebengine_arches} - arm-compute-library ExcludeArch: i686 ppc64le s390x - arm-none-eabi-binutils-cs ExcludeArch: %{ix86} - arm-none-eabi-gcc-cs ExcludeArch: %{ix86} - arpwatch ExcludeArch: %{ix86} - asahi-installer ExcludeArch: s390x - asdcplib ExcludeArch: %{ix86} %{arm} - asmjit ExclusiveArch: aarch64 x86_64 - assertj-core ExclusiveArch: %{java_arches} noarch - astromenace ExcludeArch: ppc64 s390x - astrometry ExcludeArch: %{ix86} - asv ExcludeArch: %{ix86} - atlantik ExcludeArch: %{ix86} - atomic-queue ExcludeArch: %{ix86} - aubit4gl ExcludeArch: i686 s390x ppc64le - audacity ExcludeArch: %{ix86} s390x - audiocd-kio ExclusiveArch: x86_64 ppc64le aarch64 %{arm} - aunit ExclusiveArch: %{GPRbuild_arches} - auryn ExcludeArch: %{ix86} - auto ExclusiveArch: %{java_arches} noarch - autolink-java ExclusiveArch: noarch %{java_arches} - avgtime ExclusiveArch: %{ldc_arches} - avr-gcc ExcludeArch: %{ix86} - avrdude ExcludeArch: s390x - aws ExclusiveArch: %{GPRbuild_arches} - aws-c-auth ExcludeArch: %{ix86} ExcludeArch: s390x - aws-c-cal ExcludeArch: s390x - aws-c-common ExcludeArch: s390x - aws-c-compression ExcludeArch: s390x - aws-c-event-stream ExcludeArch: %{ix86} ExcludeArch: s390x - aws-c-http ExcludeArch: %{ix86} ExcludeArch: s390x - aws-c-io ExcludeArch: %{ix86} ExcludeArch: s390x - aws-c-mqtt ExcludeArch: %{ix86} ExcludeArch: s390x - aws-c-s3 ExcludeArch: %{ix86} ExcludeArch: s390x - aws-c-sdkutils ExcludeArch: s390x - aws-checksums ExcludeArch: s390x - awscli2 ExcludeArch: s390x - azove ExcludeArch: %{ix86} - azure-cli ExclusiveArch: %{java_arches} noarch - batik ExclusiveArch: %{java_arches} noarch - bcachefs-tools ExcludeArch: %{ix86} %{arm32} - bcal ExclusiveArch: x86_64 aarch64 ppc64le s390x riscv64 - bcc ExclusiveArch: x86_64 %{power64} aarch64 s390x armv7hl riscv64 - bcel ExclusiveArch: %{java_arches} noarch - bcftools ExcludeArch: s390x - bcm283x-firmware ExclusiveArch: aarch64 - beansbinding ExclusiveArch: %{java_arches} noarch - bear ExcludeArch: %{ix86} - bear-factory ExcludeArch: ppc64le - berusky2 ExclusiveArch: %{ix86} x86_64 %{arm} aarch64 %{mips} riscv64 - beust-jcommander ExclusiveArch: %{java_arches} noarch - bibletime ExclusiveArch: %{qt6_qtwebengine_arches} - bigloo ExcludeArch: %{ix86} - binaryen ExcludeArch: ppc64 s390x - binutils ExcludeArch: aarch64-linux-gnu aarch64-redhat-linux ExcludeArch: ppc64le-linux-gnu ppc64le-redhat-linux ExcludeArch: s390x-linux-gnu s390x-redhat-linux ExcludeArch: x86_64-linux-gnu x86_64-redhat-linux i686-linux-gnu i686-redhat-linux - biosdevname ExclusiveArch: %{ix86} x86_64 - biosig4c++ ExcludeArch: %{ix86} - blender ExcludeArch: %{ix86} %{arm} - bless ExclusiveArch: %mono_arches - bliss ExcludeArch: %{ix86} - bloaty ExcludeArch: %{ix86} - blogc ExcludeArch: %{ix86} - bluez-hcidump ExcludeArch: s390 s390x - bochs ExcludeArch: s390x i686 - boinc-client ExcludeArch: s390x - bolzplatz2006 ExclusiveArch: %{java_arches} - bootc ExcludeArch: %{ix86} - bouncycastle ExclusiveArch: %{java_arches} noarch - bout++ ExcludeArch: %{ix86} - bowtie ExcludeArch: i686 armv7hl - bowtie2 ExcludeArch: %{ix86} %{arm} s390x - box64 ExclusiveArch: aarch64 riscv64 ppc64le %{x86_64} - boxes ExcludeArch: %{ix86} - bpfilter ExclusiveArch: %{x86_64} %{arm64} - bpfman ExcludeArch: %{ix86} - bpftool ExcludeArch: %{ix86} - bpftop ExcludeArch: %{ix86} - bpftrace ExclusiveArch: x86_64 %{power64} aarch64 s390x riscv64 - brazil ExclusiveArch: %{java_arches} noarch - breakid ExcludeArch: %{ix86} - brewtarget ExcludeArch: %{ix86} - bsf ExclusiveArch: %{java_arches} noarch - bsh ExclusiveArch: %{java_arches} noarch - btrfs-efi ExclusiveArch: %{efi} - build-helper-maven-plugin ExclusiveArch: %{java_arches} noarch - buildah ExclusiveArch: %{golang_arches_future} ExclusiveArch: aarch64 ppc64le s390x x86_64 - buildbox ExcludeArch: %{ix86} - buildstream ExcludeArch: %{ix86} - buildstream-plugins ExcludeArch: %{ix86} - busybox ExcludeArch: i686 s390x - bvi ExcludeArch: %{ix86} - bwping ExcludeArch: %{ix86} - byebyebios ExclusiveArch: x86_64 - byte-buddy ExclusiveArch: %{java_arches} noarch - byteman ExclusiveArch: %{java_arches} noarch - c4core ExcludeArch: %{ix86} - c4fs ExcludeArch: %{ix86} - c4log ExcludeArch: %{ix86} - cachelib ExclusiveArch: x86_64 aarch64 ppc64le - caddy ExclusiveArch: %{golang_arches} ExclusiveArch: %{golang_arches_future} - cadical ExcludeArch: %{ix86} - calamares ExclusiveArch: %{ix86} x86_64 aarch64 riscv64 - calceph ExcludeArch: %{ix86} - calibre ExclusiveArch: aarch64 x86_64 - calligra ExcludeArch: %{ix86} - calls ExcludeArch: i686 - cambozola ExclusiveArch: %{java_arches} noarch - canl-java ExclusiveArch: %{java_arches} noarch - cantera ExcludeArch: %{ix86} - carat ExcludeArch: %{ix86} - casc ExcludeArch: %{ix86} - cataclysm-dda ExcludeArch: i686 - catatonit ExclusiveArch: %{golang_arches_future} ExclusiveArch: aarch64 ppc64le s390x x86_64 - ccdciel ExclusiveArch: %{fpc_arches} ExcludeArch: %{ix86} - ccluster ExcludeArch: %{ix86} - cdcollect ExclusiveArch: %{mono_arches} - cdrdao ExcludeArch: s390 s390x - cef ExclusiveArch: x86_64 aarch64 - ceph ExcludeArch: i686 armv7hl ExclusiveArch: x86_64 aarch64 ppc64le s390x - ceres-solver ExcludeArch: ppc64 - cfn-lint ExcludeArch: %{ix86} - cglib ExclusiveArch: %{java_arches} noarch - cgreen ExcludeArch: s390x - chafa ExcludeArch: %{ix86} - chatterino2 ExcludeArch: %{ix86} - chatty ExcludeArch: i686 - checkpointctl ExclusiveArch: %{golang_arches_future} - chibicc ExclusiveArch: x86_64 - chromium ExclusiveArch: x86_64 aarch64 ppc64le ExclusiveArch: x86_64 aarch64 - cinnamon ExcludeArch: %{ix86} - cinnamon-control-center ExcludeArch: %{ix86} - cinnamon-desktop ExcludeArch: %{ix86} - cinnamon-menus ExcludeArch: %{ix86} - cinnamon-screensaver ExcludeArch: %{ix86} - cinnamon-session ExcludeArch: %{ix86} - cinnamon-settings-daemon ExcludeArch: %{ix86} - cjdns ExclusiveArch: %{nodejs_arches} - cjs ExcludeArch: %{ix86} - classloader-leak-test-framework ExclusiveArch: %{java_arches} noarch - classpathless-compiler ExclusiveArch: %{java_arches} noarch - cld2 ExcludeArch: ppc64 s390x - clibs-list ExcludeArch: %{ix86} - clojure ExclusiveArch: %{java_arches} noarch - clojure-core-specs-alpha ExclusiveArch: %{java_arches} noarch - clojure-maven-plugin ExclusiveArch: %{java_arches} noarch - clojure-spec-alpha ExclusiveArch: %{java_arches} noarch - cloudcompare ExcludeArch: %{ix86} - clover2 ExcludeArch: armv7hl - cmospwd ExclusiveArch: %{ix86} x86_64 - cmrt ExclusiveArch: %{ix86} x86_64 ia64 - coan ExcludeArch: ppc64 s390x - coccinelle ExcludeArch: %{ix86} - cockpit ExcludeArch: %{ix86} - cockpit-ostree ExcludeArch: %{ix86} - cocoalib ExcludeArch: %{ix86} - codeblocks ExcludeArch: %{ix86} - codehaus-parent ExclusiveArch: %{java_arches} noarch - coeurl ExcludeArch: %{ix86} - cohomCalg ExcludeArch: %{ix86} - coin-or-Bonmin ExcludeArch: %{ix86} - coin-or-HiGHS ExcludeArch: %{ix86} - coin-or-Ipopt ExcludeArch: %{ix86} - coin-or-lemon ExcludeArch: %{ix86} - colorful ExclusiveArch: %{fpc_arches} - colossus ExclusiveArch: %{java_arches} noarch - compiz-plugins-experimental ExcludeArch: s390 s390x - conmon ExclusiveArch: %{golang_arches_future} - console-image-viewer ExclusiveArch: %{java_arches} noarch - containernetworking-plugins ExclusiveArch: %{golang_arches} - containers-common ExclusiveArch: %{golang_arches} noarch - contour-terminal ExclusiveArch: x86_64 aarch64 - contractor ExcludeArch: %{ix86} - conu ExcludeArch: ppc64 - coolreader ExcludeArch: %{ix86} - copr-rpmbuild ExcludeArch: %{ix86} - coq ExclusiveArch: %{ocaml_native_compiler} - corectrl ExcludeArch: %{ix86} - cortado ExclusiveArch: %{java_arches} noarch - cosmic-app-library ExcludeArch: %{ix86} - cosmic-applets ExcludeArch: %{ix86} - cosmic-bg ExcludeArch: %{ix86} - cosmic-comp ExcludeArch: %{ix86} - cosmic-edit ExcludeArch: %{ix86} - cosmic-files ExcludeArch: %{ix86} - cosmic-greeter ExcludeArch: %{ix86} - cosmic-idle ExcludeArch: %{ix86} - cosmic-launcher ExcludeArch: %{ix86} - cosmic-notifications ExcludeArch: %{ix86} - cosmic-osd ExcludeArch: %{ix86} - cosmic-panel ExcludeArch: %{ix86} - cosmic-player ExcludeArch: %{ix86} - cosmic-randr ExcludeArch: %{ix86} - cosmic-screenshot ExcludeArch: %{ix86} - cosmic-session ExcludeArch: %{ix86} - cosmic-settings ExcludeArch: %{ix86} - cosmic-settings-daemon ExcludeArch: %{ix86} - cosmic-store ExcludeArch: %{ix86} - cosmic-term ExcludeArch: %{ix86} - cosmic-workspaces ExcludeArch: %{ix86} - cp2k ExcludeArch: %{ix86} s390x - cproc ExclusiveArch: aarch64 riscv64 x86_64 - cpu-x ExclusiveArch: i686 x86_64 aarch64 - cpufetch ExclusiveArch: %{arm} aarch64 x86_64 ppc ppc64 ppc64le %{riscv} - cpuid ExclusiveArch: %{ix86} x86_64 - cpuinfo ExclusiveArch: x86_64 aarch64 - cqrlog ExclusiveArch: %{fpc_arches} - cramjam-cli ExcludeArch: %{ix86} - crash ExclusiveArch: %{ix86} ia64 x86_64 ppc ppc64 s390 s390x %{arm} aarch64 ppc64le - crash-gcore-command ExclusiveArch: aarch64 ppc64le x86_64 - crash-trace-command ExclusiveArch: aarch64 ppc64le s390x x86_64 - credentials-fetcher ExclusiveArch: x86_64 aarch64 s390x - crest ExcludeArch: s390x - cri-o ExclusiveArch: %{?go_arches:%{go_arches}}%{!?go_arches:%{ix86} x86_64 aarch64 %{arm}} - cri-tools ExclusiveArch: %{?go_arches:%{go_arches}}%{!?go_arches:%{ix86} x86_64 aarch64 %{arm}} - criu ExclusiveArch: x86_64 %{arm} ppc64le aarch64 s390x riscv64 - crosswords ExcludeArch: s390x - crun ExclusiveArch: %{golang_arches_future} ExclusiveArch: aarch64 ppc64le riscv64 s390x x86_64 - crun-vm ExcludeArch: %{ix86} - cryfs ExcludeArch: i686 - cryptlib ExclusiveArch: x86_64 aarch64 ppc64le riscv64 - crypto-policies ExclusiveArch: %{java_arches} noarch - cryptobone ExclusiveArch: x86_64 ppc64le aarch64 riscv64 - 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gap-pkg-toric ExcludeArch: %{ix86} - gap-pkg-transgrp ExcludeArch: %{ix86} - gap-pkg-typeset ExcludeArch: %{ix86} - gap-pkg-utils ExcludeArch: %{ix86} - gap-pkg-uuid ExcludeArch: %{ix86} - gap-pkg-xmod ExcludeArch: %{ix86} - gap-pkg-zeromqinterface ExcludeArch: %{ix86} - gappa ExcludeArch: %{ix86} - gappalib-coq ExclusiveArch: %{ocaml_native_compiler} - gauche ExcludeArch: armv7hl - gbrainy ExclusiveArch: %mono_arches - gcolor2 ExcludeArch: %{ix86} - gdb-exploitable ExclusiveArch: x86_64 i386 ExclusiveArch: x86_64 noarch - gdb-gef ExclusiveArch: x86_64 - gdl ExcludeArch: %{ix86} - gearhead1 ExclusiveArch: %{fpc_arches} - gearhead2 ExclusiveArch: %{fpc_arches} - geeqie ExcludeArch: %{ix86} - genimage ExcludeArch: s390x - geopmd ExclusiveArch: x86_64 - getdp ExcludeArch: %{ix86} - gfan ExcludeArch: %{ix86} - gfs2-utils ExcludeArch: %{ix86} - gfxstream ExcludeArch: %{ix86} %{power64} s390x - ghc-ghc-lib-parser ExcludeArch: %{ix86} - ghc-gi-gtk ExcludeArch: armv7hl - ghc9.2 ExcludeArch: armv7hl - ghdl ExclusiveArch: %{GNAT_arches} ExcludeArch: armv7hl %{ix86} - gherkin ExcludeArch: %{ix86} - ghostwriter ExclusiveArch: %{qt6_qtwebengine_arches} - gimp ExcludeArch: s390x - gimp-data-extras ExcludeArch: s390x - gimp-fourier-plugin ExcludeArch: %{ix86} s390x - gimp-help ExcludeArch: s390x - gimp-resynthesizer ExcludeArch: s390x - gio-sharp ExclusiveArch: %mono_arches - gir-to-d ExclusiveArch: %{ldc_arches} - git-lfs ExcludeArch: %{ix86} - git-octopus ExclusiveArch: %{?go_arches:%{go_arches}}%{!?go_arches:%{ix86} x86_64 aarch64 %{arm}} - gitqlient ExclusiveArch: %{qt5_qtwebengine_arches} - giver ExclusiveArch: %{mono_arches} - gkeyfile-sharp ExclusiveArch: %mono_arches - gkrellm-wifi ExcludeArch: s390 s390x - glava ExcludeArch: %{ix86} - glibd ExclusiveArch: %{ldc_arches} - gloo ExcludeArch: i686 - glow ExclusiveArch: %{golang_arches_future} - glsl-analyzer ExclusiveArch: %{zig_arches} - glycin ExcludeArch: %{ix86} - gmic ExcludeArch: s390x - gmsh ExcludeArch: %{ix86} - gmult ExcludeArch: %{ix86} - gn ExcludeArch: %{ix86} - gnatcoll ExclusiveArch: %{GPRbuild_arches} - gnatcoll-bindings ExclusiveArch: %{GPRbuild_arches} - gnatcoll-db ExclusiveArch: %{GPRbuild_arches} - gnofract4d ExcludeArch: %{ix86} - gnome-applets ExcludeArch: %{ix86} - gnome-bluetooth ExcludeArch: s390 s390x - gnome-bluetooth3.34 ExcludeArch: s390 s390x - gnome-boxes ExclusiveArch: x86_64 - gnome-chemistry-utils ExcludeArch: %{ix86} - gnome-console ExcludeArch: %{ix86} - gnome-desktop-sharp ExclusiveArch: %mono_arches - gnome-do ExclusiveArch: %mono_arches ExcludeArch: armv7hl - gnome-flashback ExcludeArch: %{ix86} - gnome-initial-setup ExcludeArch: %{ix86} - gnome-keyring-sharp ExclusiveArch: %mono_arches - gnome-monitor-config ExcludeArch: %{ix86} - gnome-panel ExcludeArch: %{ix86} - gnome-rdp ExclusiveArch: %{mono_arches} ExcludeArch: %{ix86} - gnome-session ExcludeArch: %{ix86} - gnome-sharp ExclusiveArch: %mono_arches - gnome-shell ExcludeArch: %{ix86} - gnome-software ExcludeArch: %{ix86} - gnome-subtitles ExclusiveArch: %mono_arches - gnome-terminal ExcludeArch: %{ix86} - gnu-efi ExclusiveArch: %{efi} - gnucash ExcludeArch: %{ix86} ExcludeArch: ppc64 s390x - gnumeric ExcludeArch: %{ix86} - go-bindata ExclusiveArch: %{?go_arches:%{go_arches}}%{!?go_arches:%{ix86} x86_64 %{arm}} - godot ExcludeArch: s390x - godot3 ExcludeArch: ppc64 ppc64le s390x - goffice ExcludeArch: %{ix86} - golang ExclusiveArch: %{golang_arches} - golang-entgo-ent ExcludeArch: %{arm32} %{ix86} - golang-github-ebitengine-purego ExcludeArch: ppc64le s390x - golang-github-elliotchance-orderedmap ExcludeArch: aarch64 ExcludeArch: ppc64le ExcludeArch: s390x - golang-github-facebookincubator-nvdtools ExcludeArch: i686 armv7hl - golang-github-google-goterm ExcludeArch: ppc64le s390x - golang-github-hetznercloud-hcloud ExcludeArch: ppc64le s390x - golang-github-vultr-govultr-3 ExcludeArch: ppc64le s390x - goldendict-ng ExclusiveArch: aarch64 x86_64 - google-compute-engine-guest-configs ExcludeArch: %{ix86} - google-cpu_features ExcludeArch: s390x - google-gson ExclusiveArch: %{java_arches} noarch - google-guest-agent ExcludeArch: ppc64le s390x - google-guice ExclusiveArch: %{java_arches} noarch - google-osconfig-agent ExcludeArch: ppc64le s390x - gotcha ExcludeArch: %{ix86} - gotify-desktop ExcludeArch: %{ix86} - gotun ExclusiveArch: %{?go_arches:%{go_arches}}%{!?go_arches:%{ix86} x86_64 %{arm}} ExclusiveArch: x86_64 - gource ExcludeArch: ppc64le - goverlay ExclusiveArch: %{fpc_arches} - gpaste ExcludeArch: %{ix86} - gpaw ExcludeArch: ppc64 ExcludeArch: %{ix86} - gperftools ExcludeArch: s390 - gprbuild ExclusiveArch: %{GPRbuild_arches} - gprolog ExclusiveArch: x86_64 %{ix86} ppc alpha aarch64 - gr-air-modes ExcludeArch: %{ix86} - grafana ExclusiveArch: %{grafana_arches} - grafana-pcp ExclusiveArch: %{grafanapcp_arches} - gram_grep ExcludeArch: %{ix86} - greenboot ExcludeArch: s390x {%ix86} - gretl ExcludeArch: %{ix86} - gromacs ExcludeArch: i686 armv7hl s390x - grout ExcludeArch: %{ix86} ExcludeArch: s390x - grub2 ExcludeArch: s390 s390x %{ix86} - grub2-breeze-theme ExcludeArch: s390 s390x %{arm} - grubby ExcludeArch: %{ix86} - gsequencer ExcludeArch: i686 - gst-vosk ExclusiveArch: x86_64 aarch64 ppc64le - gthumb ExcludeArch: s390x - gtk-sharp-beans ExclusiveArch: %mono_arches - gtk-sharp2 ExclusiveArch: %mono_arches - gtk-sharp3 ExclusiveArch: %{mono_arches} - gtkd ExclusiveArch: %{ldc_arches} - gtkhash ExcludeArch: %{ix86} - gtkwave ExcludeArch: s390x - gtypist ExcludeArch: %{ix86} - guava ExclusiveArch: %{java_arches} noarch - gudev-sharp ExclusiveArch: %mono_arches - guestfs-tools ExclusiveArch: %{kernel_arches} ExcludeArch: %{power64} - guidelines-support-library ExcludeArch: %{ix86} - gum ExclusiveArch: %{golang_arches_future} - gvisor-tap-vsock ExclusiveArch: %{golang_arches_future} ExclusiveArch: aarch64 ppc64le s390x x86_64 - hamcrest ExclusiveArch: %{java_arches} noarch - hamlib ExcludeArch: i686 - harec ExclusiveArch: x86_64 aarch64 riscv64 - harmonyseq ExcludeArch: %{ix86} - hashcat ExcludeArch: %{ix86} ppc64 s390x - hawtjni ExclusiveArch: %{java_arches} noarch - haxe ExcludeArch: %{ix86} - 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rust-vhost-device-sound ExcludeArch: %{ix86} s390x - rust-vhost-device-vsock ExcludeArch: s390x ExcludeArch: %{ix86} - rust-vhost-user-backend ExcludeArch: %{ix86} - rust-virtio-queue ExcludeArch: i686 - rust-virtio-vsock ExcludeArch: s390x ExcludeArch: %{ix86} - rust-vm-memory ExcludeArch: %{ix86} - rust-vmm-sys-util ExclusiveArch: x86_64 aarch64 ppc64le riscv64 - rust-web-ext-native-messaging ExclusiveArch: %{rust_arches} - rust-zincati ExcludeArch: armv7hl i686 - rustup ExcludeArch: %{ix86} - rutabaga-gfx-ffi ExclusiveArch: x86_64 aarch64 - s2n-tls ExcludeArch: %{ix86} ExcludeArch: s390x - s390utils ExcludeArch: %{ix86} - sac ExclusiveArch: %{java_arches} noarch - saclib ExcludeArch: %{ix86} - safeint ExcludeArch: %{ix86} - safetyblanket ExclusiveArch: %{arm} %{ix86} x86_64 aarch64 ppc64le - sandia-omega-h ExcludeArch: %{ix86} s390x - sayonara ExcludeArch: %{ix86} - sbcl ExclusiveArch: %{ix86} x86_64 aarch64 %{power64} - sblim-cim-client ExclusiveArch: %{java_arches} noarch - sblim-cim-client2 ExclusiveArch: %{java_arches} noarch - sbsigntools ExclusiveArch: x86_64 aarch64 %{arm} %{ix86} - scalasca ExcludeArch: s390 s390x armv7hl i686 - scancode-toolkit ExcludeArch: %{ix86} - scannotation ExclusiveArch: %{java_arches} noarch - scip ExcludeArch: %{ix86} - scorep ExcludeArch: s390 s390x armv7hl i686 - scx_c_schedulers ExcludeArch: %{ix86} - sdl-hercules ExcludeArch: %{ix86} - sdljava ExclusiveArch: %{java_arches} - sdrangel ExclusiveArch: %{qt5_qtwebengine_arches} - sdrpp ExcludeArch: i686 - sdsl-lite ExclusiveArch: %{power64} x86_64 aarch64 - sdubby ExclusiveArch: %{efi} - seabios ExclusiveArch: x86_64 - seadrive-gui ExclusiveArch: %{qt6_qtwebengine_arches} - seafile-client ExclusiveArch: %{qt6_qtwebengine_arches} - seamonkey ExclusiveArch: x86_64 - sedutil ExcludeArch: ppc ppc64 s390 s390x - sentencepiece ExcludeArch: s390x - seqan3 ExclusiveArch: %{power64} x86_64 aarch64 - sequeler ExcludeArch: %{ix86} - sequence-library ExclusiveArch: %{java_arches} noarch - servicelog ExclusiveArch: ppc %{power64} - setserial ExcludeArch: s390 s390x - sexpp ExcludeArch: %{ix86} - sfnt2woff-zopfli ExcludeArch: %{ix86} - sharpfont ExclusiveArch: %mono_arches - sharpziplib ExclusiveArch: %{mono_arches} - shim ExclusiveArch: %{efi} ExcludeArch: %{ix86} ExcludeArch: %{arm} - shim-unsigned-aarch64 ExclusiveArch: aarch64 - shim-unsigned-x64 ExclusiveArch: x86_64 - shotcut ExcludeArch: %{ix86} - sigil ExclusiveArch: %{qt6_qtwebengine_arches} ExcludeArch: %{ix86} - sigul ExclusiveArch: x86_64 ExcludeArch: %{ix86} - simarrange ExcludeArch: %{ix86} - singularity-ce ExclusiveArch: %{go_arches} ExcludeArch: %{ix86} - siril ExcludeArch: %{ix86} - sisu ExclusiveArch: %{java_arches} noarch - skanpage ExclusiveArch: %{qt6_qtwebengine_arches} - ski ExcludeArch: %{ix86} ExcludeArch: aarch64 - skopeo ExclusiveArch: %{golang_arches_future} ExclusiveArch: aarch64 ppc64le s390x x86_64 - skrooge ExclusiveArch: %{qt6_qtwebengine_arches} - skychart ExclusiveArch: %{fpc_arches} ExcludeArch: %{ix86} - slapi-nis ExcludeArch: %{ix86} - sleef ExcludeArch: %{ix86} - slf4j ExclusiveArch: %{java_arches} noarch - slf4j2 ExclusiveArch: %{java_arches} noarch - slic3r ExcludeArch: %{ix86} ExcludeArch: ppc ppc64 s390 s390x %{ix86} ExcludeArch: ppc ppc64 s390 s390x - slick-greeter ExcludeArch: %{ix86} - slimdata ExcludeArch: ppc64 ppc sparcv9 sparc64 - slirp4netns ExclusiveArch: %{golang_arches_future} - slurm ExcludeArch: armv7hl ExcludeArch: i686 - smartmontools ExcludeArch: %{ix86} - snapd ExclusiveArch: %{?golang_arches}%{!?golang_arches:%{ix86} x86_64 %{arm} aarch64 ppc64le s390x} - snapshot ExcludeArch: %{ix86} - snip ExclusiveArch: %{java_arches} noarch - socnetv ExcludeArch: i686 - softnet-stat ExclusiveArch: %{rust_arches} - solidity ExcludeArch: %{ix86} s390x - soplex ExcludeArch: %{ix86} - sound-juicer ExcludeArch: s390 s390x - soundmodem ExcludeArch: i686 - soup-sharp ExclusiveArch: %{mono_arches} - sourcextractor++ ExcludeArch: %{ix86} - spacebar ExclusiveArch: %{java_arches} - sparkleshare ExclusiveArch: %{mono_arches} ExcludeArch: %{ix86} - spasm ExcludeArch: %{ix86} - spec-version-maven-plugin ExclusiveArch: %{java_arches} noarch - spec2nii ExcludeArch: %{ix86} - speed-dreams ExcludeArch: s390x - spicctrl ExclusiveArch: %{ix86} x86_64 - spice ExclusiveArch: x86_64 ExclusiveArch: %{ix86} x86_64 %{arm} aarch64 riscv64 - spice-parent ExclusiveArch: %{java_arches} noarch - springlobby ExclusiveArch: %{ix86} x86_64 - spyder ExcludeArch: %{ix86} ExclusiveArch: %{qt5_qtwebengine_arches} noarch - squeekboard ExcludeArch: %{ix86} - squirrel ExcludeArch: %{ix86} - sse2neon ExclusiveArch: aarch64 - stats-collect ExclusiveArch: %{ix86} x86_64 noarch - statsd ExclusiveArch: %{nodejs_arches} noarch - statserial ExcludeArch: s390 s390x - stax2-api ExclusiveArch: %{java_arches} noarch - steinberg-bravura-fonts ExcludeArch: %{ix86} - steinberg-petaluma-fonts ExcludeArch: %{ix86} - stellarium ExcludeArch: armv7hl i686 - stlsplit ExcludeArch: %{ix86} - stockfish ExcludeArch: %{ix86} - stp ExcludeArch: %{ix86} - stratis-cli ExclusiveArch: %{rust_arches} noarch ExcludeArch: i686 - stratisd ExclusiveArch: %{rust_arches} ExcludeArch: i686 ExclusiveArch: %{rust_arches} ExcludeArch: i686 ExclusiveArch: %{rust_arches} ExcludeArch: i686 - string-template-maven-plugin ExclusiveArch: %{java_arches} noarch - stringtemplate ExclusiveArch: %{java_arches} noarch - stringtemplate4 ExclusiveArch: %{java_arches} noarch - stripesnoop ExclusiveArch: %{ix86} x86_64 - subscription-manager-cockpit ExclusiveArch: %{nodejs_arches} noarch - supercollider ExclusiveArch: %{qt5_qtwebengine_arches} - supermin ExcludeArch: %{ix86} ExclusiveArch: %{kernel_arches} ExcludeArch: %{power64} - supernovas ExcludeArch: %{ix86} - supertux ExcludeArch: s390x - suricata ExcludeArch: ppc64le i686 - svt-vp9 ExclusiveArch: x86_64 - swayimg ExcludeArch: %{ix86} - swift-lang ExclusiveArch: x86_64 aarch64 - swiftlint ExclusiveArch: x86_64 aarch64 - swing-layout ExclusiveArch: %{java_arches} noarch - symengine ExcludeArch: %{ix86} - symfpu ExcludeArch: %{ix86} - symmetrica ExcludeArch: %{ix86} - sympol ExcludeArch: %{ix86} - sysbench ExclusiveArch: %{arm} %{ix86} x86_64 %{mips} aarch64 ExclusiveArch: %{arm} %{ix86} x86_64 %{mips} aarch64 ppc64le s390x - syslinux ExclusiveArch: %{ix86} x86_64 ExclusiveArch: %{ix86} x86_64 - system-rules ExclusiveArch: %{java_arches} noarch - systemd-boot ExclusiveArch: %efi - t-digest ExclusiveArch: %{java_arches} noarch - taglib-sharp ExclusiveArch: %{mono_arches} - tagsoup ExclusiveArch: %{java_arches} noarch - tarantool ExclusiveArch: %{ix86} x86_64 - task ExcludeArch: %{ix86} s390x %{power64} - tboot ExclusiveArch: %{ix86} x86_64 - tcmu-runner ExcludeArch: i686 armv7hl - tdlib ExclusiveArch: x86_64 aarch64 - teem ExcludeArch: %{ix86} - tellico ExclusiveArch: %{qt6_qtwebengine_arches} - templates_parser ExclusiveArch: %{GPRbuild_arches} - terminology ExcludeArch: s390x - terminus-fonts ExcludeArch: %{grub2_exclude_arches} - ternimal ExclusiveArch: %{rust_arches} - testcloud ExclusiveArch: %{kernel_arches} noarch - testng ExclusiveArch: %{java_arches} noarch - texlive ExclusiveArch: %{java_arches} noarch - texmaker ExclusiveArch: %{qt6_qtwebengine_arches} ExcludeArch: ppc64 ppc64le s390x - thermald ExclusiveArch: %{ix86} x86_64 - thunderbird ExcludeArch: aarch64 ExcludeArch: armv7hl - tiled ExcludeArch: %{ix86} - tilix ExclusiveArch: %{ldc_arches} - tinygo ExcludeArch: ppc64le s390x ExcludeArch: %{ix86} - tlf ExcludeArch: i686 - tlfloat ExcludeArch: %{ix86} - tokodon ExclusiveArch: %{qt6_qtwebengine_arches} - tomboy ExclusiveArch: %{mono_arches} - tomcat ExclusiveArch: %{java_arches} - tomcat-jakartaee-migration ExclusiveArch: %{java_arches} noarch - tomcat-native ExclusiveArch: %{java_arches} - tomcat-taglibs-parent ExclusiveArch: %{java_arches} noarch - torbrowser-launcher ExclusiveArch: %{ix86} x86_64 - touchegg ExcludeArch: %{ix86} - trace-cmd ExcludeArch: %{ix86} %{arm} - trafficserver ExcludeArch: %{arm} %{ix86} s390x - treelayout ExclusiveArch: %{java_arches} noarch - trilead-ssh2 ExclusiveArch: %{java_arches} noarch - trojita ExcludeArch: ppc64 ppc64le s390x - trunk ExcludeArch: %{ix86} - trustee-guest-components ExclusiveArch: x86_64 - tth ExcludeArch: %{ix86} - tucnak ExcludeArch: i686 - tuned-switcher ExcludeArch: %{ix86} - tvtime ExcludeArch: s390 s390x - typescript ExclusiveArch: %{nodejs_arches} noarch - tzdata ExcludeArch: i686 - uClibc ExclusiveArch: %{arm} %{ix86} x86_64 %{mips} - uboot-tools ExcludeArch: s390x - ucx ExclusiveArch: aarch64 ppc64le x86_64 riscv64 - udev-hid-bpf ExcludeArch: %{ix86} - uglify-js ExclusiveArch: %{nodejs_arches} noarch - ugrep ExcludeArch: %{ix86} - umr ExclusiveArch: x86_64 aarch64 ppc64le - unetbootin ExclusiveArch: %{ix86} x86_64 - unison ExcludeArch: %{ix86} - univocity-parsers ExclusiveArch: %{java_arches} noarch - ursa-major ExclusiveArch: noarch aarch64 ppc64le s390x x86_64 - usbip ExcludeArch: s390x - usd ExclusiveArch: aarch64 x86_64 - usnic-tools ExcludeArch: %{arm} - utop ExcludeArch: %{ix86} - uv ExcludeArch: %{ix86} - uwsgi ExcludeArch: %{ix86} - v-hacd ExcludeArch: %{ix86} - v8-314 ExclusiveArch: %{ix86} x86_64 %{arm} mips mipsel ppc ppc64 - vakzination ExclusiveArch: %{java_arches} - valgrind ExclusiveArch: %{ix86} x86_64 ppc ppc64 ppc64le s390x armv7hl aarch64 riscv64 - valijson ExcludeArch: %{ix86} - valkey ExcludeArch: %{ix86} - vaultwarden ExcludeArch: ppc64le s390x ExcludeArch: i686 - vboot-utils ExclusiveArch: %{arm} aarch64 %{ix86} x86_64 - vcpkg ExcludeArch: %{ix86} - vdo ExcludeArch: %{ix86} - vdr-tvscraper ExcludeArch: armv7hl - vecmath1.2 ExclusiveArch: %{java_arches} noarch - vectorscan ExcludeArch: s390x - velocity ExclusiveArch: %{java_arches} noarch - vhs ExclusiveArch: %{golang_arches_future} - viking ExcludeArch: s390x %{ix86} - vim-go ExclusiveArch: %{?golang_arches}%{!?golang_arches:%{ix86} x86_64 %{arm}} - vim-perl-support ExcludeArch: %{ix86} - vim-syntastic ExclusiveArch: %{java_arches} noarch - vinci ExcludeArch: %{ix86} - virt-p2v ExclusiveArch: x86_64 - virt-top ExcludeArch: %{ix86} ExcludeArch: %{power64} - virt-v2v ExcludeArch: %{ix86} ExclusiveArch: x86_64 - virtiofsd ExclusiveArch: %{rust_arches} ExcludeArch: i686 - virtualbox-guest-additions ExclusiveArch: i686 x86_64 - visidata ExcludeArch: %{ix86} - visualboyadvance-m ExcludeArch: %{ix86} s390x - vkd3d ExclusiveArch: %{ix86} x86_64 %{arm} ExclusiveArch: %{ix86} x86_64 %{arm} aarch64 - vkmark ExcludeArch: s390x - vmaf ExclusiveArch: x86_64 - voms-api-java ExclusiveArch: %{java_arches} noarch - voms-clients-java ExclusiveArch: %{java_arches} noarch - vosk-api ExclusiveArch: x86_64 aarch64 ppc64le - votca ExcludeArch: %{ix86} - vrq ExclusiveArch: %{ix86} x86_64 - vultr-cli ExcludeArch: ppc64le s390x - vxl ExcludeArch: %{ix86} - wangle ExclusiveArch: x86_64 aarch64 ppc64le riscv64 - warsow ExclusiveArch: %{ix86} x86_64 %{arm} - warsow-data ExclusiveArch: %{ix86} x86_64 %{arm} noarch ExclusiveArch: %{ix86} x86_64 %{arm} - warzone2100 ExcludeArch: %{ix86} - wasmedge ExclusiveArch: x86_64 aarch64 - wcstools ExcludeArch: %{ix86} - wdt ExclusiveArch: x86_64 aarch64 ppc64le - webkit2-sharp ExclusiveArch: %mono_arches - weld-parent ExclusiveArch: %{java_arches} noarch - wgrib2 ExcludeArch: %{ix86} - whipper ExcludeArch: s390x - whisper-cpp ExclusiveArch: x86_64 aarch64 ppc64le - why3 ExclusiveArch: %{ocaml_native_compiler} - widevine-installer ExclusiveArch: aarch64 - wildcard ExcludeArch: %{ix86} - wine ExclusiveArch: %{ix86} x86_64 ExclusiveArch: %{ix86} - wine-dxvk ExclusiveArch: %{ix86} x86_64 - wine-mono ExcludeArch: aarch64 %{power64} s390x s390 - winetricks ExclusiveArch: %{ix86} x86_64 %{arm} aarch64 ExcludeArch: ppc64 ppc64le - wivrn ExcludeArch: s390x %{ix86} - wlmaker ExcludeArch: %{ix86} - woff ExcludeArch: %{ix86} - woodstox-core ExclusiveArch: %{java_arches} noarch - workrave ExcludeArch: %{ix86} - ws-commons-util ExclusiveArch: %{java_arches} noarch - wsdl4j ExclusiveArch: %{java_arches} noarch - wsjtx ExcludeArch: i686 - wult ExclusiveArch: x86_64 - wxMaxima ExcludeArch: %{ix86} - x2goclient ExclusiveArch: x86_64 - x2gokdrive ExcludeArch: %{ix86} - x86-simd-sort ExclusiveArch: x86_64 - xalan-j2 ExclusiveArch: %{java_arches} noarch - xaos ExcludeArch: %{ix86} - xapps ExcludeArch: %{ix86} - xbean ExclusiveArch: %{java_arches} noarch - xbyak ExclusiveArch: x86_64 - xbyak_aarch64 ExclusiveArch: aarch64 - xdg-desktop-portal ExcludeArch: %{ix86} - xdg-desktop-portal-cosmic ExcludeArch: %{ix86} - xdg-desktop-portal-gnome ExcludeArch: %{ix86} - xdg-desktop-portal-gtk ExcludeArch: %{ix86} - xdg-desktop-portal-hyprland ExcludeArch: %{ix86} - xe-guest-utilities-latest ExclusiveArch: %{ix86} x86_64 - xed ExcludeArch: %{ix86} - xen ExclusiveArch: x86_64 aarch64 - xephem ExcludeArch: %{ix86} - xerces-j2 ExclusiveArch: %{java_arches} noarch - xeus ExcludeArch: %{ix86} - xeus-zmq ExcludeArch: %{ix86} - xfce4-sensors-plugin ExcludeArch: s390 s390x - xfce4-systemload-plugin ExcludeArch: %{ix86} - xgap ExcludeArch: %{ix86} - xiphos ExcludeArch: ppc64 - xlog ExcludeArch: i686 - xmedcon ExcludeArch: %{ix86} - xml-commons-apis ExclusiveArch: %{java_arches} noarch - xml-commons-resolver ExclusiveArch: %{java_arches} noarch - xml-maven-plugin ExclusiveArch: %{java_arches} noarch - xmlada ExclusiveArch: %{GPRbuild_arches} - xmlgraphics-commons ExclusiveArch: %{java_arches} noarch - xmlpull ExclusiveArch: %{java_arches} noarch - xmlstreambuffer ExclusiveArch: %{java_arches} noarch - xmlunit ExclusiveArch: %{java_arches} noarch - xmvn ExclusiveArch: %{java_arches} noarch - xmvn-connector-ivy ExclusiveArch: %{java_arches} noarch - xmvn-generator ExclusiveArch: %{java_arches} - xmvn5 ExclusiveArch: %{java_arches} noarch - xnnpack ExclusiveArch: x86_64 aarch64 - xnvme ExcludeArch: %{ix86} - xorg-x11-drv-amdgpu ExcludeArch: s390 s390x - xorg-x11-drv-ati ExcludeArch: s390 s390x - xorg-x11-drv-intel ExclusiveArch: %{ix86} x86_64 - xorg-x11-drv-nouveau ExcludeArch: s390 s390x - xorg-x11-drv-openchrome ExclusiveArch: %{ix86} x86_64 - xorg-x11-drv-qxl ExcludeArch: s390 s390x - xorg-x11-drv-synaptics ExcludeArch: s390 s390x - xorg-x11-drv-vmware ExclusiveArch: %{ix86} x86_64 ia64 - xreader ExcludeArch: %{ix86} - xrgears ExcludeArch: %{ix86} - xsensors ExcludeArch: %{ix86} - xsp ExclusiveArch: %mono_arches - xstream ExclusiveArch: %{java_arches} noarch - xtb ExcludeArch: s390x - xtensor-python ExcludeArch: armv7hl ppc64le s390x - xwayland-satellite ExcludeArch: %{ix86} - xz-java ExclusiveArch: %{java_arches} noarch - yarnpkg ExclusiveArch: %{nodejs_arches} - yices ExcludeArch: %{ix86} - yle-dl ExcludeArch: %{ix86} - yosys ExcludeArch: %{ix86} ExcludeArch: s390x - zcfan ExclusiveArch: x86_64 - zeal ExclusiveArch: %{qt6_qtwebengine_arches} - zenon ExclusiveArch: %{ocaml_native_compiler} - zeromq-ada ExclusiveArch: %{GPRbuild_arches} - zig ExclusiveArch: %{zig_arches} - zile ExcludeArch: ppc64le - zimpl ExcludeArch: %{ix86} - zlib-ada ExclusiveArch: %{GPRbuild_arches} - zola ExclusiveArch: %{rust_arches} - zstr ExcludeArch: %{ix86} - zswap-cli ExcludeArch: %{ix86} - zxcvbn-c ExcludeArch: %{ix86} - zycore-c ExcludeArch: s390x - zydis ExcludeArch: s390x - zynaddsubfx ExcludeArch: i686

1 0

Architecture specific change in rpms/icecat.git
by githook-noreply＠fedoraproject.org 28 Jun '25

28 Jun '25

The package rpms/icecat.git has added or updated architecture specific content in its spec file (ExclusiveArch/ExcludeArch or %ifarch/%ifnarch) in commit(s): https://src.fedoraproject.org/cgit/rpms/icecat.git/commit/?id=4b1c39c5226da… https://src.fedoraproject.org/cgit/rpms/icecat.git/commit/?id=ad3a48a2cd6a8… https://src.fedoraproject.org/cgit/rpms/icecat.git/commit/?id=b3710024139a3…. Change: +%ifarch %{arm64} riscv64 +%ifarch aarch64 riscv64 +%ifarch s390x %{arm64} Thanks. Full change: ============ commit 4b1c39c5226da827afc8f830c749f18e8a866651 Author: Antonio Trande <sagitter(a)fedoraproject.org> Date: Fri Jun 27 21:18:30 2025 +0200 Use system cbindgen diff --git a/icecat.spec b/icecat.spec index a043f65..66c60a8 100644 --- a/icecat.spec +++ b/icecat.spec @@ -9,7 +9,7 @@ ExcludeArch: %{ix86} %{arm} # Bundled cbindgen makes build slow. # Enable only if system cbindgen is not available. -%global use_bundled_cbindgen 1 +%global use_bundled_cbindgen 0 #################### @@ -759,6 +759,7 @@ desktop-file-validate %{buildroot}%{_datadir}/applications/*.desktop %if %{with langpacks_subpkg} %files +%dir %{langpackdir} %else %files -f %{name}.lang %endif @@ -769,9 +770,6 @@ desktop-file-validate %{buildroot}%{_datadir}/applications/*.desktop %{_datadir}/icons/hicolor/*x*/apps/%{name}*.png %{_metainfodir}/*.appdata.xml %dir %{icecatappdir} -%if %{with langpacks} -%dir %{langpackdir} -%endif %{icecatappdir}/glxtest %{icecatappdir}/vaapitest %{icecatappdir}/browser/ @@ -785,7 +783,7 @@ desktop-file-validate %{buildroot}%{_datadir}/applications/*.desktop %{icecatappdir}/dependentlibs.list %{icecatappdir}/pingsender %{icecatappdir}/gmp-clearkey/ -%ifarch aarch64 riscv64 +%ifarch %{arm64} riscv64 %{icecatappdir}/v4l2test %endif commit b3959a29a60c3c9ddd6d06ceeb9eb0aeb71dd8c5 Author: Antonio Trande <sagitter(a)fedoraproject.org> Date: Fri Jun 27 21:10:31 2025 +0200 Update launcher diff --git a/icecat.sh.in b/icecat.sh.in index ef9c34d..a269749 100644 --- a/icecat.sh.in +++ b/icecat.sh.in @@ -64,7 +64,7 @@ MOZ_DIST_BIN="$MOZ_LIB_DIR/icecat" MOZ_LANGPACKS_DIR="$MOZ_DIST_BIN/langpacks" MOZ_EXTENSIONS_PROFILE_DIR="$HOME/.mozilla/extensions/{ec8030f7-c20a-464f-9b0e-13a3a9e97384}" MOZ_PROGRAM="$MOZ_DIST_BIN/$MOZ_FIREFOX_FILE" -MOZ_LAUNCHER="$MOZ_DIST_BIN/icecat-bin" +MOZ_LAUNCHER="$MOZ_DIST_BIN/icecat" GETENFORCE_FILE="/usr/sbin/getenforce" ## @@ -269,13 +269,11 @@ do ;; esac done - -# Run the browser -debugging=0 -if [ $debugging = 1 ] -then - echo $MOZ_LAUNCHER $script_args $MOZ_PROGRAM "$@" -fi + +## Allow downgrade because during distro upgrade the build time can be +## older in newer version than the previous one. +## +export MOZ_ALLOW_DOWNGRADE=1 -exec $MOZ_LAUNCHER $script_args $MOZ_PROGRAM "$@" +exec $MOZ_PROGRAM "$@" commit 7da8ecdbdf49ed8c5d906197f15d7f2b508bf5c9 Author: Antonio Trande <sagitter(a)fedoraproject.org> Date: Fri Jun 27 16:12:21 2025 +0200 Fix launcher diff --git a/icecat.sh.in b/icecat.sh.in index f74bd16..ef9c34d 100644 --- a/icecat.sh.in +++ b/icecat.sh.in @@ -64,7 +64,7 @@ MOZ_DIST_BIN="$MOZ_LIB_DIR/icecat" MOZ_LANGPACKS_DIR="$MOZ_DIST_BIN/langpacks" MOZ_EXTENSIONS_PROFILE_DIR="$HOME/.mozilla/extensions/{ec8030f7-c20a-464f-9b0e-13a3a9e97384}" MOZ_PROGRAM="$MOZ_DIST_BIN/$MOZ_FIREFOX_FILE" -MOZ_LAUNCHER="$MOZ_DIST_BIN/run-icecat.sh" +MOZ_LAUNCHER="$MOZ_DIST_BIN/icecat-bin" GETENFORCE_FILE="/usr/sbin/getenforce" ## commit ae640ad6619bd8ca8c7fdf1c2bebc96c4463d077 Author: Antonio Trande <sagitter(a)fedoraproject.org> Date: Fri Jun 27 13:38:59 2025 +0200 Set linker flags diff --git a/icecat.spec b/icecat.spec index 5dd651b..a043f65 100644 --- a/icecat.spec +++ b/icecat.spec @@ -555,7 +555,7 @@ export CXXFLAGS="$CXXFLAGS" export CXXFLAGS="$CXXFLAGS -fpermissive -std=gnu++17" export CFLAGS="$MOZ_OPT_FLAGS -std=gnu17" -export LDFLAGS=$MOZ_LINK_FLAGS +export LDFLAGS="%{__global_ldflags} $MOZ_LINK_FLAGS -L%{_libdir} -L%{icecatappdir}" export PREFIX='%{_prefix}' export LIBDIR='%{_libdir}' export PKG_CONFIG="`which pkg-config`" commit ad3a48a2cd6a817a80244116f7fcd573cccac54f Author: Antonio Trande <sagitter(a)fedoraproject.org> Date: Fri Jun 27 12:41:37 2025 +0200 Add v4l2test file for ARM64 and RISC-V diff --git a/icecat.spec b/icecat.spec index 6c3d12d..5dd651b 100644 --- a/icecat.spec +++ b/icecat.spec @@ -785,6 +785,9 @@ desktop-file-validate %{buildroot}%{_datadir}/applications/*.desktop %{icecatappdir}/dependentlibs.list %{icecatappdir}/pingsender %{icecatappdir}/gmp-clearkey/ +%ifarch aarch64 riscv64 +%{icecatappdir}/v4l2test +%endif %changelog %autochangelog commit 21b334e53d5822e38e658413e2682c0858bb72b7 Author: Antonio Trande <sagitter(a)fedoraproject.org> Date: Thu Jun 26 23:02:01 2025 +0200 Fix Epoch diff --git a/icecat.spec b/icecat.spec index 544d495..6c3d12d 100644 --- a/icecat.spec +++ b/icecat.spec @@ -303,8 +303,8 @@ Suggests: mozilla-ublock-origin Provides: webclient %if 0%{?fedora} >= 40 -Obsoletes: icecat-wayland < 2:115.19.0-1 -Obsoletes: icecat-x11 < 2:115.19.0-1 +Obsoletes: icecat-wayland < 3:128.12.0-1 +Obsoletes: icecat-x11 < 3:128.12.0-1 %endif %description @@ -335,7 +335,7 @@ Extensions included to this version of IceCat: %if %{with langpacks_subpkg} %package langpacks Summary: IceCat langpacks -Requires: %{name} = 2:%{version}-%{release} +Requires: %{name} = 3:%{version}-%{release} %description langpacks The icecat-langpacks package contains all the localization and translations langpack add-ons. commit e5a96df9ac9e4756df732436f2fe5cba57958b08 Author: Antonio Trande <sagitter(a)fedoraproject.org> Date: Thu Jun 26 19:23:54 2025 +0200 Remove directory diff --git a/icecat.spec b/icecat.spec index 4245c9d..544d495 100644 --- a/icecat.spec +++ b/icecat.spec @@ -783,7 +783,6 @@ desktop-file-validate %{buildroot}%{_datadir}/applications/*.desktop %{icecatappdir}/*.ini %{icecatappdir}/omni.ja %{icecatappdir}/dependentlibs.list -%{icecatappdir}/plugin-container %{icecatappdir}/pingsender %{icecatappdir}/gmp-clearkey/ commit 4ce587552c2e8895c5b3933ef9fcce99f7be1676 Author: Antonio Trande <sagitter(a)fedoraproject.org> Date: Thu Jun 26 17:44:25 2025 +0200 Remove old configuration option diff --git a/icecat.spec b/icecat.spec index 4f6e937..4245c9d 100644 --- a/icecat.spec +++ b/icecat.spec @@ -457,7 +457,6 @@ echo "ac_add_options --with-libclang-path=`llvm-config%{?llvm_suffix} --libdir`" %ifarch s390x %{arm64} echo "ac_add_options --disable-jit" >> .mozconfig -echo "ac_add_options --disable-elf-hack" >> .mozconfig %endif %if 0%{?build_with_pgo} @@ -723,9 +722,6 @@ ln -sf %{icecatappdir}/%{name}-bin ${RPM_BUILD_ROOT}%{icecatappdir}/%{name} rm -rf ${RPM_BUILD_ROOT}%{icecatappdir}/dictionaries ln -s %{_datadir}/hunspell ${RPM_BUILD_ROOT}%{icecatappdir}/dictionaries -# Copy over run-icecat.sh -cp -p build/unix/run-%{name}.sh %{buildroot}%{icecatappdir}/ - # Remove unused directories rm -rf %{buildroot}%{_libdir}/%{icecat_devel} rm -rf %{buildroot}%{_datadir}/idl/%{icecat_ver} @@ -786,7 +782,6 @@ desktop-file-validate %{buildroot}%{_datadir}/applications/*.desktop %{icecatappdir}/*.so %{icecatappdir}/*.ini %{icecatappdir}/omni.ja -%{icecatappdir}/run-icecat.sh %{icecatappdir}/dependentlibs.list %{icecatappdir}/plugin-container %{icecatappdir}/pingsender commit 1d3f9fe61f5577d6e313eeb50c0c43c7aa5a131d Author: Antonio Trande <sagitter(a)fedoraproject.org> Date: Thu Jun 26 16:53:04 2025 +0200 Set CXXFLAGS without -fpermissive diff --git a/icecat.spec b/icecat.spec index 65d55ad..4f6e937 100644 --- a/icecat.spec +++ b/icecat.spec @@ -550,10 +550,13 @@ MOZ_LINK_FLAGS="-Wl,--no-keep-memory -Wl,--reduce-memory-overheads" export RUSTFLAGS="-Cdebuginfo=0" %endif +# error "STL code can only be used with -fno-exceptions" +CXXFLAGS=$(echo "$MOZ_OPT_FLAGS" | %{__sed} -e 's/-fexceptions/-fno-exceptions/') +export CXXFLAGS="$CXXFLAGS" +export CXXFLAGS="$CXXFLAGS -fpermissive -std=gnu++17" + export CFLAGS="$MOZ_OPT_FLAGS -std=gnu17" -export CXXFLAGS="$MOZ_OPT_FLAGS -fpermissive -std=gnu++17" export LDFLAGS=$MOZ_LINK_FLAGS - export PREFIX='%{_prefix}' export LIBDIR='%{_libdir}' export PKG_CONFIG="`which pkg-config`" commit b3710024139a3ebb9f08ff9b398355097435044d Author: Antonio Trande <sagitter(a)fedoraproject.org> Date: Thu Jun 26 00:06:00 2025 +0200 Release 128.12.0 diff --git a/.gitignore b/.gitignore index 96fb26d..aefc450 100644 --- a/.gitignore +++ b/.gitignore @@ -280,3 +280,5 @@ /icecat-115.23.1-rh1.tar.bz2 /icecat-115.24.0-langpacks.tar.gz /icecat-115.24.0-rh1.tar.bz2 +/icecat-128.12.0-langpacks.tar.gz +/icecat-128.12.0-rh1.tar.bz2 diff --git a/build-aarch64-skia.patch b/build-aarch64-skia.patch index e669ba5..c6a9be6 100644 --- a/build-aarch64-skia.patch +++ b/build-aarch64-skia.patch @@ -1,22 +1,36 @@ ---- a/gfx/skia/skia/modules/skcms/src/Transform_inl.h.aarch64-skia 2023-06-02 03:15:22.000000000 +0200 -+++ b/gfx/skia/skia/modules/skcms/src/Transform_inl.h 2023-06-05 10:18:46.942777997 +0200 -@@ -189,8 +189,6 @@ SI F F_from_Half(U16 half) { +diff -up firefox-128.0/gfx/skia/skia/modules/skcms/src/Transform_inl.h.aarch64-skia firefox-128.0/gfx/skia/skia/modules/skcms/src/Transform_inl.h +--- firefox-128.0/gfx/skia/skia/modules/skcms/src/Transform_inl.h.aarch64-skia 2024-07-02 11:10:25.047099913 +0200 ++++ firefox-128.0/gfx/skia/skia/modules/skcms/src/Transform_inl.h 2024-07-02 11:15:43.855410571 +0200 +@@ -151,7 +151,7 @@ SI U32 to_fixed(F f) { return (U32)cast + + + SI F F_from_Half(U16 half) { +-#if defined(USING_NEON_F16C) ++#if 0 // defined(USING_NEON_F16C) + return vcvt_f32_f16((float16x4_t)half); + #elif defined(USING_AVX512F) + return (F)_mm512_cvtph_ps((__m256i)half); +@@ -178,7 +178,7 @@ SI F F_from_Half(U16 half) { + __attribute__((no_sanitize("unsigned-integer-overflow"))) + #endif SI U16 Half_from_F(F f) { - #if defined(USING_NEON_FP16) - return bit_pun<U16>(f); --#elif defined(USING_NEON_F16C) -- return (U16)vcvt_f16_f32(f); +-#if defined(USING_NEON_F16C) ++#if 0 //defined(USING_NEON_F16C) + return (U16)vcvt_f16_f32(f); #elif defined(USING_AVX512F) return (U16)_mm512_cvtps_ph((__m512 )f, _MM_FROUND_CUR_DIRECTION ); - #elif defined(USING_AVX_F16C) ---- a/gfx/skia/skia/src/opts/SkRasterPipeline_opts.h.aarch64-skia 2023-06-05 10:18:46.941777963 +0200 -+++ b/gfx/skia/skia/src/opts/SkRasterPipeline_opts.h 2023-06-05 10:20:44.924843847 +0200 -@@ -1128,7 +1128,7 @@ SI F from_half(U16 h) { +diff -up firefox-128.0/gfx/skia/skia/src/opts/SkRasterPipeline_opts.h.aarch64-skia firefox-128.0/gfx/skia/skia/src/opts/SkRasterPipeline_opts.h +--- firefox-128.0/gfx/skia/skia/src/opts/SkRasterPipeline_opts.h.aarch64-skia 2024-07-02 11:10:25.048099949 +0200 ++++ firefox-128.0/gfx/skia/skia/src/opts/SkRasterPipeline_opts.h 2024-07-02 11:13:33.384783413 +0200 +@@ -1425,8 +1425,8 @@ SI F from_half(U16 h) { } SI U16 to_half(F f) { --#if defined(JUMPER_IS_NEON) && defined(SK_CPU_ARM64) \ -+#if 0 //defined(JUMPER_IS_NEON) && defined(SK_CPU_ARM64) \ - && !defined(SK_BUILD_FOR_GOOGLE3) // Temporary workaround for some Google3 builds. - return sk_bit_cast<U16>(vcvt_f16_f32(f)); +-#if defined(JUMPER_IS_NEON) && defined(SK_CPU_ARM64) +- return (U16)vcvt_f16_f32(f); ++#if 0 //defined(JUMPER_IS_NEON) && defined(SK_CPU_ARM64) ++ return (U16)vcvt_f16_f32(f); + #elif defined(JUMPER_IS_SKX) + return (U16)_mm512_cvtps_ph(f, _MM_FROUND_CUR_DIRECTION); + diff --git a/build-disable-elfhack.patch b/build-disable-elfhack.patch deleted file mode 100644 index 483d4c4..0000000 --- a/build-disable-elfhack.patch +++ /dev/null @@ -1,11 +0,0 @@ ---- firefox-115.0.2/toolkit/moz.configure.disable-elfhack 2023-07-18 12:21:22.507358334 +0200 -+++ firefox-115.0.2/toolkit/moz.configure 2023-07-18 12:52:55.972727498 +0200 -@@ -1520,7 +1520,7 @@ with only_when("--enable-compile-environ - "Cannot enable elfhack with lld." - " Use --enable-linker=bfd, --enable-linker=gold, or --disable-elf-hack" - ) -- return True -+ return False - - set_config("USE_ELF_HACK", use_elf_hack) - diff --git a/icecat-115.19.0-fix_mz1912663.patch b/icecat-115.19.0-fix_mz1912663.patch deleted file mode 100644 index 2168003..0000000 --- a/icecat-115.19.0-fix_mz1912663.patch +++ /dev/null @@ -1,82 +0,0 @@ -# HG changeset patch -# User Emilio Cobos Álvarez <emilio(a)crisal.io> -# Date 1723389149 0 -# Node ID 0e6f95e0b777abd64b1224c28ecd1beb614035cf -# Parent ac782ec8027890a85265514cef6b564f07b18a71 -Bug 1912663 - Fix some build issues with cbindgen 0.27. r=firefox-style-system-reviewers,zrhoffman a=pascalc - -It updates serde and syn and they are more strict. In particular, syn 2 -doesn't parse the rust 2015 syntax where try is not a keyword, and serde -rejects duplicate keys. - -Differential Revision: https://phabricator.services.mozilla.com/D219025 - -diff --git a/servo/components/style_traits/values.rs b/servo/components/style_traits/values.rs ---- a/servo/components/style_traits/values.rs -+++ b/servo/components/style_traits/values.rs -@@ -384,21 +384,21 @@ impl Separator for Space { - - fn parse<'i, 't, F, T, E>( - input: &mut Parser<'i, 't>, - mut parse_one: F, - ) -> Result<Vec<T>, ParseError<'i, E>> - where - F: for<'tt> FnMut(&mut Parser<'i, 'tt>) -> Result<T, ParseError<'i, E>>, - { -- input.skip_whitespace(); // Unnecessary for correctness, but may help try() rewind less. -+ input.skip_whitespace(); // Unnecessary for correctness, but may help try_parse() rewind less. - let mut results = vec![parse_one(input)?]; - loop { -- input.skip_whitespace(); // Unnecessary for correctness, but may help try() rewind less. -- if let Ok(item) = input.try(&mut parse_one) { -+ input.skip_whitespace(); // Unnecessary for correctness, but may help try_parse() rewind less. -+ if let Ok(item) = input.try_parse(&mut parse_one) { - results.push(item); - } else { - return Ok(results); - } - } - } - } - -@@ -409,24 +409,24 @@ impl Separator for CommaWithSpace { - - fn parse<'i, 't, F, T, E>( - input: &mut Parser<'i, 't>, - mut parse_one: F, - ) -> Result<Vec<T>, ParseError<'i, E>> - where - F: for<'tt> FnMut(&mut Parser<'i, 'tt>) -> Result<T, ParseError<'i, E>>, - { -- input.skip_whitespace(); // Unnecessary for correctness, but may help try() rewind less. -+ input.skip_whitespace(); // Unnecessary for correctness, but may help try_parse() rewind less. - let mut results = vec![parse_one(input)?]; - loop { -- input.skip_whitespace(); // Unnecessary for correctness, but may help try() rewind less. -+ input.skip_whitespace(); // Unnecessary for correctness, but may help try_parse() rewind less. - let comma_location = input.current_source_location(); -- let comma = input.try(|i| i.expect_comma()).is_ok(); -- input.skip_whitespace(); // Unnecessary for correctness, but may help try() rewind less. -- if let Ok(item) = input.try(&mut parse_one) { -+ let comma = input.try_parse(|i| i.expect_comma()).is_ok(); -+ input.skip_whitespace(); // Unnecessary for correctness, but may help try_parse() rewind less. -+ if let Ok(item) = input.try_parse(&mut parse_one) { - results.push(item); - } else if comma { - return Err(comma_location.new_unexpected_token_error(Token::Comma)); - } else { - break; - } - } - Ok(results) -diff --git a/servo/ports/geckolib/cbindgen.toml b/servo/ports/geckolib/cbindgen.toml ---- a/servo/ports/geckolib/cbindgen.toml -+++ b/servo/ports/geckolib/cbindgen.toml -@@ -318,7 +318,6 @@ - "Keyframe" = "Keyframe" - "nsChangeHint" = "nsChangeHint" - "ServoElementSnapshotTable" = "ServoElementSnapshotTable" --"Keyframe" = "Keyframe" - "ComputedKeyframeValues" = "ComputedKeyframeValues" - "OriginFlags" = "OriginFlags" - "ServoTraversalFlags" = "ServoTraversalFlags" diff --git a/icecat-fix_addon_installation.patch b/icecat-fix_addon_installation.patch deleted file mode 100644 index 5cc140d..0000000 --- a/icecat-fix_addon_installation.patch +++ /dev/null @@ -1,36 +0,0 @@ -# Fixes installation of those addons which don't have ID on IceCat ("Cannot find id for addon" error). ---- a/toolkit/mozapps/extensions/internal/XPIInstall.jsm -+++ b/toolkit/mozapps/extensions/internal/XPIInstall.jsm -@@ -627,8 +627,30 @@ - throw new Error(`Extension is signed with an invalid id (${addon.id})`); - } - } -- if (!addon.id && aLocation.isTemporary) { -- addon.id = generateTemporaryInstallID(aPackage.file); -+ if (!addon.id) { -+ if (aInstallLocation.name == KEY_APP_TEMPORARY) { -+ addon.id = generateTemporaryInstallID(aZipReader.file); -+ } else { -+ try { -+ let sigInput = aZipReader.getInputStream("META-INF/cose.sig"); -+ let sigBinary = Cc['@mozilla.org/binaryinputstream;1'] -+ .createInstance(Ci.nsIBinaryInputStream); -+ sigBinary.setInputStream(sigInput); -+ var sig = '' -+ var sigCount; -+ while ((sigCount = sigBinary.available()) > 0) { -+ sig += sigBinary.readBytes(sigCount); -+ } -+ let sigMatch = sig.match(/\{\w{8}-\w{4}-\w{4}-\w{4}-\w{12}\}/g) -+ if (sigMatch && sigMatch.length == 1) { -+ addon.id = sigMatch[0] -+ } else { -+ logger.warn("Failed to find addon id"); -+ } -+ } catch (e) { -+ logger.warn("Failed to process META-INF/cose.sig"); -+ } -+ } - } - } - diff --git a/icecat-lang_download.sh b/icecat-lang_download.sh index 1bce42c..945dd4b 100755 --- a/icecat-lang_download.sh +++ b/icecat-lang_download.sh @@ -1,6 +1,6 @@ #!/bin/bash -VERSION=115.24.0 +VERSION=128.12.0 URL=https://ftp.mozilla.org/pub/firefox/releases/${VERSION}esr/linux-x86_64… for u in $URL; do diff --git a/icecat-pgo.patch b/icecat-pgo.patch deleted file mode 100644 index 3b9fde4..0000000 --- a/icecat-pgo.patch +++ /dev/null @@ -1,115 +0,0 @@ -diff -up firefox-99.0/build/moz.configure/lto-pgo.configure.pgo firefox-99.0/build/moz.configure/lto-pgo.configure ---- firefox-99.0/build/moz.configure/lto-pgo.configure.pgo 2022-03-31 01:24:38.000000000 +0200 -+++ firefox-99.0/build/moz.configure/lto-pgo.configure 2022-04-04 10:15:45.387694143 +0200 -@@ -247,8 +247,8 @@ def lto( - cflags.append("-flto") - ldflags.append("-flto") - else: -- cflags.append("-flto=thin") -- ldflags.append("-flto=thin") -+ cflags.append("-flto") -+ ldflags.append("-flto") - - if target.os == "Android" and value == "cross": - # Work around https://github.com/rust-lang/rust/issues/90088 -@@ -264,7 +264,7 @@ def lto( - if value == "full": - cflags.append("-flto") - else: -- cflags.append("-flto=thin") -+ cflags.append("-flto") - # With clang-cl, -flto can only be used with -c or -fuse-ld=lld. - # AC_TRY_LINKs during configure don't have -c, so pass -fuse-ld=lld. - cflags.append("-fuse-ld=lld") -diff -up firefox-99.0/build/pgo/profileserver.py.pgo firefox-99.0/build/pgo/profileserver.py ---- firefox-99.0/build/pgo/profileserver.py.pgo 2022-03-31 01:24:38.000000000 +0200 -+++ firefox-99.0/build/pgo/profileserver.py 2022-04-04 10:15:45.387694143 +0200 -@@ -11,7 +11,7 @@ - import subprocess - - import mozcrash --from mozbuild.base import MozbuildObject, BinaryNotFoundException -+from mozbuild.base import MozbuildObject, BinaryNotFoundException, BuildEnvironmentNotFoundException - from mozfile import TemporaryDirectory - from mozhttpd import MozHttpd - from mozprofile import IceCatProfile, Preferences -@@ -87,9 +87,22 @@ - locations = ServerLocations() - locations.add_host(host="127.0.0.1", port=PORT, options="primary,privileged") - -- old_profraw_files = glob.glob("*.profraw") -- for f in old_profraw_files: -- os.remove(f) -+ using_gcc = False -+ try: -+ if build.config_environment.substs.get('CC_TYPE') == 'gcc': -+ using_gcc = True -+ except BuildEnvironmentNotFoundException: -+ pass -+ -+ if using_gcc: -+ for dirpath, _, filenames in os.walk('.'): -+ for f in filenames: -+ if f.endswith('.gcda'): -+ os.remove(os.path.join(dirpath, f)) -+ else: -+ old_profraw_files = glob.glob('*.profraw') -+ for f in old_profraw_files: -+ os.remove(f) - - with TemporaryDirectory() as profilePath: - # TODO: refactor this into mozprofile -@@ -212,6 +225,9 @@ - if get_crashreports(profilePath, name="IceCat exited successfully?") != 0: - print("IceCat exited successfully, but produced a crashreport") - sys.exit(1) -+ print('Copying profile data....') -+ os.system('pwd'); -+ os.system('tar cf profdata.tar.gz `find . -name "*.gcda"`; cd ..; tar xf instrumented/profdata.tar.gz;'); - - llvm_profdata = env.get("LLVM_PROFDATA") - if llvm_profdata: -diff -up firefox-99.0/build/unix/mozconfig.unix.pgo firefox-99.0/build/unix/mozconfig.unix ---- firefox-99.0/build/unix/mozconfig.unix.pgo 2022-03-31 01:24:38.000000000 +0200 -+++ firefox-99.0/build/unix/mozconfig.unix 2022-04-04 10:15:45.387694143 +0200 -@@ -4,6 +4,15 @@ if [ -n "$FORCE_GCC" ]; then - CC="$MOZ_FETCHES_DIR/gcc/bin/gcc" - CXX="$MOZ_FETCHES_DIR/gcc/bin/g++" - -+ if [ -n "$MOZ_PGO" ]; then -+ if [ -z "$USE_ARTIFACT" ]; then -+ ac_add_options --enable-lto -+ fi -+ export AR="$topsrcdir/gcc/bin/gcc-ar" -+ export NM="$topsrcdir/gcc/bin/gcc-nm" -+ export RANLIB="$topsrcdir/gcc/bin/gcc-ranlib" -+ fi -+ - # We want to make sure we use binutils and other binaries in the tooltool - # package. - mk_add_options "export PATH=$MOZ_FETCHES_DIR/gcc/bin:$PATH" -diff -up firefox-99.0/extensions/spellcheck/src/moz.build.pgo firefox-99.0/extensions/spellcheck/src/moz.build ---- firefox-99.0/extensions/spellcheck/src/moz.build.pgo 2022-03-31 01:24:50.000000000 +0200 -+++ firefox-99.0/extensions/spellcheck/src/moz.build 2022-04-04 10:15:45.387694143 +0200 -@@ -28,3 +28,5 @@ EXPORTS.mozilla += [ - "mozInlineSpellChecker.h", - "mozSpellChecker.h", - ] -+ -+CXXFLAGS += ['-fno-devirtualize'] -diff -up firefox-99.0/toolkit/components/terminator/nsTerminator.cpp.pgo firefox-99.0/toolkit/components/terminator/nsTerminator.cpp ---- firefox-99.0/toolkit/components/terminator/nsTerminator.cpp.pgo 2022-04-04 10:15:45.387694143 +0200 -+++ firefox-99.0/toolkit/components/terminator/nsTerminator.cpp 2022-04-04 10:19:07.022239556 +0200 -@@ -466,6 +466,11 @@ void nsTerminator::StartWatchdog() { - } - #endif - -+ // Disable watchdog for PGO train builds - writting profile information at -+ // exit may take time and it is better to make build hang rather than -+ // silently produce poorly performing binary. -+ crashAfterMS = INT32_MAX; -+ - UniquePtr<Options> options(new Options()); - // crashAfterTicks is guaranteed to be > 0 as - // crashAfterMS >= ADDITIONAL_WAIT_BEFORE_CRASH_MS >> HEARTBEAT_INTERVAL_MS - diff --git a/icecat.spec b/icecat.spec index f4c2135..65d55ad 100644 --- a/icecat.spec +++ b/icecat.spec @@ -86,8 +86,6 @@ ExcludeArch: %{ix86} %{arm} %global libvpx_version 1.8.2 %endif -%global disable_elfhack 1 - # Use clang? %bcond_without toolchain_clang @@ -101,8 +99,8 @@ ExcludeArch: %{ix86} %{arm} %global __requires_exclude ^(%%(find %{buildroot}%{icecatappdir} -name '*.so' | xargs -n1 basename | sort -u | paste -s -d '|' -)) Name: icecat -Epoch: 2 -Version: 115.24.0 +Epoch: 3 +Version: 128.12.0 Release: %autorelease -e %{redhat_ver} Summary: GNU version of Firefox browser @@ -144,9 +142,7 @@ Source19: run-wayland-compositor # Build patches # Fixes installation of those addons which don't have ID on IceCat ("Cannot find id for addon" error). -Patch1: %{name}-fix_addon_installation.patch Patch2: %{name}-commasplit.patch -Patch5: rhbz-1219542-s390-build.patch # With clang LLVM 16 rust-bindgen 0.56.0 is too old, combined # https://github.com/rust-lang/rust-bindgen/pull/2319 @@ -158,9 +154,7 @@ Patch7: rust-bindgen-2319-2339.patch Patch8: mp4parse-rust-8b5b652d38e007e736bb442ccd5aa5ed699db100.patch Patch40: build-aarch64-skia.patch -Patch41: build-disable-elfhack.patch Patch44: build-arm-libopus.patch -Patch54: mozilla-1669639.patch # Fedora specific patches Patch219: rhbz-1173156.patch @@ -179,7 +173,6 @@ Patch403: icecat-python3.11-open-U.patch Patch404: icecat-python3.11-regex-inline-flags.patch Patch412: mozilla-1337988.patch Patch422: mozilla-1580174-webrtc-popup.patch -Patch425: icecat-115.19.0-fix_mz1912663.patch # Patch for GCC-15 Patch426: icecat-115.19.0-fix_mz1917964.patch @@ -187,8 +180,6 @@ Patch426: icecat-115.19.0-fix_mz1917964.patch Patch423: mozilla-1512162.patch # PGO/LTO patches -Patch600: %{name}-pgo.patch -Patch602: mozilla-1516803.patch Patch603: %{name}-gcc-always-inline.patch BuildRequires: alsa-lib-devel @@ -358,15 +349,7 @@ and translations langpack add-ons. # Copy license files tar -xf %{SOURCE5} -%patch -P 1 -p 1 -b .fix_addon_installation %patch -P 2 -p 1 -b .commasplit -%ifarch s390x -%patch -P 5 -p 1 -b .rhbz-1219542-s390 -%endif - -%if 0%{?disable_elfhack} -%patch -P 41 -p 1 -b .disable-elfhack -%endif # Fedora patches %patch -P 219 -p 1 -b .rhbz-1173156 @@ -385,16 +368,7 @@ tar -xf %{SOURCE5} %ifarch %{power64} %patch -P 423 -p 1 -b .1512162 %endif -%patch -P 425 -p 1 -b .1912663 %patch -P 426 -p 1 -b .1917964 - -%patch -P 54 -p 1 -b .1669639 - -# PGO patches -%if 0%{?build_with_pgo} -%patch -P 600 -p 1 -b .pgo -%patch -P 602 -p 1 -b .1516803 -%endif %patch -P 603 -p1 -b .inline # Remove default configuration and copy the customized one @@ -481,8 +455,9 @@ echo "ac_add_options --with-libclang-path=`llvm-config%{?llvm_suffix} --libdir`" #echo "ac_add_options --with-clang-path=%%{_bindir}/clang%%{?llvm_suffix}" >> .mozconfig %endif -%ifarch s390x +%ifarch s390x %{arm64} echo "ac_add_options --disable-jit" >> .mozconfig +echo "ac_add_options --disable-elf-hack" >> .mozconfig %endif %if 0%{?build_with_pgo} diff --git a/mozilla-1512162.patch b/mozilla-1512162.patch index 99a0b14..02e9585 100644 --- a/mozilla-1512162.patch +++ b/mozilla-1512162.patch @@ -1,7 +1,6 @@ -diff -up firefox-68.0.1/js/xpconnect/src/XPCWrappedNative.cpp.1512162 firefox-68.0.1/js/xpconnect/src/XPCWrappedNative.cpp ---- firefox-68.0.1/js/xpconnect/src/XPCWrappedNative.cpp.1512162 2019-07-17 22:51:30.000000000 +0200 -+++ firefox-68.0.1/js/xpconnect/src/XPCWrappedNative.cpp 2019-07-25 08:08:18.512528313 +0200 -@@ -1092,7 +1092,7 @@ class MOZ_STACK_CLASS CallMethodHelper f +--- a/js/xpconnect/src/XPCWrappedNative.cpp.1512162 2019-07-17 22:51:30.000000000 +0200 ++++ b/js/xpconnect/src/XPCWrappedNative.cpp 2019-07-25 08:08:18.512528313 +0200 +@@ -1055,7 +1055,7 @@ MOZ_ALWAYS_INLINE bool GetOutParamSource(uint8_t paramIndex, MutableHandleValue srcp) const; @@ -10,7 +9,7 @@ diff -up firefox-68.0.1/js/xpconnect/src/XPCWrappedNative.cpp.1512162 firefox-68 MOZ_ALWAYS_INLINE bool QueryInterfaceFastPath(); -@@ -1139,7 +1139,7 @@ class MOZ_STACK_CLASS CallMethodHelper f +@@ -1102,7 +1102,7 @@ ~CallMethodHelper(); @@ -19,25 +18,3 @@ diff -up firefox-68.0.1/js/xpconnect/src/XPCWrappedNative.cpp.1512162 firefox-68 // Trace implementation so we can put our CallMethodHelper in a Rooted<T>. void trace(JSTracer* aTrc); -@@ -1157,6 +1157,10 @@ bool XPCWrappedNative::CallMethod(XPCCal - return helper.get().Call(); - } - -+#if (__GNUC__ && __linux__ && __PPC64__ && _LITTLE_ENDIAN) -+// Work around a compiler bug on ppc64le (bug 1512162). -+__attribute__ ((noinline,noclone)) -+#endif - bool CallMethodHelper::Call() { - mCallContext.SetRetVal(JS::UndefinedValue()); - -@@ -1315,6 +1319,10 @@ bool CallMethodHelper::GetOutParamSource - return true; - } - -+#if (__GNUC__ && __linux__ && __PPC64__ && _LITTLE_ENDIAN) -+// Work around a compiler bug on ppc64le (bug 1512162). -+__attribute__ ((noinline,noclone)) -+#endif - bool CallMethodHelper::GatherAndConvertResults() { - // now we iterate through the native params to gather and convert results - uint8_t paramCount = mMethodInfo->GetParamCount(); diff --git a/mozilla-1516803.patch b/mozilla-1516803.patch deleted file mode 100644 index 6c4ff59..0000000 --- a/mozilla-1516803.patch +++ /dev/null @@ -1,15 +0,0 @@ -diff --git a/security/sandbox/linux/moz.build b/security/sandbox/linux/moz.build ---- a/security/sandbox/linux/moz.build -+++ b/security/sandbox/linux/moz.build -@@ -114,9 +114,8 @@ - # gcc lto likes to put the top level asm in syscall.cc in a different partition - # from the function using it which breaks the build. Work around that by - # forcing there to be only one partition. --for f in CONFIG["OS_CXXFLAGS"]: -- if f.startswith("-flto") and CONFIG["CC_TYPE"] != "clang": -- LDFLAGS += ["--param lto-partitions=1"] -+if CONFIG['CC_TYPE'] != 'clang': -+ LDFLAGS += ['--param', 'lto-partitions=1'] - - DEFINES["NS_NO_XPCOM"] = True - DisableStlWrapping() diff --git a/mozilla-1669639.patch b/mozilla-1669639.patch deleted file mode 100644 index 3639133..0000000 --- a/mozilla-1669639.patch +++ /dev/null @@ -1,15 +0,0 @@ ---- firefox-81.0.1/build/mach_initialize.py.old 2020-10-06 14:16:06.212974910 +0200 -+++ firefox-81.0.1/build/mach_initialize.py 2020-10-06 14:19:03.313179557 +0200 -@@ -507,7 +507,10 @@ class ImportHook(object): - # doesn't happen or because it doesn't matter). - if not os.path.exists(module.__file__[:-1]): - if os.path.exists(module.__file__): -- os.remove(module.__file__) -+ try: -+ os.remove(module.__file__) -+ except: -+ pass - del sys.modules[module.__name__] - module = self(name, globals, locals, fromlist, level) - - diff --git a/rhbz-1219542-s390-build.patch b/rhbz-1219542-s390-build.patch deleted file mode 100644 index f94e43a..0000000 --- a/rhbz-1219542-s390-build.patch +++ /dev/null @@ -1,23 +0,0 @@ -diff -up firefox-55.0/js/src/old-configure.in.rhbz-1219542-s390 firefox-55.0/js/src/old-configure.in ---- firefox-55.0/js/src/old-configure.in.rhbz-1219542-s390 2017-07-31 18:20:48.000000000 +0200 -+++ firefox-55.0/js/src/old-configure.in 2017-08-02 14:31:32.190243669 +0200 -@@ -541,7 +541,7 @@ case "$host" in - - *-linux*|*-kfreebsd*-gnu|*-gnu*) - HOST_CFLAGS="$HOST_CFLAGS -DXP_UNIX" -- HOST_OPTIMIZE_FLAGS="${HOST_OPTIMIZE_FLAGS=-O3}" -+ HOST_OPTIMIZE_FLAGS="${HOST_OPTIMIZE_FLAGS=-O1}" - ;; - - *) -@@ -617,8 +617,8 @@ case "$target" in - - *-*linux*) - if test "$GNU_CC" -o "$GNU_CXX"; then -- MOZ_PGO_OPTIMIZE_FLAGS="-O3" -- MOZ_OPTIMIZE_FLAGS="-O3" -+ MOZ_PGO_OPTIMIZE_FLAGS="-O1" -+ MOZ_OPTIMIZE_FLAGS="-O1" - if test -z "$CLANG_CC"; then - MOZ_OPTIMIZE_FLAGS="-freorder-blocks $MOZ_OPTIMIZE_FLAGS" - fi diff --git a/sources b/sources index 2603140..44be745 100644 --- a/sources +++ b/sources @@ -1,5 +1,5 @@ SHA512 (cbindgen-vendor.tar.xz) = 6d354d65674395b8171f262ae9aa08f656fdd83b6d29d70bd1ad2f13c4a52db81df780cfdf6ac86e9d1f16426c9ab3cdc0160f0785a0909ad7525fd8a9bc3b25 -SHA512 (icecat-115.24.0-langpacks.tar.gz) = f54612b6f39c72edb0fe874c1c290cea254661566e7062d220d396c7bb5f85c032effc0e7acb70b11e316ed782abda2e5686c666ce9d792c57330318a766d17a -SHA512 (icecat-115.24.0-rh1.tar.bz2) = e4f89dda5b71de63632dc743582d31b0314a51edb3b21766cb8a16dfe44005a56a9b4be08c7d58f605f0ac3c9de9d65495dd079b2eeeb667ec4b65e009d16947 +SHA512 (icecat-128.12.0-langpacks.tar.gz) = c3caecad5756513409af6cd8426a1a0e6a05c6286756fd4350d5ca1fac9a110a8ea3bdac94451c2a5d1824ff5a73c3b54f3754c0ab19203aea22f7001ca46886 +SHA512 (icecat-128.12.0-rh1.tar.bz2) = d1d3724c706d81246d2a35834236a2eab75deb51434a215f07f24221f6b75369d7d702724d175420c74cefa23c0081a28421dcbe85ead489e5bffac28bf2314a SHA512 (icecat-COPYING-licensefiles.tar.gz) = ed541845170f1d209e322b0def3248d571e0c42c4a17c74e83197e743bd8a128a1475f5312d905c8e70d047eddeac17e604373892eb6d5f1720c5c361849c42c SHA512 (icecat.png) = a3cec16cb15a27c3c91b53e2c534e78b07911011ff1331e450c0baf8e13b76da7cea2a90e5d75191fa88cfbfd40a0a7f3e553e92b64d0043dadd5ad5edfdf81c

1 0

Architecture specific change in rpms/icecat.git
by githook-noreply＠fedoraproject.org 28 Jun '25

28 Jun '25

The package rpms/icecat.git has added or updated architecture specific content in its spec file (ExclusiveArch/ExcludeArch or %ifarch/%ifnarch) in commit(s): https://src.fedoraproject.org/cgit/rpms/icecat.git/commit/?id=4b1c39c5226da… https://src.fedoraproject.org/cgit/rpms/icecat.git/commit/?id=ad3a48a2cd6a8… https://src.fedoraproject.org/cgit/rpms/icecat.git/commit/?id=b3710024139a3…. Change: +%ifarch %{arm64} riscv64 +%ifarch aarch64 riscv64 +%ifarch s390x %{arm64} Thanks. Full change: ============ commit 4b1c39c5226da827afc8f830c749f18e8a866651 Author: Antonio Trande <sagitter(a)fedoraproject.org> Date: Fri Jun 27 21:18:30 2025 +0200 Use system cbindgen diff --git a/icecat.spec b/icecat.spec index a043f65..66c60a8 100644 --- a/icecat.spec +++ b/icecat.spec @@ -9,7 +9,7 @@ ExcludeArch: %{ix86} %{arm} # Bundled cbindgen makes build slow. # Enable only if system cbindgen is not available. -%global use_bundled_cbindgen 1 +%global use_bundled_cbindgen 0 #################### @@ -759,6 +759,7 @@ desktop-file-validate %{buildroot}%{_datadir}/applications/*.desktop %if %{with langpacks_subpkg} %files +%dir %{langpackdir} %else %files -f %{name}.lang %endif @@ -769,9 +770,6 @@ desktop-file-validate %{buildroot}%{_datadir}/applications/*.desktop %{_datadir}/icons/hicolor/*x*/apps/%{name}*.png %{_metainfodir}/*.appdata.xml %dir %{icecatappdir} -%if %{with langpacks} -%dir %{langpackdir} -%endif %{icecatappdir}/glxtest %{icecatappdir}/vaapitest %{icecatappdir}/browser/ @@ -785,7 +783,7 @@ desktop-file-validate %{buildroot}%{_datadir}/applications/*.desktop %{icecatappdir}/dependentlibs.list %{icecatappdir}/pingsender %{icecatappdir}/gmp-clearkey/ -%ifarch aarch64 riscv64 +%ifarch %{arm64} riscv64 %{icecatappdir}/v4l2test %endif commit b3959a29a60c3c9ddd6d06ceeb9eb0aeb71dd8c5 Author: Antonio Trande <sagitter(a)fedoraproject.org> Date: Fri Jun 27 21:10:31 2025 +0200 Update launcher diff --git a/icecat.sh.in b/icecat.sh.in index ef9c34d..a269749 100644 --- a/icecat.sh.in +++ b/icecat.sh.in @@ -64,7 +64,7 @@ MOZ_DIST_BIN="$MOZ_LIB_DIR/icecat" MOZ_LANGPACKS_DIR="$MOZ_DIST_BIN/langpacks" MOZ_EXTENSIONS_PROFILE_DIR="$HOME/.mozilla/extensions/{ec8030f7-c20a-464f-9b0e-13a3a9e97384}" MOZ_PROGRAM="$MOZ_DIST_BIN/$MOZ_FIREFOX_FILE" -MOZ_LAUNCHER="$MOZ_DIST_BIN/icecat-bin" +MOZ_LAUNCHER="$MOZ_DIST_BIN/icecat" GETENFORCE_FILE="/usr/sbin/getenforce" ## @@ -269,13 +269,11 @@ do ;; esac done - -# Run the browser -debugging=0 -if [ $debugging = 1 ] -then - echo $MOZ_LAUNCHER $script_args $MOZ_PROGRAM "$@" -fi + +## Allow downgrade because during distro upgrade the build time can be +## older in newer version than the previous one. +## +export MOZ_ALLOW_DOWNGRADE=1 -exec $MOZ_LAUNCHER $script_args $MOZ_PROGRAM "$@" +exec $MOZ_PROGRAM "$@" commit 7da8ecdbdf49ed8c5d906197f15d7f2b508bf5c9 Author: Antonio Trande <sagitter(a)fedoraproject.org> Date: Fri Jun 27 16:12:21 2025 +0200 Fix launcher diff --git a/icecat.sh.in b/icecat.sh.in index f74bd16..ef9c34d 100644 --- a/icecat.sh.in +++ b/icecat.sh.in @@ -64,7 +64,7 @@ MOZ_DIST_BIN="$MOZ_LIB_DIR/icecat" MOZ_LANGPACKS_DIR="$MOZ_DIST_BIN/langpacks" MOZ_EXTENSIONS_PROFILE_DIR="$HOME/.mozilla/extensions/{ec8030f7-c20a-464f-9b0e-13a3a9e97384}" MOZ_PROGRAM="$MOZ_DIST_BIN/$MOZ_FIREFOX_FILE" -MOZ_LAUNCHER="$MOZ_DIST_BIN/run-icecat.sh" +MOZ_LAUNCHER="$MOZ_DIST_BIN/icecat-bin" GETENFORCE_FILE="/usr/sbin/getenforce" ## commit ae640ad6619bd8ca8c7fdf1c2bebc96c4463d077 Author: Antonio Trande <sagitter(a)fedoraproject.org> Date: Fri Jun 27 13:38:59 2025 +0200 Set linker flags diff --git a/icecat.spec b/icecat.spec index 5dd651b..a043f65 100644 --- a/icecat.spec +++ b/icecat.spec @@ -555,7 +555,7 @@ export CXXFLAGS="$CXXFLAGS" export CXXFLAGS="$CXXFLAGS -fpermissive -std=gnu++17" export CFLAGS="$MOZ_OPT_FLAGS -std=gnu17" -export LDFLAGS=$MOZ_LINK_FLAGS +export LDFLAGS="%{__global_ldflags} $MOZ_LINK_FLAGS -L%{_libdir} -L%{icecatappdir}" export PREFIX='%{_prefix}' export LIBDIR='%{_libdir}' export PKG_CONFIG="`which pkg-config`" commit ad3a48a2cd6a817a80244116f7fcd573cccac54f Author: Antonio Trande <sagitter(a)fedoraproject.org> Date: Fri Jun 27 12:41:37 2025 +0200 Add v4l2test file for ARM64 and RISC-V diff --git a/icecat.spec b/icecat.spec index 6c3d12d..5dd651b 100644 --- a/icecat.spec +++ b/icecat.spec @@ -785,6 +785,9 @@ desktop-file-validate %{buildroot}%{_datadir}/applications/*.desktop %{icecatappdir}/dependentlibs.list %{icecatappdir}/pingsender %{icecatappdir}/gmp-clearkey/ +%ifarch aarch64 riscv64 +%{icecatappdir}/v4l2test +%endif %changelog %autochangelog commit 21b334e53d5822e38e658413e2682c0858bb72b7 Author: Antonio Trande <sagitter(a)fedoraproject.org> Date: Thu Jun 26 23:02:01 2025 +0200 Fix Epoch diff --git a/icecat.spec b/icecat.spec index 544d495..6c3d12d 100644 --- a/icecat.spec +++ b/icecat.spec @@ -303,8 +303,8 @@ Suggests: mozilla-ublock-origin Provides: webclient %if 0%{?fedora} >= 40 -Obsoletes: icecat-wayland < 2:115.19.0-1 -Obsoletes: icecat-x11 < 2:115.19.0-1 +Obsoletes: icecat-wayland < 3:128.12.0-1 +Obsoletes: icecat-x11 < 3:128.12.0-1 %endif %description @@ -335,7 +335,7 @@ Extensions included to this version of IceCat: %if %{with langpacks_subpkg} %package langpacks Summary: IceCat langpacks -Requires: %{name} = 2:%{version}-%{release} +Requires: %{name} = 3:%{version}-%{release} %description langpacks The icecat-langpacks package contains all the localization and translations langpack add-ons. commit e5a96df9ac9e4756df732436f2fe5cba57958b08 Author: Antonio Trande <sagitter(a)fedoraproject.org> Date: Thu Jun 26 19:23:54 2025 +0200 Remove directory diff --git a/icecat.spec b/icecat.spec index 4245c9d..544d495 100644 --- a/icecat.spec +++ b/icecat.spec @@ -783,7 +783,6 @@ desktop-file-validate %{buildroot}%{_datadir}/applications/*.desktop %{icecatappdir}/*.ini %{icecatappdir}/omni.ja %{icecatappdir}/dependentlibs.list -%{icecatappdir}/plugin-container %{icecatappdir}/pingsender %{icecatappdir}/gmp-clearkey/ commit 4ce587552c2e8895c5b3933ef9fcce99f7be1676 Author: Antonio Trande <sagitter(a)fedoraproject.org> Date: Thu Jun 26 17:44:25 2025 +0200 Remove old configuration option diff --git a/icecat.spec b/icecat.spec index 4f6e937..4245c9d 100644 --- a/icecat.spec +++ b/icecat.spec @@ -457,7 +457,6 @@ echo "ac_add_options --with-libclang-path=`llvm-config%{?llvm_suffix} --libdir`" %ifarch s390x %{arm64} echo "ac_add_options --disable-jit" >> .mozconfig -echo "ac_add_options --disable-elf-hack" >> .mozconfig %endif %if 0%{?build_with_pgo} @@ -723,9 +722,6 @@ ln -sf %{icecatappdir}/%{name}-bin ${RPM_BUILD_ROOT}%{icecatappdir}/%{name} rm -rf ${RPM_BUILD_ROOT}%{icecatappdir}/dictionaries ln -s %{_datadir}/hunspell ${RPM_BUILD_ROOT}%{icecatappdir}/dictionaries -# Copy over run-icecat.sh -cp -p build/unix/run-%{name}.sh %{buildroot}%{icecatappdir}/ - # Remove unused directories rm -rf %{buildroot}%{_libdir}/%{icecat_devel} rm -rf %{buildroot}%{_datadir}/idl/%{icecat_ver} @@ -786,7 +782,6 @@ desktop-file-validate %{buildroot}%{_datadir}/applications/*.desktop %{icecatappdir}/*.so %{icecatappdir}/*.ini %{icecatappdir}/omni.ja -%{icecatappdir}/run-icecat.sh %{icecatappdir}/dependentlibs.list %{icecatappdir}/plugin-container %{icecatappdir}/pingsender commit 1d3f9fe61f5577d6e313eeb50c0c43c7aa5a131d Author: Antonio Trande <sagitter(a)fedoraproject.org> Date: Thu Jun 26 16:53:04 2025 +0200 Set CXXFLAGS without -fpermissive diff --git a/icecat.spec b/icecat.spec index 65d55ad..4f6e937 100644 --- a/icecat.spec +++ b/icecat.spec @@ -550,10 +550,13 @@ MOZ_LINK_FLAGS="-Wl,--no-keep-memory -Wl,--reduce-memory-overheads" export RUSTFLAGS="-Cdebuginfo=0" %endif +# error "STL code can only be used with -fno-exceptions" +CXXFLAGS=$(echo "$MOZ_OPT_FLAGS" | %{__sed} -e 's/-fexceptions/-fno-exceptions/') +export CXXFLAGS="$CXXFLAGS" +export CXXFLAGS="$CXXFLAGS -fpermissive -std=gnu++17" + export CFLAGS="$MOZ_OPT_FLAGS -std=gnu17" -export CXXFLAGS="$MOZ_OPT_FLAGS -fpermissive -std=gnu++17" export LDFLAGS=$MOZ_LINK_FLAGS - export PREFIX='%{_prefix}' export LIBDIR='%{_libdir}' export PKG_CONFIG="`which pkg-config`" commit b3710024139a3ebb9f08ff9b398355097435044d Author: Antonio Trande <sagitter(a)fedoraproject.org> Date: Thu Jun 26 00:06:00 2025 +0200 Release 128.12.0 diff --git a/.gitignore b/.gitignore index 96fb26d..aefc450 100644 --- a/.gitignore +++ b/.gitignore @@ -280,3 +280,5 @@ /icecat-115.23.1-rh1.tar.bz2 /icecat-115.24.0-langpacks.tar.gz /icecat-115.24.0-rh1.tar.bz2 +/icecat-128.12.0-langpacks.tar.gz +/icecat-128.12.0-rh1.tar.bz2 diff --git a/build-aarch64-skia.patch b/build-aarch64-skia.patch index e669ba5..c6a9be6 100644 --- a/build-aarch64-skia.patch +++ b/build-aarch64-skia.patch @@ -1,22 +1,36 @@ ---- a/gfx/skia/skia/modules/skcms/src/Transform_inl.h.aarch64-skia 2023-06-02 03:15:22.000000000 +0200 -+++ b/gfx/skia/skia/modules/skcms/src/Transform_inl.h 2023-06-05 10:18:46.942777997 +0200 -@@ -189,8 +189,6 @@ SI F F_from_Half(U16 half) { +diff -up firefox-128.0/gfx/skia/skia/modules/skcms/src/Transform_inl.h.aarch64-skia firefox-128.0/gfx/skia/skia/modules/skcms/src/Transform_inl.h +--- firefox-128.0/gfx/skia/skia/modules/skcms/src/Transform_inl.h.aarch64-skia 2024-07-02 11:10:25.047099913 +0200 ++++ firefox-128.0/gfx/skia/skia/modules/skcms/src/Transform_inl.h 2024-07-02 11:15:43.855410571 +0200 +@@ -151,7 +151,7 @@ SI U32 to_fixed(F f) { return (U32)cast + + + SI F F_from_Half(U16 half) { +-#if defined(USING_NEON_F16C) ++#if 0 // defined(USING_NEON_F16C) + return vcvt_f32_f16((float16x4_t)half); + #elif defined(USING_AVX512F) + return (F)_mm512_cvtph_ps((__m256i)half); +@@ -178,7 +178,7 @@ SI F F_from_Half(U16 half) { + __attribute__((no_sanitize("unsigned-integer-overflow"))) + #endif SI U16 Half_from_F(F f) { - #if defined(USING_NEON_FP16) - return bit_pun<U16>(f); --#elif defined(USING_NEON_F16C) -- return (U16)vcvt_f16_f32(f); +-#if defined(USING_NEON_F16C) ++#if 0 //defined(USING_NEON_F16C) + return (U16)vcvt_f16_f32(f); #elif defined(USING_AVX512F) return (U16)_mm512_cvtps_ph((__m512 )f, _MM_FROUND_CUR_DIRECTION ); - #elif defined(USING_AVX_F16C) ---- a/gfx/skia/skia/src/opts/SkRasterPipeline_opts.h.aarch64-skia 2023-06-05 10:18:46.941777963 +0200 -+++ b/gfx/skia/skia/src/opts/SkRasterPipeline_opts.h 2023-06-05 10:20:44.924843847 +0200 -@@ -1128,7 +1128,7 @@ SI F from_half(U16 h) { +diff -up firefox-128.0/gfx/skia/skia/src/opts/SkRasterPipeline_opts.h.aarch64-skia firefox-128.0/gfx/skia/skia/src/opts/SkRasterPipeline_opts.h +--- firefox-128.0/gfx/skia/skia/src/opts/SkRasterPipeline_opts.h.aarch64-skia 2024-07-02 11:10:25.048099949 +0200 ++++ firefox-128.0/gfx/skia/skia/src/opts/SkRasterPipeline_opts.h 2024-07-02 11:13:33.384783413 +0200 +@@ -1425,8 +1425,8 @@ SI F from_half(U16 h) { } SI U16 to_half(F f) { --#if defined(JUMPER_IS_NEON) && defined(SK_CPU_ARM64) \ -+#if 0 //defined(JUMPER_IS_NEON) && defined(SK_CPU_ARM64) \ - && !defined(SK_BUILD_FOR_GOOGLE3) // Temporary workaround for some Google3 builds. - return sk_bit_cast<U16>(vcvt_f16_f32(f)); +-#if defined(JUMPER_IS_NEON) && defined(SK_CPU_ARM64) +- return (U16)vcvt_f16_f32(f); ++#if 0 //defined(JUMPER_IS_NEON) && defined(SK_CPU_ARM64) ++ return (U16)vcvt_f16_f32(f); + #elif defined(JUMPER_IS_SKX) + return (U16)_mm512_cvtps_ph(f, _MM_FROUND_CUR_DIRECTION); + diff --git a/build-disable-elfhack.patch b/build-disable-elfhack.patch deleted file mode 100644 index 483d4c4..0000000 --- a/build-disable-elfhack.patch +++ /dev/null @@ -1,11 +0,0 @@ ---- firefox-115.0.2/toolkit/moz.configure.disable-elfhack 2023-07-18 12:21:22.507358334 +0200 -+++ firefox-115.0.2/toolkit/moz.configure 2023-07-18 12:52:55.972727498 +0200 -@@ -1520,7 +1520,7 @@ with only_when("--enable-compile-environ - "Cannot enable elfhack with lld." - " Use --enable-linker=bfd, --enable-linker=gold, or --disable-elf-hack" - ) -- return True -+ return False - - set_config("USE_ELF_HACK", use_elf_hack) - diff --git a/icecat-115.19.0-fix_mz1912663.patch b/icecat-115.19.0-fix_mz1912663.patch deleted file mode 100644 index 2168003..0000000 --- a/icecat-115.19.0-fix_mz1912663.patch +++ /dev/null @@ -1,82 +0,0 @@ -# HG changeset patch -# User Emilio Cobos Álvarez <emilio(a)crisal.io> -# Date 1723389149 0 -# Node ID 0e6f95e0b777abd64b1224c28ecd1beb614035cf -# Parent ac782ec8027890a85265514cef6b564f07b18a71 -Bug 1912663 - Fix some build issues with cbindgen 0.27. r=firefox-style-system-reviewers,zrhoffman a=pascalc - -It updates serde and syn and they are more strict. In particular, syn 2 -doesn't parse the rust 2015 syntax where try is not a keyword, and serde -rejects duplicate keys. - -Differential Revision: https://phabricator.services.mozilla.com/D219025 - -diff --git a/servo/components/style_traits/values.rs b/servo/components/style_traits/values.rs ---- a/servo/components/style_traits/values.rs -+++ b/servo/components/style_traits/values.rs -@@ -384,21 +384,21 @@ impl Separator for Space { - - fn parse<'i, 't, F, T, E>( - input: &mut Parser<'i, 't>, - mut parse_one: F, - ) -> Result<Vec<T>, ParseError<'i, E>> - where - F: for<'tt> FnMut(&mut Parser<'i, 'tt>) -> Result<T, ParseError<'i, E>>, - { -- input.skip_whitespace(); // Unnecessary for correctness, but may help try() rewind less. -+ input.skip_whitespace(); // Unnecessary for correctness, but may help try_parse() rewind less. - let mut results = vec![parse_one(input)?]; - loop { -- input.skip_whitespace(); // Unnecessary for correctness, but may help try() rewind less. -- if let Ok(item) = input.try(&mut parse_one) { -+ input.skip_whitespace(); // Unnecessary for correctness, but may help try_parse() rewind less. -+ if let Ok(item) = input.try_parse(&mut parse_one) { - results.push(item); - } else { - return Ok(results); - } - } - } - } - -@@ -409,24 +409,24 @@ impl Separator for CommaWithSpace { - - fn parse<'i, 't, F, T, E>( - input: &mut Parser<'i, 't>, - mut parse_one: F, - ) -> Result<Vec<T>, ParseError<'i, E>> - where - F: for<'tt> FnMut(&mut Parser<'i, 'tt>) -> Result<T, ParseError<'i, E>>, - { -- input.skip_whitespace(); // Unnecessary for correctness, but may help try() rewind less. -+ input.skip_whitespace(); // Unnecessary for correctness, but may help try_parse() rewind less. - let mut results = vec![parse_one(input)?]; - loop { -- input.skip_whitespace(); // Unnecessary for correctness, but may help try() rewind less. -+ input.skip_whitespace(); // Unnecessary for correctness, but may help try_parse() rewind less. - let comma_location = input.current_source_location(); -- let comma = input.try(|i| i.expect_comma()).is_ok(); -- input.skip_whitespace(); // Unnecessary for correctness, but may help try() rewind less. -- if let Ok(item) = input.try(&mut parse_one) { -+ let comma = input.try_parse(|i| i.expect_comma()).is_ok(); -+ input.skip_whitespace(); // Unnecessary for correctness, but may help try_parse() rewind less. -+ if let Ok(item) = input.try_parse(&mut parse_one) { - results.push(item); - } else if comma { - return Err(comma_location.new_unexpected_token_error(Token::Comma)); - } else { - break; - } - } - Ok(results) -diff --git a/servo/ports/geckolib/cbindgen.toml b/servo/ports/geckolib/cbindgen.toml ---- a/servo/ports/geckolib/cbindgen.toml -+++ b/servo/ports/geckolib/cbindgen.toml -@@ -318,7 +318,6 @@ - "Keyframe" = "Keyframe" - "nsChangeHint" = "nsChangeHint" - "ServoElementSnapshotTable" = "ServoElementSnapshotTable" --"Keyframe" = "Keyframe" - "ComputedKeyframeValues" = "ComputedKeyframeValues" - "OriginFlags" = "OriginFlags" - "ServoTraversalFlags" = "ServoTraversalFlags" diff --git a/icecat-fix_addon_installation.patch b/icecat-fix_addon_installation.patch deleted file mode 100644 index 5cc140d..0000000 --- a/icecat-fix_addon_installation.patch +++ /dev/null @@ -1,36 +0,0 @@ -# Fixes installation of those addons which don't have ID on IceCat ("Cannot find id for addon" error). ---- a/toolkit/mozapps/extensions/internal/XPIInstall.jsm -+++ b/toolkit/mozapps/extensions/internal/XPIInstall.jsm -@@ -627,8 +627,30 @@ - throw new Error(`Extension is signed with an invalid id (${addon.id})`); - } - } -- if (!addon.id && aLocation.isTemporary) { -- addon.id = generateTemporaryInstallID(aPackage.file); -+ if (!addon.id) { -+ if (aInstallLocation.name == KEY_APP_TEMPORARY) { -+ addon.id = generateTemporaryInstallID(aZipReader.file); -+ } else { -+ try { -+ let sigInput = aZipReader.getInputStream("META-INF/cose.sig"); -+ let sigBinary = Cc['@mozilla.org/binaryinputstream;1'] -+ .createInstance(Ci.nsIBinaryInputStream); -+ sigBinary.setInputStream(sigInput); -+ var sig = '' -+ var sigCount; -+ while ((sigCount = sigBinary.available()) > 0) { -+ sig += sigBinary.readBytes(sigCount); -+ } -+ let sigMatch = sig.match(/\{\w{8}-\w{4}-\w{4}-\w{4}-\w{12}\}/g) -+ if (sigMatch && sigMatch.length == 1) { -+ addon.id = sigMatch[0] -+ } else { -+ logger.warn("Failed to find addon id"); -+ } -+ } catch (e) { -+ logger.warn("Failed to process META-INF/cose.sig"); -+ } -+ } - } - } - diff --git a/icecat-lang_download.sh b/icecat-lang_download.sh index 1bce42c..945dd4b 100755 --- a/icecat-lang_download.sh +++ b/icecat-lang_download.sh @@ -1,6 +1,6 @@ #!/bin/bash -VERSION=115.24.0 +VERSION=128.12.0 URL=https://ftp.mozilla.org/pub/firefox/releases/${VERSION}esr/linux-x86_64… for u in $URL; do diff --git a/icecat-pgo.patch b/icecat-pgo.patch deleted file mode 100644 index 3b9fde4..0000000 --- a/icecat-pgo.patch +++ /dev/null @@ -1,115 +0,0 @@ -diff -up firefox-99.0/build/moz.configure/lto-pgo.configure.pgo firefox-99.0/build/moz.configure/lto-pgo.configure ---- firefox-99.0/build/moz.configure/lto-pgo.configure.pgo 2022-03-31 01:24:38.000000000 +0200 -+++ firefox-99.0/build/moz.configure/lto-pgo.configure 2022-04-04 10:15:45.387694143 +0200 -@@ -247,8 +247,8 @@ def lto( - cflags.append("-flto") - ldflags.append("-flto") - else: -- cflags.append("-flto=thin") -- ldflags.append("-flto=thin") -+ cflags.append("-flto") -+ ldflags.append("-flto") - - if target.os == "Android" and value == "cross": - # Work around https://github.com/rust-lang/rust/issues/90088 -@@ -264,7 +264,7 @@ def lto( - if value == "full": - cflags.append("-flto") - else: -- cflags.append("-flto=thin") -+ cflags.append("-flto") - # With clang-cl, -flto can only be used with -c or -fuse-ld=lld. - # AC_TRY_LINKs during configure don't have -c, so pass -fuse-ld=lld. - cflags.append("-fuse-ld=lld") -diff -up firefox-99.0/build/pgo/profileserver.py.pgo firefox-99.0/build/pgo/profileserver.py ---- firefox-99.0/build/pgo/profileserver.py.pgo 2022-03-31 01:24:38.000000000 +0200 -+++ firefox-99.0/build/pgo/profileserver.py 2022-04-04 10:15:45.387694143 +0200 -@@ -11,7 +11,7 @@ - import subprocess - - import mozcrash --from mozbuild.base import MozbuildObject, BinaryNotFoundException -+from mozbuild.base import MozbuildObject, BinaryNotFoundException, BuildEnvironmentNotFoundException - from mozfile import TemporaryDirectory - from mozhttpd import MozHttpd - from mozprofile import IceCatProfile, Preferences -@@ -87,9 +87,22 @@ - locations = ServerLocations() - locations.add_host(host="127.0.0.1", port=PORT, options="primary,privileged") - -- old_profraw_files = glob.glob("*.profraw") -- for f in old_profraw_files: -- os.remove(f) -+ using_gcc = False -+ try: -+ if build.config_environment.substs.get('CC_TYPE') == 'gcc': -+ using_gcc = True -+ except BuildEnvironmentNotFoundException: -+ pass -+ -+ if using_gcc: -+ for dirpath, _, filenames in os.walk('.'): -+ for f in filenames: -+ if f.endswith('.gcda'): -+ os.remove(os.path.join(dirpath, f)) -+ else: -+ old_profraw_files = glob.glob('*.profraw') -+ for f in old_profraw_files: -+ os.remove(f) - - with TemporaryDirectory() as profilePath: - # TODO: refactor this into mozprofile -@@ -212,6 +225,9 @@ - if get_crashreports(profilePath, name="IceCat exited successfully?") != 0: - print("IceCat exited successfully, but produced a crashreport") - sys.exit(1) -+ print('Copying profile data....') -+ os.system('pwd'); -+ os.system('tar cf profdata.tar.gz `find . -name "*.gcda"`; cd ..; tar xf instrumented/profdata.tar.gz;'); - - llvm_profdata = env.get("LLVM_PROFDATA") - if llvm_profdata: -diff -up firefox-99.0/build/unix/mozconfig.unix.pgo firefox-99.0/build/unix/mozconfig.unix ---- firefox-99.0/build/unix/mozconfig.unix.pgo 2022-03-31 01:24:38.000000000 +0200 -+++ firefox-99.0/build/unix/mozconfig.unix 2022-04-04 10:15:45.387694143 +0200 -@@ -4,6 +4,15 @@ if [ -n "$FORCE_GCC" ]; then - CC="$MOZ_FETCHES_DIR/gcc/bin/gcc" - CXX="$MOZ_FETCHES_DIR/gcc/bin/g++" - -+ if [ -n "$MOZ_PGO" ]; then -+ if [ -z "$USE_ARTIFACT" ]; then -+ ac_add_options --enable-lto -+ fi -+ export AR="$topsrcdir/gcc/bin/gcc-ar" -+ export NM="$topsrcdir/gcc/bin/gcc-nm" -+ export RANLIB="$topsrcdir/gcc/bin/gcc-ranlib" -+ fi -+ - # We want to make sure we use binutils and other binaries in the tooltool - # package. - mk_add_options "export PATH=$MOZ_FETCHES_DIR/gcc/bin:$PATH" -diff -up firefox-99.0/extensions/spellcheck/src/moz.build.pgo firefox-99.0/extensions/spellcheck/src/moz.build ---- firefox-99.0/extensions/spellcheck/src/moz.build.pgo 2022-03-31 01:24:50.000000000 +0200 -+++ firefox-99.0/extensions/spellcheck/src/moz.build 2022-04-04 10:15:45.387694143 +0200 -@@ -28,3 +28,5 @@ EXPORTS.mozilla += [ - "mozInlineSpellChecker.h", - "mozSpellChecker.h", - ] -+ -+CXXFLAGS += ['-fno-devirtualize'] -diff -up firefox-99.0/toolkit/components/terminator/nsTerminator.cpp.pgo firefox-99.0/toolkit/components/terminator/nsTerminator.cpp ---- firefox-99.0/toolkit/components/terminator/nsTerminator.cpp.pgo 2022-04-04 10:15:45.387694143 +0200 -+++ firefox-99.0/toolkit/components/terminator/nsTerminator.cpp 2022-04-04 10:19:07.022239556 +0200 -@@ -466,6 +466,11 @@ void nsTerminator::StartWatchdog() { - } - #endif - -+ // Disable watchdog for PGO train builds - writting profile information at -+ // exit may take time and it is better to make build hang rather than -+ // silently produce poorly performing binary. -+ crashAfterMS = INT32_MAX; -+ - UniquePtr<Options> options(new Options()); - // crashAfterTicks is guaranteed to be > 0 as - // crashAfterMS >= ADDITIONAL_WAIT_BEFORE_CRASH_MS >> HEARTBEAT_INTERVAL_MS - diff --git a/icecat.spec b/icecat.spec index f4c2135..65d55ad 100644 --- a/icecat.spec +++ b/icecat.spec @@ -86,8 +86,6 @@ ExcludeArch: %{ix86} %{arm} %global libvpx_version 1.8.2 %endif -%global disable_elfhack 1 - # Use clang? %bcond_without toolchain_clang @@ -101,8 +99,8 @@ ExcludeArch: %{ix86} %{arm} %global __requires_exclude ^(%%(find %{buildroot}%{icecatappdir} -name '*.so' | xargs -n1 basename | sort -u | paste -s -d '|' -)) Name: icecat -Epoch: 2 -Version: 115.24.0 +Epoch: 3 +Version: 128.12.0 Release: %autorelease -e %{redhat_ver} Summary: GNU version of Firefox browser @@ -144,9 +142,7 @@ Source19: run-wayland-compositor # Build patches # Fixes installation of those addons which don't have ID on IceCat ("Cannot find id for addon" error). -Patch1: %{name}-fix_addon_installation.patch Patch2: %{name}-commasplit.patch -Patch5: rhbz-1219542-s390-build.patch # With clang LLVM 16 rust-bindgen 0.56.0 is too old, combined # https://github.com/rust-lang/rust-bindgen/pull/2319 @@ -158,9 +154,7 @@ Patch7: rust-bindgen-2319-2339.patch Patch8: mp4parse-rust-8b5b652d38e007e736bb442ccd5aa5ed699db100.patch Patch40: build-aarch64-skia.patch -Patch41: build-disable-elfhack.patch Patch44: build-arm-libopus.patch -Patch54: mozilla-1669639.patch # Fedora specific patches Patch219: rhbz-1173156.patch @@ -179,7 +173,6 @@ Patch403: icecat-python3.11-open-U.patch Patch404: icecat-python3.11-regex-inline-flags.patch Patch412: mozilla-1337988.patch Patch422: mozilla-1580174-webrtc-popup.patch -Patch425: icecat-115.19.0-fix_mz1912663.patch # Patch for GCC-15 Patch426: icecat-115.19.0-fix_mz1917964.patch @@ -187,8 +180,6 @@ Patch426: icecat-115.19.0-fix_mz1917964.patch Patch423: mozilla-1512162.patch # PGO/LTO patches -Patch600: %{name}-pgo.patch -Patch602: mozilla-1516803.patch Patch603: %{name}-gcc-always-inline.patch BuildRequires: alsa-lib-devel @@ -358,15 +349,7 @@ and translations langpack add-ons. # Copy license files tar -xf %{SOURCE5} -%patch -P 1 -p 1 -b .fix_addon_installation %patch -P 2 -p 1 -b .commasplit -%ifarch s390x -%patch -P 5 -p 1 -b .rhbz-1219542-s390 -%endif - -%if 0%{?disable_elfhack} -%patch -P 41 -p 1 -b .disable-elfhack -%endif # Fedora patches %patch -P 219 -p 1 -b .rhbz-1173156 @@ -385,16 +368,7 @@ tar -xf %{SOURCE5} %ifarch %{power64} %patch -P 423 -p 1 -b .1512162 %endif -%patch -P 425 -p 1 -b .1912663 %patch -P 426 -p 1 -b .1917964 - -%patch -P 54 -p 1 -b .1669639 - -# PGO patches -%if 0%{?build_with_pgo} -%patch -P 600 -p 1 -b .pgo -%patch -P 602 -p 1 -b .1516803 -%endif %patch -P 603 -p1 -b .inline # Remove default configuration and copy the customized one @@ -481,8 +455,9 @@ echo "ac_add_options --with-libclang-path=`llvm-config%{?llvm_suffix} --libdir`" #echo "ac_add_options --with-clang-path=%%{_bindir}/clang%%{?llvm_suffix}" >> .mozconfig %endif -%ifarch s390x +%ifarch s390x %{arm64} echo "ac_add_options --disable-jit" >> .mozconfig +echo "ac_add_options --disable-elf-hack" >> .mozconfig %endif %if 0%{?build_with_pgo} diff --git a/mozilla-1512162.patch b/mozilla-1512162.patch index 99a0b14..02e9585 100644 --- a/mozilla-1512162.patch +++ b/mozilla-1512162.patch @@ -1,7 +1,6 @@ -diff -up firefox-68.0.1/js/xpconnect/src/XPCWrappedNative.cpp.1512162 firefox-68.0.1/js/xpconnect/src/XPCWrappedNative.cpp ---- firefox-68.0.1/js/xpconnect/src/XPCWrappedNative.cpp.1512162 2019-07-17 22:51:30.000000000 +0200 -+++ firefox-68.0.1/js/xpconnect/src/XPCWrappedNative.cpp 2019-07-25 08:08:18.512528313 +0200 -@@ -1092,7 +1092,7 @@ class MOZ_STACK_CLASS CallMethodHelper f +--- a/js/xpconnect/src/XPCWrappedNative.cpp.1512162 2019-07-17 22:51:30.000000000 +0200 ++++ b/js/xpconnect/src/XPCWrappedNative.cpp 2019-07-25 08:08:18.512528313 +0200 +@@ -1055,7 +1055,7 @@ MOZ_ALWAYS_INLINE bool GetOutParamSource(uint8_t paramIndex, MutableHandleValue srcp) const; @@ -10,7 +9,7 @@ diff -up firefox-68.0.1/js/xpconnect/src/XPCWrappedNative.cpp.1512162 firefox-68 MOZ_ALWAYS_INLINE bool QueryInterfaceFastPath(); -@@ -1139,7 +1139,7 @@ class MOZ_STACK_CLASS CallMethodHelper f +@@ -1102,7 +1102,7 @@ ~CallMethodHelper(); @@ -19,25 +18,3 @@ diff -up firefox-68.0.1/js/xpconnect/src/XPCWrappedNative.cpp.1512162 firefox-68 // Trace implementation so we can put our CallMethodHelper in a Rooted<T>. void trace(JSTracer* aTrc); -@@ -1157,6 +1157,10 @@ bool XPCWrappedNative::CallMethod(XPCCal - return helper.get().Call(); - } - -+#if (__GNUC__ && __linux__ && __PPC64__ && _LITTLE_ENDIAN) -+// Work around a compiler bug on ppc64le (bug 1512162). -+__attribute__ ((noinline,noclone)) -+#endif - bool CallMethodHelper::Call() { - mCallContext.SetRetVal(JS::UndefinedValue()); - -@@ -1315,6 +1319,10 @@ bool CallMethodHelper::GetOutParamSource - return true; - } - -+#if (__GNUC__ && __linux__ && __PPC64__ && _LITTLE_ENDIAN) -+// Work around a compiler bug on ppc64le (bug 1512162). -+__attribute__ ((noinline,noclone)) -+#endif - bool CallMethodHelper::GatherAndConvertResults() { - // now we iterate through the native params to gather and convert results - uint8_t paramCount = mMethodInfo->GetParamCount(); diff --git a/mozilla-1516803.patch b/mozilla-1516803.patch deleted file mode 100644 index 6c4ff59..0000000 --- a/mozilla-1516803.patch +++ /dev/null @@ -1,15 +0,0 @@ -diff --git a/security/sandbox/linux/moz.build b/security/sandbox/linux/moz.build ---- a/security/sandbox/linux/moz.build -+++ b/security/sandbox/linux/moz.build -@@ -114,9 +114,8 @@ - # gcc lto likes to put the top level asm in syscall.cc in a different partition - # from the function using it which breaks the build. Work around that by - # forcing there to be only one partition. --for f in CONFIG["OS_CXXFLAGS"]: -- if f.startswith("-flto") and CONFIG["CC_TYPE"] != "clang": -- LDFLAGS += ["--param lto-partitions=1"] -+if CONFIG['CC_TYPE'] != 'clang': -+ LDFLAGS += ['--param', 'lto-partitions=1'] - - DEFINES["NS_NO_XPCOM"] = True - DisableStlWrapping() diff --git a/mozilla-1669639.patch b/mozilla-1669639.patch deleted file mode 100644 index 3639133..0000000 --- a/mozilla-1669639.patch +++ /dev/null @@ -1,15 +0,0 @@ ---- firefox-81.0.1/build/mach_initialize.py.old 2020-10-06 14:16:06.212974910 +0200 -+++ firefox-81.0.1/build/mach_initialize.py 2020-10-06 14:19:03.313179557 +0200 -@@ -507,7 +507,10 @@ class ImportHook(object): - # doesn't happen or because it doesn't matter). - if not os.path.exists(module.__file__[:-1]): - if os.path.exists(module.__file__): -- os.remove(module.__file__) -+ try: -+ os.remove(module.__file__) -+ except: -+ pass - del sys.modules[module.__name__] - module = self(name, globals, locals, fromlist, level) - - diff --git a/rhbz-1219542-s390-build.patch b/rhbz-1219542-s390-build.patch deleted file mode 100644 index f94e43a..0000000 --- a/rhbz-1219542-s390-build.patch +++ /dev/null @@ -1,23 +0,0 @@ -diff -up firefox-55.0/js/src/old-configure.in.rhbz-1219542-s390 firefox-55.0/js/src/old-configure.in ---- firefox-55.0/js/src/old-configure.in.rhbz-1219542-s390 2017-07-31 18:20:48.000000000 +0200 -+++ firefox-55.0/js/src/old-configure.in 2017-08-02 14:31:32.190243669 +0200 -@@ -541,7 +541,7 @@ case "$host" in - - *-linux*|*-kfreebsd*-gnu|*-gnu*) - HOST_CFLAGS="$HOST_CFLAGS -DXP_UNIX" -- HOST_OPTIMIZE_FLAGS="${HOST_OPTIMIZE_FLAGS=-O3}" -+ HOST_OPTIMIZE_FLAGS="${HOST_OPTIMIZE_FLAGS=-O1}" - ;; - - *) -@@ -617,8 +617,8 @@ case "$target" in - - *-*linux*) - if test "$GNU_CC" -o "$GNU_CXX"; then -- MOZ_PGO_OPTIMIZE_FLAGS="-O3" -- MOZ_OPTIMIZE_FLAGS="-O3" -+ MOZ_PGO_OPTIMIZE_FLAGS="-O1" -+ MOZ_OPTIMIZE_FLAGS="-O1" - if test -z "$CLANG_CC"; then - MOZ_OPTIMIZE_FLAGS="-freorder-blocks $MOZ_OPTIMIZE_FLAGS" - fi diff --git a/sources b/sources index 2603140..44be745 100644 --- a/sources +++ b/sources @@ -1,5 +1,5 @@ SHA512 (cbindgen-vendor.tar.xz) = 6d354d65674395b8171f262ae9aa08f656fdd83b6d29d70bd1ad2f13c4a52db81df780cfdf6ac86e9d1f16426c9ab3cdc0160f0785a0909ad7525fd8a9bc3b25 -SHA512 (icecat-115.24.0-langpacks.tar.gz) = f54612b6f39c72edb0fe874c1c290cea254661566e7062d220d396c7bb5f85c032effc0e7acb70b11e316ed782abda2e5686c666ce9d792c57330318a766d17a -SHA512 (icecat-115.24.0-rh1.tar.bz2) = e4f89dda5b71de63632dc743582d31b0314a51edb3b21766cb8a16dfe44005a56a9b4be08c7d58f605f0ac3c9de9d65495dd079b2eeeb667ec4b65e009d16947 +SHA512 (icecat-128.12.0-langpacks.tar.gz) = c3caecad5756513409af6cd8426a1a0e6a05c6286756fd4350d5ca1fac9a110a8ea3bdac94451c2a5d1824ff5a73c3b54f3754c0ab19203aea22f7001ca46886 +SHA512 (icecat-128.12.0-rh1.tar.bz2) = d1d3724c706d81246d2a35834236a2eab75deb51434a215f07f24221f6b75369d7d702724d175420c74cefa23c0081a28421dcbe85ead489e5bffac28bf2314a SHA512 (icecat-COPYING-licensefiles.tar.gz) = ed541845170f1d209e322b0def3248d571e0c42c4a17c74e83197e743bd8a128a1475f5312d905c8e70d047eddeac17e604373892eb6d5f1720c5c361849c42c SHA512 (icecat.png) = a3cec16cb15a27c3c91b53e2c534e78b07911011ff1331e450c0baf8e13b76da7cea2a90e5d75191fa88cfbfd40a0a7f3e553e92b64d0043dadd5ad5edfdf81c

1 0

[Report] Packages Restricting Arches
by root 28 Jun '25

28 Jun '25

New package excluding arches (1) ============================ - headscale ExclusiveArch: %{golang_arches} ExclusiveArch: %{golang_arches_future} List of packages currently excluding arches (2453) =========================================== - 0ad ExclusiveArch: %{ix86} x86_64 %{arm} aarch64 ppc64le - 0install ExcludeArch: %{ix86} - 389-ds-base ExcludeArch: i686 - 4ti2 ExcludeArch: %{ix86} - 90-Second-Portraits ExclusiveArch: %{arm} %{ix86} x86_64 aarch64 ppc64le riscv64 - ALL ExcludeArch: %{ix86} s390x - AcetoneISO ExcludeArch: ppc %{power64} s390x - Agda ExcludeArch: %{ix86} armv7hl - Agda-stdlib ExcludeArch: armv7hl %{ix86} - BareBonesBrowserLaunch ExclusiveArch: %{java_arches} noarch - CFR ExclusiveArch: %{java_arches} noarch - COPASI ExcludeArch: %{ix86} - CardManager ExclusiveArch: %{java_arches} noarch - CubicSDR ExcludeArch: i686 - CuraEngine ExcludeArch: %{ix86} - CuraEngine_grpc_definitions ExcludeArch: %{ix86} - DSDP ExcludeArch: %{ix86} - E ExcludeArch: %{ix86} - GAPDoc ExcludeArch: %{ix86} - GoldenCheetah ExclusiveArch: %{qt6_qtwebengine_arches} - GtkAda ExclusiveArch: %{GPRbuild_arches} - GtkAda3 ExclusiveArch: %{GPRbuild_arches} - HPCombi ExclusiveArch: x86_64 %{arm64} - IPAddress ExclusiveArch: %{java_arches} noarch - IQmol ExcludeArch: %{ix86} - InsightToolkit ExcludeArch: %{ix86} - JUnitParams ExclusiveArch: %{java_arches} noarch - Java-WebSocket ExclusiveArch: %{java_arches} noarch - L-function ExcludeArch: %{ix86} - MUSIC ExcludeArch: %{ix86} - Macaulay2 ExcludeArch: %{ix86} %{power64} - Maelstrom ExcludeArch: %{ix86} - Mars ExclusiveArch: %{java_arches} noarch - Mayavi ExcludeArch: %{ix86} - NiaAML-GUI ExcludeArch: %{ix86} - OpenColorIO ExcludeArch: i686 ExclusiveArch: x86_64 ppc64le - OpenImageIO ExcludeArch: i686 ExclusiveArch: x86_64 ppc64le - OpenMolcas ExclusiveArch: x86_64 aarch64 ppc64le s390x - OpenStego ExclusiveArch: %{java_arches} noarch - Pencil2D ExcludeArch: %{ix86} - PragmARC ExclusiveArch: %{GPRbuild_arches} - R-IRkernel ExcludeArch: %{ix86} - R-V8 ExclusiveArch: %{nodejs_arches} - R-ape ExcludeArch: %{ix86} - R-igraph ExcludeArch: %{ix86} - R-kernlab ExcludeArch: %{ix86} s390x - R-rJava ExclusiveArch: %{java_arches} - R-rtracklayer ExcludeArch: i686 - Random123 ExcludeArch: mips64r2 mips32r2 s390 - RdRand ExclusiveArch: %{ix86} x86_64 - SLOF ExclusiveArch: ppc64le - Singular ExcludeArch: %{ix86} - TOPCOM ExcludeArch: %{ix86} - VulkanMemoryAllocator ExcludeArch: %{ix86} - YafaRay ExclusiveArch: %{ix86} x86_64 - aardvark-dns ExclusiveArch: %{golang_arches_future} ExclusiveArch: aarch64 ppc64le s390x x86_64 - abiword ExcludeArch: %{ix86} - accel-config ExclusiveArch: %{ix86} x86_64 - accel-ppp ExcludeArch: %{ix86} - acpica-tools ExcludeArch: i686 armv7hl s390x - acpid ExclusiveArch: x86_64 aarch64 riscv64 - act ExcludeArch: %{ix86} - admesh ExcludeArch: %{ix86} - admeshgui ExcludeArch: %{ix86} - aegisub ExcludeArch: ppc64le s390x - aemu ExcludeArch: %{ix86} %{power64} s390x - agenda ExcludeArch: %{ix86} - ahven ExclusiveArch: %{GPRbuild_arches} - algobox ExclusiveArch: %{qt5_qtwebengine_arches} - alienarena ExcludeArch: s390x - alizams ExcludeArch: %{power64} %{ix86} s390x - alt-ergo ExcludeArch: %{ix86} - amdsmi ExclusiveArch: x86_64 - american-fuzzy-lop ExclusiveArch: x86_64 s390x - amg4psblas ExcludeArch: %{ix86} - anaconda ExcludeArch: %{ix86} - android-tools ExcludeArch: ppc ppc64 s390x ppc64le - anet ExclusiveArch: %{GPRbuild_arches} - ansible-collection-microsoft-sql ExcludeArch: i686 - ant ExclusiveArch: %{java_arches} noarch - ant-antunit ExclusiveArch: %{java_arches} noarch - ant-contrib ExclusiveArch: %{java_arches} noarch - antlr ExclusiveArch: %{java_arches} - antlr3 ExclusiveArch: %{java_arches} - antlr4-project ExclusiveArch: %{java_arches} - antlrworks ExclusiveArch: %{java_arches} noarch - aopalliance ExclusiveArch: %{java_arches} noarch - apache-commons-beanutils ExclusiveArch: %{java_arches} noarch - apache-commons-cli ExclusiveArch: %{java_arches} noarch - apache-commons-codec ExclusiveArch: %{java_arches} noarch - apache-commons-collections ExclusiveArch: %{java_arches} noarch - apache-commons-collections4 ExclusiveArch: %{java_arches} noarch - apache-commons-compress ExclusiveArch: %{java_arches} noarch - apache-commons-digester ExclusiveArch: %{java_arches} noarch - apache-commons-exec ExclusiveArch: %{java_arches} noarch - apache-commons-io ExclusiveArch: %{java_arches} noarch - apache-commons-jxpath ExclusiveArch: %{java_arches} noarch - apache-commons-lang3 ExclusiveArch: %{java_arches} noarch - apache-commons-logging ExclusiveArch: %{java_arches} noarch - apache-commons-math ExclusiveArch: %{java_arches} noarch - apache-commons-modeler ExclusiveArch: %{java_arches} noarch - apache-commons-net ExclusiveArch: %{java_arches} noarch - apache-commons-parent ExclusiveArch: %{java_arches} noarch - apache-commons-pool ExclusiveArch: %{java_arches} noarch - apache-commons-vfs ExclusiveArch: %{java_arches} noarch - apache-ivy ExclusiveArch: %{java_arches} noarch - apache-logging-parent ExclusiveArch: %{java_arches} noarch - apache-parent ExclusiveArch: %{java_arches} noarch - apache-resource-bundles ExclusiveArch: %{java_arches} noarch - apache-sshd ExclusiveArch: %{java_arches} noarch - apiguardian ExclusiveArch: %{java_arches} noarch - appeditor ExcludeArch: %{ix86} - appstream-generator ExclusiveArch: %{ldc_arches} - apricots ExcludeArch: ppc64le aarch64 - apron ExcludeArch: %{ix86} - aquamarine ExcludeArch: %{ix86} - aqute-bnd ExclusiveArch: %{java_arches} noarch - arbor ExcludeArch: mips64r2 mips32r2 s390x %{ix86} - arc-theme ExcludeArch: %{ix86} - argparse ExcludeArch: %{ix86} - args4j ExclusiveArch: %{java_arches} noarch - arianna ExclusiveArch: %{qt6_qtwebengine_arches} - arm-compute-library ExcludeArch: i686 ppc64le s390x - arm-none-eabi-binutils-cs ExcludeArch: %{ix86} - arm-none-eabi-gcc-cs ExcludeArch: %{ix86} - arpwatch ExcludeArch: %{ix86} - asahi-installer ExcludeArch: s390x - asdcplib ExcludeArch: %{ix86} %{arm} - asmjit ExclusiveArch: aarch64 x86_64 - assertj-core ExclusiveArch: %{java_arches} noarch - astromenace ExcludeArch: ppc64 s390x - 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cpuinfo ExclusiveArch: x86_64 aarch64 - cqrlog ExclusiveArch: %{fpc_arches} - cramjam-cli ExcludeArch: %{ix86} - crash ExclusiveArch: %{ix86} ia64 x86_64 ppc ppc64 s390 s390x %{arm} aarch64 ppc64le - crash-gcore-command ExclusiveArch: aarch64 ppc64le x86_64 - crash-trace-command ExclusiveArch: aarch64 ppc64le s390x x86_64 - credentials-fetcher ExclusiveArch: x86_64 aarch64 s390x - crest ExcludeArch: s390x - cri-o ExclusiveArch: %{?go_arches:%{go_arches}}%{!?go_arches:%{ix86} x86_64 aarch64 %{arm}} - cri-tools ExclusiveArch: %{?go_arches:%{go_arches}}%{!?go_arches:%{ix86} x86_64 aarch64 %{arm}} - criu ExclusiveArch: x86_64 %{arm} ppc64le aarch64 s390x riscv64 - crosswords ExcludeArch: s390x - crun ExclusiveArch: %{golang_arches_future} ExclusiveArch: aarch64 ppc64le riscv64 s390x x86_64 - crun-vm ExcludeArch: %{ix86} - cryfs ExcludeArch: i686 - cryptlib ExclusiveArch: x86_64 aarch64 ppc64le riscv64 - crypto-policies ExclusiveArch: %{java_arches} noarch - cryptobone ExclusiveArch: x86_64 ppc64le aarch64 riscv64 - cryptominisat ExcludeArch: %{ix86} - csdp ExcludeArch: %{ix86} - csslint ExclusiveArch: %{nodejs_arches} noarch - cucumber-messages ExcludeArch: %{ix86} - cura ExcludeArch: %{ix86} - cura-fdm-materials ExcludeArch: %{ix86} - cvc5 ExcludeArch: %{ix86} - cxsc ExcludeArch: %{ix86} - daggy ExcludeArch: s390x - dapl ExcludeArch: s390, armv7hl - daq ExclusiveArch: x86_64 aarch64 - darktable ExcludeArch: armv7hl i686 s390x - dbus-sharp ExclusiveArch: %mono_arches - dbus-sharp-glib ExclusiveArch: %mono_arches - ddccontrol ExcludeArch: s390 s390x - ddcutil ExcludeArch: s390 s390x - ddd ExcludeArch: %{ix86} - debugbreak ExcludeArch: %{ix86} - decentxml ExclusiveArch: %{java_arches} noarch - deepin-daemon ExcludeArch: s390x - diffoscope ExcludeArch: %{ix86} - digikam ExclusiveArch: %{qt6_qtwebengine_arches} ExclusiveArch: %{qt5_qtwebengine_arches} - dippi ExcludeArch: %{ix86} - directory-maven-plugin ExclusiveArch: %{java_arches} noarch - direwolf ExcludeArch: i686 - dirgra ExclusiveArch: %{java_arches} noarch - disruptor ExclusiveArch: %{java_arches} noarch - ditaa ExclusiveArch: %{java_arches} noarch - dl-fedora ExcludeArch: %{ix86} - dl_poly ExcludeArch: i686 - dlib ExcludeArch: %{ix86} s390x - dlm ExclusiveArch: i686 x86_64 - dmidecode ExclusiveArch: %{ix86} x86_64 ia64 aarch64 riscv64 - dmtcp ExclusiveArch: x86_64 - dnsdist ExcludeArch: %{ix86} #1994125 ExcludeArch: armv7hl #1994125 - docker-distribution ExclusiveArch: %{?go_arches:%{go_arches}}%{!?go_arches:%{ix86} x86_64 %{arm}} - dogtag-pki ExclusiveArch: %{java_arches} ExcludeArch: i686 - dola ExclusiveArch: %{java_arches} noarch - dola-gleaner ExclusiveArch: %{java_arches} noarch - dola-transformer ExclusiveArch: %{java_arches} noarch - dolfin ExcludeArch: %{ix86} - dolphin-emu ExclusiveArch: x86_64 aarch64 - dom4j ExclusiveArch: %{java_arches} noarch - dosbox-staging ExcludeArch: %{ix86} - dotnet8.0 ExclusiveArch: aarch64 ppc64le s390x x86_64 - dotnet9.0 ExclusiveArch: aarch64 ppc64le s390x x86_64 - doublecmd ExclusiveArch: %{ix86} x86_64 - dovecot ExcludeArch: %{ix86} - dovecot-fts-xapian ExcludeArch: %{ix86} - dpdk ExclusiveArch: x86_64 i686 aarch64 ppc64le - dragonbox ExcludeArch: %{ix86} - drat-trim ExcludeArch: %{ix86} - drat2er ExcludeArch: %{ix86} - dub ExclusiveArch: %{ldc_arches} - duperemove ExcludeArch: %{ix86} - dvdauthor ExcludeArch: %{ix86} - dvgrab ExcludeArch: s390 s390x - dxvk-native ExclusiveArch: %{ix86} x86_64 - dyninst ExclusiveArch: x86_64 ppc64le aarch64 - e-antic ExcludeArch: %{ix86} - e00compr ExcludeArch: %{ix86} - e3 ExclusiveArch: %{ix86} x86_64 - easymock ExclusiveArch: %{java_arches} noarch - eccodes ExcludeArch: i686 - ecj ExclusiveArch: %{java_arches} noarch - eclipse-swt ExclusiveArch: %{java_arches} - ecryptfs-utils ExcludeArch: %{ix86} - ed25519-java ExclusiveArch: %{java_arches} noarch - edac-utils ExcludeArch: %{ix86} - edflib ExcludeArch: s390x %{ix86} - edwin-fonts ExcludeArch: %{ix86} - eegdev ExcludeArch: %{ix86} - efax ExcludeArch: s390 s390x - efibootmgr ExclusiveArch: %{efi} - efifs ExclusiveArch: %{efi} - efivar ExclusiveArch: %{efi} - electron-cash ExcludeArch: %{ix86} - electrum ExcludeArch: %{ix86} - elementary-icon-theme ExcludeArch: s390x - elk ExclusiveArch: x86_64 %{ix86} ExclusiveArch: x86_64 aarch64 %{arm} %{power64} ExclusiveArch: x86_64 %{ix86} aarch64 %{arm} %{power64} - emacs-common-proofgeneral ExcludeArch: %{ix86} - emacs-company-mode ExcludeArch: %{ix86} - emacs-iedit ExcludeArch: %{ix86} - emacs-slime ExclusiveArch: %{arm} %{ix86} x86_64 ppc sparcv9 aarch64 - embree ExclusiveArch: aarch64 x86_64 - embree3 ExclusiveArch: aarch64 x86_64 - enjarify ExclusiveArch: %{java_arches} noarch - enki ExclusiveArch: %{qt5_qtwebengine_arches} noarch - envytools ExclusiveArch: %{ix86} x86_64 %{arm} aarch64 riscv64 - eot-utils ExcludeArch: %{ix86} - ergo ExcludeArch: %{ix86} ExcludeArch: ppc64le - eric ExclusiveArch: %{qt6_qtwebengine_arches} noarch - erlang-corba ExclusiveArch: %{java_arches} - erlang-riak_ensemble ExcludeArch: ppc64le - esmi_ib_library ExclusiveArch: x86_64 - espresso ExcludeArch: s390x i686 armv7hl - eth-tools ExclusiveArch: x86_64 - ethos ExcludeArch: %{ix86} - exec-maven-plugin ExclusiveArch: %{java_arches} noarch - external-editor-revived ExclusiveArch: %{rust_arches} - extra-enforcer-rules ExclusiveArch: %{java_arches} noarch - f3d ExcludeArch: %{ix86} - fasterxml-oss-parent ExclusiveArch: %{java_arches} noarch - fastfetch ExcludeArch: %{ix86} - fastnetmon ExcludeArch: %{ix86} - fatcat ExcludeArch: %{ix86} - fb303 ExclusiveArch: x86_64 aarch64 ppc64le riscv64 - fbgemm ExclusiveArch: x86_64 - fbreader ExcludeArch: %{ix86} ExcludeArch: armv7hl - fbthrift ExclusiveArch: x86_64 aarch64 ppc64le riscv64 - fcgiwrap ExcludeArch: %{ix86} - fcitx-libpinyin ExclusiveArch: %{qt5_qtwebengine_arches} - fcitx5-mozc ExcludeArch: ppc ppc64 sparcv9 sparc64 s390x %{ix86} - fcoe-utils ExcludeArch: ppc s390 ExcludeArch: %{ix86} - feather ExcludeArch: %{arm} %{ix86} - feedbackd ExcludeArch: i686 - felix-parent ExclusiveArch: %{java_arches} noarch - felix-utils ExclusiveArch: %{java_arches} noarch - fernflower ExclusiveArch: %{java_arches} noarch - fex-emu ExclusiveArch: %{arm64} %{x86_64} ExclusiveArch: %{arm64} - fido-device-onboard ExcludeArch: %{ix86} - filezilla ExcludeArch: s390x - firecracker ExclusiveArch: aarch64 x86_64 - firefox ExcludeArch: i686 - fish ExcludeArch: %{ix86} %{arm32} - fishbowl ExclusiveArch: %{java_arches} noarch - fizz ExclusiveArch: x86_64 aarch64 ppc64le riscv64 - flang ExcludeArch: i686 s390x - flashrom ExcludeArch: s390 s390x - flatbuffers ExcludeArch: %{ix86} - flatpak ExcludeArch: %{ix86} - flatpak-builder ExcludeArch: %{ix86} - flatpak-module-tools ExcludeArch: %{ix86} - fldigi ExcludeArch: i686 - flexmark-java ExclusiveArch: noarch %{java_arches} - flickcurl ExcludeArch: %{ix86} - flint ExcludeArch: %{ix86} - flocq ExclusiveArch: %{ocaml_native_compiler} - floppy-support ExcludeArch: %{arm} aarch64 s390x - florist ExclusiveArch: %{GPRbuild_arches} - flterm ExcludeArch: s390 s390x sparcv9 - fluent-bit ExclusiveArch: x86_64 aarch64 - flute ExclusiveArch: %{java_arches} noarch - fmidi ExcludeArch: %{ix86} - folly ExclusiveArch: x86_64 aarch64 ppc64le riscv64 - fop ExclusiveArch: %{java_arches} noarch - forge-parent ExclusiveArch: %{java_arches} noarch - forgejo ExclusiveArch: %golang_arches_future - fotocx ExcludeArch: %{ix86} - foxi ExclusiveArch: x86_64 aarch64 - fpc ExclusiveArch: %{arm} aarch64 %{ix86} x86_64 ppc64le - fprintd ExcludeArch: s390 s390x - fractal ExcludeArch: %{ix86} - fragments ExcludeArch: %{ix86} - frama-c ExclusiveArch: %{ocaml_native_compiler} - free42 ExcludeArch: %{ix86} - freecol ExclusiveArch: %{java_arches} noarch - freedink ExcludeArch: s390x - freedink-dfarc ExcludeArch: s390x - freedv ExcludeArch: i686 - freefem++ ExcludeArch: %{ix86} - freemarker ExclusiveArch: %{java_arches} noarch - freerouting ExclusiveArch: %{java_arches} noarch - freetennis ExcludeArch: sparc64 s390 s390x %{ix86} - frescobaldi ExclusiveArch: %{qt6_qtwebengine_arches} - frr ExcludeArch: %{ix86} - frysk ExclusiveArch: x86_64 ppc64 - fuse-btfs ExcludeArch: i686 - fuse-overlayfs ExclusiveArch: %{arm64} ppc64le s390x x86_64 riscv64 - fusesource-pom ExclusiveArch: %{java_arches} noarch - fwts ExclusiveArch: x86_64 aarch64 riscv64 ppc64le - fwupd-efi ExclusiveArch: x86_64 aarch64 - g2clib ExcludeArch: %{ix86} - g4music ExcludeArch: %{ix86} - ga ExcludeArch: %{ix86} ExclusiveArch: %{ix86} x86_64 %{arm} aarch64 ppc64le riscv64 - galera ExcludeArch: %{ix86} - gambas3 ExcludeArch: i686 - gamescope ExcludeArch: ppc64le - gap ExcludeArch: %{ix86} - gap-pkg-4ti2interface ExcludeArch: %{ix86} - gap-pkg-ace ExcludeArch: %{ix86} - gap-pkg-aclib ExcludeArch: %{ix86} - gap-pkg-alnuth ExcludeArch: %{ix86} - gap-pkg-anupq ExcludeArch: %{ix86} - gap-pkg-atlasrep ExcludeArch: %{ix86} - gap-pkg-autodoc ExcludeArch: %{ix86} - gap-pkg-automata ExcludeArch: %{ix86} - gap-pkg-autpgrp ExcludeArch: %{ix86} - gap-pkg-browse ExcludeArch: %{ix86} - gap-pkg-caratinterface ExcludeArch: %{ix86} - gap-pkg-circle ExcludeArch: %{ix86} - gap-pkg-cohomolo ExcludeArch: %{ix86} - gap-pkg-congruence ExcludeArch: %{ix86} - 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jdom2 ExclusiveArch: %{java_arches} noarch - jedit ExclusiveArch: %{java_arches} noarch - jericho-html ExclusiveArch: %{java_arches} noarch - jetbrains-annotations ExclusiveArch: noarch %{java_arches} - jetty ExclusiveArch: %{java_arches} noarch - jflex ExclusiveArch: %{java_arches} noarch - jfreechart ExclusiveArch: %{java_arches} noarch - jglobus ExclusiveArch: %{java_arches} noarch - jgoodies-common ExclusiveArch: %{java_arches} noarch - jgoodies-forms ExclusiveArch: %{java_arches} noarch - jgoodies-looks ExclusiveArch: %{java_arches} noarch - jigawatts ExclusiveArch: x86_64 %{arm} ppc64le aarch64 s390x - jline ExclusiveArch: %{java_arches} - jline2 ExclusiveArch: %{java_arches} noarch - jmock ExclusiveArch: %{java_arches} noarch - jna ExclusiveArch: %{java_arches} - jneuroml-core ExclusiveArch: %{java_arches} noarch - jo ExcludeArch: %{ix86} - jol ExclusiveArch: %{java_arches} noarch - jopt-simple ExclusiveArch: %{java_arches} noarch - jorbis ExclusiveArch: %{java_arches} noarch - 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virtualbox-guest-additions ExclusiveArch: i686 x86_64 - visidata ExcludeArch: %{ix86} - visualboyadvance-m ExcludeArch: %{ix86} s390x - vkd3d ExclusiveArch: %{ix86} x86_64 %{arm} ExclusiveArch: %{ix86} x86_64 %{arm} aarch64 - vkmark ExcludeArch: s390x - vmaf ExclusiveArch: x86_64 - voms-api-java ExclusiveArch: %{java_arches} noarch - voms-clients-java ExclusiveArch: %{java_arches} noarch - vosk-api ExclusiveArch: x86_64 aarch64 ppc64le - votca ExcludeArch: %{ix86} - vrq ExclusiveArch: %{ix86} x86_64 - vultr-cli ExcludeArch: ppc64le s390x - vxl ExcludeArch: %{ix86} - wangle ExclusiveArch: x86_64 aarch64 ppc64le riscv64 - warsow ExclusiveArch: %{ix86} x86_64 %{arm} - warsow-data ExclusiveArch: %{ix86} x86_64 %{arm} noarch ExclusiveArch: %{ix86} x86_64 %{arm} - warzone2100 ExcludeArch: %{ix86} - wasmedge ExclusiveArch: x86_64 aarch64 - wcstools ExcludeArch: %{ix86} - wdt ExclusiveArch: x86_64 aarch64 ppc64le - webkit2-sharp ExclusiveArch: %mono_arches - weld-parent ExclusiveArch: %{java_arches} noarch - wgrib2 ExcludeArch: %{ix86} - whipper ExcludeArch: s390x - whisper-cpp ExclusiveArch: x86_64 aarch64 ppc64le - why3 ExclusiveArch: %{ocaml_native_compiler} - widevine-installer ExclusiveArch: aarch64 - wildcard ExcludeArch: %{ix86} - wine ExclusiveArch: %{ix86} x86_64 ExclusiveArch: %{ix86} - wine-dxvk ExclusiveArch: %{ix86} x86_64 - wine-mono ExcludeArch: aarch64 %{power64} s390x s390 - winetricks ExclusiveArch: %{ix86} x86_64 %{arm} aarch64 ExcludeArch: ppc64 ppc64le - wivrn ExcludeArch: s390x %{ix86} - wlmaker ExcludeArch: %{ix86} - woff ExcludeArch: %{ix86} - woodstox-core ExclusiveArch: %{java_arches} noarch - workrave ExcludeArch: %{ix86} - ws-commons-util ExclusiveArch: %{java_arches} noarch - wsdl4j ExclusiveArch: %{java_arches} noarch - wsjtx ExcludeArch: i686 - wult ExclusiveArch: x86_64 - wxMaxima ExcludeArch: %{ix86} - x2goclient ExclusiveArch: x86_64 - x2gokdrive ExcludeArch: %{ix86} - x86-simd-sort ExclusiveArch: x86_64 - xalan-j2 ExclusiveArch: %{java_arches} noarch - xaos ExcludeArch: %{ix86} - xapps ExcludeArch: %{ix86} - xbean ExclusiveArch: %{java_arches} noarch - xbyak ExclusiveArch: x86_64 - xbyak_aarch64 ExclusiveArch: aarch64 - xdg-desktop-portal ExcludeArch: %{ix86} - xdg-desktop-portal-cosmic ExcludeArch: %{ix86} - xdg-desktop-portal-gnome ExcludeArch: %{ix86} - xdg-desktop-portal-gtk ExcludeArch: %{ix86} - xdg-desktop-portal-hyprland ExcludeArch: %{ix86} - xe-guest-utilities-latest ExclusiveArch: %{ix86} x86_64 - xed ExcludeArch: %{ix86} - xen ExclusiveArch: x86_64 aarch64 - xephem ExcludeArch: %{ix86} - xerces-j2 ExclusiveArch: %{java_arches} noarch - xeus ExcludeArch: %{ix86} - xeus-zmq ExcludeArch: %{ix86} - xfce4-sensors-plugin ExcludeArch: s390 s390x - xfce4-systemload-plugin ExcludeArch: %{ix86} - xgap ExcludeArch: %{ix86} - xiphos ExcludeArch: ppc64 - xlog ExcludeArch: i686 - xmedcon ExcludeArch: %{ix86} - xml-commons-apis ExclusiveArch: %{java_arches} noarch - xml-commons-resolver ExclusiveArch: %{java_arches} noarch - xml-maven-plugin ExclusiveArch: %{java_arches} noarch - xmlada ExclusiveArch: %{GPRbuild_arches} - xmlgraphics-commons ExclusiveArch: %{java_arches} noarch - xmlpull ExclusiveArch: %{java_arches} noarch - xmlstreambuffer ExclusiveArch: %{java_arches} noarch - xmlunit ExclusiveArch: %{java_arches} noarch - xmvn ExclusiveArch: %{java_arches} noarch - xmvn-connector-ivy ExclusiveArch: %{java_arches} noarch - xmvn-generator ExclusiveArch: %{java_arches} - xmvn5 ExclusiveArch: %{java_arches} noarch - xnnpack ExclusiveArch: x86_64 aarch64 - xnvme ExcludeArch: %{ix86} - xorg-x11-drv-amdgpu ExcludeArch: s390 s390x - xorg-x11-drv-ati ExcludeArch: s390 s390x - xorg-x11-drv-intel ExclusiveArch: %{ix86} x86_64 - xorg-x11-drv-nouveau ExcludeArch: s390 s390x - xorg-x11-drv-openchrome ExclusiveArch: %{ix86} x86_64 - xorg-x11-drv-qxl ExcludeArch: s390 s390x - xorg-x11-drv-synaptics ExcludeArch: s390 s390x - xorg-x11-drv-vmware ExclusiveArch: %{ix86} x86_64 ia64 - xreader ExcludeArch: %{ix86} - xrgears ExcludeArch: %{ix86} - xsensors ExcludeArch: %{ix86} - xsp ExclusiveArch: %mono_arches - xstream ExclusiveArch: %{java_arches} noarch - xtb ExcludeArch: s390x - xtensor-python ExcludeArch: armv7hl ppc64le s390x - xwayland-satellite ExcludeArch: %{ix86} - xz-java ExclusiveArch: %{java_arches} noarch - yarnpkg ExclusiveArch: %{nodejs_arches} - yices ExcludeArch: %{ix86} - yle-dl ExcludeArch: %{ix86} - yosys ExcludeArch: %{ix86} ExcludeArch: s390x - zcfan ExclusiveArch: x86_64 - zeal ExclusiveArch: %{qt6_qtwebengine_arches} - zenon ExclusiveArch: %{ocaml_native_compiler} - zeromq-ada ExclusiveArch: %{GPRbuild_arches} - zig ExclusiveArch: %{zig_arches} - zile ExcludeArch: ppc64le - zimpl ExcludeArch: %{ix86} - zlib-ada ExclusiveArch: %{GPRbuild_arches} - zola ExclusiveArch: %{rust_arches} - zstr ExcludeArch: %{ix86} - zswap-cli ExcludeArch: %{ix86} - zxcvbn-c ExcludeArch: %{ix86} - zycore-c ExcludeArch: s390x - zydis ExcludeArch: s390x - zynaddsubfx ExcludeArch: i686

1 0

Architecture specific change in rpms/crun.git
by githook-noreply＠fedoraproject.org 27 Jun '25

27 Jun '25

The package rpms/crun.git has added or updated architecture specific content in its spec file (ExclusiveArch/ExcludeArch or %ifarch/%ifnarch) in commit(s): https://src.fedoraproject.org/cgit/rpms/crun.git/commit/?id=aeefc28b2dce0ae…. Change: -%ifnarch riscv64 Thanks. Full change: ============ commit aeefc28b2dce0ae2343ee32c5f8f749fea2e3852 Author: Packit <hello(a)packit.dev> Date: Fri Jun 27 13:23:27 2025 +0000 Update to 1.22 upstream release Upstream tag: 1.22 Upstream commit: 4de19b63 Commit authored by Packit automation (https://packit.dev/) diff --git a/.gitignore b/.gitignore index 3f72d68..fdd8502 100644 --- a/.gitignore +++ b/.gitignore @@ -95,3 +95,4 @@ crun-0.1.1.tar.gz /crun-1.19.1.tar.zst /crun-1.20.tar.zst /crun-1.21.tar.zst +/crun-1.22.tar.zst diff --git a/.packit.yaml b/.packit.yaml index ecb0014..0c3381a 100644 --- a/.packit.yaml +++ b/.packit.yaml @@ -92,9 +92,9 @@ jobs: - job: tests trigger: pull_request packages: [crun-fedora] - notifications: &podman_system_test_fail_notification + notifications: &test_failure_notification failure_comment: - message: "podman system tests failed. @containers/packit-build please check." + message: "TMT tests failed. @containers/packit-build please check." targets: *fedora_copr_targets tf_extra_params: environments: @@ -106,8 +106,15 @@ jobs: - job: tests trigger: pull_request packages: [crun-centos] - notifications: *podman_system_test_fail_notification - targets: *centos_copr_targets + notifications: *test_failure_notification + # TODO: Re-enable centos-stream-10-x86_64 once criu issues are solved + # Ref: https://github.com/containers/crun/pull/1758#issuecomment-2901772392 + # Issue filed: https://github.com/containers/crun/issues/1759 + #targets: *centos_copr_targets + targets: + - centos-stream-9-x86_64 + - centos-stream-9-aarch64 + - centos-stream-10-aarch64 tf_extra_params: environments: - artifacts: diff --git a/README.packit b/README.packit index ad2b8e5..dde2a46 100644 --- a/README.packit +++ b/README.packit @@ -1,3 +1,3 @@ This repository is maintained by packit. https://packit.dev/ -The file was generated using packit 1.3.0.post1.dev4+gb85da743. +The file was generated using packit 1.9.0.post1.dev4+g48b4c222. diff --git a/crun.spec b/crun.spec index 5acd520..2ff630a 100644 --- a/crun.spec +++ b/crun.spec @@ -42,7 +42,7 @@ Epoch: 102 # If that's what you're reading, Version must be 0, and will be updated by Packit for # copr and koji builds. # If you're reading this on dist-git, the version is automatically filled in by Packit. -Version: 1.21 +Version: 1.22 Release: %autorelease URL: https://github.com/containers/%{name} Source0: %{url}/releases/download/%{version}/%{name}-%{version}.tar.zst @@ -69,11 +69,9 @@ BuildRequires: libseccomp-devel BuildRequires: python3-libmount BuildRequires: libtool BuildRequires: protobuf-c-devel -%ifnarch riscv64 BuildRequires: criu-devel >= 3.17.1-2 Recommends: criu >= 3.17.1 Recommends: criu-libs -%endif %if %{defined wasmedge_support} BuildRequires: wasmedge-devel %endif diff --git a/plans/main.fmf b/plans/main.fmf index 1328f77..7a4ae15 100644 --- a/plans/main.fmf +++ b/plans/main.fmf @@ -24,18 +24,17 @@ prepare: - crun - podman-tests -/upstream: - summary: Run crun specific Podman system tests on upstream PRs +/shellcheck: discover+: - filter: tag:upstream - adjust+: - - enabled: false - when: initiator is not defined or initiator != packit + filter: 'tag:shellcheck' + enabled: true + adjust: + enabled: false + when: distro == centos-stream-10 or distro == rhel-10 + prepare+: + - how: install + package: ShellCheck -/downstream: - summary: Run crun specific Podman system tests on bodhi / errata and dist-git PRs +/tests: discover+: - filter: tag:downstream - adjust+: - - enabled: false - when: initiator == packit + filter: 'tag:podman | tag:sanity' diff --git a/sources b/sources index 0bdcdb2..978beb9 100644 --- a/sources +++ b/sources @@ -1 +1 @@ -SHA512 (crun-1.21.tar.zst) = 022bb56dbf20eb7c479b76a92fc55c69b219e36233ee7e588eb883afd092fb4aaeca842e64d83e53bbb08bd09f635d582a86824950971842b73921d1ce134bd1 +SHA512 (crun-1.22.tar.zst) = 9a8199e7839be9f2594bf5549ea697dcd3f47ab5eb13f1e7e51d18e0091d8960185069c5e88033ab42cf0797795d687e608ddac81443f3896caf409192875d09 diff --git a/tests/tmt/podman/system-test.fmf b/tests/tmt/podman/system-test.fmf index 1032f07..8df55c2 100644 --- a/tests/tmt/podman/system-test.fmf +++ b/tests/tmt/podman/system-test.fmf @@ -2,7 +2,6 @@ adjust: duration: 10m when: arch == aarch64 -/system_test: - tag: [ upstream, downstream ] - summary: Run crun specific Podman tests - test: bash ./system-test.sh +summary: Run crun specific Podman tests +test: bash ./system-test.sh +tag: [ podman ] diff --git a/tests/tmt/podman/system-test.sh b/tests/tmt/podman/system-test.sh index 4d04562..974f829 100644 --- a/tests/tmt/podman/system-test.sh +++ b/tests/tmt/podman/system-test.sh @@ -14,3 +14,4 @@ rpm -q conmon containers-common crun podman podman-tests bats -t /usr/share/podman/test/system/030-run.bats bats -t /usr/share/podman/test/system/075-exec.bats bats -t /usr/share/podman/test/system/280-update.bats +bats -t /usr/share/podman/test/system/520-checkpoint.bats diff --git a/tests/tmt/sanity/main.fmf b/tests/tmt/sanity/main.fmf index 6355ff6..ccfa4ca 100644 --- a/tests/tmt/sanity/main.fmf +++ b/tests/tmt/sanity/main.fmf @@ -1,4 +1,4 @@ summary: Sanity test for crun -tag: ['upstream', 'downstream'] test: bash ./runtest.sh duration: 10m +tag: [ sanity ] diff --git a/tests/tmt/sanity/runtest.sh b/tests/tmt/sanity/runtest.sh index d1d453c..3e13986 100644 --- a/tests/tmt/sanity/runtest.sh +++ b/tests/tmt/sanity/runtest.sh @@ -10,82 +10,104 @@ cat /etc/redhat-release uname -r rpm -q crun criu -crun --version -[ $? -ne 0 ] && exit 1 +if ! crun --version; then + exit 1 +fi -crun features -[ $? -ne 0 ] && exit 1 +if ! crun features; then + exit 1 +fi -crun list -[ $? -ne 0 ] && exit 1 +if ! crun list; then + exit 1 +fi # create the top most bundle and rootfs directory -mkdir -p $TEMPDIR/rootfs +mkdir -p "$TEMPDIR"/rootfs # export busybox via podman into the rootfs directory -podman export $(podman create $TESTIMG) | tar -C $TEMPDIR/rootfs -xvf - -[ $? -ne 0 ] && exit 1 +if ! (podman export "$(podman create $TESTIMG)" | tar -C "$TEMPDIR"/rootfs -xvf -); then + exit 1 +fi # use existing spec -cp ./config.json $TEMPDIR -ls $TEMPDIR -cd $TEMPDIR +cp ./config.json "$TEMPDIR" +ls "$TEMPDIR" +cd "$TEMPDIR" -crun create $CNAME -[ $? -ne 0 ] && exit 1 +if ! crun create $CNAME; then + exit 1 +fi -crun list -[ $? -ne 0 ] && exit 1 +if ! crun list; then + exit 1 +fi -crun start $CNAME -[ $? -ne 0 ] && exit 1 +if ! crun start $CNAME; then + exit 1 +fi -crun list -[ $? -ne 0 ] && exit 1 +if ! crun list; then + exit 1 +fi -crun state $CNAME -[ $? -ne 0 ] && exit 1 +if ! crun state $CNAME; then + exit 1 +fi -crun ps $CNAME -[ $? -ne 0 ] && exit 1 +if ! crun ps $CNAME; then + exit 1 +fi -ret=$(crun exec $CNAME pwd) -[ $? -ne 0 ] || [ $ret != '/' ] && exit 1 +if ! ret=$(crun exec $CNAME pwd) || [[ "$ret" != '/' ]]; then + exit 1 +fi -crun pause $CNAME -[ $? -ne 0 ] && exit 1 +if ! crun pause $CNAME; then + exit 1 +fi -crun state $CNAME -[ $? -ne 0 ] && exit 1 +if ! crun state $CNAME; then + exit 1 +fi -crun resume $CNAME -[ $? -ne 0 ] && exit 1 +if ! crun resume $CNAME; then + exit 1 +fi -crun state $CNAME -[ $? -ne 0 ] && exit 1 +if ! crun state $CNAME; then + exit 1 +fi -ret=$(crun exec $CNAME pwd) -[ $? -ne 0 ] || [ $ret != '/' ] && exit 1 +if ! ret=$(crun exec $CNAME pwd) || [[ "$ret" != '/' ]]; then + exit 1 +fi -crun delete --force $CNAME -[ $? -ne 0 ] && exit 1 +if ! crun delete --force $CNAME; then + exit 1 +fi -crun list -[ $? -ne 0 ] && exit 1 +if ! crun list; then + exit 1 +fi -crun run $CNAME & -[ $? -ne 0 ] && exit 1 +if ! (crun run $CNAME &); then + exit 1 +fi -crun list -[ $? -ne 0 ] && exit 1 +if ! crun list; then + exit 1 +fi # make sure the container is running state sleep 2 -ret=$(crun exec $CNAME echo 'ok') -[ $? -ne 0 ] || [ $ret != 'ok' ] && exit 1 +if ! ret=$(crun exec $CNAME echo 'ok') || [[ "$ret" != 'ok' ]]; then + exit 1 +fi -crun kill $CNAME -[ $? -ne 0 ] && exit 1 +if ! crun kill $CNAME; then + exit 1 +fi exit 0 diff --git a/tests/tmt/shellcheck/main.fmf b/tests/tmt/shellcheck/main.fmf new file mode 100644 index 0000000..7d220b4 --- /dev/null +++ b/tests/tmt/shellcheck/main.fmf @@ -0,0 +1,4 @@ +summary: Shellcheck tests +test: find ../ -type f -name "*.sh" -exec shellcheck {} + +duration: 10m +tag: [ shellcheck ]

1 0

Architecture specific change in rpms/crun.git
by githook-noreply＠fedoraproject.org 27 Jun '25

27 Jun '25

The package rpms/crun.git has added or updated architecture specific content in its spec file (ExclusiveArch/ExcludeArch or %ifarch/%ifnarch) in commit(s): https://src.fedoraproject.org/cgit/rpms/crun.git/commit/?id=2c28b00e391a9a6…. Change: -%ifnarch riscv64 Thanks. Full change: ============ commit 2c28b00e391a9a69bc28860e49484c56e620f68d Author: Packit <hello(a)packit.dev> Date: Fri Jun 27 13:23:51 2025 +0000 Update to 1.22 upstream release Upstream tag: 1.22 Upstream commit: 4de19b63 Commit authored by Packit automation (https://packit.dev/) diff --git a/.gitignore b/.gitignore index 3f72d68..fdd8502 100644 --- a/.gitignore +++ b/.gitignore @@ -95,3 +95,4 @@ crun-0.1.1.tar.gz /crun-1.19.1.tar.zst /crun-1.20.tar.zst /crun-1.21.tar.zst +/crun-1.22.tar.zst diff --git a/.packit.yaml b/.packit.yaml index ecb0014..0c3381a 100644 --- a/.packit.yaml +++ b/.packit.yaml @@ -92,9 +92,9 @@ jobs: - job: tests trigger: pull_request packages: [crun-fedora] - notifications: &podman_system_test_fail_notification + notifications: &test_failure_notification failure_comment: - message: "podman system tests failed. @containers/packit-build please check." + message: "TMT tests failed. @containers/packit-build please check." targets: *fedora_copr_targets tf_extra_params: environments: @@ -106,8 +106,15 @@ jobs: - job: tests trigger: pull_request packages: [crun-centos] - notifications: *podman_system_test_fail_notification - targets: *centos_copr_targets + notifications: *test_failure_notification + # TODO: Re-enable centos-stream-10-x86_64 once criu issues are solved + # Ref: https://github.com/containers/crun/pull/1758#issuecomment-2901772392 + # Issue filed: https://github.com/containers/crun/issues/1759 + #targets: *centos_copr_targets + targets: + - centos-stream-9-x86_64 + - centos-stream-9-aarch64 + - centos-stream-10-aarch64 tf_extra_params: environments: - artifacts: diff --git a/README.packit b/README.packit index ad2b8e5..dde2a46 100644 --- a/README.packit +++ b/README.packit @@ -1,3 +1,3 @@ This repository is maintained by packit. https://packit.dev/ -The file was generated using packit 1.3.0.post1.dev4+gb85da743. +The file was generated using packit 1.9.0.post1.dev4+g48b4c222. diff --git a/crun.spec b/crun.spec index 5acd520..2ff630a 100644 --- a/crun.spec +++ b/crun.spec @@ -42,7 +42,7 @@ Epoch: 102 # If that's what you're reading, Version must be 0, and will be updated by Packit for # copr and koji builds. # If you're reading this on dist-git, the version is automatically filled in by Packit. -Version: 1.21 +Version: 1.22 Release: %autorelease URL: https://github.com/containers/%{name} Source0: %{url}/releases/download/%{version}/%{name}-%{version}.tar.zst @@ -69,11 +69,9 @@ BuildRequires: libseccomp-devel BuildRequires: python3-libmount BuildRequires: libtool BuildRequires: protobuf-c-devel -%ifnarch riscv64 BuildRequires: criu-devel >= 3.17.1-2 Recommends: criu >= 3.17.1 Recommends: criu-libs -%endif %if %{defined wasmedge_support} BuildRequires: wasmedge-devel %endif diff --git a/plans/main.fmf b/plans/main.fmf index 1328f77..7a4ae15 100644 --- a/plans/main.fmf +++ b/plans/main.fmf @@ -24,18 +24,17 @@ prepare: - crun - podman-tests -/upstream: - summary: Run crun specific Podman system tests on upstream PRs +/shellcheck: discover+: - filter: tag:upstream - adjust+: - - enabled: false - when: initiator is not defined or initiator != packit + filter: 'tag:shellcheck' + enabled: true + adjust: + enabled: false + when: distro == centos-stream-10 or distro == rhel-10 + prepare+: + - how: install + package: ShellCheck -/downstream: - summary: Run crun specific Podman system tests on bodhi / errata and dist-git PRs +/tests: discover+: - filter: tag:downstream - adjust+: - - enabled: false - when: initiator == packit + filter: 'tag:podman | tag:sanity' diff --git a/sources b/sources index 0bdcdb2..978beb9 100644 --- a/sources +++ b/sources @@ -1 +1 @@ -SHA512 (crun-1.21.tar.zst) = 022bb56dbf20eb7c479b76a92fc55c69b219e36233ee7e588eb883afd092fb4aaeca842e64d83e53bbb08bd09f635d582a86824950971842b73921d1ce134bd1 +SHA512 (crun-1.22.tar.zst) = 9a8199e7839be9f2594bf5549ea697dcd3f47ab5eb13f1e7e51d18e0091d8960185069c5e88033ab42cf0797795d687e608ddac81443f3896caf409192875d09 diff --git a/tests/tmt/podman/system-test.fmf b/tests/tmt/podman/system-test.fmf index 1032f07..8df55c2 100644 --- a/tests/tmt/podman/system-test.fmf +++ b/tests/tmt/podman/system-test.fmf @@ -2,7 +2,6 @@ adjust: duration: 10m when: arch == aarch64 -/system_test: - tag: [ upstream, downstream ] - summary: Run crun specific Podman tests - test: bash ./system-test.sh +summary: Run crun specific Podman tests +test: bash ./system-test.sh +tag: [ podman ] diff --git a/tests/tmt/podman/system-test.sh b/tests/tmt/podman/system-test.sh index 4d04562..974f829 100644 --- a/tests/tmt/podman/system-test.sh +++ b/tests/tmt/podman/system-test.sh @@ -14,3 +14,4 @@ rpm -q conmon containers-common crun podman podman-tests bats -t /usr/share/podman/test/system/030-run.bats bats -t /usr/share/podman/test/system/075-exec.bats bats -t /usr/share/podman/test/system/280-update.bats +bats -t /usr/share/podman/test/system/520-checkpoint.bats diff --git a/tests/tmt/sanity/main.fmf b/tests/tmt/sanity/main.fmf index 6355ff6..ccfa4ca 100644 --- a/tests/tmt/sanity/main.fmf +++ b/tests/tmt/sanity/main.fmf @@ -1,4 +1,4 @@ summary: Sanity test for crun -tag: ['upstream', 'downstream'] test: bash ./runtest.sh duration: 10m +tag: [ sanity ] diff --git a/tests/tmt/sanity/runtest.sh b/tests/tmt/sanity/runtest.sh index d1d453c..3e13986 100644 --- a/tests/tmt/sanity/runtest.sh +++ b/tests/tmt/sanity/runtest.sh @@ -10,82 +10,104 @@ cat /etc/redhat-release uname -r rpm -q crun criu -crun --version -[ $? -ne 0 ] && exit 1 +if ! crun --version; then + exit 1 +fi -crun features -[ $? -ne 0 ] && exit 1 +if ! crun features; then + exit 1 +fi -crun list -[ $? -ne 0 ] && exit 1 +if ! crun list; then + exit 1 +fi # create the top most bundle and rootfs directory -mkdir -p $TEMPDIR/rootfs +mkdir -p "$TEMPDIR"/rootfs # export busybox via podman into the rootfs directory -podman export $(podman create $TESTIMG) | tar -C $TEMPDIR/rootfs -xvf - -[ $? -ne 0 ] && exit 1 +if ! (podman export "$(podman create $TESTIMG)" | tar -C "$TEMPDIR"/rootfs -xvf -); then + exit 1 +fi # use existing spec -cp ./config.json $TEMPDIR -ls $TEMPDIR -cd $TEMPDIR +cp ./config.json "$TEMPDIR" +ls "$TEMPDIR" +cd "$TEMPDIR" -crun create $CNAME -[ $? -ne 0 ] && exit 1 +if ! crun create $CNAME; then + exit 1 +fi -crun list -[ $? -ne 0 ] && exit 1 +if ! crun list; then + exit 1 +fi -crun start $CNAME -[ $? -ne 0 ] && exit 1 +if ! crun start $CNAME; then + exit 1 +fi -crun list -[ $? -ne 0 ] && exit 1 +if ! crun list; then + exit 1 +fi -crun state $CNAME -[ $? -ne 0 ] && exit 1 +if ! crun state $CNAME; then + exit 1 +fi -crun ps $CNAME -[ $? -ne 0 ] && exit 1 +if ! crun ps $CNAME; then + exit 1 +fi -ret=$(crun exec $CNAME pwd) -[ $? -ne 0 ] || [ $ret != '/' ] && exit 1 +if ! ret=$(crun exec $CNAME pwd) || [[ "$ret" != '/' ]]; then + exit 1 +fi -crun pause $CNAME -[ $? -ne 0 ] && exit 1 +if ! crun pause $CNAME; then + exit 1 +fi -crun state $CNAME -[ $? -ne 0 ] && exit 1 +if ! crun state $CNAME; then + exit 1 +fi -crun resume $CNAME -[ $? -ne 0 ] && exit 1 +if ! crun resume $CNAME; then + exit 1 +fi -crun state $CNAME -[ $? -ne 0 ] && exit 1 +if ! crun state $CNAME; then + exit 1 +fi -ret=$(crun exec $CNAME pwd) -[ $? -ne 0 ] || [ $ret != '/' ] && exit 1 +if ! ret=$(crun exec $CNAME pwd) || [[ "$ret" != '/' ]]; then + exit 1 +fi -crun delete --force $CNAME -[ $? -ne 0 ] && exit 1 +if ! crun delete --force $CNAME; then + exit 1 +fi -crun list -[ $? -ne 0 ] && exit 1 +if ! crun list; then + exit 1 +fi -crun run $CNAME & -[ $? -ne 0 ] && exit 1 +if ! (crun run $CNAME &); then + exit 1 +fi -crun list -[ $? -ne 0 ] && exit 1 +if ! crun list; then + exit 1 +fi # make sure the container is running state sleep 2 -ret=$(crun exec $CNAME echo 'ok') -[ $? -ne 0 ] || [ $ret != 'ok' ] && exit 1 +if ! ret=$(crun exec $CNAME echo 'ok') || [[ "$ret" != 'ok' ]]; then + exit 1 +fi -crun kill $CNAME -[ $? -ne 0 ] && exit 1 +if ! crun kill $CNAME; then + exit 1 +fi exit 0 diff --git a/tests/tmt/shellcheck/main.fmf b/tests/tmt/shellcheck/main.fmf new file mode 100644 index 0000000..7d220b4 --- /dev/null +++ b/tests/tmt/shellcheck/main.fmf @@ -0,0 +1,4 @@ +summary: Shellcheck tests +test: find ../ -type f -name "*.sh" -exec shellcheck {} + +duration: 10m +tag: [ shellcheck ]

1 0

[Report] Packages Restricting Arches
by root 27 Jun '25

27 Jun '25

New package excluding arches (2) ============================ - forgejo ExclusiveArch: %golang_arches_future - rust-sccache ExcludeArch: %{ix86} List of packages currently excluding arches (2452) =========================================== - 0ad ExclusiveArch: %{ix86} x86_64 %{arm} aarch64 ppc64le - 0install ExcludeArch: %{ix86} - 389-ds-base ExcludeArch: i686 - 4ti2 ExcludeArch: %{ix86} - 90-Second-Portraits ExclusiveArch: %{arm} %{ix86} x86_64 aarch64 ppc64le riscv64 - ALL ExcludeArch: %{ix86} s390x - AcetoneISO ExcludeArch: ppc %{power64} s390x - Agda ExcludeArch: %{ix86} armv7hl - Agda-stdlib ExcludeArch: armv7hl %{ix86} - BareBonesBrowserLaunch ExclusiveArch: %{java_arches} noarch - CFR ExclusiveArch: %{java_arches} noarch - COPASI ExcludeArch: %{ix86} - CardManager ExclusiveArch: %{java_arches} noarch - CubicSDR ExcludeArch: i686 - CuraEngine ExcludeArch: %{ix86} - CuraEngine_grpc_definitions ExcludeArch: %{ix86} - DSDP ExcludeArch: %{ix86} - E ExcludeArch: %{ix86} - GAPDoc ExcludeArch: %{ix86} - GoldenCheetah ExclusiveArch: %{qt6_qtwebengine_arches} - GtkAda ExclusiveArch: %{GPRbuild_arches} - GtkAda3 ExclusiveArch: %{GPRbuild_arches} - HPCombi ExclusiveArch: x86_64 %{arm64} - IPAddress ExclusiveArch: %{java_arches} noarch - IQmol ExcludeArch: %{ix86} - InsightToolkit ExcludeArch: %{ix86} - JUnitParams ExclusiveArch: %{java_arches} noarch - Java-WebSocket ExclusiveArch: %{java_arches} noarch - L-function ExcludeArch: %{ix86} - MUSIC ExcludeArch: %{ix86} - Macaulay2 ExcludeArch: %{ix86} %{power64} - Maelstrom ExcludeArch: %{ix86} - Mars ExclusiveArch: %{java_arches} noarch - Mayavi ExcludeArch: %{ix86} - NiaAML-GUI ExcludeArch: %{ix86} - OpenColorIO ExcludeArch: i686 ExclusiveArch: x86_64 ppc64le - OpenImageIO ExcludeArch: i686 ExclusiveArch: x86_64 ppc64le - OpenMolcas ExclusiveArch: x86_64 aarch64 ppc64le s390x - OpenStego ExclusiveArch: %{java_arches} noarch - Pencil2D ExcludeArch: %{ix86} - PragmARC ExclusiveArch: %{GPRbuild_arches} - R-IRkernel ExcludeArch: %{ix86} - R-V8 ExclusiveArch: %{nodejs_arches} - R-ape ExcludeArch: %{ix86} - R-igraph ExcludeArch: %{ix86} - R-kernlab ExcludeArch: %{ix86} s390x - R-rJava ExclusiveArch: %{java_arches} - R-rtracklayer ExcludeArch: i686 - Random123 ExcludeArch: mips64r2 mips32r2 s390 - RdRand ExclusiveArch: %{ix86} x86_64 - SLOF ExclusiveArch: ppc64le - Singular ExcludeArch: %{ix86} - TOPCOM ExcludeArch: %{ix86} - VulkanMemoryAllocator ExcludeArch: %{ix86} - YafaRay ExclusiveArch: %{ix86} x86_64 - aardvark-dns ExclusiveArch: %{golang_arches_future} ExclusiveArch: aarch64 ppc64le s390x x86_64 - abiword ExcludeArch: %{ix86} - accel-config ExclusiveArch: %{ix86} x86_64 - accel-ppp ExcludeArch: %{ix86} - acpica-tools ExcludeArch: i686 armv7hl s390x - acpid ExclusiveArch: x86_64 aarch64 riscv64 - act ExcludeArch: %{ix86} - admesh ExcludeArch: %{ix86} - admeshgui ExcludeArch: %{ix86} - aegisub ExcludeArch: ppc64le s390x - aemu ExcludeArch: %{ix86} %{power64} s390x - agenda ExcludeArch: %{ix86} - ahven ExclusiveArch: %{GPRbuild_arches} - algobox ExclusiveArch: %{qt5_qtwebengine_arches} - alienarena ExcludeArch: s390x - alizams ExcludeArch: %{power64} %{ix86} s390x - alt-ergo ExcludeArch: %{ix86} - amdsmi ExclusiveArch: x86_64 - american-fuzzy-lop ExclusiveArch: x86_64 s390x - amg4psblas ExcludeArch: %{ix86} - anaconda ExcludeArch: %{ix86} - android-tools ExcludeArch: ppc ppc64 s390x ppc64le - anet ExclusiveArch: %{GPRbuild_arches} - ansible-collection-microsoft-sql ExcludeArch: i686 - ant ExclusiveArch: %{java_arches} noarch - ant-antunit ExclusiveArch: %{java_arches} noarch - ant-contrib ExclusiveArch: %{java_arches} noarch - antlr ExclusiveArch: %{java_arches} - antlr3 ExclusiveArch: %{java_arches} - antlr4-project ExclusiveArch: %{java_arches} - antlrworks ExclusiveArch: %{java_arches} noarch - aopalliance ExclusiveArch: %{java_arches} noarch - apache-commons-beanutils ExclusiveArch: %{java_arches} noarch - apache-commons-cli ExclusiveArch: %{java_arches} noarch - apache-commons-codec ExclusiveArch: %{java_arches} noarch - apache-commons-collections ExclusiveArch: %{java_arches} noarch - apache-commons-collections4 ExclusiveArch: %{java_arches} noarch - apache-commons-compress ExclusiveArch: %{java_arches} noarch - apache-commons-digester ExclusiveArch: %{java_arches} noarch - apache-commons-exec ExclusiveArch: %{java_arches} noarch - apache-commons-io ExclusiveArch: %{java_arches} noarch - apache-commons-jxpath ExclusiveArch: %{java_arches} noarch - apache-commons-lang3 ExclusiveArch: %{java_arches} noarch - apache-commons-logging ExclusiveArch: %{java_arches} noarch - apache-commons-math ExclusiveArch: %{java_arches} noarch - apache-commons-modeler ExclusiveArch: %{java_arches} noarch - apache-commons-net ExclusiveArch: %{java_arches} noarch - apache-commons-parent ExclusiveArch: %{java_arches} noarch - apache-commons-pool ExclusiveArch: %{java_arches} noarch - apache-commons-vfs ExclusiveArch: %{java_arches} noarch - apache-ivy ExclusiveArch: %{java_arches} noarch - apache-logging-parent ExclusiveArch: %{java_arches} noarch - apache-parent ExclusiveArch: %{java_arches} noarch - apache-resource-bundles ExclusiveArch: %{java_arches} noarch - apache-sshd ExclusiveArch: %{java_arches} noarch - apiguardian ExclusiveArch: %{java_arches} noarch - appeditor ExcludeArch: %{ix86} - appstream-generator ExclusiveArch: %{ldc_arches} - apricots ExcludeArch: ppc64le aarch64 - apron ExcludeArch: %{ix86} - aquamarine ExcludeArch: %{ix86} - aqute-bnd ExclusiveArch: %{java_arches} noarch - arbor ExcludeArch: mips64r2 mips32r2 s390x %{ix86} - arc-theme ExcludeArch: %{ix86} - argparse ExcludeArch: %{ix86} - args4j ExclusiveArch: %{java_arches} noarch - arianna ExclusiveArch: %{qt6_qtwebengine_arches} - arm-compute-library ExcludeArch: i686 ppc64le s390x - arm-none-eabi-binutils-cs ExcludeArch: %{ix86} - arm-none-eabi-gcc-cs ExcludeArch: %{ix86} - arpwatch ExcludeArch: %{ix86} - asahi-installer ExcludeArch: s390x - asdcplib ExcludeArch: %{ix86} %{arm} - asmjit ExclusiveArch: aarch64 x86_64 - assertj-core ExclusiveArch: %{java_arches} noarch - astromenace ExcludeArch: ppc64 s390x - astrometry ExcludeArch: %{ix86} - asv ExcludeArch: %{ix86} - atlantik ExcludeArch: %{ix86} - atomic-queue ExcludeArch: %{ix86} - aubit4gl ExcludeArch: i686 s390x ppc64le - audacity ExcludeArch: %{ix86} s390x - audiocd-kio ExclusiveArch: x86_64 ppc64le aarch64 %{arm} - aunit ExclusiveArch: %{GPRbuild_arches} - auryn ExcludeArch: %{ix86} - auto ExclusiveArch: %{java_arches} noarch - autolink-java ExclusiveArch: noarch %{java_arches} - avgtime ExclusiveArch: %{ldc_arches} - avr-gcc ExcludeArch: %{ix86} - avrdude ExcludeArch: s390x - aws ExclusiveArch: %{GPRbuild_arches} - aws-c-auth ExcludeArch: %{ix86} ExcludeArch: s390x - aws-c-cal ExcludeArch: s390x - aws-c-common ExcludeArch: s390x - aws-c-compression ExcludeArch: s390x - aws-c-event-stream ExcludeArch: %{ix86} ExcludeArch: s390x - aws-c-http ExcludeArch: %{ix86} ExcludeArch: s390x - aws-c-io ExcludeArch: %{ix86} ExcludeArch: s390x - aws-c-mqtt ExcludeArch: %{ix86} ExcludeArch: s390x - aws-c-s3 ExcludeArch: %{ix86} ExcludeArch: s390x - aws-c-sdkutils ExcludeArch: s390x - aws-checksums ExcludeArch: s390x - awscli2 ExcludeArch: s390x - azove ExcludeArch: %{ix86} - azure-cli ExclusiveArch: %{java_arches} noarch - batik ExclusiveArch: %{java_arches} noarch - bcachefs-tools ExcludeArch: %{ix86} %{arm32} - bcal ExclusiveArch: x86_64 aarch64 ppc64le s390x riscv64 - bcc ExclusiveArch: x86_64 %{power64} aarch64 s390x armv7hl riscv64 - bcel ExclusiveArch: %{java_arches} noarch - bcftools ExcludeArch: s390x - bcm283x-firmware ExclusiveArch: aarch64 - beansbinding ExclusiveArch: %{java_arches} noarch - bear ExcludeArch: %{ix86} - bear-factory ExcludeArch: ppc64le - berusky2 ExclusiveArch: %{ix86} x86_64 %{arm} aarch64 %{mips} riscv64 - beust-jcommander ExclusiveArch: %{java_arches} noarch - bibletime ExclusiveArch: %{qt6_qtwebengine_arches} - bigloo ExcludeArch: %{ix86} - binaryen ExcludeArch: ppc64 s390x - binutils ExcludeArch: aarch64-linux-gnu aarch64-redhat-linux ExcludeArch: ppc64le-linux-gnu ppc64le-redhat-linux ExcludeArch: s390x-linux-gnu s390x-redhat-linux ExcludeArch: x86_64-linux-gnu x86_64-redhat-linux i686-linux-gnu i686-redhat-linux - biosdevname ExclusiveArch: %{ix86} x86_64 - biosig4c++ ExcludeArch: %{ix86} - blender ExcludeArch: %{ix86} %{arm} - bless ExclusiveArch: %mono_arches - bliss ExcludeArch: %{ix86} - bloaty ExcludeArch: %{ix86} - blogc ExcludeArch: %{ix86} - bluez-hcidump ExcludeArch: s390 s390x - bochs ExcludeArch: s390x i686 - boinc-client ExcludeArch: s390x - bolzplatz2006 ExclusiveArch: %{java_arches} - bootc ExcludeArch: %{ix86} - bouncycastle ExclusiveArch: %{java_arches} noarch - bout++ ExcludeArch: %{ix86} - bowtie ExcludeArch: i686 armv7hl - bowtie2 ExcludeArch: %{ix86} %{arm} s390x - box64 ExclusiveArch: aarch64 riscv64 ppc64le %{x86_64} - boxes ExcludeArch: %{ix86} - bpfilter ExclusiveArch: %{x86_64} %{arm64} - bpfman ExcludeArch: %{ix86} - bpftool ExcludeArch: %{ix86} - bpftop ExcludeArch: %{ix86} - bpftrace ExclusiveArch: x86_64 %{power64} aarch64 s390x riscv64 - brazil ExclusiveArch: %{java_arches} noarch - breakid ExcludeArch: %{ix86} - brewtarget ExcludeArch: %{ix86} - bsf ExclusiveArch: %{java_arches} noarch - bsh ExclusiveArch: %{java_arches} noarch - btrfs-efi ExclusiveArch: %{efi} - build-helper-maven-plugin ExclusiveArch: %{java_arches} noarch - buildah ExclusiveArch: %{golang_arches_future} ExclusiveArch: aarch64 ppc64le s390x x86_64 - buildbox ExcludeArch: %{ix86} - buildstream ExcludeArch: %{ix86} - buildstream-plugins ExcludeArch: %{ix86} - busybox ExcludeArch: i686 s390x - bvi ExcludeArch: %{ix86} - bwping ExcludeArch: %{ix86} - byebyebios ExclusiveArch: x86_64 - byte-buddy ExclusiveArch: %{java_arches} noarch - byteman ExclusiveArch: %{java_arches} noarch - c4core ExcludeArch: %{ix86} - c4fs ExcludeArch: %{ix86} - c4log ExcludeArch: %{ix86} - cachelib ExclusiveArch: x86_64 aarch64 ppc64le - caddy ExclusiveArch: %{golang_arches} ExclusiveArch: %{golang_arches_future} - cadical ExcludeArch: %{ix86} - calamares ExclusiveArch: %{ix86} x86_64 aarch64 riscv64 - calceph ExcludeArch: %{ix86} - calibre ExclusiveArch: aarch64 x86_64 - calligra ExcludeArch: %{ix86} - calls ExcludeArch: i686 - cambozola ExclusiveArch: %{java_arches} noarch - canl-java ExclusiveArch: %{java_arches} noarch - cantera ExcludeArch: %{ix86} - carat ExcludeArch: %{ix86} - casc ExcludeArch: %{ix86} - cataclysm-dda ExcludeArch: i686 - catatonit ExclusiveArch: %{golang_arches_future} ExclusiveArch: aarch64 ppc64le s390x x86_64 - ccdciel ExclusiveArch: %{fpc_arches} ExcludeArch: %{ix86} - ccluster ExcludeArch: %{ix86} - cdcollect ExclusiveArch: %{mono_arches} - cdrdao ExcludeArch: s390 s390x - cef ExclusiveArch: x86_64 aarch64 - ceph ExcludeArch: i686 armv7hl ExclusiveArch: x86_64 aarch64 ppc64le s390x - ceres-solver ExcludeArch: ppc64 - cfn-lint ExcludeArch: %{ix86} - cglib ExclusiveArch: %{java_arches} noarch - cgreen ExcludeArch: s390x - chafa ExcludeArch: %{ix86} - chatterino2 ExcludeArch: %{ix86} - chatty ExcludeArch: i686 - checkpointctl ExclusiveArch: %{golang_arches_future} - chibicc ExclusiveArch: x86_64 - chromium ExclusiveArch: x86_64 aarch64 ppc64le ExclusiveArch: x86_64 aarch64 - cinnamon ExcludeArch: %{ix86} - cinnamon-control-center ExcludeArch: %{ix86} - cinnamon-desktop ExcludeArch: %{ix86} - cinnamon-menus ExcludeArch: %{ix86} - cinnamon-screensaver ExcludeArch: %{ix86} - cinnamon-session ExcludeArch: %{ix86} - cinnamon-settings-daemon ExcludeArch: %{ix86} - cjdns ExclusiveArch: %{nodejs_arches} - cjs ExcludeArch: %{ix86} - classloader-leak-test-framework ExclusiveArch: %{java_arches} noarch - classpathless-compiler ExclusiveArch: %{java_arches} noarch - cld2 ExcludeArch: ppc64 s390x - clibs-list ExcludeArch: %{ix86} - clojure ExclusiveArch: %{java_arches} noarch - clojure-core-specs-alpha ExclusiveArch: %{java_arches} noarch - clojure-maven-plugin ExclusiveArch: %{java_arches} noarch - clojure-spec-alpha ExclusiveArch: %{java_arches} noarch - cloudcompare ExcludeArch: %{ix86} - clover2 ExcludeArch: armv7hl - cmospwd ExclusiveArch: %{ix86} x86_64 - cmrt ExclusiveArch: %{ix86} x86_64 ia64 - coan ExcludeArch: ppc64 s390x - coccinelle ExcludeArch: %{ix86} - cockpit ExcludeArch: %{ix86} - cockpit-ostree ExcludeArch: %{ix86} - cocoalib ExcludeArch: %{ix86} - codeblocks ExcludeArch: %{ix86} - codehaus-parent ExclusiveArch: %{java_arches} noarch - coeurl ExcludeArch: %{ix86} - cohomCalg ExcludeArch: %{ix86} - coin-or-Bonmin ExcludeArch: %{ix86} - coin-or-HiGHS ExcludeArch: %{ix86} - coin-or-Ipopt ExcludeArch: %{ix86} - coin-or-lemon ExcludeArch: %{ix86} - colorful ExclusiveArch: %{fpc_arches} - colossus ExclusiveArch: %{java_arches} noarch - compiz-plugins-experimental ExcludeArch: s390 s390x - conmon ExclusiveArch: %{golang_arches_future} - console-image-viewer ExclusiveArch: %{java_arches} noarch - containernetworking-plugins ExclusiveArch: %{golang_arches} - containers-common ExclusiveArch: %{golang_arches} noarch - contour-terminal ExclusiveArch: x86_64 aarch64 - contractor ExcludeArch: %{ix86} - conu ExcludeArch: ppc64 - coolreader ExcludeArch: %{ix86} - copr-rpmbuild ExcludeArch: %{ix86} - coq ExclusiveArch: %{ocaml_native_compiler} - corectrl ExcludeArch: %{ix86} - cortado ExclusiveArch: %{java_arches} noarch - cosmic-app-library ExcludeArch: %{ix86} - cosmic-applets ExcludeArch: %{ix86} - cosmic-bg ExcludeArch: %{ix86} - cosmic-comp ExcludeArch: %{ix86} - cosmic-edit ExcludeArch: %{ix86} - cosmic-files ExcludeArch: %{ix86} - cosmic-greeter ExcludeArch: %{ix86} - cosmic-idle ExcludeArch: %{ix86} - cosmic-launcher ExcludeArch: %{ix86} - cosmic-notifications ExcludeArch: %{ix86} - cosmic-osd ExcludeArch: %{ix86} - cosmic-panel ExcludeArch: %{ix86} - cosmic-player ExcludeArch: %{ix86} - cosmic-randr ExcludeArch: %{ix86} - cosmic-screenshot ExcludeArch: %{ix86} - cosmic-session ExcludeArch: %{ix86} - cosmic-settings ExcludeArch: %{ix86} - cosmic-settings-daemon ExcludeArch: %{ix86} - cosmic-store ExcludeArch: %{ix86} - cosmic-term ExcludeArch: %{ix86} - cosmic-workspaces ExcludeArch: %{ix86} - cp2k ExcludeArch: %{ix86} s390x - cproc ExclusiveArch: aarch64 riscv64 x86_64 - cpu-x ExclusiveArch: i686 x86_64 aarch64 - cpufetch ExclusiveArch: %{arm} aarch64 x86_64 ppc ppc64 ppc64le %{riscv} - cpuid ExclusiveArch: %{ix86} x86_64 - cpuinfo ExclusiveArch: x86_64 aarch64 - cqrlog ExclusiveArch: %{fpc_arches} - cramjam-cli ExcludeArch: %{ix86} - crash ExclusiveArch: %{ix86} ia64 x86_64 ppc ppc64 s390 s390x %{arm} aarch64 ppc64le - crash-gcore-command ExclusiveArch: aarch64 ppc64le x86_64 - crash-trace-command ExclusiveArch: aarch64 ppc64le s390x x86_64 - credentials-fetcher ExclusiveArch: x86_64 aarch64 s390x - crest ExcludeArch: s390x - cri-o ExclusiveArch: %{?go_arches:%{go_arches}}%{!?go_arches:%{ix86} x86_64 aarch64 %{arm}} - cri-tools ExclusiveArch: %{?go_arches:%{go_arches}}%{!?go_arches:%{ix86} x86_64 aarch64 %{arm}} - criu ExclusiveArch: x86_64 %{arm} ppc64le aarch64 s390x riscv64 - crosswords ExcludeArch: s390x - crun ExclusiveArch: %{golang_arches_future} ExclusiveArch: aarch64 ppc64le riscv64 s390x x86_64 - crun-vm ExcludeArch: %{ix86} - cryfs ExcludeArch: i686 - cryptlib ExclusiveArch: x86_64 aarch64 ppc64le riscv64 - crypto-policies ExclusiveArch: %{java_arches} noarch - cryptobone ExclusiveArch: x86_64 ppc64le aarch64 riscv64 - cryptominisat ExcludeArch: %{ix86} - csdp ExcludeArch: %{ix86} - csslint ExclusiveArch: %{nodejs_arches} noarch - cucumber-messages ExcludeArch: %{ix86} - cura ExcludeArch: %{ix86} - cura-fdm-materials ExcludeArch: %{ix86} - cvc5 ExcludeArch: %{ix86} - cxsc ExcludeArch: %{ix86} - daggy ExcludeArch: s390x - dapl ExcludeArch: s390, armv7hl - daq ExclusiveArch: x86_64 aarch64 - darktable ExcludeArch: armv7hl i686 s390x - dbus-sharp ExclusiveArch: %mono_arches - dbus-sharp-glib ExclusiveArch: %mono_arches - ddccontrol ExcludeArch: s390 s390x - ddcutil ExcludeArch: s390 s390x - ddd ExcludeArch: %{ix86} - debugbreak ExcludeArch: %{ix86} - decentxml ExclusiveArch: %{java_arches} noarch - deepin-daemon ExcludeArch: s390x - diffoscope ExcludeArch: %{ix86} - digikam ExclusiveArch: %{qt6_qtwebengine_arches} ExclusiveArch: %{qt5_qtwebengine_arches} - dippi ExcludeArch: %{ix86} - directory-maven-plugin ExclusiveArch: %{java_arches} noarch - direwolf ExcludeArch: i686 - dirgra ExclusiveArch: %{java_arches} noarch - disruptor ExclusiveArch: %{java_arches} noarch - ditaa ExclusiveArch: %{java_arches} noarch - dl-fedora ExcludeArch: %{ix86} - dl_poly ExcludeArch: i686 - dlib ExcludeArch: %{ix86} s390x - dlm ExclusiveArch: i686 x86_64 - dmidecode ExclusiveArch: %{ix86} x86_64 ia64 aarch64 riscv64 - dmtcp ExclusiveArch: x86_64 - dnsdist ExcludeArch: %{ix86} #1994125 ExcludeArch: armv7hl #1994125 - docker-distribution ExclusiveArch: %{?go_arches:%{go_arches}}%{!?go_arches:%{ix86} x86_64 %{arm}} - dogtag-pki ExclusiveArch: %{java_arches} ExcludeArch: i686 - dola ExclusiveArch: %{java_arches} noarch - dola-gleaner ExclusiveArch: %{java_arches} noarch - dola-transformer ExclusiveArch: %{java_arches} noarch - dolfin ExcludeArch: %{ix86} - dolphin-emu ExclusiveArch: x86_64 aarch64 - dom4j ExclusiveArch: %{java_arches} noarch - dosbox-staging ExcludeArch: %{ix86} - dotnet8.0 ExclusiveArch: aarch64 ppc64le s390x x86_64 - dotnet9.0 ExclusiveArch: aarch64 ppc64le s390x x86_64 - doublecmd ExclusiveArch: %{ix86} x86_64 - dovecot ExcludeArch: %{ix86} - dovecot-fts-xapian ExcludeArch: %{ix86} - dpdk ExclusiveArch: x86_64 i686 aarch64 ppc64le - dragonbox ExcludeArch: %{ix86} - drat-trim ExcludeArch: %{ix86} - drat2er ExcludeArch: %{ix86} - dub ExclusiveArch: %{ldc_arches} - duperemove ExcludeArch: %{ix86} - dvdauthor ExcludeArch: %{ix86} - dvgrab ExcludeArch: s390 s390x - dxvk-native ExclusiveArch: %{ix86} x86_64 - dyninst ExclusiveArch: x86_64 ppc64le aarch64 - e-antic ExcludeArch: %{ix86} - e00compr ExcludeArch: %{ix86} - e3 ExclusiveArch: %{ix86} x86_64 - easymock ExclusiveArch: %{java_arches} noarch - eccodes ExcludeArch: i686 - ecj ExclusiveArch: %{java_arches} noarch - eclipse-swt ExclusiveArch: %{java_arches} - ecryptfs-utils ExcludeArch: %{ix86} - ed25519-java ExclusiveArch: %{java_arches} noarch - edac-utils ExcludeArch: %{ix86} - edflib ExcludeArch: s390x %{ix86} - edwin-fonts ExcludeArch: %{ix86} - eegdev ExcludeArch: %{ix86} - efax ExcludeArch: s390 s390x - efibootmgr ExclusiveArch: %{efi} - efifs ExclusiveArch: %{efi} - efivar ExclusiveArch: %{efi} - electron-cash ExcludeArch: %{ix86} - electrum ExcludeArch: %{ix86} - elementary-icon-theme ExcludeArch: s390x - elk ExclusiveArch: x86_64 %{ix86} ExclusiveArch: x86_64 aarch64 %{arm} %{power64} ExclusiveArch: x86_64 %{ix86} aarch64 %{arm} %{power64} - emacs-common-proofgeneral ExcludeArch: %{ix86} - emacs-company-mode ExcludeArch: %{ix86} - emacs-iedit ExcludeArch: %{ix86} - emacs-slime ExclusiveArch: %{arm} %{ix86} x86_64 ppc sparcv9 aarch64 - embree ExclusiveArch: aarch64 x86_64 - embree3 ExclusiveArch: aarch64 x86_64 - enjarify ExclusiveArch: %{java_arches} noarch - enki ExclusiveArch: %{qt5_qtwebengine_arches} noarch - envytools ExclusiveArch: %{ix86} x86_64 %{arm} aarch64 riscv64 - eot-utils ExcludeArch: %{ix86} - ergo ExcludeArch: %{ix86} ExcludeArch: ppc64le - eric ExclusiveArch: %{qt6_qtwebengine_arches} noarch - erlang-corba ExclusiveArch: %{java_arches} - erlang-riak_ensemble ExcludeArch: ppc64le - esmi_ib_library ExclusiveArch: x86_64 - espresso ExcludeArch: s390x i686 armv7hl - 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sysbench ExclusiveArch: %{arm} %{ix86} x86_64 %{mips} aarch64 ExclusiveArch: %{arm} %{ix86} x86_64 %{mips} aarch64 ppc64le s390x - syslinux ExclusiveArch: %{ix86} x86_64 ExclusiveArch: %{ix86} x86_64 - system-rules ExclusiveArch: %{java_arches} noarch - systemd-boot ExclusiveArch: %efi - t-digest ExclusiveArch: %{java_arches} noarch - taglib-sharp ExclusiveArch: %{mono_arches} - tagsoup ExclusiveArch: %{java_arches} noarch - tarantool ExclusiveArch: %{ix86} x86_64 - task ExcludeArch: %{ix86} s390x %{power64} - tboot ExclusiveArch: %{ix86} x86_64 - tcmu-runner ExcludeArch: i686 armv7hl - tdlib ExclusiveArch: x86_64 aarch64 - teem ExcludeArch: %{ix86} - tellico ExclusiveArch: %{qt6_qtwebengine_arches} - templates_parser ExclusiveArch: %{GPRbuild_arches} - terminology ExcludeArch: s390x - terminus-fonts ExcludeArch: %{grub2_exclude_arches} - ternimal ExclusiveArch: %{rust_arches} - testcloud ExclusiveArch: %{kernel_arches} noarch - testng ExclusiveArch: %{java_arches} noarch - texlive ExclusiveArch: %{java_arches} noarch - texmaker ExclusiveArch: %{qt6_qtwebengine_arches} ExcludeArch: ppc64 ppc64le s390x - thermald ExclusiveArch: %{ix86} x86_64 - thunderbird ExcludeArch: aarch64 ExcludeArch: armv7hl - tiled ExcludeArch: %{ix86} - tilix ExclusiveArch: %{ldc_arches} - tinygo ExcludeArch: ppc64le s390x ExcludeArch: %{ix86} - tlf ExcludeArch: i686 - tlfloat ExcludeArch: %{ix86} - tokodon ExclusiveArch: %{qt6_qtwebengine_arches} - tomboy ExclusiveArch: %{mono_arches} - tomcat ExclusiveArch: %{java_arches} - tomcat-jakartaee-migration ExclusiveArch: %{java_arches} noarch - tomcat-native ExclusiveArch: %{java_arches} - tomcat-taglibs-parent ExclusiveArch: %{java_arches} noarch - torbrowser-launcher ExclusiveArch: %{ix86} x86_64 - touchegg ExcludeArch: %{ix86} - trace-cmd ExcludeArch: %{ix86} %{arm} - trafficserver ExcludeArch: %{arm} %{ix86} s390x - treelayout ExclusiveArch: %{java_arches} noarch - trilead-ssh2 ExclusiveArch: %{java_arches} noarch - trojita ExcludeArch: ppc64 ppc64le s390x - trunk ExcludeArch: %{ix86} - trustee-guest-components ExclusiveArch: x86_64 - tth ExcludeArch: %{ix86} - tucnak ExcludeArch: i686 - tuned-switcher ExcludeArch: %{ix86} - tvtime ExcludeArch: s390 s390x - typescript ExclusiveArch: %{nodejs_arches} noarch - tzdata ExcludeArch: i686 - uClibc ExclusiveArch: %{arm} %{ix86} x86_64 %{mips} - uboot-tools ExcludeArch: s390x - ucx ExclusiveArch: aarch64 ppc64le x86_64 riscv64 - udev-hid-bpf ExcludeArch: %{ix86} - uglify-js ExclusiveArch: %{nodejs_arches} noarch - ugrep ExcludeArch: %{ix86} - umr ExclusiveArch: x86_64 aarch64 ppc64le - unetbootin ExclusiveArch: %{ix86} x86_64 - unison ExcludeArch: %{ix86} - univocity-parsers ExclusiveArch: %{java_arches} noarch - ursa-major ExclusiveArch: noarch aarch64 ppc64le s390x x86_64 - usbip ExcludeArch: s390x - usd ExclusiveArch: aarch64 x86_64 - usnic-tools ExcludeArch: %{arm} - utop ExcludeArch: %{ix86} - uv ExcludeArch: %{ix86} - uwsgi ExcludeArch: %{ix86} - v-hacd ExcludeArch: %{ix86} - v8-314 ExclusiveArch: %{ix86} x86_64 %{arm} mips mipsel ppc ppc64 - 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virtualbox-guest-additions ExclusiveArch: i686 x86_64 - visidata ExcludeArch: %{ix86} - visualboyadvance-m ExcludeArch: %{ix86} s390x - vkd3d ExclusiveArch: %{ix86} x86_64 %{arm} ExclusiveArch: %{ix86} x86_64 %{arm} aarch64 - vkmark ExcludeArch: s390x - vmaf ExclusiveArch: x86_64 - voms-api-java ExclusiveArch: %{java_arches} noarch - voms-clients-java ExclusiveArch: %{java_arches} noarch - vosk-api ExclusiveArch: x86_64 aarch64 ppc64le - votca ExcludeArch: %{ix86} - vrq ExclusiveArch: %{ix86} x86_64 - vultr-cli ExcludeArch: ppc64le s390x - vxl ExcludeArch: %{ix86} - wangle ExclusiveArch: x86_64 aarch64 ppc64le riscv64 - warsow ExclusiveArch: %{ix86} x86_64 %{arm} - warsow-data ExclusiveArch: %{ix86} x86_64 %{arm} noarch ExclusiveArch: %{ix86} x86_64 %{arm} - warzone2100 ExcludeArch: %{ix86} - wasmedge ExclusiveArch: x86_64 aarch64 - wcstools ExcludeArch: %{ix86} - wdt ExclusiveArch: x86_64 aarch64 ppc64le - webkit2-sharp ExclusiveArch: %mono_arches - weld-parent ExclusiveArch: %{java_arches} noarch - wgrib2 ExcludeArch: %{ix86} - whipper ExcludeArch: s390x - whisper-cpp ExclusiveArch: x86_64 aarch64 ppc64le - why3 ExclusiveArch: %{ocaml_native_compiler} - widevine-installer ExclusiveArch: aarch64 - wildcard ExcludeArch: %{ix86} - wine ExclusiveArch: %{ix86} x86_64 ExclusiveArch: %{ix86} - wine-dxvk ExclusiveArch: %{ix86} x86_64 - wine-mono ExcludeArch: aarch64 %{power64} s390x s390 - winetricks ExclusiveArch: %{ix86} x86_64 %{arm} aarch64 ExcludeArch: ppc64 ppc64le - wivrn ExcludeArch: s390x %{ix86} - wlmaker ExcludeArch: %{ix86} - woff ExcludeArch: %{ix86} - woodstox-core ExclusiveArch: %{java_arches} noarch - workrave ExcludeArch: %{ix86} - ws-commons-util ExclusiveArch: %{java_arches} noarch - wsdl4j ExclusiveArch: %{java_arches} noarch - wsjtx ExcludeArch: i686 - wult ExclusiveArch: x86_64 - wxMaxima ExcludeArch: %{ix86} - x2goclient ExclusiveArch: x86_64 - x2gokdrive ExcludeArch: %{ix86} - x86-simd-sort ExclusiveArch: x86_64 - xalan-j2 ExclusiveArch: %{java_arches} noarch - xaos ExcludeArch: %{ix86} - xapps ExcludeArch: %{ix86} - xbean ExclusiveArch: %{java_arches} noarch - xbyak ExclusiveArch: x86_64 - xbyak_aarch64 ExclusiveArch: aarch64 - xdg-desktop-portal ExcludeArch: %{ix86} - xdg-desktop-portal-cosmic ExcludeArch: %{ix86} - xdg-desktop-portal-gnome ExcludeArch: %{ix86} - xdg-desktop-portal-gtk ExcludeArch: %{ix86} - xdg-desktop-portal-hyprland ExcludeArch: %{ix86} - xe-guest-utilities-latest ExclusiveArch: %{ix86} x86_64 - xed ExcludeArch: %{ix86} - xen ExclusiveArch: x86_64 aarch64 - xephem ExcludeArch: %{ix86} - xerces-j2 ExclusiveArch: %{java_arches} noarch - xeus ExcludeArch: %{ix86} - xeus-zmq ExcludeArch: %{ix86} - xfce4-sensors-plugin ExcludeArch: s390 s390x - xfce4-systemload-plugin ExcludeArch: %{ix86} - xgap ExcludeArch: %{ix86} - xiphos ExcludeArch: ppc64 - xlog ExcludeArch: i686 - xmedcon ExcludeArch: %{ix86} - xml-commons-apis ExclusiveArch: %{java_arches} noarch - xml-commons-resolver ExclusiveArch: %{java_arches} noarch - xml-maven-plugin ExclusiveArch: %{java_arches} noarch - xmlada ExclusiveArch: %{GPRbuild_arches} - xmlgraphics-commons ExclusiveArch: %{java_arches} noarch - xmlpull ExclusiveArch: %{java_arches} noarch - xmlstreambuffer ExclusiveArch: %{java_arches} noarch - xmlunit ExclusiveArch: %{java_arches} noarch - xmvn ExclusiveArch: %{java_arches} noarch - xmvn-connector-ivy ExclusiveArch: %{java_arches} noarch - xmvn-generator ExclusiveArch: %{java_arches} - xmvn5 ExclusiveArch: %{java_arches} noarch - xnnpack ExclusiveArch: x86_64 aarch64 - xnvme ExcludeArch: %{ix86} - xorg-x11-drv-amdgpu ExcludeArch: s390 s390x - xorg-x11-drv-ati ExcludeArch: s390 s390x - xorg-x11-drv-intel ExclusiveArch: %{ix86} x86_64 - xorg-x11-drv-nouveau ExcludeArch: s390 s390x - xorg-x11-drv-openchrome ExclusiveArch: %{ix86} x86_64 - xorg-x11-drv-qxl ExcludeArch: s390 s390x - xorg-x11-drv-synaptics ExcludeArch: s390 s390x - xorg-x11-drv-vmware ExclusiveArch: %{ix86} x86_64 ia64 - xreader ExcludeArch: %{ix86} - xrgears ExcludeArch: %{ix86} - xsensors ExcludeArch: %{ix86} - xsp ExclusiveArch: %mono_arches - xstream ExclusiveArch: %{java_arches} noarch - xtb ExcludeArch: s390x - xtensor-python ExcludeArch: armv7hl ppc64le s390x - xwayland-satellite ExcludeArch: %{ix86} - xz-java ExclusiveArch: %{java_arches} noarch - yarnpkg ExclusiveArch: %{nodejs_arches} - yices ExcludeArch: %{ix86} - yle-dl ExcludeArch: %{ix86} - yosys ExcludeArch: %{ix86} ExcludeArch: s390x - zcfan ExclusiveArch: x86_64 - zeal ExclusiveArch: %{qt6_qtwebengine_arches} - zenon ExclusiveArch: %{ocaml_native_compiler} - zeromq-ada ExclusiveArch: %{GPRbuild_arches} - zig ExclusiveArch: %{zig_arches} - zile ExcludeArch: ppc64le - zimpl ExcludeArch: %{ix86} - zlib-ada ExclusiveArch: %{GPRbuild_arches} - zola ExclusiveArch: %{rust_arches} - zstr ExcludeArch: %{ix86} - zswap-cli ExcludeArch: %{ix86} - zxcvbn-c ExcludeArch: %{ix86} - zycore-c ExcludeArch: s390x - zydis ExcludeArch: s390x - zynaddsubfx ExcludeArch: i686

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Architecture specific change in rpms/gap-pkg-smallantimagmas.git
by githook-noreply＠fedoraproject.org 26 Jun '25

26 Jun '25

The package rpms/gap-pkg-smallantimagmas.git has added or updated architecture specific content in its spec file (ExclusiveArch/ExcludeArch or %ifarch/%ifnarch) in commit(s): https://src.fedoraproject.org/cgit/rpms/gap-pkg-smallantimagmas.git/commit/…. Change: +ExcludeArch: %{ix86} Thanks. Full change: ============ commit a3111689f7f11fbcfbd503d125e5d91647a86511 Author: Jerry James <loganjerry(a)gmail.com> Date: Wed Jun 25 15:35:21 2025 -0600 Initial RPM diff --git a/.gitignore b/.gitignore new file mode 100644 index 0000000..010cb18 --- /dev/null +++ b/.gitignore @@ -0,0 +1 @@ +/smallantimagmas-*.tar.gz diff --git a/gap-pkg-smallantimagmas.spec b/gap-pkg-smallantimagmas.spec new file mode 100644 index 0000000..c27ccb5 --- /dev/null +++ b/gap-pkg-smallantimagmas.spec @@ -0,0 +1,72 @@ +%global pkgname smallantimagmas +%global giturl https://github.com/gap-packages/smallantimagmas + +Name: gap-pkg-%{pkgname} +Version: 0.4.1 +Release: %autorelease +Summary: Library of antiassociative magmas of small order + +License: GPL-3.0-or-later +BuildArch: noarch +# See https://fedoraproject.org/wiki/Changes/EncourageI686LeafRemoval +ExcludeArch: %{ix86} +URL: https://gap-packages.github.io/smallantimagmas/ +VCS: git:%{giturl}.git +Source: %{giturl}/archive/v%{version}/%{pkgname}-%{version}.tar.gz +BuildRequires: gap-devel +BuildRequires: gap-pkg-autodoc + +Requires: gap-core + +%description +This package contains a library of antiassociative magmas of small order for +GAP. + +%package doc +# The content is GPL-2.0-or-later. The remaining licenses cover the various +# fonts embedded in PDFs. +# CM: Knuth-CTAN +# CM-Super: GPL-1.0-or-later +# Nimbus: AGPL-3.0-only +License: GPL-2.0-or-later AND Knuth-CTAN AND GPL-1.0-or-later AND AGPL-3.0-only +Summary: smallantimagmas documentation +Requires: %{name} = %{version}-%{release} +Requires: gap-online-help + +%description doc +This package contains documentation for gap-pkg-%{pkgname}. + +%prep +%autosetup -n %{pkgname}-%{version} +rm tst/.gitignore + +%build +mkdir ../pkg +ln -s ../%{pkgname}-%{version} ../pkg +gap -l "$PWD/..;" makedoc.g +rm -fr ../pkg + +%install +mkdir -p %{buildroot}%{gap_libdir}/pkg/%{pkgname}/doc +cp -a *.g *.ipynb data lib tst %{buildroot}%{gap_libdir}/pkg/%{pkgname} +%gap_copy_docs + +%check +gap -l '%{buildroot}%{gap_libdir};' tst/testall.g + +%files +%doc README.md +%license LICENSE.txt +%dir %{gap_libdir}/pkg/%{pkgname}/ +%{gap_libdir}/pkg/%{pkgname}/*.g +%{gap_libdir}/pkg/%{pkgname}/*.ipynb +%{gap_libdir}/pkg/%{pkgname}/data/ +%{gap_libdir}/pkg/%{pkgname}/lib/ +%{gap_libdir}/pkg/%{pkgname}/tst/ + +%files doc +%docdir %{gap_libdir}/pkg/%{pkgname}/doc/ +%{gap_libdir}/pkg/%{pkgname}/doc/ + +%changelog +%autochangelog diff --git a/sources b/sources new file mode 100644 index 0000000..3941fd0 --- /dev/null +++ b/sources @@ -0,0 +1 @@ +SHA512 (smallantimagmas-0.4.1.tar.gz) = 033bddde233a34631ed64f8359646065640f54a2dd1e3ed41de73dd902b376e2fc0b24fcbe42613e9e86c73874af9c49b4ad085051d1cf1c2d9802a4d3a91a0e

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