Re: [Fedora-electronic-lab-list] Fedora Project, give me 20 Million Euros or Free EDA software

[Chitlesh GOORAH]

Hello there,
for some reason the mailing list automatically discarded this email from Svilen.
I'm forwarding it.

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Date: Sat, Jan 31, 2009 at 12:33 PM
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From: Svilen 
To: [e-mail]
Date: Sat, 31 Jan 2009 11:32:00 +0000
Subject: Re: [Fedora-electronic-lab-list] Fedora Project, give me 20
Million Euros or Free EDA software
Hi Lads,

Although in this community I'm involved with quite different things
(layout), it happens that recent 8 years I do front end digital design
for living.
I'm sorry Chitlesh, about how do you feel, but I'm sure that after
some time you'll realize that actually "they" are probably right. I'll
give you a bit different look to the problem. Sorry for the long
post...

First about SytemVerilog. I'm an enthusiast myself since Accelera days
and I'm actively using and promoting this language in the companies I
was (and am) working for. Today the current language standard (IEEE
1800-2005) is not fully covered by any tool. As far as I know the
biggest 3 EDA vendors don't even claim that it will happen soon.
Something more  - there are quite few designers which are using all
aspects of the language. To be honest - the SystemVeriog enthusiasts
as general are quite few. There are thousands of reasons for this, but
I'll give you only a couple of very simple ones. The language has over
than 240 keywords. The simulators are still quite buggy and are
interpreting the standard at their discretion. Using the language
today is like stepping on a thin ice - you don't know which tool in
the design chain will tell you that " ...  feature is not supported".
Transferring the code between simulators is actually not feasible. And
this is more than 4 years after the IEEE standard. An updated one is
due this year which will replace also the "traditional" (IEEE
1364-2005) Verilog.
The longer I use SystemVerilog - the more I'm convinced that the only
reason I'm doing it - it's because currently there is nothing better.
One can argue about VHDL, but that's completely different story, so
let's keep it simple. My feeling is that at least for the moment the
idea failed to deliver the promises.

One thing is clear though - a billion $$ market is open and a serious
fight is going on. Verification platforms like OVM and VMM are simply
a bait for the big fish. I can bet that if an open source
SystemVerilog simulator was existing or was about to pop-up in the
near feature the VMM and OVM licenses would have been quite different.
EDA companies are not to be underestimated and especially their
marketing departments. They know very well what's the state of the
open source EDA tools, although they won't admit it easily.  So - the
bottom line is that it's very doubtful how the open source EDA
community will benefit from taking aboard VMM or OVM. This is not our
fight at the end of the day!? And we should not take side there. Think
about it - this thing will make their bait to look more juicy, they
will most likely put it into their fliers, they will get contributions
and resources from the community (packaging and maybe more) in return
for what? That's what I call a free beer and we all believe Fedora is
not about it.

SystemVerilog introduces the object oriented approach (classes) and
this is probably the biggest addition to the language - its software
side . It has nothing to do with the design itself. That's pure
verification. This obviously is valid for OVM and VMM. I know the EDA
companies claim that they invested millions in the development of
their verification platforms and that's probably true. They keep an
army of verification engineers. The question in my mind however is -
does it worth the money? For them probably it does - they will take
them back from the simulator licenses.  Let's put the question in open
source prospective though. IF a simulator was available is it feasible
to develop a SystemVerilog open source verification library?  I would
say - yes. It is! Not one. There will be a plenty of them.

It appears that the important point is the simulator. This is the real
value. OVM is not part of the cake. It is not the icing of the cake
either. It is not even the cherry on the cake. It is the box actually,
just one of them. One can argue that it looks nice, but it tastes like
cardboard. Looking for closer parallels - see how GNU initiative
started. With C compiler. Then and only then the entire variety of
libraries and tools were ported. These days you can get a nice
simulator even from Microsoft - for free. But that's only today, when
GCC became a standard. And now the next question - is it feasible to
develop an open source SystemVerilog simulator in the near feature?
I'm sorry to say - but it seems not. Not soon. Too little resources
for a too big task. I'll be happy if somebody proves me wrong.

SystemVerilog is in fashion these days, but it doesn't mean that a lot
of people love it. It claims to be a language for design and
verification. To achieve this it mixes two completely different
concepts - hardware description and software. The design guys are
using the former one, the verification chaps - the latter. The
language makes these two concepts to look the same syntactically, but
very often it only confuses people (and verification engineers start
to thing that they know how to design :) ). At the end of the day you
can paint a pumpkin to look like a watermelon, but you'll certainly be
surprised when you crack it open. It reminds me the story with the DEC
machines in seventies or say the story of PL/1 language in sixties.
They had the ambition to be everything, to be universal. The result in
both cases was the same - they are history now. I'm not saying this
will be the same, I'm just saying - it looks similar to me.

Why not try a different approach then? Why not try to benefit from the
vast resources already existing in the open source community and find
a different way? Something rather closer to SystemC? I have some
heretic thoughts about this and will be happy to discuss them if
somebody is interested.

Regards
Svilen

P.S. Chitlesh, it is not a failure. It might have been if you
succeeded. Sometimes before you learn how to do things you have to
learn how not to do them. Keep up the good work.

Chitlesh GOORAH wrote:
> Hello there,
>
> Before reading the mail, be brave people read this blog post first,
> especially people from FESCo:
> http://www.edn.com/blog/920000692/post/1290038929.html
>
> Do comment on that blog post. Afterwards you read my email.
>
> I found it sad that I have to write this email today. Well, it is part
> of my contribution to both opensource software and opensource EDA
> software communities.
>
> The subject of this email is "Fedora Project, give me 20 Million Euros
> or Free Software" ! Unfortunately, I'm not kidding and even 20 Million
> Euros is not enough.
>
> Well, let's get to the point !
> -- Abstract
>
> I wish to maintain a package called OVM. This package is opensourced
> by the two giant EDA Vendors : Cadence and Mentor Graphics, under the
> Apache 2.0 license.
> However, since there is no opensource tool to use OVM, FESCo has
> freezed its entry.
>
> Since when opensource software is more important than opensource content ?
>
> https://bugzilla.redhat.com/show_bug.cgi?id=474980
> -- About OVM: Open Verification Methodology
>
> The OVM is based on the IEEE 1800 SystemVerilog standard and supports
> design and verification engineers developing advanced verification
> environments that offer higher levels of integration and portability
> of Verification IP. The methodology is non-vendor specific and is
> interoperable with multiple languages and simulators. The OVM is fully
> open, and includes a robust class library and source code that is
> available for download.
> -- Explanation of the "Don't kill OpenSource EDA software and its community" cry
>
> About 90% of the opensource software you can use it as a replacement
> of another proprietary software. However in the EDA industry this is
> not true. There is NO EDA software (whether proprietary or opensource)
> that can replace another. If someone tells you the contrary, export
> him/her to planet Mars on the spot. NO EDA software is used by users
> as the rpm is provided. For each project, you will need to tweak the
> software as a user. That's one of the reasons why frontend digital
> designers like Tcl and Perl.
>
> Unlike the rest of the opensource SOFTWARE packagers, my users have NO
> interest in opensource EDA design tools if in the end they can't
> produce hardware with them!!
>
> Why ?
>
> I have 2 types of users ! the students and the hardware amateurs.
> But these are not the ones I'm fighting for ! I'm fighting to seduce
> the right people to encourage mass Fedora deployment with EDA tools.
> These "right" people are lecturers and EDA engineers. You have noticed
> that I didn't mention "analog/digital" engineers yet.
>
> Lecturers will _find_ the right tools for the students so that they
> can market themselves when looking for a job.
> EDA engineers will be _contacted_ by big vendors to help him choose
> the right tool for his/her "analog/digital" engineers. Some EDA
> engineers will even be invited for several expensive hotels/dinners.
>
> While the opensource software community talks about how they are proud
> of AIGLX, fedora, OOo, Amarok, KDE4,..., I am sad to say that I can
> not say the same for Open Hardware.
>
> With Fedora Electronic Lab, we do not only attracted users with
> respect to opensource EDA tools, but FEL contributors are heavily
> divided into the following communities:
> opensource software : by shipping free EDA tools
> open Hardware : by targeting these persons
>
> I will only consider that WE were successful with FEL if open Hardware
> projects/companies HAVE USED opensource EDA tools to design their
> hardware. This is a goal. A goal to reach and show what we can
> achieved with opensource software.
> I'm not talking about ghdl being used to simulate OpenSparc T2 for
> example, I'm talking about completing the whole Open Hardware project
> to Silicon. Amateurs/home made pcbs is simple.
>
> Bridging these two communities, give us(Fedora)[#1] extra
> responsibilities, which we are currently the opensource Leader in EDA
> deployment. These responsibilities include maintaining the health of
> the opensource EDA software community and encourage continuous
> deployment. Unlike the opensource Linux ECO system, the EDA world is
> dictated by:
> research and development in silicon.
> infinite number of standards.
> various quality-class proprietary EDA tools are available for free download
> ....
>
> Among the industry standards, OVM IEEE 1800 SystemVerilog standard is
> under an acceptable license for Fedora's inclusion. As you have surely
> guessed the ODF standard was not made standard by some cheap geeks. It
> costs money, time and development strategy. We (opensource community)
> have nothing such thing to create a standard for electronics! We don't
> currently have an opensource simulator for SystemVerilog. Now imagine
> OOo without ODF support. Will the opensource software community dump
> the ODF initiative ? We don't have human resources[2] to just pop a
> simulator tool for systemverilog out of the blue.
>
> Growing Numbers of SV users:
> http://theasicguy.com/2009/01/27/dvcon-survey-results-what-do-they-mean/
>
> You have certainly heard couple thousands layoffs in the semiconductor
> industry this month. Companies are taking drastic measures to cut
> expenses, I believe FEL will be attractive for them. Unlike the normal
> fedora user, these companies will do mass fedora deployments from the
> Note[1].
> http://edablog.com/2009/01/12/edac-mss-q32008/
>
> VMM also suffers the same issue.
>
> --- Additional notes:
>
> [#1]
> I referred "us(Fedora)[#1]" because I strongly believe Fedora IS THE
> ONLY ANSWER for the opensource EDA community.
> Sorry, users from non-Fedora-based distribution should seriously
> change their professional career if they are doing ASIC design.
> Why ? : Electronic Design Automation Consortium has established EDA
> Industry OS Roadmap guidelines for which platforms EDA vendors and
> customers should target for design starts.
> http://www.edac.org/industry_roadmap.jsp#roadmap
> For Linux Users, you have RHEL and SLES. Please don't get excited
> Linux was attractive because Vista failed to impress the EDA market.
> If Windows 7 prove otherwise, EDA Vendors will provide less Linux
> support. While these are proprietary software, they are the only way
> to program their hardware devices. Take for example, you buy a
> development FPGA kit from Altera or Xilinx, you can only program your
> FPGA will their free tools on windows. It is free and users don't need
> to care about its source code as they can have good support from their
> vendors.
>
> Hence, I have shown you how my users will think and how easy we can
> lose linux users. I'm not talking about helping proprietary software,
> but avoid dumping software that have been opensourced and are still
> being maintained.
>
> [#2].
> human resources[2] : Unlike a normal software, electronic simulation
> tools should be mature. Because the hardware being developed are the
> one you will find in your brand new cars, airplanes, in various
> medical devices. Since these are life critical applications, the
> designer will not want a 2-week developed simulator. That is why I'm
> saying that I don't think we will see a simulator so soon. According
> to FESCo, no simulator -> no entry. Hence I see, no OVM entry before
> the next five years and I will have to inform the opensource EDA
> community that either the major opensource EDA Leader has discarded
> the appreciation of this opensource content and initiative.
> --- Conclusion
>
> Have a look around you further than fedora. Have a global view on the
> Linux communities.
>
> Answer the following questions:
> Who is the one focussing on electronics for the best electronic user
>
> experience ?
> Hint : compare Ngspice release and LTSpice release !
> Why is that one giving better solutions and user experience ?
> Has OS user experience being more important than electronic design
>
> experience ?
> Can you bear that you have deliberately giving up Open content ?
>
> Unlike OOo which tends to give OS user experience by replacing
> Microsoft Office. For FEL, I don't have replacement of 70% of the
> proprietary tools. If you are shutting down the doors on OVM, you are
> also claiming fedora is not promoting open content, but only OS user
> experience ? I would recommend FESCo to cancel/revisit each Feature
> wiki page proposal as they provide more than OS user experience. Also
> have a look at the EDA community promoting our Fedora everywhere:
> http://jamespurser.com.au/blog/Open_Source_Startup_Group_-_An_Update
> google for more.
>
> Iverilog (which to me had more chance to provide SystemVerilog support
> quickly) are focussing on Verilog-AMS which is also very important.
> Mixed signal is all around now. The opensource EDA community don't
> have that human resources. The 20 Million Euros is about balancing the
> losses of that OVM was turned down.
>
> perl-Verilog currently under the Fedora umbrella has incorporated some
> extra systemverilog support. This new release will hit fedora mirrors
> today.
>
> I am not attacking anyone. I'm just reflecting the current reality. If
> Fedora is not an answer for opensource EDA software, the opensource
> community
> You will laugh about this :
>
> Give me an example of a software that is free in windows but need a
> license on Linux.
> It is the case in Electronics.
>
> Help me find an answer to:
> "What are the verification solutions Fedora provide ?"
>
> What can opensource software community answer when EDA vendors give
> away their software for free ?
> http://www.eeproductcenter.com/embedded/brief/showArticle.jhtml;jsessionid=R...
>
> I'm going to sleep with failure in my mind.
> Good night.
>
> A mature opensource EDA software costs at least 20 Million Euros.
> Don't dump opensource CONTENT!
>
> PS: in Belgium today, we have carried out meteorological measurements
> with Hardware designed under Fedora.
>
> Kind regards,
> Chitlesh
>
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