Hello,
Thank you for this robust platform for digital design. I'm a digital designer. I was using iverilog and gtkwave on ubuntu. However last year, I had a lot of issues when doing maths with verilog. Then I tried Fedora to see if if suffers these issues, but haven't encountered any. I was impressed and sticked with Fedora ever since. With the recent gplcver and vrq, it makes verilog design exciting.
In the meantime, I'm learning vhdl on my own and am unable to get the name of the current state of the state machine on gtkwave. Is there a solution for that so that I don't have to declare a special non-synthesized std_logic_vector.
Nigel
Nigel,
--- On Tue, Dec 15, 2009 at 11:14 PM, Nigel noldsworth noldsworth@googlemail.com wrote: | Thank you for this robust platform for digital design. I'm a digital | designer. I was using iverilog and gtkwave on ubuntu. However last | year, I had a lot of issues when doing maths with verilog. Then I | tried Fedora to see if if suffers these issues, but haven't | encountered any. I was impressed and sticked with Fedora ever since. | With the recent gplcver and vrq, it makes verilog design exciting. --
Thanks for your feedback!
--- | In the meantime, I'm learning vhdl on my own and am unable to get the | name of the current state of the state machine on gtkwave. Is there a | solution for that so that I don't have to declare a special | non-synthesized std_logic_vector. --
Does this help? https://mail.gna.org/public/ghdl-discuss/2009-05/msg00003.html
If you have any issues or problems with the software and tools, please file a bug report at: https://bugzilla.redhat.com/
You can add Chitlesh or my name, e-mail address in the CC list in the bug report.
As you might be aware, we are in the process of documenting recommended workflows with our tools. In this regard, if you could write to us on your use of the tools and workflow, it will be very helpful for everyone.
We will prepare the documentation in LaTeX, and generate PDF for users, developers.
Thanks again,
SK
On Tue, Dec 15, 2009 at 6:44 PM, Nigel noldsworth <> wrote:
Hello,
Thank you for this robust platform for digital design. I'm a digital designer. I was using iverilog and gtkwave on ubuntu. However last year, I had a lot of issues when doing maths with verilog. Then I tried Fedora to see if if suffers these issues, but haven't encountered any. I was impressed and sticked with Fedora ever since. With the recent gplcver and vrq, it makes verilog design exciting.
Hello Nigel,
Thank you for your feedback. We appreciate it.
There was recently a thread in the iverilog mailing list about this maths issue with Ubuntu's iverilog. This issue is still present on Ubuntu with the next iverilog release. The test we have conducted against iverilog on Fedora does not reflect this maths issue.
In the meantime, I'm learning vhdl on my own and am unable to get the name of the current state of the state machine on gtkwave. Is there a solution for that so that I don't have to declare a special non-synthesized std_logic_vector.
As Shakthi pointed out, extract the waveforms with --wave=design.ghw instead of VCD.
regards, Chitlesh
electronic-lab@lists.fedoraproject.org