[PATCH] Add PCI mode LPSS support on BYT

[Bastien Nocera]

From: Bastien Nocera

---
 config-x86-generic | 1 +
 1 file changed, 1 insertion(+)

diff --git a/config-x86-generic b/config-x86-generic
index 19daf7c..3de8d6c 100644
--- a/config-x86-generic
+++ b/config-x86-generic
@@ -522,6 +522,7 @@ CONFIG_MFD_INTEL_LPSS_PCI=m

CONFIG_IOSF_MBI=m
 # CONFIG_IOSF_MBI_DEBUG is not set
+CONFIG_BYT_LPSS_BRD=y
 CONFIG_PWM_LPSS=m
 CONFIG_PWM_LPSS_PCI=m
 CONFIG_PWM_LPSS_PLATFORM=m

[Josh Boyer]

On Wed, Dec 16, 2015 at 9:11 AM, Bastien Nocera  wrote:
> From: Bastien Nocera
>
> config-x86-generic | 1 +
>  1 file changed, 1 insertion(+)
>
> diff --git a/config-x86-generic b/config-x86-generic
> index 19daf7c..3de8d6c 100644
> --- a/config-x86-generic
> +++ b/config-x86-generic
> @@ -522,6 +522,7 @@ CONFIG_MFD_INTEL_LPSS_PCI=m
>
> CONFIG_IOSF_MBI=m
>  # CONFIG_IOSF_MBI_DEBUG is not set
> +CONFIG_BYT_LPSS_BRD=y

This option doesn't even exist in Linus' tree.

[jwboyer@vader linux]$ git grep "BYT_LPSS_BRD"
[jwboyer@vader linux]$

josh

[Bastien Nocera]

----- Original Message -----
> On Wed, Dec 16, 2015 at 9:11 AM, Bastien Nocera  wrote:
> > From: Bastien Nocera
> >
> > config-x86-generic | 1 +
> >  1 file changed, 1 insertion(+)
> >
> > diff --git a/config-x86-generic b/config-x86-generic
> > index 19daf7c..3de8d6c 100644
> > --- a/config-x86-generic
> > +++ b/config-x86-generic
> > @@ -522,6 +522,7 @@ CONFIG_MFD_INTEL_LPSS_PCI=m
> >
> > CONFIG_IOSF_MBI=m
> >  # CONFIG_IOSF_MBI_DEBUG is not set
> > +CONFIG_BYT_LPSS_BRD=y
>
> This option doesn't even exist in Linus' tree.
>
> [jwboyer@vader linux]$ git grep "BYT_LPSS_BRD"
> [jwboyer@vader linux]$

Looks like I got this when I rebased a bunch of Intel vendor patches.

Sorry about that, drop this patch.