[Fedora-packaging] Packaging FPGA bitstreams

[Richard W.M. Jones]

RISC-V is an open source instruction set architecture (ISA).

I was broadly looking at what it would take to support RISC-V in
Fedora, and as well as the usual things like kernel, GCC, binutils,
maybe cross-compilers, and all the stuff that's the same for any new
architecture, there is one problem which is specific to RISC-V.

Because no hardware implementation of RISC-V exists that you can
buy[1], currently you have to use an FPGA development kit and use one
of the FPGA implementations -- I'm using lowRISC[2].  There are
affordable FPGA kits for around US$150-$320 based on the Xilinx
Artix-7 FPGA which are supported by lowRISC.

The source for the RISC-V CPU core (called "Rocket") is written in
Verilog and is free software (3-clause no advertising BSD).

In FPGA-land, a "bitstream" is kind of like a binary or a firmware
blob.

Unfortunately to compile the source code to a bitstream, things get
very proprietary.  For Xilinx, you have to install their proprietary
compiler, Vivado.  It's not just proprietary but it has node-locked
licensing so it's user-hostile too.

There is a second sub-problem, but one which is going to be overcome
soon.  At the moment there is only a free CPU core.  However to talk
to the outside world even on an FPGA, it needs peripherals like a UART
(serial port), SD card reader and some other SPI peripherals.  These
are provided by Xilinx and are (of course) proprietary IP.  However
lowRISC plan to replace these with free software peripherals later
this year[3].

Once you've compiled your bitstream, you then need to write it to the
FPGA.  Writing a bitstream to the FPGA turns the FPGA into a RISC-V
processor and you can boot Linux on it from an SD card.

You can use the proprietary Vivado tool to write the bitstream to the
FPGA, but there are also open source tools to do this.  I used
xc3sprog[4] (GPLv2).

This all really works - I've been documenting building everything from
source on my blog[5].

In summary:

 - Compiling the Verilog source code to a bitstream requires highly
   proprietary tools and will never be possible in Fedora.

 - Writing the bitstream to the FPGA is possible with GPL tools.

 - There are currently some proprietary bits in the bitstream, but I
   hope those will be removed at some point.

Obviously the last point makes this moot right now, but assuming that
can be fixed, here is my question: Can we package these bitstream
files in Fedora?  It would allow a more immediate out-of-the-box
experience where you just plug in the development kit and go.

Rich.

  [1] Hardware impls do exist, but they are all research projects so
      far, or otherwise not for sale.
  [2] http://www.lowrisc.org/
  [3] https://speakerdeck.com/asb/lowrisc-plans-for-risc-v-in-2016
  [4] https://sourceforge.net/p/xc3sprog/
  [5] https://rwmj.wordpress.com/?s=RISC-V+on+an+FPGA

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