"use register arguments" option enabled.
russell at coker.com.au
Wed May 18 08:48:21 UTC 2005
On Wednesday 18 May 2005 00:47, David Woodhouse <dwmw2 at infradead.org> wrote:
> On Mon, 2005-05-16 at 14:09 -1000, Warren Togami wrote:
> > > Even a 2 clock cycle delay happening hundreds of thousands or even
> > > millions of times a second builds up.
> > Isn't using system memory much longer than 2 clock cycles?
> If accessing the top of your stack is "using system memory" you're
> screwed already. It ought to be in L1 cache.
I presume that the top of the stack will eventually be written back to main
memory. Aren't memory writes more of a performance hit than reads,
especially on SMP?
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