[Fedora-electronic-lab] XEMACS versus the digital IC design flow

[Chitlesh GOORAH]

Hello there,

Today, on the train, I meant someone who has integrated XEMACS in his
company's design flow. In accordance to him, he is using it as an
editor and support for project management, Makefile, Code Beautifier
and VHDL/Verilog Linting.

I'm still an emacs-virgin as RMS would qualify me. Can anyone shed
some light how we can achieve the above items in such a way that we
can do proper marketing about this feature (with respect to its
integration in the design flow) ?


thanks,
Chitlesh

-- 
Chitlesh GOORAH
Fedora Electronic Lab Architect
http://chitlesh.fedorapeople.org/FEL