[free-electronic-lab] Xilinx System Generator Alternative

[Ashwith Rego]

Hi,

I have two questions.

1. Are there any alternatives to Xilinx's System generator? Possibly
something that converts octave or scilab (preferably xcos) code to
VHDL or Verilog.
2. What sort of support is available for SystemVerilog in FEL?

Thanks
Ashwith J. Rego
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