[Bug 468516] Review Request: verilator - A fast simulator of synthesizable Verilog HDL

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https://bugzilla.redhat.com/show_bug.cgi?id=468516





--- Comment #43 from Chitlesh GOORAH <chitlesh at gmail.com>  2009-07-21 04:34:00 EDT ---
Can you give me your Fedora FAS username please ? I will sponsor you.

https://admin.fedoraproject.org/accounts

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