rpms/xorg-x11-drv-ati/devel radeon-modeset.patch, 1.24, 1.25 xorg-x11-drv-ati.spec, 1.131, 1.132
Dave Airlie
airlied at fedoraproject.org
Mon Oct 27 06:56:34 UTC 2008
Author: airlied
Update of /cvs/pkgs/rpms/xorg-x11-drv-ati/devel
In directory cvs1.fedora.phx.redhat.com:/tmp/cvs-serv11338
Modified Files:
radeon-modeset.patch xorg-x11-drv-ati.spec
Log Message:
- move to CS2 mechanism - using chunks to avoid multiple relocations
- add kernel requires about 2.6.27.4-52 for new CS mechanism
radeon-modeset.patch:
Index: radeon-modeset.patch
===================================================================
RCS file: /cvs/pkgs/rpms/xorg-x11-drv-ati/devel/radeon-modeset.patch,v
retrieving revision 1.24
retrieving revision 1.25
diff -u -r1.24 -r1.25
--- radeon-modeset.patch 23 Oct 2008 07:12:07 -0000 1.24
+++ radeon-modeset.patch 27 Oct 2008 06:56:03 -0000 1.25
@@ -1,3 +1,9 @@
+commit 2171a9d834be69e002a93fe440450ff532758e93
+Author: Dave Airlie <airlied at redhat.com>
+Date: Mon Oct 27 16:51:00 2008 +1000
+
+ radeon: add new CS submission scheme
+
commit 3a29ac76d724c9a0ed6f4c2b832178594db94a0a
Author: Dave Airlie <airlied at dhcp-1-203.bne.redhat.com>
Date: Thu Oct 23 17:05:12 2008 +1000
@@ -1445,7 +1451,7 @@
+#endif
+#endif
diff --git a/src/radeon.h b/src/radeon.h
-index f7ae1a8..b179421 100644
+index f7ae1a8..a437b55 100644
--- a/src/radeon.h
+++ b/src/radeon.h
@@ -46,6 +46,8 @@
@@ -1480,7 +1486,7 @@
typedef struct {
uint32_t pci_device_id;
RADEONChipFamily chip_family;
-@@ -414,6 +425,25 @@ typedef struct {
+@@ -414,7 +425,27 @@ typedef struct {
int singledac;
} RADEONCardInfo;
@@ -1504,19 +1510,22 @@
+};
+
#ifdef XF86DRI
++
struct radeon_cp {
Bool CPRuns; /* CP is running */
-@@ -428,6 +458,9 @@ struct radeon_cp {
+ Bool CPInUse; /* CP has been used by X server */
+@@ -428,6 +459,10 @@ struct radeon_cp {
drmBufPtr indirectBuffer;
int indirectStart;
+ drmBuf ib_gem_fake;
+ void *ib_ptr;
-+
++
++ struct radeon_relocs_info relocs;
/* Debugging info for BEGIN_RING/ADVANCE_RING pairs. */
int dma_begin_count;
char *dma_debug_func;
-@@ -494,13 +527,13 @@ struct radeon_dri {
+@@ -494,13 +529,13 @@ struct radeon_dri {
drm_handle_t ringHandle; /* Handle from drmAddMap */
drmSize ringMapSize; /* Size of map */
int ringSize; /* Size of ring (in MB) */
@@ -1532,7 +1541,7 @@
/* CP vertex/indirect buffer data */
unsigned long bufStart; /* Offset into GART space */
-@@ -519,7 +552,6 @@ struct radeon_dri {
+@@ -519,7 +554,6 @@ struct radeon_dri {
drmAddress gartTex; /* Map */
int log2GARTTexGran;
@@ -1540,7 +1549,7 @@
int fbX;
int fbY;
int backX;
-@@ -836,6 +868,44 @@ typedef struct {
+@@ -836,6 +870,44 @@ typedef struct {
Bool r600_shadow_fb;
void *fb_shadow;
@@ -1585,7 +1594,7 @@
} RADEONInfoRec, *RADEONInfoPtr;
#define RADEONWaitForFifo(pScrn, entries) \
-@@ -1078,6 +1148,23 @@ extern void
+@@ -1078,6 +1150,23 @@ extern void
radeon_legacy_free_memory(ScrnInfoPtr pScrn,
void *mem_struct);
@@ -1609,7 +1618,7 @@
#ifdef XF86DRI
# ifdef USE_XAA
/* radeon_accelfuncs.c */
-@@ -1096,7 +1183,9 @@ do { \
+@@ -1096,7 +1185,9 @@ do { \
#define RADEONCP_RELEASE(pScrn, info) \
do { \
@@ -1620,7 +1629,7 @@
RADEON_PURGE_CACHE(); \
RADEON_WAIT_UNTIL_IDLE(); \
RADEONCPReleaseIndirect(pScrn); \
-@@ -1130,7 +1219,7 @@ do { \
+@@ -1130,7 +1221,7 @@ do { \
#define RADEONCP_REFRESH(pScrn, info) \
do { \
@@ -1629,7 +1638,7 @@
if (info->cp->needCacheFlush) { \
RADEON_PURGE_CACHE(); \
RADEON_PURGE_ZCACHE(); \
-@@ -1157,6 +1246,13 @@ do { \
+@@ -1157,6 +1248,13 @@ do { \
#define RING_LOCALS uint32_t *__head = NULL; int __expected; int __count = 0
#define BEGIN_RING(n) do { \
@@ -1643,7 +1652,7 @@
if (RADEON_VERBOSE) { \
xf86DrvMsg(pScrn->scrnIndex, X_INFO, \
"BEGIN_RING(%d) in %s\n", (unsigned int)n, __FUNCTION__);\
-@@ -1169,13 +1265,6 @@ do { \
+@@ -1169,13 +1267,6 @@ do { \
} \
info->cp->dma_debug_func = __FILE__; \
info->cp->dma_debug_lineno = __LINE__; \
@@ -1657,7 +1666,7 @@
__expected = n; \
__head = (pointer)((char *)info->cp->indirectBuffer->address + \
info->cp->indirectBuffer->used); \
-@@ -1218,6 +1307,14 @@ do { \
+@@ -1218,6 +1309,14 @@ do { \
OUT_RING(val); \
} while (0)
@@ -1665,7 +1674,7 @@
+ is in VRAM */
+#define OUT_RING_RELOC(x, read_domains, write_domains) \
+ do { \
-+ radeon_bufmgr_emit_reloc(x, __head, &__count, read_domains, write_domains); \
++ radeon_bufmgr_emit_reloc(x, &info->cp->relocs, __head, &__count, read_domains, write_domains); \
+ } while(0)
+
+
@@ -1673,7 +1682,7 @@
do { \
if (RADEON_VERBOSE) \
diff --git a/src/radeon_accel.c b/src/radeon_accel.c
-index a6e332d..f0a81c8 100644
+index a6e332d..a22181f 100644
--- a/src/radeon_accel.c
+++ b/src/radeon_accel.c
@@ -311,6 +311,9 @@ void RADEONEngineRestore(ScrnInfoPtr pScrn)
@@ -1809,7 +1818,7 @@
switch (info->CurrentLayout.pixel_code) {
case 8: datatype = 2; break;
-@@ -550,6 +556,76 @@ int RADEONCPStop(ScrnInfoPtr pScrn, RADEONInfoPtr info)
+@@ -550,6 +556,146 @@ int RADEONCPStop(ScrnInfoPtr pScrn, RADEONInfoPtr info)
}
}
@@ -1818,15 +1827,84 @@
+{
+ RADEONInfoPtr info = RADEONPTR(pScrn);
+
-+ info->cp->ib_gem_fake.address = xcalloc(1, RADEON_BUFFER_SIZE);
-+ if (!info->cp->ib_gem_fake.address)
++ info->cp->relocs.size = getpagesize();
++ info->cp->relocs.num_reloc = 0;
++ info->cp->relocs.buf = xcalloc(1, info->cp->relocs.size);
++ if (!info->cp->relocs.buf)
+ return NULL;
++ info->cp->ib_gem_fake.address = xcalloc(1, RADEON_BUFFER_SIZE);
++ if (!info->cp->ib_gem_fake.address) {
++ xfree(info->cp->relocs.buf);
++ return NULL;
++ }
++
+
+ info->cp->ib_gem_fake.used = 0;
+ info->cp->ib_gem_fake.total = RADEON_BUFFER_SIZE - RADEON_IB_RESERVE; // reserve 16 dwords
+ return &info->cp->ib_gem_fake;
+}
+
++#ifdef DRM_RADEON_CS2
++void RADEONCSFlushIndirect(ScrnInfoPtr pScrn, int discard)
++{
++ RADEONInfoPtr info = RADEONPTR(pScrn);
++ struct drm_radeon_cs2 args;
++ struct drm_radeon_cs_chunk chunk[2];
++ uint64_t chunk_array[2];
++ int ret;
++ RING_LOCALS;
++
++ /* always add the cache flushes to the end of the IB */
++ info->cp->indirectBuffer->total += RADEON_IB_RESERVE;
++
++ /* end of IB purge caches */
++ if (info->cs_used_depth) {
++ RADEON_PURGE_ZCACHE();
++ info->cs_used_depth = 0;
++ }
++
++ RADEON_PURGE_CACHE();
++ RADEON_WAIT_UNTIL_IDLE();
++
++ chunk[0].chunk_data = (unsigned long)info->cp->ib_gem_fake.address;
++ chunk[0].length_dw = info->cp->indirectBuffer->used / sizeof(uint32_t);
++ chunk[0].chunk_id = RADEON_CHUNK_ID_IB;
++
++ chunk[1].chunk_data = (unsigned long)info->cp->relocs.buf;
++ chunk[1].length_dw = info->cp->relocs.num_reloc * RADEON_RELOC_SIZE;
++ chunk[1].chunk_id = RADEON_CHUNK_ID_RELOCS;
++
++ ErrorF("lengths %d %d\n", chunk[0].length_dw, chunk[1].length_dw);
++
++ chunk_array[0] = (uint64_t)(unsigned long)&chunk[0];
++ chunk_array[1] = (uint64_t)(unsigned long)&chunk[1];
++
++ args.num_chunks = 2;
++ args.chunks = (uint64_t)(unsigned long)chunk_array;
++
++ ret = drmCommandWriteRead(info->dri->drmFD, DRM_RADEON_CS2,
++ &args, sizeof(args));
++
++ if (ret) {
++ FatalError("DRM Command submission failure %d\n", ret);
++ return;
++ }
++
++
++ info->cp->indirectStart = 0;
++ info->cp->indirectBuffer->used = 0;
++ info->cp->indirectBuffer->total -= RADEON_IB_RESERVE;
++
++ if (info->bufmgr)
++ radeon_gem_bufmgr_post_submit(info->bufmgr, &info->cp->relocs);
++
++ info->cp->relocs.num_reloc = 0;
++ /* copy some state into the buffer now - we need to add 2D state to each
++ buffer as the kernel needs to use the blit engine to move stuff around */
++ if (info->reemit_current2d)
++ info->reemit_current2d(pScrn, 0);
++}
++#else
+void RADEONCSFlushIndirect(ScrnInfoPtr pScrn, int discard)
+{
+ RADEONInfoPtr info = RADEONPTR(pScrn);
@@ -1870,6 +1948,7 @@
+ if (info->reemit_current2d)
+ info->reemit_current2d(pScrn, 0);
+}
++#endif
+
+void RADEONCSReleaseIndirect(ScrnInfoPtr pScrn)
+{
@@ -1886,7 +1965,7 @@
/* Get an indirect buffer for the CP 2D acceleration commands */
drmBufPtr RADEONCPGetBuffer(ScrnInfoPtr pScrn)
{
-@@ -560,6 +636,9 @@ drmBufPtr RADEONCPGetBuffer(ScrnInfoPtr pScrn)
+@@ -560,6 +706,9 @@ drmBufPtr RADEONCPGetBuffer(ScrnInfoPtr pScrn)
int size = 0;
int i = 0;
int ret;
@@ -1896,7 +1975,7 @@
#if 0
/* FIXME: pScrn->pScreen has not been initialized when this is first
-@@ -625,6 +704,11 @@ void RADEONCPFlushIndirect(ScrnInfoPtr pScrn, int discard)
+@@ -625,6 +774,11 @@ void RADEONCPFlushIndirect(ScrnInfoPtr pScrn, int discard)
if (!buffer) return;
if (start == buffer->used && !discard) return;
@@ -1908,7 +1987,7 @@
if (RADEON_VERBOSE) {
xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Flushing buffer %d\n",
buffer->idx);
-@@ -659,10 +743,16 @@ void RADEONCPReleaseIndirect(ScrnInfoPtr pScrn)
+@@ -659,10 +813,16 @@ void RADEONCPReleaseIndirect(ScrnInfoPtr pScrn)
int start = info->cp->indirectStart;
drm_radeon_indirect_t indirect;
@@ -1925,7 +2004,7 @@
if (RADEON_VERBOSE) {
xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Releasing buffer %d\n",
-@@ -789,6 +879,7 @@ RADEONHostDataBlit(
+@@ -789,6 +949,7 @@ RADEONHostDataBlit(
ret = ( uint8_t* )&__head[__count];
__count += dwords;
@@ -1933,7 +2012,7 @@
ADVANCE_RING();
*y += *hpass;
-@@ -926,7 +1017,7 @@ Bool RADEONAccelInit(ScreenPtr pScreen)
+@@ -926,7 +1087,7 @@ Bool RADEONAccelInit(ScreenPtr pScreen)
#ifdef USE_EXA
if (info->useEXA) {
# ifdef XF86DRI
@@ -1942,7 +2021,7 @@
if (!RADEONDrawInitCP(pScreen))
return FALSE;
} else
-@@ -947,7 +1038,7 @@ Bool RADEONAccelInit(ScreenPtr pScreen)
+@@ -947,7 +1108,7 @@ Bool RADEONAccelInit(ScreenPtr pScreen)
}
#ifdef XF86DRI
@@ -1951,7 +2030,7 @@
RADEONAccelInitCP(pScreen, a);
else
#endif /* XF86DRI */
-@@ -969,11 +1060,13 @@ void RADEONInit3DEngine(ScrnInfoPtr pScrn)
+@@ -969,11 +1130,13 @@ void RADEONInit3DEngine(ScrnInfoPtr pScrn)
RADEONInfoPtr info = RADEONPTR (pScrn);
#ifdef XF86DRI
@@ -1969,7 +2048,7 @@
RADEONInit3DEngineCP(pScrn);
} else
#endif
-@@ -981,7 +1074,7 @@ void RADEONInit3DEngine(ScrnInfoPtr pScrn)
+@@ -981,7 +1144,7 @@ void RADEONInit3DEngine(ScrnInfoPtr pScrn)
info->accel_state->XInited3D = TRUE;
}
@@ -1980,7 +2059,7 @@
Bool
diff --git a/src/radeon_bufmgr.h b/src/radeon_bufmgr.h
new file mode 100644
-index 0000000..e4e91f8
+index 0000000..5d45aa5
--- /dev/null
+++ b/src/radeon_bufmgr.h
@@ -0,0 +1,28 @@
@@ -1996,7 +2075,7 @@
+#include "radeon_dri_bufmgr.h"
+
+struct radeon_bufmgr {
-+ void (*emit_reloc)(dri_bo *buf, uint32_t *head, uint32_t *count_p, uint32_t read_domains, uint32_t write_domain);
++ void (*emit_reloc)(dri_bo *buf, struct radeon_relocs_info *relocs, uint32_t *head, uint32_t *count_p, uint32_t read_domains, uint32_t write_domain);
+};
+
+dri_bufmgr *radeon_bufmgr_gem_init(int fd);
@@ -2005,7 +2084,7 @@
+dri_bo *radeon_bo_gem_create_from_handle(dri_bufmgr *bufmgr,
+ uint32_t handle, unsigned long size);
+
-+void radeon_bufmgr_emit_reloc(dri_bo *buf, uint32_t *head, uint32_t *count_p, uint32_t read_domains, uint32_t write_domain);
++void radeon_bufmgr_emit_reloc(dri_bo *buf, struct radeon_relocs_info *relocs, uint32_t *head, uint32_t *count_p, uint32_t read_domains, uint32_t write_domain);
+
+dri_bufmgr *radeon_bufmgr_exa_init(ScrnInfoPtr pScrn);
+extern void radeon_bufmgr_exa_wait_rendering(dri_bo *bo);
@@ -2368,10 +2447,10 @@
+#endif
diff --git a/src/radeon_bufmgr_gem.c b/src/radeon_bufmgr_gem.c
new file mode 100644
-index 0000000..48f941d
+index 0000000..1e29981
--- /dev/null
+++ b/src/radeon_bufmgr_gem.c
-@@ -0,0 +1,474 @@
+@@ -0,0 +1,532 @@
+/**************************************************************************
+ *
+ * Copyright © 2007-2008 Red Hat Inc.
@@ -2445,7 +2524,6 @@
+ uint32_t gem_handle;
+ const char *name;
+ struct _dri_bo_gem *next;
-+ struct _dri_bo_gem *reloc_next;
+ int in_vram; /* have we migrated this bo to VRAM ever */
+ int pinned;
+ int touched;
@@ -2457,11 +2535,11 @@
+ dri_bufmgr bufmgr;
+ struct radeon_bufmgr radeon_bufmgr;
+ int fd;
-+ struct _dri_bo_gem *reloc_head;
+ uint32_t vram_limit;
+ uint32_t vram_write_used, gart_write_used;
+ uint32_t read_used;
+
++ struct _dri_bo_gem *bo_list;
+} dri_bufmgr_gem;
+
+static dri_bo *
@@ -2500,6 +2578,9 @@
+ gem_bo->name = name;
+ gem_bo->touched = 0;
+
++ gem_bo->next = bufmgr_gem->bo_list;
++ bufmgr_gem->bo_list = gem_bo;
++
+ DBG("bo_create: buf %d (%s) %ldb\n",
+ gem_bo->gem_handle, gem_bo->name, size);
+
@@ -2516,7 +2597,7 @@
+static void dri_gem_bo_free(dri_bo *bo)
+{
+ dri_bufmgr_gem *bufmgr_gem = (dri_bufmgr_gem *)bo->bufmgr;
-+ dri_bo_gem *gem_bo = (dri_bo_gem *)bo;
++ dri_bo_gem *gem_bo = (dri_bo_gem *)bo, *trav, *prev;
+ struct drm_gem_close args;
+
+ if (gem_bo->map_count)
@@ -2525,6 +2606,21 @@
+ /* close object */
+ args.handle = gem_bo->gem_handle;
+ ioctl(bufmgr_gem->fd, DRM_IOCTL_GEM_CLOSE, &args);
++
++ if (gem_bo == bufmgr_gem->bo_list)
++ bufmgr_gem->bo_list = gem_bo->next;
++ else {
++ prev = trav = bufmgr_gem->bo_list;
++ while (trav) {
++ if (trav == gem_bo) {
++ if (prev)
++ prev->next = trav->next;
++ break;
++ }
++ prev = trav;
++ trav = trav->next;
++ }
++ }
+ free(gem_bo);
+}
+
@@ -2556,7 +2652,7 @@
+ if (gem_bo->map_count++ != 0)
+ return 0;
+
-+ gem_bo->touched = 1;
++ gem_bo->touched = 1;
+ args.handle = gem_bo->gem_handle;
+ args.offset = 0;
+ args.size = gem_bo->bo.size;
@@ -2659,27 +2755,67 @@
+ __head[__count++] = (x); \
+ } while (0)
+
-+void radeon_bufmgr_gem_emit_reloc(dri_bo *buf, uint32_t *head, uint32_t *count_p, uint32_t read_domains, uint32_t write_domain)
++void radeon_bufmgr_gem_emit_reloc(dri_bo *buf, struct radeon_relocs_info *reloc_info, uint32_t *head, uint32_t *count_p, uint32_t read_domains, uint32_t write_domain)
+{
+ dri_bufmgr_gem *bufmgr_gem = (dri_bufmgr_gem *)buf->bufmgr;
+ dri_bo_gem *gem_bo = (dri_bo_gem *)buf;
+ uint32_t *__head = head;
+ uint32_t __count = *count_p;
+ dri_bo_gem *trav;
-+
-+ if (gem_bo->reloc_count == 0) {
-+ dri_bo_reference(buf);
++ int i;
++ int index;
++ int have_reloc = -1;
+
-+ if (bufmgr_gem->reloc_head == NULL)
-+ bufmgr_gem->reloc_head = gem_bo;
-+ else {
-+ trav = bufmgr_gem->reloc_head;
-+ while (trav->reloc_next != NULL)
-+ trav = trav->reloc_next;
-+ trav->reloc_next = gem_bo;
++ for (i = 0; i < reloc_info->num_reloc; i++) {
++ if (reloc_info->buf[i * 4] == gem_bo->gem_handle) {
++ have_reloc = i;
++ break;
+ }
+ }
+
++ if (have_reloc != -1) {
++ uint32_t old_write, old_read;
++
++ index = have_reloc * 4;
++ old_read = reloc_info->buf[index + 1];
++ old_write = reloc_info->buf[index + 2];
++
++ /* error up for now - work out new domains - if we have a write */
++ if (write_domain && (old_read & write_domain)) {
++ reloc_info->buf[index + 1] = 0;
++ reloc_info->buf[index + 2] = write_domain;
++ } else if (read_domains & old_write) {
++ reloc_info->buf[index + 1] = 0;
++ } else {
++ /* rewrite the domains */
++ if (write_domain != old_write)
++ ErrorF("WRITE DOMAIN RELOC FAILURE 0x%x %d %d\n", gem_bo->gem_handle, write_domain, old_write);
++ if (read_domains != old_read)
++ ErrorF("READ DOMAIN RELOC FAILURE 0x%x %d %d\n", gem_bo->gem_handle, read_domains, old_read);
++ }
++ reloc_info->buf[index + 3]++;
++
++ } else {
++
++ if ((reloc_info->num_reloc + 1) * RADEON_RELOC_SIZE > reloc_info->size) {
++ /* resize the buffer */
++ reloc_info->size += getpagesize();
++ reloc_info->buf = xrealloc(reloc_info->buf, reloc_info->size);
++ if (!reloc_info->buf)
++ FatalError("failed to increase reloc buffer size\n");
++ }
++
++ dri_bo_reference(buf);
++ gem_bo->touched = 1;
++
++ index = reloc_info->num_reloc * 4;
++ reloc_info->buf[index] = gem_bo->gem_handle;
++ reloc_info->buf[index + 1] = read_domains;
++ reloc_info->buf[index + 2] = write_domain;
++ reloc_info->buf[index + 3] = 1;
++ reloc_info->num_reloc++;
++ }
++
+ if (write_domain == RADEON_GEM_DOMAIN_VRAM) {
+ if (gem_bo->in_vram == 0)
+ DBG("bo_into vram: buf %d (%s) %d %d\n",
@@ -2688,12 +2824,8 @@
+ gem_bo->in_vram = 1;
+ }
+
-+ gem_bo->touched = 1;
-+ gem_bo->reloc_count++;
-+ BUF_OUT_RING(CP_PACKET3(RADEON_CP_PACKET3_NOP, 2));
-+ BUF_OUT_RING(gem_bo->gem_handle);
-+ BUF_OUT_RING(read_domains);
-+ BUF_OUT_RING(write_domain);
++ BUF_OUT_RING(CP_PACKET3(RADEON_CP_PACKET3_NOP, 0));
++ BUF_OUT_RING(index);
+ *count_p = __count;
+}
+
@@ -2798,24 +2930,29 @@
+}
+
+
-+void radeon_gem_bufmgr_post_submit(dri_bufmgr *bufmgr)
++void radeon_gem_bufmgr_post_submit(dri_bufmgr *bufmgr, struct radeon_relocs_info *reloc_info)
+{
+ dri_bufmgr_gem *bufmgr_gem = (dri_bufmgr_gem *)bufmgr;
+ struct _dri_bo_gem *trav, *prev;
-+ if (!bufmgr_gem->reloc_head)
++ int i;
++
++ if (!bufmgr_gem->bo_list)
+ return;
+
-+ trav = bufmgr_gem->reloc_head;
-+ while (trav) {
-+ prev = trav;
-+ trav = trav->reloc_next;
-+
-+ prev->reloc_count = 0;
-+ prev->reloc_next = NULL;
-+ prev->space_accounted = 0;
-+ dri_bo_unreference(&prev->bo);
++ for (i = 0; i < reloc_info->num_reloc; i++) {
++ trav = bufmgr_gem->bo_list;
++ while (trav) {
++ prev = trav;
++ trav = trav->next;
++
++ if (prev->gem_handle == reloc_info->buf[i * 4]) {
++ prev->space_accounted = 0;
++ dri_bo_unreference(&prev->bo);
++ }
++ }
+ }
-+ bufmgr_gem->reloc_head = NULL;
++
++// bufmgr_gem->reloc_head = NULL;
+ bufmgr_gem->read_used = 0;
+ bufmgr_gem->vram_write_used = 0;
+
@@ -2823,12 +2960,12 @@
+
+
+
-+void radeon_bufmgr_emit_reloc(dri_bo *buf, uint32_t *head, uint32_t *count_p, uint32_t read_domains, uint32_t write_domain)
++void radeon_bufmgr_emit_reloc(dri_bo *buf, struct radeon_relocs_info *relocs, uint32_t *head, uint32_t *count_p, uint32_t read_domains, uint32_t write_domain)
+{
+ struct radeon_bufmgr *radeon_bufmgr;
+
+ radeon_bufmgr = (struct radeon_bufmgr *)(buf->bufmgr + 1);
-+ radeon_bufmgr->emit_reloc(buf, head, count_p, read_domains, write_domain);
++ radeon_bufmgr->emit_reloc(buf, relocs, head, count_p, read_domains, write_domain);
+}
+
+/* if the buffer is references by the current IB we need to flush the IB */
@@ -2848,7 +2985,7 @@
+}
diff --git a/src/radeon_bufmgr_gem.h b/src/radeon_bufmgr_gem.h
new file mode 100644
-index 0000000..93ed653
+index 0000000..e4f074c
--- /dev/null
+++ b/src/radeon_bufmgr_gem.h
@@ -0,0 +1,15 @@
@@ -2859,8 +2996,8 @@
+
+extern void radeon_bufmgr_gem_wait_rendering(dri_bo *bo);
+extern dri_bo *radeon_bufmgr_gem_create_bo(dri_bufmgr *bufmgr, struct radeon_memory *mem);
-+void radeon_bufmgr_gem_emit_reloc(dri_bo *bo, uint32_t *head, uint32_t *count_p, uint32_t read_domains, uint32_t write_domain);
-+void radeon_bufmgr_post_submit(dri_bufmgr *bufmgr);
++void radeon_bufmgr_gem_emit_reloc(dri_bo *bo, struct radeon_relocs_info *reloc_info, uint32_t *head, uint32_t *count_p, uint32_t read_domains, uint32_t write_domain);
++void radeon_gem_bufmgr_post_submit(dri_bufmgr *bufmgr, struct radeon_relocs_info *reloc_info);
+void radeon_bufmgr_pin(dri_bo *buf);
+void radeon_bufmgr_unpin(dri_bo *buf);
+uint32_t radeon_bufmgr_get_handle(dri_bo *buf);
@@ -3872,10 +4009,10 @@
+}
diff --git a/src/radeon_dri_bufmgr.h b/src/radeon_dri_bufmgr.h
new file mode 100644
-index 0000000..dd61237
+index 0000000..041671f
--- /dev/null
+++ b/src/radeon_dri_bufmgr.h
-@@ -0,0 +1,270 @@
+@@ -0,0 +1,279 @@
+/**************************************************************************
+ *
+ * Copyright © 2007 Intel Corporation
@@ -3918,6 +4055,15 @@
+typedef struct _dri_bo dri_bo;
+typedef struct _dri_fence dri_fence;
+
++/* reloc format */
++/* gem handle, read_domains, write_domain, reloc_count */
++#define RADEON_RELOC_SIZE 4
++struct radeon_relocs_info {
++ uint32_t *buf;
++ int size;
++ int num_reloc;
++};
++
+struct _dri_bo {
+ /** Size in bytes of the buffer object. */
+ unsigned long size;
@@ -5364,7 +5510,7 @@
pScrn->vtSema = FALSE;
diff --git a/src/radeon_drm.h b/src/radeon_drm.h
-index 66cefb7..ce20c59 100644
+index 66cefb7..18bad6b 100644
--- a/src/radeon_drm.h
+++ b/src/radeon_drm.h
@@ -303,7 +303,6 @@ typedef union {
@@ -5391,7 +5537,7 @@
} drm_radeon_sarea_t;
/* WARNING: If you change any of these defines, make sure to change the
-@@ -494,6 +502,18 @@ typedef struct {
+@@ -494,6 +502,19 @@ typedef struct {
#define DRM_RADEON_SURF_ALLOC 0x1a
#define DRM_RADEON_SURF_FREE 0x1b
@@ -5406,11 +5552,12 @@
+#define DRM_RADEON_GEM_INDIRECT 0x24 // temporary for X server
+
+#define DRM_RADEON_CS 0x25
++#define DRM_RADEON_CS2 0x26
+
#define DRM_IOCTL_RADEON_CP_INIT DRM_IOW( DRM_COMMAND_BASE + DRM_RADEON_CP_INIT, drm_radeon_init_t)
#define DRM_IOCTL_RADEON_CP_START DRM_IO( DRM_COMMAND_BASE + DRM_RADEON_CP_START)
#define DRM_IOCTL_RADEON_CP_STOP DRM_IOW( DRM_COMMAND_BASE + DRM_RADEON_CP_STOP, drm_radeon_cp_stop_t)
-@@ -522,16 +542,28 @@ typedef struct {
+@@ -522,16 +543,29 @@ typedef struct {
#define DRM_IOCTL_RADEON_SURF_ALLOC DRM_IOW( DRM_COMMAND_BASE + DRM_RADEON_SURF_ALLOC, drm_radeon_surface_alloc_t)
#define DRM_IOCTL_RADEON_SURF_FREE DRM_IOW( DRM_COMMAND_BASE + DRM_RADEON_SURF_FREE, drm_radeon_surface_free_t)
@@ -5425,6 +5572,7 @@
+#define DRM_IOCTL_RADEON_GEM_INDIRECT DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_GEM_INDIRECT, struct drm_radeon_gem_indirect)
+
+#define DRM_IOCTL_RADEON_CS DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_CS, struct drm_radeon_cs)
++#define DRM_IOCTL_RADEON_CS2 DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_CS2, struct drm_radeon_cs2)
+
+
typedef struct drm_radeon_init {
@@ -5442,7 +5590,7 @@
int cp_mode;
int gart_size;
int ring_size;
-@@ -543,9 +575,8 @@ typedef struct drm_radeon_init {
+@@ -543,9 +577,8 @@ typedef struct drm_radeon_init {
unsigned int depth_bpp;
unsigned int depth_offset, depth_pitch;
@@ -5454,7 +5602,7 @@
unsigned long ring_offset;
unsigned long ring_rptr_offset;
unsigned long buffers_offset;
-@@ -581,7 +612,7 @@ typedef struct drm_radeon_clear {
+@@ -581,7 +614,7 @@ typedef struct drm_radeon_clear {
unsigned int clear_depth;
unsigned int color_mask;
unsigned int depth_mask; /* misnamed field: should be stencil */
@@ -5463,7 +5611,7 @@
} drm_radeon_clear_t;
typedef struct drm_radeon_vertex {
-@@ -607,9 +638,9 @@ typedef struct drm_radeon_vertex2 {
+@@ -607,9 +640,9 @@ typedef struct drm_radeon_vertex2 {
int idx; /* Index of vertex buffer */
int discard; /* Client finished with buffer? */
int nr_states;
@@ -5475,7 +5623,7 @@
} drm_radeon_vertex2_t;
/* v1.3 - obsoletes drm_radeon_vertex2
-@@ -624,15 +655,15 @@ typedef struct drm_radeon_vertex2 {
+@@ -624,15 +657,15 @@ typedef struct drm_radeon_vertex2 {
*/
typedef struct drm_radeon_cmd_buffer {
int bufsz;
@@ -5494,7 +5642,7 @@
} drm_radeon_tex_image_t;
typedef struct drm_radeon_texture {
-@@ -641,11 +672,11 @@ typedef struct drm_radeon_texture {
+@@ -641,11 +674,11 @@ typedef struct drm_radeon_texture {
int format;
int width; /* Texture image coordinates */
int height;
@@ -5508,7 +5656,7 @@
} drm_radeon_stipple_t;
typedef struct drm_radeon_indirect {
-@@ -655,9 +686,6 @@ typedef struct drm_radeon_indirect {
+@@ -655,9 +688,6 @@ typedef struct drm_radeon_indirect {
int discard;
} drm_radeon_indirect_t;
@@ -5518,7 +5666,7 @@
/* enum for card type parameters */
#define RADEON_CARD_PCI 0
#define RADEON_CARD_AGP 1
-@@ -683,10 +711,11 @@ typedef struct drm_radeon_indirect {
+@@ -683,10 +713,11 @@ typedef struct drm_radeon_indirect {
#define RADEON_PARAM_VBLANK_CRTC 13 /* VBLANK CRTC */
#define RADEON_PARAM_FB_LOCATION 14 /* FB location */
#define RADEON_PARAM_NUM_GB_PIPES 15 /* num GB pipes */
@@ -5531,7 +5679,7 @@
} drm_radeon_getparam_t;
/* 1.6: Set up a memory manager for regions of shared memory:
-@@ -698,7 +727,7 @@ typedef struct drm_radeon_mem_alloc {
+@@ -698,7 +729,7 @@ typedef struct drm_radeon_mem_alloc {
int region;
int alignment;
int size;
@@ -5540,7 +5688,7 @@
} drm_radeon_mem_alloc_t;
typedef struct drm_radeon_mem_free {
-@@ -715,7 +744,7 @@ typedef struct drm_radeon_mem_init_heap {
+@@ -715,7 +746,7 @@ typedef struct drm_radeon_mem_init_heap {
/* 1.6: Userspace can request & wait on irq's:
*/
typedef struct drm_radeon_irq_emit {
@@ -5549,7 +5697,7 @@
} drm_radeon_irq_emit_t;
typedef struct drm_radeon_irq_wait {
-@@ -734,10 +763,10 @@ typedef struct drm_radeon_setparam {
+@@ -734,10 +765,10 @@ typedef struct drm_radeon_setparam {
#define RADEON_SETPARAM_FB_LOCATION 1 /* determined framebuffer location */
#define RADEON_SETPARAM_SWITCH_TILING 2 /* enable/disable color tiling */
#define RADEON_SETPARAM_PCIGART_LOCATION 3 /* PCI Gart Location */
@@ -5561,7 +5709,7 @@
/* 1.14: Clients can allocate/free a surface
*/
typedef struct drm_radeon_surface_alloc {
-@@ -753,4 +782,102 @@ typedef struct drm_radeon_surface_free {
+@@ -753,4 +784,117 @@ typedef struct drm_radeon_surface_free {
#define DRM_RADEON_VBLANK_CRTC1 1
#define DRM_RADEON_VBLANK_CRTC2 2
@@ -5655,11 +5803,26 @@
+
+
+struct drm_radeon_cs {
-+// uint32_t *packets;
+ uint32_t dwords;
+ uint32_t cs_id;
+ uint64_t packets;
++};
++
++#define RADEON_CHUNK_ID_RELOCS 0x01
++#define RADEON_CHUNK_ID_IB 0x02
++#define RADEON_CHUNK_ID_OLD 0xff
++
++struct drm_radeon_cs_chunk {
++ uint32_t chunk_id;
++ uint32_t length_dw;
++ uint64_t chunk_data;
++};
+
++struct drm_radeon_cs2 {
++ uint32_t num_chunks;
++ uint32_t cs_id;
++ uint64_t chunks; /* this points to uint64_t * which point to
++ cs chunks */
+};
+
+
@@ -6202,7 +6365,7 @@
}
#endif
diff --git a/src/radeon_exa_funcs.c b/src/radeon_exa_funcs.c
-index 62224d0..4c97c35 100644
+index 62224d0..ccb5fe4 100644
--- a/src/radeon_exa_funcs.c
+++ b/src/radeon_exa_funcs.c
@@ -74,21 +74,71 @@ FUNC_NAME(RADEONSync)(ScreenPtr pScreen, int marker)
@@ -6236,8 +6399,8 @@
+
+ has_src = info->state_2d.src_pitch_offset || (info->new_cs && info->state_2d.src_bo);
+
-+ qwords = info->new_cs ? 11 : 9;
-+ qwords += (has_src ? (info->new_cs ? 3 : 1) : 0);
++ qwords = info->new_cs ? 10 : 9;
++ qwords += (has_src ? (info->new_cs ? 2 : 1) : 0);
+
+ BEGIN_ACCEL(qwords);
+ OUT_ACCEL_REG(RADEON_DEFAULT_SC_BOTTOM_RIGHT, info->state_2d.default_sc_bottom_right);
@@ -6551,7 +6714,7 @@
- BEGIN_ACCEL(6);
+ qwords = 6;
+ if (src_bo && dst_bo)
-+ qwords += 4;
++ qwords += 2;
+
+ BEGIN_ACCEL(qwords);
OUT_ACCEL_REG(RADEON_DP_GUI_MASTER_CNTL,
@@ -6763,7 +6926,7 @@
xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Setting EXA maxPitchBytes\n");
diff --git a/src/radeon_exa_render.c b/src/radeon_exa_render.c
-index 97199ae..72c095c 100644
+index 97199ae..c19ca0b 100644
--- a/src/radeon_exa_render.c
+++ b/src/radeon_exa_render.c
@@ -355,12 +355,14 @@ static Bool FUNC_NAME(R100TextureSetup)(PicturePtr pPict, PixmapPtr pPix,
@@ -6788,7 +6951,7 @@
txfilter |= RADEON_CLAMP_S_WRAP | RADEON_CLAMP_T_WRAP;
- BEGIN_ACCEL(5);
-+ qwords = info->new_cs ? 7 : 5;
++ qwords = info->new_cs ? 6 : 5;
+ BEGIN_ACCEL(qwords);
if (unit == 0) {
OUT_ACCEL_REG(RADEON_PP_TXFILTER_0, txfilter);
@@ -6864,7 +7027,7 @@
-
- BEGIN_ACCEL(8);
+
-+ qwords = info->new_cs ? 10 : 8;
++ qwords = info->new_cs ? 9 : 8;
+ BEGIN_ACCEL(qwords);
OUT_ACCEL_REG(RADEON_PP_CNTL, pp_cntl);
OUT_ACCEL_REG(RADEON_RB3D_CNTL, dst_format | RADEON_ALPHA_BLEND_ENABLE);
@@ -6906,7 +7069,7 @@
txfilter |= R200_CLAMP_S_WRAP | R200_CLAMP_T_WRAP;
- BEGIN_ACCEL(6);
-+ qwords = info->new_cs ? 8 : 6;
++ qwords = info->new_cs ? 7 : 6;
+ BEGIN_ACCEL(qwords);
if (unit == 0) {
OUT_ACCEL_REG(R200_PP_TXFILTER_0, txfilter);
@@ -6977,7 +7140,7 @@
RADEON_SWITCH_TO_3D();
- BEGIN_ACCEL(11);
-+ qwords = info->new_cs ? 13 : 11;
++ qwords = info->new_cs ? 12 : 11;
+ BEGIN_ACCEL(qwords);
OUT_ACCEL_REG(RADEON_PP_CNTL, pp_cntl);
@@ -7026,7 +7189,7 @@
- BEGIN_ACCEL(pPict->repeat ? 6 : 7);
+ qwords = pPict->repeat ? 6 : 7;
-+ qwords += info->new_cs ? 2 : 0;
++ qwords += info->new_cs ? 1 : 0;
+
+ BEGIN_ACCEL(qwords);
OUT_ACCEL_REG(R300_TX_FILTER0_0 + (unit * 4), txfilter);
@@ -7133,7 +7296,7 @@
}
- BEGIN_ACCEL(3);
-+ qwords = info->new_cs ? 5 : 3;
++ qwords = info->new_cs ? 4 : 3;
+ BEGIN_ACCEL(qwords);
+ if (info->new_cs) {
+ driver_priv = exaGetPixmapDriverPrivate(pDst);
@@ -7767,7 +7930,7 @@
else
#endif
diff --git a/src/radeon_textured_videofuncs.c b/src/radeon_textured_videofuncs.c
-index c5ad0e1..631bf25 100644
+index c5ad0e1..61fecc8 100644
--- a/src/radeon_textured_videofuncs.c
+++ b/src/radeon_textured_videofuncs.c
@@ -95,6 +95,8 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv
@@ -7813,7 +7976,7 @@
txoffset = pPriv->src_offset;
- BEGIN_ACCEL(6);
-+ qwords = info->new_cs ? 8 : 6;
++ qwords = info->new_cs ? 7 : 6;
+ BEGIN_ACCEL(qwords);
OUT_ACCEL_REG(R300_TX_FILTER0_0, txfilter);
OUT_ACCEL_REG(R300_TX_FILTER1_0, 0);
@@ -7836,7 +7999,7 @@
(1 << R300_TX_ID_SHIFT));
- BEGIN_ACCEL(6);
-+ qwords = info->new_cs ? 8 : 6;
++ qwords = info->new_cs ? 7 : 6;
+ BEGIN_ACCEL(qwords);
OUT_ACCEL_REG(R300_TX_FILTER0_1, txfilter);
OUT_ACCEL_REG(R300_TX_FILTER1_1, 0);
@@ -7858,7 +8021,7 @@
}
- BEGIN_ACCEL(6);
-+ qwords = info->new_cs ? 8 : 6;
++ qwords = info->new_cs ? 7 : 6;
+ BEGIN_ACCEL(qwords);
OUT_ACCEL_REG(R300_TX_INVALTAGS, 0);
OUT_ACCEL_REG(R300_TX_ENABLE, txenable);
Index: xorg-x11-drv-ati.spec
===================================================================
RCS file: /cvs/pkgs/rpms/xorg-x11-drv-ati/devel/xorg-x11-drv-ati.spec,v
retrieving revision 1.131
retrieving revision 1.132
diff -u -r1.131 -r1.132
--- xorg-x11-drv-ati.spec 23 Oct 2008 07:12:07 -0000 1.131
+++ xorg-x11-drv-ati.spec 27 Oct 2008 06:56:03 -0000 1.132
@@ -5,7 +5,7 @@
Summary: Xorg X11 ati video driver
Name: xorg-x11-drv-ati
Version: 6.9.0
-Release: 31%{?dist}
+Release: 32%{?dist}
URL: http://www.x.org
License: MIT
Group: User Interface/X Hardware Support
@@ -31,6 +31,8 @@
Requires: hwdata
Requires: xorg-x11-server-Xorg >= 1.4.99.1
Requires: libdrm >= 2.4.0-0.21
+# new CS method needs newer kernel
+Requires: kernel >= 2.6.27.4-52
%description
X.Org X11 ati video driver.
@@ -72,6 +74,10 @@
%{_mandir}/man4/radeon.4*
%changelog
+* Mon Oct 27 2008 Dave Airlie <airlied at redhat.com> 6.9.0-32
+- move to CS2 mechanism - using chunks to avoid multiple relocations
+- add kernel requires about 2.6.27.4-52 for new CS mechanism
+
* Thu Oct 23 2008 Dave Airlie <airlied at redhat.com> 6.9.0-31
- limit VRAM usage in driver - not perfect but a good start
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