rpms/kernel/devel drm-intel-next.patch, 1.7, 1.8 drm-intel-pm.patch, 1.3, 1.4 kernel.spec, 1.1685, 1.1686 drm-intel-gen3-fb-hack.patch, 1.2, NONE linux-2.6.30-intel-watermark-fix.patch, 1.1, NONE
Adam Jackson
ajax at fedoraproject.org
Mon Aug 3 18:24:04 UTC 2009
Author: ajax
Update of /cvs/pkgs/rpms/kernel/devel
In directory cvs1.fedora.phx.redhat.com:/tmp/cvs-serv21435
Modified Files:
drm-intel-pm.patch kernel.spec
Added Files:
drm-intel-next.patch
Removed Files:
drm-intel-gen3-fb-hack.patch
linux-2.6.30-intel-watermark-fix.patch
Log Message:
* Mon Aug 03 2009 Adam Jackson <ajax at redhat.com>
- Update intel drm from anholt's tree
- Rebase drm-intel-pm.patch to match
- Drop gen3 fb hack, merged
- Drop previous watermark setup change
drm-intel-next.patch:
i915_drv.h | 3
i915_gem_debugfs.c | 2
i915_irq.c | 232 +++++++++++-----
i915_reg.h | 45 +++
intel_bios.c | 40 ++
intel_bios.h | 45 +++
intel_crt.c | 12
intel_display.c | 759 +++++++++++++++++++++++++++++++++++------------------
intel_dp.c | 216 +++++++++++++--
intel_drv.h | 3
intel_hdmi.c | 64 ----
intel_lvds.c | 12
intel_sdvo.c | 254 ++++++++++++-----
intel_tv.c | 22 +
14 files changed, 1202 insertions(+), 507 deletions(-)
View full diff with command:
/usr/bin/cvs -n -f diff -kk -u -p -N -r 1.7 -r 1.8 drm-intel-next.patchIndex: drm-intel-next.patch
===================================================================
RCS file: drm-intel-next.patch
diff -N drm-intel-next.patch
--- /dev/null 1 Jan 1970 00:00:00 -0000
+++ drm-intel-next.patch 3 Aug 2009 18:24:04 -0000 1.8
@@ -0,0 +1,2555 @@
+diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
+index d087528..5f3a259 100644
+--- a/drivers/gpu/drm/i915/i915_drv.h
++++ b/drivers/gpu/drm/i915/i915_drv.h
+@@ -219,6 +219,7 @@ typedef struct drm_i915_private {
+ unsigned int lvds_vbt:1;
+ unsigned int int_crt_support:1;
+ unsigned int lvds_use_ssc:1;
++ unsigned int edp_support:1;
+ int lvds_ssc_freq;
+
+ struct drm_i915_fence_reg fence_regs[16]; /* assume 965 */
+@@ -229,6 +230,7 @@ typedef struct drm_i915_private {
+
+ spinlock_t error_lock;
+ struct drm_i915_error_state *first_error;
++ struct work_struct error_work;
+
+ /* Register state */
+ u8 saveLBB;
+@@ -888,6 +890,7 @@ extern int i915_wait_ring(struct drm_device * dev, int n, const char *caller);
+ IS_I915GM(dev)))
+ #define SUPPORTS_INTEGRATED_HDMI(dev) (IS_G4X(dev) || IS_IGDNG(dev))
+ #define SUPPORTS_INTEGRATED_DP(dev) (IS_G4X(dev) || IS_IGDNG(dev))
++#define SUPPORTS_EDP(dev) (IS_IGDNG_M(dev))
+ #define I915_HAS_HOTPLUG(dev) (IS_I945G(dev) || IS_I945GM(dev) || IS_I965G(dev))
+ /* dsparb controlled by hw only */
+ #define DSPARB_HWCONTROL(dev) (IS_G4X(dev) || IS_IGDNG(dev))
+diff --git a/drivers/gpu/drm/i915/i915_gem_debugfs.c b/drivers/gpu/drm/i915/i915_gem_debugfs.c
+index 9a44bfc..cb3b974 100644
+--- a/drivers/gpu/drm/i915/i915_gem_debugfs.c
++++ b/drivers/gpu/drm/i915/i915_gem_debugfs.c
+@@ -343,6 +343,8 @@ static int i915_error_state(struct seq_file *m, void *unused)
+
+ error = dev_priv->first_error;
+
++ seq_printf(m, "Time: %ld s %ld us\n", error->time.tv_sec,
++ error->time.tv_usec);
+ seq_printf(m, "EIR: 0x%08x\n", error->eir);
+ seq_printf(m, " PGTBL_ER: 0x%08x\n", error->pgtbl_er);
+ seq_printf(m, " INSTPM: 0x%08x\n", error->instpm);
+diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
+index 7ba23a6..f340b3f 100644
+--- a/drivers/gpu/drm/i915/i915_irq.c
++++ b/drivers/gpu/drm/i915/i915_irq.c
+@@ -290,6 +290,35 @@ irqreturn_t igdng_irq_handler(struct drm_device *dev)
+ return ret;
+ }
+
++/**
++ * i915_error_work_func - do process context error handling work
++ * @work: work struct
++ *
++ * Fire an error uevent so userspace can see that a hang or error
++ * was detected.
++ */
++static void i915_error_work_func(struct work_struct *work)
++{
++ drm_i915_private_t *dev_priv = container_of(work, drm_i915_private_t,
++ error_work);
++ struct drm_device *dev = dev_priv->dev;
++ char *event_string = "ERROR=1";
++ char *envp[] = { event_string, NULL };
++
++ DRM_DEBUG("generating error event\n");
++
++ kobject_uevent_env(&dev->primary->kdev.kobj, KOBJ_CHANGE, envp);
++}
++
++/**
++ * i915_capture_error_state - capture an error record for later analysis
++ * @dev: drm device
++ *
++ * Should be called when an error is detected (either a hang or an error
++ * interrupt) to capture error state from the time of the error. Fills
++ * out a structure which becomes available in debugfs for user level tools
++ * to pick up.
++ */
+ static void i915_capture_error_state(struct drm_device *dev)
+ {
+ struct drm_i915_private *dev_priv = dev->dev_private;
+@@ -325,12 +354,137 @@ static void i915_capture_error_state(struct drm_device *dev)
+ error->acthd = I915_READ(ACTHD_I965);
+ }
+
++ do_gettimeofday(&error->time);
++
+ dev_priv->first_error = error;
+
+ out:
+ spin_unlock_irqrestore(&dev_priv->error_lock, flags);
+ }
+
++/**
++ * i915_handle_error - handle an error interrupt
++ * @dev: drm device
++ *
++ * Do some basic checking of regsiter state at error interrupt time and
++ * dump it to the syslog. Also call i915_capture_error_state() to make
++ * sure we get a record and make it available in debugfs. Fire a uevent
++ * so userspace knows something bad happened (should trigger collection
++ * of a ring dump etc.).
++ */
++static void i915_handle_error(struct drm_device *dev)
++{
++ struct drm_i915_private *dev_priv = dev->dev_private;
++ u32 eir = I915_READ(EIR);
++ u32 pipea_stats = I915_READ(PIPEASTAT);
++ u32 pipeb_stats = I915_READ(PIPEBSTAT);
++
++ i915_capture_error_state(dev);
++
++ printk(KERN_ERR "render error detected, EIR: 0x%08x\n",
++ eir);
++
++ if (IS_G4X(dev)) {
++ if (eir & (GM45_ERROR_MEM_PRIV | GM45_ERROR_CP_PRIV)) {
++ u32 ipeir = I915_READ(IPEIR_I965);
++
++ printk(KERN_ERR " IPEIR: 0x%08x\n",
++ I915_READ(IPEIR_I965));
++ printk(KERN_ERR " IPEHR: 0x%08x\n",
++ I915_READ(IPEHR_I965));
++ printk(KERN_ERR " INSTDONE: 0x%08x\n",
++ I915_READ(INSTDONE_I965));
++ printk(KERN_ERR " INSTPS: 0x%08x\n",
++ I915_READ(INSTPS));
++ printk(KERN_ERR " INSTDONE1: 0x%08x\n",
++ I915_READ(INSTDONE1));
++ printk(KERN_ERR " ACTHD: 0x%08x\n",
++ I915_READ(ACTHD_I965));
++ I915_WRITE(IPEIR_I965, ipeir);
++ (void)I915_READ(IPEIR_I965);
++ }
++ if (eir & GM45_ERROR_PAGE_TABLE) {
++ u32 pgtbl_err = I915_READ(PGTBL_ER);
++ printk(KERN_ERR "page table error\n");
++ printk(KERN_ERR " PGTBL_ER: 0x%08x\n",
++ pgtbl_err);
++ I915_WRITE(PGTBL_ER, pgtbl_err);
++ (void)I915_READ(PGTBL_ER);
++ }
++ }
++
++ if (IS_I9XX(dev)) {
++ if (eir & I915_ERROR_PAGE_TABLE) {
++ u32 pgtbl_err = I915_READ(PGTBL_ER);
++ printk(KERN_ERR "page table error\n");
++ printk(KERN_ERR " PGTBL_ER: 0x%08x\n",
++ pgtbl_err);
++ I915_WRITE(PGTBL_ER, pgtbl_err);
++ (void)I915_READ(PGTBL_ER);
++ }
++ }
++
++ if (eir & I915_ERROR_MEMORY_REFRESH) {
++ printk(KERN_ERR "memory refresh error\n");
++ printk(KERN_ERR "PIPEASTAT: 0x%08x\n",
++ pipea_stats);
++ printk(KERN_ERR "PIPEBSTAT: 0x%08x\n",
++ pipeb_stats);
++ /* pipestat has already been acked */
++ }
++ if (eir & I915_ERROR_INSTRUCTION) {
++ printk(KERN_ERR "instruction error\n");
++ printk(KERN_ERR " INSTPM: 0x%08x\n",
++ I915_READ(INSTPM));
++ if (!IS_I965G(dev)) {
++ u32 ipeir = I915_READ(IPEIR);
++
++ printk(KERN_ERR " IPEIR: 0x%08x\n",
++ I915_READ(IPEIR));
++ printk(KERN_ERR " IPEHR: 0x%08x\n",
++ I915_READ(IPEHR));
++ printk(KERN_ERR " INSTDONE: 0x%08x\n",
++ I915_READ(INSTDONE));
++ printk(KERN_ERR " ACTHD: 0x%08x\n",
++ I915_READ(ACTHD));
++ I915_WRITE(IPEIR, ipeir);
++ (void)I915_READ(IPEIR);
++ } else {
++ u32 ipeir = I915_READ(IPEIR_I965);
++
++ printk(KERN_ERR " IPEIR: 0x%08x\n",
++ I915_READ(IPEIR_I965));
++ printk(KERN_ERR " IPEHR: 0x%08x\n",
++ I915_READ(IPEHR_I965));
++ printk(KERN_ERR " INSTDONE: 0x%08x\n",
++ I915_READ(INSTDONE_I965));
++ printk(KERN_ERR " INSTPS: 0x%08x\n",
++ I915_READ(INSTPS));
++ printk(KERN_ERR " INSTDONE1: 0x%08x\n",
++ I915_READ(INSTDONE1));
[...2162 lines suppressed...]
++ sdvo_priv->controlled_output = SDVO_OUTPUT_SVID0;
++ encoder->encoder_type = DRM_MODE_ENCODER_TVDAC;
++ connector->connector_type = DRM_MODE_CONNECTOR_SVIDEO;
++ sdvo_priv->is_tv = true;
++ intel_output->needs_tv_clock = true;
++ } else if (flags & SDVO_OUTPUT_RGB0) {
++
++ sdvo_priv->controlled_output = SDVO_OUTPUT_RGB0;
++ encoder->encoder_type = DRM_MODE_ENCODER_DAC;
++ connector->connector_type = DRM_MODE_CONNECTOR_VGA;
++ } else if (flags & SDVO_OUTPUT_RGB1) {
++
++ sdvo_priv->controlled_output = SDVO_OUTPUT_RGB1;
++ encoder->encoder_type = DRM_MODE_ENCODER_DAC;
++ connector->connector_type = DRM_MODE_CONNECTOR_VGA;
++ } else if (flags & SDVO_OUTPUT_LVDS0) {
++
++ sdvo_priv->controlled_output = SDVO_OUTPUT_LVDS0;
++ encoder->encoder_type = DRM_MODE_ENCODER_LVDS;
++ connector->connector_type = DRM_MODE_CONNECTOR_LVDS;
++ sdvo_priv->is_lvds = true;
++ } else if (flags & SDVO_OUTPUT_LVDS1) {
++
++ sdvo_priv->controlled_output = SDVO_OUTPUT_LVDS1;
++ encoder->encoder_type = DRM_MODE_ENCODER_LVDS;
++ connector->connector_type = DRM_MODE_CONNECTOR_LVDS;
++ sdvo_priv->is_lvds = true;
++ } else {
++
++ unsigned char bytes[2];
++
++ sdvo_priv->controlled_output = 0;
++ memcpy(bytes, &sdvo_priv->caps.output_flags, 2);
++ DRM_DEBUG_KMS(I915_SDVO,
++ "%s: Unknown SDVO output type (0x%02x%02x)\n",
++ SDVO_NAME(sdvo_priv),
++ bytes[0], bytes[1]);
++ ret = false;
++ }
++
++ if (ret && registered)
++ ret = drm_sysfs_connector_add(connector) == 0 ? true : false;
++
++
++ return ret;
++
++}
++
+ bool intel_sdvo_init(struct drm_device *dev, int output_device)
+ {
+ struct drm_connector *connector;
+ struct intel_output *intel_output;
+ struct intel_sdvo_priv *sdvo_priv;
+
+- int connector_type;
+ u8 ch[0x40];
+ int i;
+- int encoder_type;
+
+ intel_output = kcalloc(sizeof(struct intel_output)+sizeof(struct intel_sdvo_priv), 1, GFP_KERNEL);
+ if (!intel_output) {
+@@ -1925,88 +2075,28 @@ bool intel_sdvo_init(struct drm_device *dev, int output_device)
+ intel_output->ddc_bus->algo = &intel_sdvo_i2c_bit_algo;
+
+ /* In defaut case sdvo lvds is false */
+- sdvo_priv->is_lvds = false;
+ intel_sdvo_get_capabilities(intel_output, &sdvo_priv->caps);
+
+- if (sdvo_priv->caps.output_flags &
+- (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1)) {
+- if (sdvo_priv->caps.output_flags & SDVO_OUTPUT_TMDS0)
+- sdvo_priv->controlled_output = SDVO_OUTPUT_TMDS0;
+- else
+- sdvo_priv->controlled_output = SDVO_OUTPUT_TMDS1;
+-
+- encoder_type = DRM_MODE_ENCODER_TMDS;
+- connector_type = DRM_MODE_CONNECTOR_DVID;
+-
+- if (intel_sdvo_get_supp_encode(intel_output,
+- &sdvo_priv->encode) &&
+- intel_sdvo_get_digital_encoding_mode(intel_output) &&
+- sdvo_priv->is_hdmi) {
+- /* enable hdmi encoding mode if supported */
+- intel_sdvo_set_encode(intel_output, SDVO_ENCODE_HDMI);
+- intel_sdvo_set_colorimetry(intel_output,
+- SDVO_COLORIMETRY_RGB256);
+- connector_type = DRM_MODE_CONNECTOR_HDMIA;
+- }
+- }
+- else if (sdvo_priv->caps.output_flags & SDVO_OUTPUT_SVID0)
+- {
+- sdvo_priv->controlled_output = SDVO_OUTPUT_SVID0;
+- encoder_type = DRM_MODE_ENCODER_TVDAC;
+- connector_type = DRM_MODE_CONNECTOR_SVIDEO;
+- sdvo_priv->is_tv = true;
+- intel_output->needs_tv_clock = true;
+- }
+- else if (sdvo_priv->caps.output_flags & SDVO_OUTPUT_RGB0)
+- {
+- sdvo_priv->controlled_output = SDVO_OUTPUT_RGB0;
+- encoder_type = DRM_MODE_ENCODER_DAC;
+- connector_type = DRM_MODE_CONNECTOR_VGA;
+- }
+- else if (sdvo_priv->caps.output_flags & SDVO_OUTPUT_RGB1)
+- {
+- sdvo_priv->controlled_output = SDVO_OUTPUT_RGB1;
+- encoder_type = DRM_MODE_ENCODER_DAC;
+- connector_type = DRM_MODE_CONNECTOR_VGA;
+- }
+- else if (sdvo_priv->caps.output_flags & SDVO_OUTPUT_LVDS0)
+- {
+- sdvo_priv->controlled_output = SDVO_OUTPUT_LVDS0;
+- encoder_type = DRM_MODE_ENCODER_LVDS;
+- connector_type = DRM_MODE_CONNECTOR_LVDS;
+- sdvo_priv->is_lvds = true;
+- }
+- else if (sdvo_priv->caps.output_flags & SDVO_OUTPUT_LVDS1)
+- {
+- sdvo_priv->controlled_output = SDVO_OUTPUT_LVDS1;
+- encoder_type = DRM_MODE_ENCODER_LVDS;
+- connector_type = DRM_MODE_CONNECTOR_LVDS;
+- sdvo_priv->is_lvds = true;
+- }
+- else
+- {
+- unsigned char bytes[2];
+-
+- sdvo_priv->controlled_output = 0;
+- memcpy (bytes, &sdvo_priv->caps.output_flags, 2);
+- DRM_DEBUG_KMS(I915_SDVO,
+- "%s: Unknown SDVO output type (0x%02x%02x)\n",
+- SDVO_NAME(sdvo_priv),
+- bytes[0], bytes[1]);
+- encoder_type = DRM_MODE_ENCODER_NONE;
+- connector_type = DRM_MODE_CONNECTOR_Unknown;
++ if (intel_sdvo_output_setup(intel_output,
++ sdvo_priv->caps.output_flags) != true) {
++ DRM_DEBUG("SDVO output failed to setup on SDVO%c\n",
++ output_device == SDVOB ? 'B' : 'C');
+ goto err_i2c;
+ }
+
++
+ connector = &intel_output->base;
+ drm_connector_init(dev, connector, &intel_sdvo_connector_funcs,
+- connector_type);
++ connector->connector_type);
++
+ drm_connector_helper_add(connector, &intel_sdvo_connector_helper_funcs);
+ connector->interlace_allowed = 0;
+ connector->doublescan_allowed = 0;
+ connector->display_info.subpixel_order = SubPixelHorizontalRGB;
+
+- drm_encoder_init(dev, &intel_output->enc, &intel_sdvo_enc_funcs, encoder_type);
++ drm_encoder_init(dev, &intel_output->enc,
++ &intel_sdvo_enc_funcs, intel_output->enc.encoder_type);
++
+ drm_encoder_helper_add(&intel_output->enc, &intel_sdvo_helper_funcs);
+
+ drm_mode_connector_attach_encoder(&intel_output->base, &intel_output->enc);
+diff --git a/drivers/gpu/drm/i915/intel_tv.c b/drivers/gpu/drm/i915/intel_tv.c
+index a43c98e..da4ab4d 100644
+--- a/drivers/gpu/drm/i915/intel_tv.c
++++ b/drivers/gpu/drm/i915/intel_tv.c
+@@ -1490,6 +1490,27 @@ static struct input_res {
+ {"1920x1080", 1920, 1080},
+ };
+
++/*
++ * Chose preferred mode according to line number of TV format
++ */
++static void
++intel_tv_chose_preferred_modes(struct drm_connector *connector,
++ struct drm_display_mode *mode_ptr)
++{
++ struct intel_output *intel_output = to_intel_output(connector);
++ const struct tv_mode *tv_mode = intel_tv_mode_find(intel_output);
++
++ if (tv_mode->nbr_end < 480 && mode_ptr->vdisplay == 480)
++ mode_ptr->type |= DRM_MODE_TYPE_PREFERRED;
++ else if (tv_mode->nbr_end > 480) {
++ if (tv_mode->progressive == true && tv_mode->nbr_end < 720) {
++ if (mode_ptr->vdisplay == 720)
++ mode_ptr->type |= DRM_MODE_TYPE_PREFERRED;
++ } else if (mode_ptr->vdisplay == 1080)
++ mode_ptr->type |= DRM_MODE_TYPE_PREFERRED;
++ }
++}
++
+ /**
+ * Stub get_modes function.
+ *
+@@ -1544,6 +1565,7 @@ intel_tv_get_modes(struct drm_connector *connector)
+ mode_ptr->clock = (int) tmp;
+
+ mode_ptr->type = DRM_MODE_TYPE_DRIVER;
++ intel_tv_chose_preferred_modes(connector, mode_ptr);
+ drm_mode_probed_add(connector, mode_ptr);
+ count++;
+ }
drm-intel-pm.patch:
i915_drv.c | 15 +
i915_drv.h | 14 +
i915_gem.c | 8
i915_reg.h | 22 ++
intel_display.c | 484 ++++++++++++++++++++++++++++++++++++++++++++++++++++----
intel_drv.h | 4
6 files changed, 512 insertions(+), 35 deletions(-)
Index: drm-intel-pm.patch
===================================================================
RCS file: /cvs/pkgs/rpms/kernel/devel/drm-intel-pm.patch,v
retrieving revision 1.3
retrieving revision 1.4
diff -u -p -r1.3 -r1.4
--- drm-intel-pm.patch 30 Jul 2009 21:01:40 -0000 1.3
+++ drm-intel-pm.patch 3 Aug 2009 18:24:04 -0000 1.4
@@ -1,7 +1,7 @@
-diff -ur linux-2.6.30.noarch.orig/drivers/gpu/drm/i915/i915_drv.c linux-2.6.30.noarch/drivers/gpu/drm/i915/i915_drv.c
---- linux-2.6.30.noarch.orig/drivers/gpu/drm/i915/i915_drv.c 2009-07-30 21:32:05.000000000 +0100
-+++ linux-2.6.30.noarch/drivers/gpu/drm/i915/i915_drv.c 2009-07-30 21:29:34.000000000 +0100
-@@ -43,6 +43,21 @@
+diff -up linux-2.6.30.noarch/drivers/gpu/drm/i915/i915_drv.c.jx linux-2.6.30.noarch/drivers/gpu/drm/i915/i915_drv.c
+--- linux-2.6.30.noarch/drivers/gpu/drm/i915/i915_drv.c.jx 2009-08-03 14:00:43.000000000 -0400
++++ linux-2.6.30.noarch/drivers/gpu/drm/i915/i915_drv.c 2009-08-03 14:01:07.000000000 -0400
+@@ -43,6 +43,21 @@ module_param_named(modeset, i915_modeset
unsigned int i915_fbpercrtc = 0;
module_param_named(fbpercrtc, i915_fbpercrtc, int, 0400);
@@ -23,10 +23,10 @@ diff -ur linux-2.6.30.noarch.orig/driver
static struct drm_driver driver;
static struct pci_device_id pciidlist[] = {
-diff -ur linux-2.6.30.noarch.orig/drivers/gpu/drm/i915/i915_drv.h linux-2.6.30.noarch/drivers/gpu/drm/i915/i915_drv.h
---- linux-2.6.30.noarch.orig/drivers/gpu/drm/i915/i915_drv.h 2009-07-30 21:32:05.000000000 +0100
-+++ linux-2.6.30.noarch/drivers/gpu/drm/i915/i915_drv.h 2009-07-30 21:29:34.000000000 +0100
-@@ -436,6 +436,12 @@
+diff -up linux-2.6.30.noarch/drivers/gpu/drm/i915/i915_drv.h.jx linux-2.6.30.noarch/drivers/gpu/drm/i915/i915_drv.h
+--- linux-2.6.30.noarch/drivers/gpu/drm/i915/i915_drv.h.jx 2009-08-03 14:00:44.000000000 -0400
++++ linux-2.6.30.noarch/drivers/gpu/drm/i915/i915_drv.h 2009-08-03 14:01:07.000000000 -0400
+@@ -438,6 +438,12 @@ typedef struct drm_i915_private {
struct drm_i915_gem_phys_object *phys_objs[I915_MAX_PHYS_OBJECT];
} mm;
struct sdvo_device_mapping sdvo_mappings[2];
@@ -39,7 +39,7 @@ diff -ur linux-2.6.30.noarch.orig/driver
} drm_i915_private_t;
/** driver private structure attached to each drm_gem_object */
-@@ -565,6 +571,11 @@
+@@ -567,6 +573,11 @@ enum intel_chip_family {
extern struct drm_ioctl_desc i915_ioctls[];
extern int i915_max_ioctl;
extern unsigned int i915_fbpercrtc;
@@ -51,7 +51,7 @@ diff -ur linux-2.6.30.noarch.orig/driver
extern int i915_master_create(struct drm_device *dev, struct drm_master *master);
extern void i915_master_destroy(struct drm_device *dev, struct drm_master *master);
-@@ -893,6 +904,9 @@
+@@ -895,6 +906,9 @@ extern int i915_wait_ring(struct drm_dev
/* dsparb controlled by hw only */
#define DSPARB_HWCONTROL(dev) (IS_G4X(dev) || IS_IGDNG(dev))
@@ -61,9 +61,9 @@ diff -ur linux-2.6.30.noarch.orig/driver
#define PRIMARY_RINGBUFFER_SIZE (128*1024)
#endif
-diff -ur linux-2.6.30.noarch.orig/drivers/gpu/drm/i915/i915_gem.c linux-2.6.30.noarch/drivers/gpu/drm/i915/i915_gem.c
---- linux-2.6.30.noarch.orig/drivers/gpu/drm/i915/i915_gem.c 2009-07-30 21:32:05.000000000 +0100
-+++ linux-2.6.30.noarch/drivers/gpu/drm/i915/i915_gem.c 2009-07-30 21:29:34.000000000 +0100
+diff -up linux-2.6.30.noarch/drivers/gpu/drm/i915/i915_gem.c.jx linux-2.6.30.noarch/drivers/gpu/drm/i915/i915_gem.c
+--- linux-2.6.30.noarch/drivers/gpu/drm/i915/i915_gem.c.jx 2009-08-03 14:00:43.000000000 -0400
++++ linux-2.6.30.noarch/drivers/gpu/drm/i915/i915_gem.c 2009-08-03 14:01:07.000000000 -0400
@@ -29,6 +29,7 @@
#include "drm.h"
#include "i915_drm.h"
@@ -72,7 +72,7 @@ diff -ur linux-2.6.30.noarch.orig/driver
#include <linux/swap.h>
#include <linux/pci.h>
-@@ -980,6 +981,7 @@
+@@ -980,6 +981,7 @@ i915_gem_set_domain_ioctl(struct drm_dev
{
struct drm_i915_gem_set_domain *args = data;
struct drm_gem_object *obj;
@@ -80,7 +80,7 @@ diff -ur linux-2.6.30.noarch.orig/driver
uint32_t read_domains = args->read_domains;
uint32_t write_domain = args->write_domain;
int ret;
-@@ -1003,8 +1005,12 @@
+@@ -1003,8 +1005,12 @@ i915_gem_set_domain_ioctl(struct drm_dev
obj = drm_gem_object_lookup(dev, file_priv, args->handle);
if (obj == NULL)
return -EBADF;
@@ -93,7 +93,7 @@ diff -ur linux-2.6.30.noarch.orig/driver
#if WATCH_BUF
DRM_INFO("set_domain_ioctl %p(%zd), %08x %08x\n",
obj, obj->size, read_domains, write_domain);
-@@ -2761,6 +2767,8 @@
+@@ -2761,6 +2767,8 @@ i915_gem_object_set_to_gpu_domain(struct
BUG_ON(obj->pending_read_domains & I915_GEM_DOMAIN_CPU);
BUG_ON(obj->pending_write_domain == I915_GEM_DOMAIN_CPU);
@@ -102,10 +102,10 @@ diff -ur linux-2.6.30.noarch.orig/driver
#if WATCH_BUF
DRM_INFO("%s: object %p read %08x -> %08x write %08x -> %08x\n",
__func__, obj,
-diff -ur linux-2.6.30.noarch.orig/drivers/gpu/drm/i915/i915_reg.h linux-2.6.30.noarch/drivers/gpu/drm/i915/i915_reg.h
---- linux-2.6.30.noarch.orig/drivers/gpu/drm/i915/i915_reg.h 2009-07-30 21:32:05.000000000 +0100
-+++ linux-2.6.30.noarch/drivers/gpu/drm/i915/i915_reg.h 2009-07-30 21:29:34.000000000 +0100
-@@ -56,7 +56,7 @@
+diff -up linux-2.6.30.noarch/drivers/gpu/drm/i915/i915_reg.h.jx linux-2.6.30.noarch/drivers/gpu/drm/i915/i915_reg.h
+--- linux-2.6.30.noarch/drivers/gpu/drm/i915/i915_reg.h.jx 2009-08-03 14:00:44.000000000 -0400
++++ linux-2.6.30.noarch/drivers/gpu/drm/i915/i915_reg.h 2009-08-03 14:01:07.000000000 -0400
+@@ -55,7 +55,7 @@
/* PCI config space */
#define HPLLCC 0xc0 /* 855 only */
@@ -114,7 +114,7 @@ diff -ur linux-2.6.30.noarch.orig/driver
#define GC_CLOCK_133_200 (0 << 0)
#define GC_CLOCK_100_200 (1 << 0)
#define GC_CLOCK_100_133 (2 << 0)
-@@ -66,6 +66,25 @@
+@@ -65,6 +65,25 @@
#define GC_DISPLAY_CLOCK_190_200_MHZ (0 << 4)
#define GC_DISPLAY_CLOCK_333_MHZ (4 << 4)
#define GC_DISPLAY_CLOCK_MASK (7 << 4)
@@ -140,7 +140,7 @@ diff -ur linux-2.6.30.noarch.orig/driver
#define LBB 0xf4
/* VGA stuff */
-@@ -1570,6 +1589,7 @@
+@@ -1586,6 +1605,7 @@
#define PIPECONF_PROGRESSIVE (0 << 21)
#define PIPECONF_INTERLACE_W_FIELD_INDICATION (6 << 21)
#define PIPECONF_INTERLACE_FIELD_0_ONLY (7 << 21)
@@ -148,10 +148,10 @@ diff -ur linux-2.6.30.noarch.orig/driver
#define PIPEASTAT 0x70024
#define PIPE_FIFO_UNDERRUN_STATUS (1UL<<31)
#define PIPE_CRC_ERROR_ENABLE (1UL<<29)
-diff -ur linux-2.6.30.noarch.orig/drivers/gpu/drm/i915/intel_display.c linux-2.6.30.noarch/drivers/gpu/drm/i915/intel_display.c
---- linux-2.6.30.noarch.orig/drivers/gpu/drm/i915/intel_display.c 2009-07-30 21:32:05.000000000 +0100
-+++ linux-2.6.30.noarch/drivers/gpu/drm/i915/intel_display.c 2009-07-30 21:29:34.000000000 +0100
-@@ -36,6 +36,7 @@
+diff -up linux-2.6.30.noarch/drivers/gpu/drm/i915/intel_display.c.jx linux-2.6.30.noarch/drivers/gpu/drm/i915/intel_display.c
+--- linux-2.6.30.noarch/drivers/gpu/drm/i915/intel_display.c.jx 2009-08-03 14:00:44.000000000 -0400
++++ linux-2.6.30.noarch/drivers/gpu/drm/i915/intel_display.c 2009-08-03 14:11:56.000000000 -0400
+@@ -38,6 +38,7 @@
bool intel_pipe_has_type (struct drm_crtc *crtc, int type);
static void intel_update_watermarks(struct drm_device *dev);
@@ -159,7 +159,7 @@ diff -ur linux-2.6.30.noarch.orig/driver
typedef struct {
/* given values */
-@@ -65,6 +66,8 @@
+@@ -67,6 +68,8 @@ struct intel_limit {
intel_p2_t p2;
bool (* find_pll)(const intel_limit_t *, struct drm_crtc *,
int, int, intel_clock_t *);
@@ -168,7 +168,7 @@ diff -ur linux-2.6.30.noarch.orig/driver
};
#define I8XX_DOT_MIN 25000
-@@ -190,7 +193,7 @@
+@@ -192,7 +195,7 @@ struct intel_limit {
#define G4X_P2_SINGLE_CHANNEL_LVDS_LIMIT 0
/*The parameter is for DUAL_CHANNEL_LVDS on G4x platform*/
@@ -177,7 +177,7 @@ diff -ur linux-2.6.30.noarch.orig/driver
#define G4X_DOT_DUAL_CHANNEL_LVDS_MAX 224000
#define G4X_N_DUAL_CHANNEL_LVDS_MIN 1
#define G4X_N_DUAL_CHANNEL_LVDS_MAX 3
-@@ -259,6 +262,9 @@
+@@ -261,6 +264,9 @@ static bool
intel_find_best_PLL(const intel_limit_t *limit, struct drm_crtc *crtc,
int target, int refclk, intel_clock_t *best_clock);
static bool
@@ -187,7 +187,7 @@ diff -ur linux-2.6.30.noarch.orig/driver
intel_g4x_find_best_PLL(const intel_limit_t *limit, struct drm_crtc *crtc,
int target, int refclk, intel_clock_t *best_clock);
static bool
-@@ -281,6 +287,7 @@
+@@ -286,6 +292,7 @@ static const intel_limit_t intel_limits_
.p2 = { .dot_limit = I8XX_P2_SLOW_LIMIT,
.p2_slow = I8XX_P2_SLOW, .p2_fast = I8XX_P2_FAST },
.find_pll = intel_find_best_PLL,
@@ -195,7 +195,7 @@ diff -ur linux-2.6.30.noarch.orig/driver
};
static const intel_limit_t intel_limits_i8xx_lvds = {
-@@ -295,6 +302,7 @@
+@@ -300,6 +307,7 @@ static const intel_limit_t intel_limits_
.p2 = { .dot_limit = I8XX_P2_SLOW_LIMIT,
.p2_slow = I8XX_P2_LVDS_SLOW, .p2_fast = I8XX_P2_LVDS_FAST },
.find_pll = intel_find_best_PLL,
@@ -203,7 +203,7 @@ diff -ur linux-2.6.30.noarch.orig/driver
};
static const intel_limit_t intel_limits_i9xx_sdvo = {
-@@ -309,6 +317,7 @@
+@@ -314,6 +322,7 @@ static const intel_limit_t intel_limits_
.p2 = { .dot_limit = I9XX_P2_SDVO_DAC_SLOW_LIMIT,
.p2_slow = I9XX_P2_SDVO_DAC_SLOW, .p2_fast = I9XX_P2_SDVO_DAC_FAST },
.find_pll = intel_find_best_PLL,
@@ -211,7 +211,7 @@ diff -ur linux-2.6.30.noarch.orig/driver
};
static const intel_limit_t intel_limits_i9xx_lvds = {
-@@ -326,6 +335,7 @@
+@@ -331,6 +340,7 @@ static const intel_limit_t intel_limits_
.p2 = { .dot_limit = I9XX_P2_LVDS_SLOW_LIMIT,
.p2_slow = I9XX_P2_LVDS_SLOW, .p2_fast = I9XX_P2_LVDS_FAST },
.find_pll = intel_find_best_PLL,
@@ -219,7 +219,7 @@ diff -ur linux-2.6.30.noarch.orig/driver
};
/* below parameter and function is for G4X Chipset Family*/
-@@ -343,6 +353,7 @@
+@@ -348,6 +358,7 @@ static const intel_limit_t intel_limits_
.p2_fast = G4X_P2_SDVO_FAST
},
.find_pll = intel_g4x_find_best_PLL,
@@ -227,7 +227,7 @@ diff -ur linux-2.6.30.noarch.orig/driver
};
static const intel_limit_t intel_limits_g4x_hdmi = {
-@@ -359,6 +370,7 @@
+@@ -364,6 +375,7 @@ static const intel_limit_t intel_limits_
.p2_fast = G4X_P2_HDMI_DAC_FAST
},
.find_pll = intel_g4x_find_best_PLL,
@@ -235,7 +235,7 @@ diff -ur linux-2.6.30.noarch.orig/driver
};
static const intel_limit_t intel_limits_g4x_single_channel_lvds = {
-@@ -383,6 +395,7 @@
+@@ -388,6 +400,7 @@ static const intel_limit_t intel_limits_
.p2_fast = G4X_P2_SINGLE_CHANNEL_LVDS_FAST
},
.find_pll = intel_g4x_find_best_PLL,
@@ -243,7 +243,7 @@ diff -ur linux-2.6.30.noarch.orig/driver
};
static const intel_limit_t intel_limits_g4x_dual_channel_lvds = {
-@@ -407,6 +420,7 @@
+@@ -412,6 +425,7 @@ static const intel_limit_t intel_limits_
.p2_fast = G4X_P2_DUAL_CHANNEL_LVDS_FAST
},
.find_pll = intel_g4x_find_best_PLL,
@@ -251,7 +251,7 @@ diff -ur linux-2.6.30.noarch.orig/driver
};
static const intel_limit_t intel_limits_g4x_display_port = {
-@@ -444,6 +458,7 @@
+@@ -449,6 +463,7 @@ static const intel_limit_t intel_limits_
.p2 = { .dot_limit = I9XX_P2_SDVO_DAC_SLOW_LIMIT,
.p2_slow = I9XX_P2_SDVO_DAC_SLOW, .p2_fast = I9XX_P2_SDVO_DAC_FAST },
.find_pll = intel_find_best_PLL,
@@ -259,7 +259,7 @@ diff -ur linux-2.6.30.noarch.orig/driver
};
static const intel_limit_t intel_limits_igd_lvds = {
-@@ -459,6 +474,7 @@
+@@ -464,6 +479,7 @@ static const intel_limit_t intel_limits_
.p2 = { .dot_limit = I9XX_P2_LVDS_SLOW_LIMIT,
.p2_slow = I9XX_P2_LVDS_SLOW, .p2_fast = I9XX_P2_LVDS_SLOW },
.find_pll = intel_find_best_PLL,
@@ -267,7 +267,7 @@ diff -ur linux-2.6.30.noarch.orig/driver
};
static const intel_limit_t intel_limits_igdng_sdvo = {
-@@ -666,15 +682,16 @@
+@@ -688,15 +704,16 @@ intel_find_best_PLL(const intel_limit_t
memset (best_clock, 0, sizeof (*best_clock));
@@ -293,7 +293,7 @@ diff -ur linux-2.6.30.noarch.orig/driver
int this_err;
intel_clock(dev, refclk, &clock);
-@@ -695,6 +712,46 @@
+@@ -717,6 +734,46 @@ intel_find_best_PLL(const intel_limit_t
return (err != target);
}
@@ -340,7 +340,7 @@ diff -ur linux-2.6.30.noarch.orig/driver
static bool
intel_g4x_find_best_PLL(const intel_limit_t *limit, struct drm_crtc *crtc,
int target, int refclk, intel_clock_t *best_clock)
-@@ -725,7 +782,7 @@
+@@ -747,7 +804,7 @@ intel_g4x_find_best_PLL(const intel_limi
max_n = limit->n.max;
/* based on hardware requriment prefer smaller n to precision */
for (clock.n = limit->n.min; clock.n <= max_n; clock.n++) {
@@ -349,7 +349,7 @@ diff -ur linux-2.6.30.noarch.orig/driver
for (clock.m1 = limit->m1.max;
clock.m1 >= limit->m1.min; clock.m1--) {
for (clock.m2 = limit->m2.max;
-@@ -735,8 +792,8 @@
+@@ -757,8 +814,8 @@ intel_g4x_find_best_PLL(const intel_limi
int this_err;
intel_clock(dev, refclk, &clock);
@@ -360,7 +360,7 @@ diff -ur linux-2.6.30.noarch.orig/driver
this_err = abs(clock.dot - target) ;
if (this_err < err_most) {
*best_clock = clock;
-@@ -778,15 +835,14 @@
+@@ -832,15 +889,14 @@ intel_igdng_find_best_PLL(const intel_li
memset(best_clock, 0, sizeof(*best_clock));
max_n = limit->n.max;
@@ -384,7 +384,7 @@ diff -ur linux-2.6.30.noarch.orig/driver
int this_err;
intel_clock(dev, refclk, &clock);
-@@ -975,6 +1031,7 @@
+@@ -1029,6 +1085,7 @@ intel_pipe_set_base(struct drm_crtc *crt
intel_wait_for_vblank(dev);
i915_gem_object_unpin(intel_fb->obj);
}
@@ -392,9 +392,9 @@ diff -ur linux-2.6.30.noarch.orig/driver
if (!dev->primary->master)
return 0;
-@@ -1798,6 +1855,18 @@
- const static int latency_ns = 5000; /* default for non-igd platforms */
-
+@@ -2036,6 +2093,18 @@ static int intel_get_fifo_size(struct dr
+ return size;
+ }
+static void g4x_update_wm(struct drm_device *dev)
+{
@@ -411,26 +411,26 @@ diff -ur linux-2.6.30.noarch.orig/driver
static void i965_update_wm(struct drm_device *dev)
{
struct drm_i915_private *dev_priv = dev->dev_private;
-@@ -1869,7 +1938,7 @@
+@@ -2087,7 +2156,7 @@ static void i9xx_update_wm(struct drm_de
cwm = 2;
- /* Calc sr entries for one pipe configs */
-- if (!planea_clock || !planeb_clock) {
-+ if (HAS_FW_BLC(dev) && (!planea_clock || !planeb_clock)) {
- sr_clock = planea_clock ? planea_clock : planeb_clock;
- line_time_us = (sr_hdisplay * 1000) / sr_clock;
- sr_entries = (((latency_ns / line_time_us) + 1) * pixel_size *
-@@ -1887,8 +1956,7 @@
-
- I915_WRITE(FW_BLC, fwater_lo);
- I915_WRITE(FW_BLC2, fwater_hi);
-- if (IS_I9XX(dev))
-- I915_WRITE(FW_BLC_SELF, FW_BLC_SELF_EN | (srwm & 0x3f));
-+ I915_WRITE(FW_BLC_SELF, FW_BLC_SELF_EN | (srwm & 0x3f));
- }
+ /* Calc sr entries for one plane configs */
+- if (sr_hdisplay && (!planea_clock || !planeb_clock)) {
++ if (HAS_FW_BLC(dev) && sr_hdisplay && (!planea_clock || !planeb_clock)) {
+ /* self-refresh has much higher latency */
+ const static int sr_latency_ns = 6000;
+
+@@ -2102,8 +2171,7 @@ static void i9xx_update_wm(struct drm_de
+ srwm = total_size - sr_entries;
+ if (srwm < 0)
+ srwm = 1;
+- if (IS_I9XX(dev))
+- I915_WRITE(FW_BLC_SELF, (srwm & 0x3f));
++ I915_WRITE(FW_BLC_SELF, FW_BLC_SELF_EN | (srwm & 0x3f));
+ }
- static void i830_update_wm(struct drm_device *dev, int planea_clock,
-@@ -1951,9 +2019,6 @@
+ DRM_DEBUG("Setting FIFO watermarks - A: %d, B: %d, C: %d, SR %d\n",
+@@ -2177,9 +2245,6 @@ static void intel_update_watermarks(stru
unsigned long planea_clock = 0, planeb_clock = 0, sr_clock = 0;
int enabled = 0, pixel_size = 0;
@@ -440,7 +440,7 @@ diff -ur linux-2.6.30.noarch.orig/driver
/* Get the clock config from both planes */
list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
intel_crtc = to_intel_crtc(crtc);
-@@ -1986,7 +2051,9 @@
+@@ -2212,7 +2277,9 @@ static void intel_update_watermarks(stru
else if (IS_IGD(dev))
igd_disable_cxsr(dev);
@@ -451,7 +451,7 @@ diff -ur linux-2.6.30.noarch.orig/driver
i965_update_wm(dev);
else if (IS_I9XX(dev) || IS_MOBILE(dev))
i9xx_update_wm(dev, planea_clock, planeb_clock, sr_hdisplay,
-@@ -2020,9 +2087,9 @@
+@@ -2246,9 +2313,9 @@ static int intel_crtc_mode_set(struct dr
int dsppos_reg = (pipe == 0) ? DSPAPOS : DSPBPOS;
int pipesrc_reg = (pipe == 0) ? PIPEASRC : PIPEBSRC;
int refclk, num_outputs = 0;
@@ -462,9 +462,9 @@ diff -ur linux-2.6.30.noarch.orig/driver
+ u32 dpll = 0, fp = 0, fp2 = 0, dspcntr, pipeconf;
+ bool ok, has_reduced_clock = false, is_sdvo = false, is_dvo = false;
bool is_crt = false, is_lvds = false, is_tv = false, is_dp = false;
+ bool is_edp = false;
struct drm_mode_config *mode_config = &dev->mode_config;
- struct drm_connector *connector;
-@@ -2100,6 +2167,14 @@
+@@ -2331,6 +2398,14 @@ static int intel_crtc_mode_set(struct dr
return -EINVAL;
}
@@ -479,9 +479,9 @@ diff -ur linux-2.6.30.noarch.orig/driver
/* SDVO TV has fixed PLL values depend on its clock range,
this mirrors vbios setting. */
if (is_sdvo && is_tv) {
-@@ -2127,10 +2202,17 @@
- 270000, /* lane clock */
- &m_n);
+@@ -2376,10 +2451,17 @@ static int intel_crtc_mode_set(struct dr
+ link_bw, &m_n);
+ }
- if (IS_IGD(dev))
+ if (IS_IGD(dev)) {
@@ -499,7 +499,7 @@ diff -ur linux-2.6.30.noarch.orig/driver
if (!IS_IGDNG(dev))
dpll = DPLL_VGA_MODE_DIS;
-@@ -2159,6 +2241,8 @@
+@@ -2408,6 +2490,8 @@ static int intel_crtc_mode_set(struct dr
/* also FPA1 */
if (IS_IGDNG(dev))
dpll |= (1 << (clock.p1 - 1)) << DPLL_FPA1_P1_POST_DIV_SHIFT;
@@ -508,29 +508,33 @@ diff -ur linux-2.6.30.noarch.orig/driver
}
switch (clock.p2) {
case 5:
-@@ -2301,6 +2385,21 @@
+@@ -2534,9 +2618,25 @@ static int intel_crtc_mode_set(struct dr
+ }
+ if (is_dp)
intel_dp_set_m_n(crtc, mode, adjusted_mode);
++
- I915_WRITE(fp_reg, fp);
-+ if (has_reduced_clock && i915_powersave && i915_lvdsclock) {
-+ I915_WRITE(fp_reg + 4, fp2);
-+ intel_crtc->lowfreq_avail = true;
-+ if (HAS_PIPE_CXSR(dev)) {
-+ DRM_DEBUG("enabling CxSR downclocking\n");
-+ pipeconf |= PIPECONF_CXSR_DOWNCLOCK;
-+ }
-+ } else {
-+ I915_WRITE(fp_reg + 4, fp);
-+ intel_crtc->lowfreq_avail = false;
-+ if (HAS_PIPE_CXSR(dev)) {
-+ DRM_DEBUG("disabling CxSR downclocking\n");
-+ pipeconf &= ~PIPECONF_CXSR_DOWNCLOCK;
+ if (!is_edp) {
+ I915_WRITE(fp_reg, fp);
++ if (has_reduced_clock && i915_powersave && i915_lvdsclock) {
++ I915_WRITE(fp_reg + 4, fp2);
++ intel_crtc->lowfreq_avail = true;
++ if (HAS_PIPE_CXSR(dev)) {
++ DRM_DEBUG("enabling CxSR downclocking\n");
++ pipeconf |= PIPECONF_CXSR_DOWNCLOCK;
++ }
++ } else {
++ I915_WRITE(fp_reg + 4, fp);
++ intel_crtc->lowfreq_avail = false;
++ if (HAS_PIPE_CXSR(dev)) {
++ DRM_DEBUG("disabling CxSR downclocking\n");
++ pipeconf &= ~PIPECONF_CXSR_DOWNCLOCK;
++ }
+ }
-+ }
- I915_WRITE(dpll_reg, dpll);
- I915_READ(dpll_reg);
- /* Wait for the clocks to stabilize. */
-@@ -2507,6 +2606,8 @@
+ I915_WRITE(dpll_reg, dpll);
+ I915_READ(dpll_reg);
+ /* Wait for the clocks to stabilize. */
+@@ -2748,6 +2848,8 @@ fail_locked:
return ret;
}
@@ -539,7 +543,7 @@ diff -ur linux-2.6.30.noarch.orig/driver
static int intel_crtc_cursor_move(struct drm_crtc *crtc, int x, int y)
{
struct drm_device *dev = crtc->dev;
-@@ -2516,6 +2617,12 @@
+@@ -2757,6 +2859,12 @@ static int intel_crtc_cursor_move(struct
uint32_t temp = 0;
uint32_t adder;
@@ -552,7 +556,7 @@ diff -ur linux-2.6.30.noarch.orig/driver
if (x < 0) {
temp |= CURSOR_POS_SIGN << CURSOR_X_SHIFT;
x = -x;
-@@ -2813,6 +2920,286 @@
+@@ -3054,6 +3162,286 @@ struct drm_display_mode *intel_crtc_mode
return mode;
}
@@ -839,7 +843,7 @@ diff -ur linux-2.6.30.noarch.orig/driver
static void intel_crtc_destroy(struct drm_crtc *crtc)
{
struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
-@@ -2869,6 +3256,10 @@
+@@ -3110,6 +3498,10 @@ static void intel_crtc_init(struct drm_d
intel_crtc->mode_set.crtc = &intel_crtc->base;
intel_crtc->mode_set.connectors = (struct drm_connector **)(intel_crtc + 1);
intel_crtc->mode_set.num_connectors = 0;
@@ -850,7 +854,7 @@ diff -ur linux-2.6.30.noarch.orig/driver
if (i915_fbpercrtc) {
-@@ -3143,6 +3534,7 @@
+@@ -3399,6 +3791,7 @@ static const struct drm_mode_config_func
void intel_modeset_init(struct drm_device *dev)
{
@@ -858,7 +862,7 @@ diff -ur linux-2.6.30.noarch.orig/driver
int num_pipe;
int i;
-@@ -3174,15 +3566,38 @@
+@@ -3433,15 +3826,38 @@ void intel_modeset_init(struct drm_devic
DRM_DEBUG("%d display pipe%s available.\n",
num_pipe, num_pipe > 1 ? "s" : "");
@@ -897,10 +901,10 @@ diff -ur linux-2.6.30.noarch.orig/driver
drm_mode_config_cleanup(dev);
}
-diff -ur linux-2.6.30.noarch.orig/drivers/gpu/drm/i915/intel_drv.h linux-2.6.30.noarch/drivers/gpu/drm/i915/intel_drv.h
---- linux-2.6.30.noarch.orig/drivers/gpu/drm/i915/intel_drv.h 2009-07-30 21:32:05.000000000 +0100
-+++ linux-2.6.30.noarch/drivers/gpu/drm/i915/intel_drv.h 2009-07-30 21:29:34.000000000 +0100
-@@ -98,6 +98,9 @@
+diff -up linux-2.6.30.noarch/drivers/gpu/drm/i915/intel_drv.h.jx linux-2.6.30.noarch/drivers/gpu/drm/i915/intel_drv.h
+--- linux-2.6.30.noarch/drivers/gpu/drm/i915/intel_drv.h.jx 2009-08-03 14:00:44.000000000 -0400
++++ linux-2.6.30.noarch/drivers/gpu/drm/i915/intel_drv.h 2009-08-03 14:01:07.000000000 -0400
+@@ -99,6 +99,9 @@ struct intel_crtc {
struct intel_framebuffer *fbdev_fb;
/* a mode_set for fbdev users on this crtc */
struct drm_mode_set mode_set;
@@ -910,7 +914,7 @@ diff -ur linux-2.6.30.noarch.orig/driver
};
#define to_intel_crtc(x) container_of(x, struct intel_crtc, base)
-@@ -116,6 +119,7 @@
+@@ -117,6 +120,7 @@ extern void intel_hdmi_init(struct drm_d
extern bool intel_sdvo_init(struct drm_device *dev, int output_device);
extern void intel_dvo_init(struct drm_device *dev);
extern void intel_tv_init(struct drm_device *dev);
Index: kernel.spec
===================================================================
RCS file: /cvs/pkgs/rpms/kernel/devel/kernel.spec,v
retrieving revision 1.1685
retrieving revision 1.1686
diff -u -p -r1.1685 -r1.1686
--- kernel.spec 3 Aug 2009 16:48:20 -0000 1.1685
+++ kernel.spec 3 Aug 2009 18:24:04 -0000 1.1686
@@ -671,10 +671,10 @@ Patch1813: drm-radeon-pm.patch
Patch1814: drm-nouveau.patch
Patch1818: drm-i915-resume-force-mode.patch
Patch1819: drm-intel-big-hammer.patch
-Patch1820: drm-intel-gen3-fb-hack.patch
Patch1821: drm-page-flip.patch
-Patch1822: drm-intel-pm.patch
-Patch1823: linux-2.6.30-intel-watermark-fix.patch
+# anholt's tree as of 2009-08-03
+Patch1824: drm-intel-next.patch
+Patch1825: drm-intel-pm.patch
# vga arb
Patch1900: linux-2.6-vga-arb.patch
@@ -1281,10 +1281,9 @@ ApplyPatch drm-nouveau.patch
#ApplyPatch drm-radeon-pm.patch
ApplyPatch drm-i915-resume-force-mode.patch
ApplyPatch drm-intel-big-hammer.patch
-ApplyPatch drm-intel-gen3-fb-hack.patch
ApplyPatch drm-page-flip.patch
+ApplyPatch drm-intel-next.patch
ApplyPatch drm-intel-pm.patch
-ApplyPatch linux-2.6.30-intel-watermark-fix.patch
# VGA arb + drm
ApplyPatch linux-2.6-vga-arb.patch
@@ -1945,6 +1944,12 @@ fi
# and build.
%changelog
+* Mon Aug 03 2009 Adam Jackson <ajax at redhat.com>
+- Update intel drm from anholt's tree
+- Rebase drm-intel-pm.patch to match
+- Drop gen3 fb hack, merged
+- Drop previous watermark setup change
+
* Mon Aug 03 2009 Dave Jones <davej at redhat.com> 2.6.31-0.122.rc5.git2
- 2.6.31-rc5-git2
--- drm-intel-gen3-fb-hack.patch DELETED ---
--- linux-2.6.30-intel-watermark-fix.patch DELETED ---
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