rpms/kernel/devel drm-r600-kms.patch, NONE, 1.1 drm-vga-arb.patch, 1.4, 1.5 kernel.spec, 1.1689, 1.1690
Dave Airlie
airlied at fedoraproject.org
Wed Aug 5 00:18:53 UTC 2009
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Author: airlied
Update of /cvs/pkgs/rpms/kernel/devel
In directory cvs1.fedora.phx.redhat.com:/tmp/cvs-serv16961
Modified Files:
drm-vga-arb.patch kernel.spec
Added Files:
drm-r600-kms.patch
Log Message:
* Wed Aug 05 2009 Dave Airlie <airlied at redhat.com>
- Add Jeromes initial r600 kms work.
- rebase arb patch
drm-r600-kms.patch:
b/drivers/gpu/drm/radeon/Makefile | 2
b/drivers/gpu/drm/radeon/atombios_crtc.c | 1
b/drivers/gpu/drm/radeon/avivod.h | 60 +
b/drivers/gpu/drm/radeon/r100.c | 69 +
b/drivers/gpu/drm/radeon/r300.c | 2
b/drivers/gpu/drm/radeon/r600.c | 1243 +++++++++++++++++++++++++++++--
b/drivers/gpu/drm/radeon/r600d.h | 349 ++++++++
b/drivers/gpu/drm/radeon/radeon.h | 51 +
b/drivers/gpu/drm/radeon/radeon_asic.h | 137 +++
b/drivers/gpu/drm/radeon/radeon_clocks.c | 10
b/drivers/gpu/drm/radeon/radeon_device.c | 338 ++++----
b/drivers/gpu/drm/radeon/radeon_drv.h | 1
b/drivers/gpu/drm/radeon/radeon_ring.c | 63 -
b/drivers/gpu/drm/radeon/radeon_share.h | 66 +
b/drivers/gpu/drm/radeon/radeon_ttm.c | 6
b/drivers/gpu/drm/radeon/rs400.c | 2
b/drivers/gpu/drm/radeon/rv770.c | 980 ++++++++++++++++++++++--
b/drivers/gpu/drm/radeon/rv770d.h | 341 ++++++++
drivers/gpu/drm/radeon/r300.h | 36
drivers/gpu/drm/radeon/rs780.c | 102 --
20 files changed, 3364 insertions(+), 495 deletions(-)
--- NEW FILE drm-r600-kms.patch ---
>From 6599b4a047d80cd7b8715b5ad74e0735e6d4b941 Mon Sep 17 00:00:00 2001
From: Jerome Glisse <jglisse at redhat.com>
Date: Fri, 24 Jul 2009 19:42:23 +0200
Subject: [PATCH] radeon: add basic KMS support for r6xx & r7xx chipset.
This only provide a kms drm fb device for this hw and allow X
to run with no acceleration.
---
drivers/gpu/drm/radeon/Makefile | 2 +-
drivers/gpu/drm/radeon/atombios_crtc.c | 1 +
drivers/gpu/drm/radeon/avivod.h | 60 ++
drivers/gpu/drm/radeon/r100.c | 69 ++
drivers/gpu/drm/radeon/r300.c | 2 +-
drivers/gpu/drm/radeon/r300.h | 36 -
drivers/gpu/drm/radeon/r600.c | 1243 ++++++++++++++++++++++++++++++--
drivers/gpu/drm/radeon/r600d.h | 349 +++++++++
drivers/gpu/drm/radeon/radeon.h | 51 ++-
drivers/gpu/drm/radeon/radeon_asic.h | 137 ++++-
drivers/gpu/drm/radeon/radeon_clocks.c | 10 +-
drivers/gpu/drm/radeon/radeon_device.c | 338 +++++----
drivers/gpu/drm/radeon/radeon_drv.h | 1 +
drivers/gpu/drm/radeon/radeon_ring.c | 63 +--
drivers/gpu/drm/radeon/radeon_share.h | 66 ++
drivers/gpu/drm/radeon/radeon_ttm.c | 6 +-
drivers/gpu/drm/radeon/rs400.c | 2 +-
drivers/gpu/drm/radeon/rs780.c | 102 ---
drivers/gpu/drm/radeon/rv770.c | 980 +++++++++++++++++++++++--
drivers/gpu/drm/radeon/rv770d.h | 340 +++++++++
20 files changed, 3364 insertions(+), 494 deletions(-)
create mode 100644 drivers/gpu/drm/radeon/avivod.h
delete mode 100644 drivers/gpu/drm/radeon/r300.h
create mode 100644 drivers/gpu/drm/radeon/r600d.h
delete mode 100644 drivers/gpu/drm/radeon/rs780.c
create mode 100644 drivers/gpu/drm/radeon/rv770d.h
diff --git a/drivers/gpu/drm/radeon/Makefile b/drivers/gpu/drm/radeon/Makefile
index 013d380..7384cad 100644
--- a/drivers/gpu/drm/radeon/Makefile
+++ b/drivers/gpu/drm/radeon/Makefile
@@ -13,7 +13,7 @@ radeon-$(CONFIG_DRM_RADEON_KMS) += radeon_device.o radeon_kms.o \
radeon_encoders.o radeon_display.o radeon_cursor.o radeon_i2c.o \
radeon_clocks.o radeon_fb.o radeon_gem.o radeon_ring.o radeon_irq_kms.o \
radeon_cs.o radeon_bios.o radeon_benchmark.o r100.o r300.o r420.o \
- rs400.o rs600.o rs690.o rv515.o r520.o r600.o rs780.o rv770.o \
+ rs400.o rs600.o rs690.o rv515.o r520.o r600.o rv770.o \
radeon_test.o
radeon-$(CONFIG_COMPAT) += radeon_ioc32.o
diff --git a/drivers/gpu/drm/radeon/atombios_crtc.c b/drivers/gpu/drm/radeon/atombios_crtc.c
index 74d034f..629d7c8 100644
--- a/drivers/gpu/drm/radeon/atombios_crtc.c
+++ b/drivers/gpu/drm/radeon/atombios_crtc.c
@@ -370,6 +370,7 @@ void atombios_crtc_set_pll(struct drm_crtc *crtc, struct drm_display_mode *mode)
pll_flags |= RADEON_PLL_USE_REF_DIV;
}
radeon_encoder = to_radeon_encoder(encoder);
+ break;
}
}
diff --git a/drivers/gpu/drm/radeon/avivod.h b/drivers/gpu/drm/radeon/avivod.h
new file mode 100644
index 0000000..d4e6e6e
--- /dev/null
+++ b/drivers/gpu/drm/radeon/avivod.h
@@ -0,0 +1,60 @@
+/*
+ * Copyright 2009 Advanced Micro Devices, Inc.
+ * Copyright 2009 Red Hat Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Authors: Dave Airlie
+ * Alex Deucher
+ * Jerome Glisse
+ */
+#ifndef AVIVOD_H
+#define AVIVOD_H
+
+
+#define D1CRTC_CONTROL 0x6080
+#define CRTC_EN (1 << 0)
+#define D1CRTC_UPDATE_LOCK 0x60E8
+#define D1GRPH_PRIMARY_SURFACE_ADDRESS 0x6110
+#define D1GRPH_SECONDARY_SURFACE_ADDRESS 0x6118
+
+#define D2CRTC_CONTROL 0x6880
+#define D2CRTC_UPDATE_LOCK 0x68E8
+#define D2GRPH_PRIMARY_SURFACE_ADDRESS 0x6910
+#define D2GRPH_SECONDARY_SURFACE_ADDRESS 0x6918
+
+#define D1VGA_CONTROL 0x0330
+#define DVGA_CONTROL_MODE_ENABLE (1 << 0)
+#define DVGA_CONTROL_TIMING_SELECT (1 << 8)
+#define DVGA_CONTROL_SYNC_POLARITY_SELECT (1 << 9)
+#define DVGA_CONTROL_OVERSCAN_TIMING_SELECT (1 << 10)
+#define DVGA_CONTROL_OVERSCAN_COLOR_EN (1 << 16)
+#define DVGA_CONTROL_ROTATE (1 << 24)
+#define D2VGA_CONTROL 0x0338
+
+#define VGA_HDP_CONTROL 0x328
+#define VGA_MEM_PAGE_SELECT_EN (1 << 0)
+#define VGA_MEMORY_DISABLE (1 << 4)
+#define VGA_RBBM_LOCK_DISABLE (1 << 8)
+#define VGA_SOFT_RESET (1 << 16)
+#define VGA_MEMORY_BASE_ADDRESS 0x0310
+#define VGA_RENDER_CONTROL 0x0300
+#define VGA_VSTATUS_CNTL_MASK 0x00030000
+
+#endif
diff --git a/drivers/gpu/drm/radeon/r100.c b/drivers/gpu/drm/radeon/r100.c
index f1ba8ff..59ef4f9 100644
--- a/drivers/gpu/drm/radeon/r100.c
+++ b/drivers/gpu/drm/radeon/r100.c
@@ -644,6 +644,12 @@ int r100_cp_reset(struct radeon_device *rdev)
return -1;
}
+void r100_cp_commit(struct radeon_device *rdev)
+{
+ WREG32(RADEON_CP_RB_WPTR, rdev->cp.wptr);
+ (void)RREG32(RADEON_CP_RB_WPTR);
+}
+
/*
* CS functions
@@ -2278,3 +2284,66 @@ void r100_bandwidth_update(struct radeon_device *rdev)
(unsigned int)RREG32(RADEON_GRPH2_BUFFER_CNTL));
}
}
+
+void r100_ring_ib_execute(struct radeon_device *rdev, struct radeon_ib *ib)
+{
+ radeon_ring_write(rdev, PACKET0(RADEON_CP_IB_BASE, 1));
+ radeon_ring_write(rdev, ib->gpu_addr);
+ radeon_ring_write(rdev, ib->length_dw);
+}
+
+int r100_ib_test(struct radeon_device *rdev)
+{
+ struct radeon_ib *ib;
+ uint32_t scratch;
+ uint32_t tmp = 0;
+ unsigned i;
+ int r;
+
+ r = radeon_scratch_get(rdev, &scratch);
+ if (r) {
+ DRM_ERROR("radeon: failed to get scratch reg (%d).\n", r);
+ return r;
+ }
+ WREG32(scratch, 0xCAFEDEAD);
+ r = radeon_ib_get(rdev, &ib);
+ if (r) {
+ return r;
+ }
+ ib->ptr[0] = PACKET0(scratch, 0);
+ ib->ptr[1] = 0xDEADBEEF;
+ ib->ptr[2] = PACKET2(0);
+ ib->ptr[3] = PACKET2(0);
+ ib->ptr[4] = PACKET2(0);
+ ib->ptr[5] = PACKET2(0);
+ ib->ptr[6] = PACKET2(0);
+ ib->ptr[7] = PACKET2(0);
+ ib->length_dw = 8;
+ r = radeon_ib_schedule(rdev, ib);
+ if (r) {
+ radeon_scratch_free(rdev, scratch);
+ radeon_ib_free(rdev, &ib);
+ return r;
+ }
+ r = radeon_fence_wait(ib->fence, false);
+ if (r) {
+ return r;
+ }
+ for (i = 0; i < rdev->usec_timeout; i++) {
+ tmp = RREG32(scratch);
+ if (tmp == 0xDEADBEEF) {
+ break;
+ }
+ DRM_UDELAY(1);
+ }
[...4102 lines suppressed...]
+#define MC_VM_AGP_TOP 0x2028
+#define MC_VM_AGP_BOT 0x202C
+#define MC_VM_AGP_BASE 0x2030
+#define MC_VM_FB_LOCATION 0x2024
+#define MC_VM_MB_L1_TLB0_CNTL 0x2234
+#define MC_VM_MB_L1_TLB1_CNTL 0x2238
+#define MC_VM_MB_L1_TLB2_CNTL 0x223C
+#define MC_VM_MB_L1_TLB3_CNTL 0x2240
+#define ENABLE_L1_TLB (1 << 0)
+#define ENABLE_L1_FRAGMENT_PROCESSING (1 << 1)
+#define SYSTEM_ACCESS_MODE_PA_ONLY (0 << 3)
+#define SYSTEM_ACCESS_MODE_USE_SYS_MAP (1 << 3)
+#define SYSTEM_ACCESS_MODE_IN_SYS (2 << 3)
+#define SYSTEM_ACCESS_MODE_NOT_IN_SYS (3 << 3)
+#define SYSTEM_APERTURE_UNMAPPED_ACCESS_PASS_THRU (0 << 5)
+#define EFFECTIVE_L1_TLB_SIZE(x) ((x)<<15)
+#define EFFECTIVE_L1_QUEUE_SIZE(x) ((x)<<18)
+#define MC_VM_MD_L1_TLB0_CNTL 0x2654
+#define MC_VM_MD_L1_TLB1_CNTL 0x2658
+#define MC_VM_MD_L1_TLB2_CNTL 0x265C
+#define MC_VM_SYSTEM_APERTURE_DEFAULT_ADDR 0x203C
+#define MC_VM_SYSTEM_APERTURE_HIGH_ADDR 0x2038
+#define MC_VM_SYSTEM_APERTURE_LOW_ADDR 0x2034
+
+#define PA_CL_ENHANCE 0x8A14
+#define CLIP_VTX_REORDER_ENA (1 << 0)
+#define NUM_CLIP_SEQ(x) ((x) << 1)
+#define PA_SC_AA_CONFIG 0x28C04
+#define PA_SC_CLIPRECT_RULE 0x2820C
+#define PA_SC_EDGERULE 0x28230
+#define PA_SC_FIFO_SIZE 0x8BCC
+#define SC_PRIM_FIFO_SIZE(x) ((x) << 0)
+#define SC_HIZ_TILE_FIFO_SIZE(x) ((x) << 12)
+#define PA_SC_FORCE_EOV_MAX_CNTS 0x8B24
+#define FORCE_EOV_MAX_CLK_CNT(x) ((x)<<0)
+#define FORCE_EOV_MAX_REZ_CNT(x) ((x)<<16)
+#define PA_SC_LINE_STIPPLE 0x28A0C
+#define PA_SC_LINE_STIPPLE_STATE 0x8B10
+#define PA_SC_MODE_CNTL 0x28A4C
+#define PA_SC_MULTI_CHIP_CNTL 0x8B20
+#define SC_EARLYZ_TILE_FIFO_SIZE(x) ((x) << 20)
+
+#define SCRATCH_REG0 0x8500
+#define SCRATCH_REG1 0x8504
+#define SCRATCH_REG2 0x8508
+#define SCRATCH_REG3 0x850C
+#define SCRATCH_REG4 0x8510
+#define SCRATCH_REG5 0x8514
+#define SCRATCH_REG6 0x8518
+#define SCRATCH_REG7 0x851C
+#define SCRATCH_UMSK 0x8540
+#define SCRATCH_ADDR 0x8544
+
+#define SMX_DC_CTL0 0xA020
+#define USE_HASH_FUNCTION (1 << 0)
+#define CACHE_DEPTH(x) ((x) << 1)
+#define FLUSH_ALL_ON_EVENT (1 << 10)
+#define STALL_ON_EVENT (1 << 11)
+#define SMX_EVENT_CTL 0xA02C
+#define ES_FLUSH_CTL(x) ((x) << 0)
+#define GS_FLUSH_CTL(x) ((x) << 3)
+#define ACK_FLUSH_CTL(x) ((x) << 6)
+#define SYNC_FLUSH_CTL (1 << 8)
+
+#define SPI_CONFIG_CNTL 0x9100
+#define GPR_WRITE_PRIORITY(x) ((x) << 0)
+#define DISABLE_INTERP_1 (1 << 5)
+#define SPI_CONFIG_CNTL_1 0x913C
+#define VTX_DONE_DELAY(x) ((x) << 0)
+#define INTERP_ONE_PRIM_PER_ROW (1 << 4)
+#define SPI_INPUT_Z 0x286D8
+#define SPI_PS_IN_CONTROL_0 0x286CC
+#define NUM_INTERP(x) ((x)<<0)
+#define POSITION_ENA (1<<8)
+#define POSITION_CENTROID (1<<9)
+#define POSITION_ADDR(x) ((x)<<10)
+#define PARAM_GEN(x) ((x)<<15)
+#define PARAM_GEN_ADDR(x) ((x)<<19)
+#define BARYC_SAMPLE_CNTL(x) ((x)<<26)
+#define PERSP_GRADIENT_ENA (1<<28)
+#define LINEAR_GRADIENT_ENA (1<<29)
+#define POSITION_SAMPLE (1<<30)
+#define BARYC_AT_SAMPLE_ENA (1<<31)
+
+#define SQ_CONFIG 0x8C00
+#define VC_ENABLE (1 << 0)
+#define EXPORT_SRC_C (1 << 1)
+#define DX9_CONSTS (1 << 2)
+#define ALU_INST_PREFER_VECTOR (1 << 3)
+#define DX10_CLAMP (1 << 4)
+#define CLAUSE_SEQ_PRIO(x) ((x) << 8)
+#define PS_PRIO(x) ((x) << 24)
+#define VS_PRIO(x) ((x) << 26)
+#define GS_PRIO(x) ((x) << 28)
+#define SQ_DYN_GPR_SIZE_SIMD_AB_0 0x8DB0
+#define SIMDA_RING0(x) ((x)<<0)
+#define SIMDA_RING1(x) ((x)<<8)
+#define SIMDB_RING0(x) ((x)<<16)
+#define SIMDB_RING1(x) ((x)<<24)
+#define SQ_DYN_GPR_SIZE_SIMD_AB_1 0x8DB4
+#define SQ_DYN_GPR_SIZE_SIMD_AB_2 0x8DB8
+#define SQ_DYN_GPR_SIZE_SIMD_AB_3 0x8DBC
+#define SQ_DYN_GPR_SIZE_SIMD_AB_4 0x8DC0
+#define SQ_DYN_GPR_SIZE_SIMD_AB_5 0x8DC4
+#define SQ_DYN_GPR_SIZE_SIMD_AB_6 0x8DC8
+#define SQ_DYN_GPR_SIZE_SIMD_AB_7 0x8DCC
+#define ES_PRIO(x) ((x) << 30)
+#define SQ_GPR_RESOURCE_MGMT_1 0x8C04
+#define NUM_PS_GPRS(x) ((x) << 0)
+#define NUM_VS_GPRS(x) ((x) << 16)
+#define DYN_GPR_ENABLE (1 << 27)
+#define NUM_CLAUSE_TEMP_GPRS(x) ((x) << 28)
+#define SQ_GPR_RESOURCE_MGMT_2 0x8C08
+#define NUM_GS_GPRS(x) ((x) << 0)
+#define NUM_ES_GPRS(x) ((x) << 16)
+#define SQ_MS_FIFO_SIZES 0x8CF0
+#define CACHE_FIFO_SIZE(x) ((x) << 0)
+#define FETCH_FIFO_HIWATER(x) ((x) << 8)
+#define DONE_FIFO_HIWATER(x) ((x) << 16)
+#define ALU_UPDATE_FIFO_HIWATER(x) ((x) << 24)
+#define SQ_STACK_RESOURCE_MGMT_1 0x8C10
+#define NUM_PS_STACK_ENTRIES(x) ((x) << 0)
+#define NUM_VS_STACK_ENTRIES(x) ((x) << 16)
+#define SQ_STACK_RESOURCE_MGMT_2 0x8C14
+#define NUM_GS_STACK_ENTRIES(x) ((x) << 0)
+#define NUM_ES_STACK_ENTRIES(x) ((x) << 16)
+#define SQ_THREAD_RESOURCE_MGMT 0x8C0C
+#define NUM_PS_THREADS(x) ((x) << 0)
+#define NUM_VS_THREADS(x) ((x) << 8)
+#define NUM_GS_THREADS(x) ((x) << 16)
+#define NUM_ES_THREADS(x) ((x) << 24)
+
+#define SX_DEBUG_1 0x9058
+#define ENABLE_NEW_SMX_ADDRESS (1 << 16)
+#define SX_EXPORT_BUFFER_SIZES 0x900C
+#define COLOR_BUFFER_SIZE(x) ((x) << 0)
+#define POSITION_BUFFER_SIZE(x) ((x) << 8)
+#define SMX_BUFFER_SIZE(x) ((x) << 16)
+#define SX_MISC 0x28350
+
+#define TA_CNTL_AUX 0x9508
+#define DISABLE_CUBE_WRAP (1 << 0)
+#define DISABLE_CUBE_ANISO (1 << 1)
+#define SYNC_GRADIENT (1 << 24)
+#define SYNC_WALKER (1 << 25)
+#define SYNC_ALIGNER (1 << 26)
+#define BILINEAR_PRECISION_6_BIT (0 << 31)
+#define BILINEAR_PRECISION_8_BIT (1 << 31)
+
+#define TCP_CNTL 0x9610
+
+#define VGT_CACHE_INVALIDATION 0x88C4
+#define CACHE_INVALIDATION(x) ((x)<<0)
+#define VC_ONLY 0
+#define TC_ONLY 1
+#define VC_AND_TC 2
+#define AUTO_INVLD_EN(x) ((x) << 6)
+#define NO_AUTO 0
+#define ES_AUTO 1
+#define GS_AUTO 2
+#define ES_AND_GS_AUTO 3
+#define VGT_ES_PER_GS 0x88CC
+#define VGT_GS_PER_ES 0x88C8
+#define VGT_GS_PER_VS 0x88E8
+#define VGT_GS_VERTEX_REUSE 0x88D4
+#define VGT_NUM_INSTANCES 0x8974
+#define VGT_OUT_DEALLOC_CNTL 0x28C5C
+#define DEALLOC_DIST_MASK 0x0000007F
+#define VGT_STRMOUT_EN 0x28AB0
+#define VGT_VERTEX_REUSE_BLOCK_CNTL 0x28C58
+#define VTX_REUSE_DEPTH_MASK 0x000000FF
+
+#define VM_CONTEXT0_CNTL 0x1410
+#define ENABLE_CONTEXT (1 << 0)
+#define PAGE_TABLE_DEPTH(x) (((x) & 3) << 1)
+#define RANGE_PROTECTION_FAULT_ENABLE_DEFAULT (1 << 4)
+#define VM_CONTEXT0_PAGE_TABLE_BASE_ADDR 0x153C
+#define VM_CONTEXT0_PAGE_TABLE_END_ADDR 0x157C
+#define VM_CONTEXT0_PAGE_TABLE_START_ADDR 0x155C
+#define VM_CONTEXT0_PROTECTION_FAULT_DEFAULT_ADDR 0x1518
+#define VM_L2_CNTL 0x1400
+#define ENABLE_L2_CACHE (1 << 0)
+#define ENABLE_L2_FRAGMENT_PROCESSING (1 << 1)
+#define ENABLE_L2_PTE_CACHE_LRU_UPDATE_BY_WRITE (1 << 9)
+#define EFFECTIVE_L2_QUEUE_SIZE(x) (((x) & 7) << 14)
+#define VM_L2_CNTL2 0x1404
+#define INVALIDATE_ALL_L1_TLBS (1 << 0)
+#define INVALIDATE_L2_CACHE (1 << 1)
+#define VM_L2_CNTL3 0x1408
+#define BANK_SELECT(x) ((x) << 0)
+#define CACHE_UPDATE_MODE(x) ((x) << 6)
+#define VM_L2_STATUS 0x140C
+#define L2_BUSY (1 << 0)
+
+#define WAIT_UNTIL 0x8040
+
+#endif
--
1.6.2.5
drm-vga-arb.patch:
drivers/gpu/drm/drm_irq.c | 27 +++++++++++++++++++++++++++
drivers/gpu/drm/i915/i915_dma.c | 20 ++++++++++++++++++++
drivers/gpu/drm/i915/i915_drv.h | 1 +
drivers/gpu/drm/i915/i915_reg.h | 1 +
drivers/gpu/drm/i915/intel_display.c | 23 +++++++++++++++++++++++
drivers/gpu/drm/i915/intel_drv.h | 1 +
drivers/gpu/drm/radeon/r100.c | 14 ++++++++++++++
drivers/gpu/drm/radeon/radeon.h | 2 ++
drivers/gpu/drm/radeon/radeon_asic.h | 9 +++++++++
drivers/gpu/drm/radeon/radeon_device.c | 19 +++++++++++++++++++
include/drm/drmP.h | 3 +++
11 files changed, 120 insertions(+)
Index: drm-vga-arb.patch
===================================================================
RCS file: /cvs/pkgs/rpms/kernel/devel/drm-vga-arb.patch,v
retrieving revision 1.4
retrieving revision 1.5
diff -u -p -r1.4 -r1.5
--- drm-vga-arb.patch 3 Aug 2009 06:03:07 -0000 1.4
+++ drm-vga-arb.patch 5 Aug 2009 00:18:52 -0000 1.5
@@ -1,36 +1,7 @@
-From 189bef6a28e58cb31e5e3ebb88869cd0f0dcc7be Mon Sep 17 00:00:00 2001
-From: Dave Airlie <airlied at redhat.com>
-Date: Thu, 16 Jul 2009 14:33:58 +1000
-Subject: [PATCH] drm: add support to drm for VGA arbitration.
-
-This adds 3 things to the drm,
-
-for non-modesetting drivers, it adds an irq hook
-for the vga arb to disable/enable irqs around vga arb times.
-
-radeon/kms: adds support to disable VGA decoding on r100->r500 under KMS
-intel/kms: add support to disable VGA decoding on hopefully all Intel GPUs
-
-Signed-off-by: Dave Airlie <airlied at redhat.com>
----
- drivers/gpu/drm/drm_irq.c | 27 +++++++++++++++++++++++++++
- drivers/gpu/drm/i915/i915_dma.c | 20 ++++++++++++++++++++
- drivers/gpu/drm/i915/i915_drv.h | 1 +
- drivers/gpu/drm/i915/i915_reg.h | 1 +
- drivers/gpu/drm/i915/intel_display.c | 23 +++++++++++++++++++++++
- drivers/gpu/drm/i915/intel_drv.h | 1 +
- drivers/gpu/drm/radeon/r100.c | 14 ++++++++++++++
- drivers/gpu/drm/radeon/radeon.h | 2 ++
- drivers/gpu/drm/radeon/radeon_asic.h | 9 +++++++++
- drivers/gpu/drm/radeon/radeon_device.c | 20 +++++++++++++++++++-
- include/drm/drmP.h | 3 +++
- 11 files changed, 120 insertions(+), 1 deletions(-)
-
-diff --git a/drivers/gpu/drm/drm_irq.c b/drivers/gpu/drm/drm_irq.c
-index b4a3dbc..dffc73d 100644
---- a/drivers/gpu/drm/drm_irq.c
-+++ b/drivers/gpu/drm/drm_irq.c
-@@ -37,6 +37,7 @@
+diff -up linux-2.6.30.noarch/drivers/gpu/drm/drm_irq.c.arb linux-2.6.30.noarch/drivers/gpu/drm/drm_irq.c
+--- linux-2.6.30.noarch/drivers/gpu/drm/drm_irq.c.arb 2009-08-05 10:14:24.000000000 +1000
++++ linux-2.6.30.noarch/drivers/gpu/drm/drm_irq.c 2009-08-05 10:15:15.000000000 +1000
+@@ -38,6 +38,7 @@
#include <linux/interrupt.h> /* For task queue support */
@@ -38,7 +9,7 @@ index b4a3dbc..dffc73d 100644
/**
* Get interrupt from bus id.
*
-@@ -171,6 +172,26 @@ err:
+@@ -212,6 +213,26 @@ err:
}
EXPORT_SYMBOL(drm_vblank_init);
@@ -65,7 +36,7 @@ index b4a3dbc..dffc73d 100644
/**
* Install IRQ handler.
*
-@@ -231,6 +252,9 @@ int drm_irq_install(struct drm_device *dev)
+@@ -272,6 +293,9 @@ int drm_irq_install(struct drm_device *d
return ret;
}
@@ -75,7 +46,7 @@ index b4a3dbc..dffc73d 100644
/* After installing handler */
ret = dev->driver->irq_postinstall(dev);
if (ret < 0) {
-@@ -279,6 +303,9 @@ int drm_irq_uninstall(struct drm_device * dev)
+@@ -320,6 +344,9 @@ int drm_irq_uninstall(struct drm_device
DRM_DEBUG("irq=%d\n", dev->pdev->irq);
@@ -85,10 +56,9 @@ index b4a3dbc..dffc73d 100644
dev->driver->irq_uninstall(dev);
free_irq(dev->pdev->irq, dev);
-diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c
-index 8c47831..f7e1342 100644
---- a/drivers/gpu/drm/i915/i915_dma.c
-+++ b/drivers/gpu/drm/i915/i915_dma.c
+diff -up linux-2.6.30.noarch/drivers/gpu/drm/i915/i915_dma.c.arb linux-2.6.30.noarch/drivers/gpu/drm/i915/i915_dma.c
+--- linux-2.6.30.noarch/drivers/gpu/drm/i915/i915_dma.c.arb 2009-08-05 07:03:48.000000000 +1000
++++ linux-2.6.30.noarch/drivers/gpu/drm/i915/i915_dma.c 2009-08-05 10:15:15.000000000 +1000
@@ -33,6 +33,7 @@
#include "i915_drm.h"
#include "i915_drv.h"
@@ -97,7 +67,7 @@ index 8c47831..f7e1342 100644
#define I915_DRV "i915_drv"
/* Really want an OS-independent resettable timer. Would like to have
-@@ -984,6 +985,19 @@ static int i915_probe_agp(struct drm_device *dev, uint32_t *aperture_size,
+@@ -984,6 +985,19 @@ static int i915_probe_agp(struct drm_dev
return 0;
}
@@ -117,7 +87,7 @@ index 8c47831..f7e1342 100644
static int i915_load_modeset_init(struct drm_device *dev,
unsigned long prealloc_size,
unsigned long agp_size)
-@@ -1029,6 +1043,11 @@ static int i915_load_modeset_init(struct drm_device *dev,
+@@ -1029,6 +1043,11 @@ static int i915_load_modeset_init(struct
if (ret)
DRM_INFO("failed to find VBIOS tables\n");
@@ -129,7 +99,7 @@ index 8c47831..f7e1342 100644
ret = drm_irq_install(dev);
if (ret)
goto destroy_ringbuffer;
-@@ -1278,6 +1297,7 @@ int i915_driver_unload(struct drm_device *dev)
+@@ -1278,6 +1297,7 @@ int i915_driver_unload(struct drm_device
if (drm_core_check_feature(dev, DRIVER_MODESET)) {
drm_irq_uninstall(dev);
@@ -137,11 +107,10 @@ index 8c47831..f7e1342 100644
}
if (dev->pdev->msi_enabled)
-diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
-index d087528..61a54a1 100644
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -747,6 +747,7 @@ static inline void opregion_enable_asle(struct drm_device *dev) { return; }
+diff -up linux-2.6.30.noarch/drivers/gpu/drm/i915/i915_drv.h.arb linux-2.6.30.noarch/drivers/gpu/drm/i915/i915_drv.h
+--- linux-2.6.30.noarch/drivers/gpu/drm/i915/i915_drv.h.arb 2009-08-05 10:14:24.000000000 +1000
++++ linux-2.6.30.noarch/drivers/gpu/drm/i915/i915_drv.h 2009-08-05 10:15:15.000000000 +1000
+@@ -760,6 +760,7 @@ static inline void opregion_enable_asle(
/* modesetting */
extern void intel_modeset_init(struct drm_device *dev);
extern void intel_modeset_cleanup(struct drm_device *dev);
@@ -149,10 +118,9 @@ index d087528..61a54a1 100644
/**
* Lock test for when it's just for synchronization of ring access.
-diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
-index 6c08584..3e3145e 100644
---- a/drivers/gpu/drm/i915/i915_reg.h
-+++ b/drivers/gpu/drm/i915/i915_reg.h
+diff -up linux-2.6.30.noarch/drivers/gpu/drm/i915/i915_reg.h.arb linux-2.6.30.noarch/drivers/gpu/drm/i915/i915_reg.h
+--- linux-2.6.30.noarch/drivers/gpu/drm/i915/i915_reg.h.arb 2009-08-05 10:14:24.000000000 +1000
++++ linux-2.6.30.noarch/drivers/gpu/drm/i915/i915_reg.h 2009-08-05 10:15:15.000000000 +1000
@@ -30,6 +30,7 @@
* fb aperture size and the amount of pre-reserved memory.
*/
@@ -161,11 +129,10 @@ index 6c08584..3e3145e 100644
#define INTEL_GMCH_ENABLED 0x4
#define INTEL_GMCH_MEM_MASK 0x1
#define INTEL_GMCH_MEM_64M 0x1
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 508838e..5440f3c 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -3188,3 +3188,26 @@ struct drm_encoder *intel_best_encoder(struct drm_connector *connector)
+diff -up linux-2.6.30.noarch/drivers/gpu/drm/i915/intel_display.c.arb linux-2.6.30.noarch/drivers/gpu/drm/i915/intel_display.c
+--- linux-2.6.30.noarch/drivers/gpu/drm/i915/intel_display.c.arb 2009-08-05 10:14:24.000000000 +1000
++++ linux-2.6.30.noarch/drivers/gpu/drm/i915/intel_display.c 2009-08-05 10:15:15.000000000 +1000
+@@ -3871,3 +3871,26 @@ struct drm_encoder *intel_best_encoder(s
return &intel_output->enc;
}
@@ -192,22 +159,20 @@ index 508838e..5440f3c 100644
+ pci_write_config_word(bridge_dev, INTEL_GMCH_CTRL, gmch_ctrl);
+ return 0;
+}
-diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
-index 004541c..a715f80 100644
---- a/drivers/gpu/drm/i915/intel_drv.h
-+++ b/drivers/gpu/drm/i915/intel_drv.h
-@@ -154,4 +154,5 @@ extern int intel_framebuffer_create(struct drm_device *dev,
+diff -up linux-2.6.30.noarch/drivers/gpu/drm/i915/intel_drv.h.arb linux-2.6.30.noarch/drivers/gpu/drm/i915/intel_drv.h
+--- linux-2.6.30.noarch/drivers/gpu/drm/i915/intel_drv.h.arb 2009-08-05 10:14:24.000000000 +1000
++++ linux-2.6.30.noarch/drivers/gpu/drm/i915/intel_drv.h 2009-08-05 10:15:15.000000000 +1000
+@@ -161,4 +161,5 @@ extern int intel_framebuffer_create(stru
struct drm_mode_fb_cmd *mode_cmd,
struct drm_framebuffer **fb,
struct drm_gem_object *obj);
+
#endif /* __INTEL_DRV_H__ */
-diff --git a/drivers/gpu/drm/radeon/r100.c b/drivers/gpu/drm/radeon/r100.c
-index c550932..b091ba7 100644
---- a/drivers/gpu/drm/radeon/r100.c
-+++ b/drivers/gpu/drm/radeon/r100.c
-@@ -1256,6 +1256,20 @@ static void r100_vram_get_type(struct radeon_device *rdev)
- }
+diff -up linux-2.6.30.noarch/drivers/gpu/drm/radeon/r100.c.arb linux-2.6.30.noarch/drivers/gpu/drm/radeon/r100.c
+--- linux-2.6.30.noarch/drivers/gpu/drm/radeon/r100.c.arb 2009-08-05 10:14:23.000000000 +1000
++++ linux-2.6.30.noarch/drivers/gpu/drm/radeon/r100.c 2009-08-05 10:15:15.000000000 +1000
+@@ -1497,6 +1497,20 @@ void r100_vram_init_sizes(struct radeon_
+ rdev->mc.real_vram_size = rdev->mc.aper_size;
}
+void r100_vga_set_state(struct radeon_device *rdev, bool state)
@@ -227,31 +192,10 @@ index c550932..b091ba7 100644
void r100_vram_info(struct radeon_device *rdev)
{
r100_vram_get_type(rdev);
-diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h
-index d61f2fc..655f6af 100644
---- a/drivers/gpu/drm/radeon/radeon.h
-+++ b/drivers/gpu/drm/radeon/radeon.h
-@@ -499,6 +499,7 @@ struct radeon_asic {
- int (*init)(struct radeon_device *rdev);
- void (*errata)(struct radeon_device *rdev);
- void (*vram_info)(struct radeon_device *rdev);
-+ void (*vga_set_state)(struct radeon_device *rdev, bool state);
- int (*gpu_reset)(struct radeon_device *rdev);
- int (*mc_init)(struct radeon_device *rdev);
- void (*mc_fini)(struct radeon_device *rdev);
-@@ -773,6 +774,7 @@ static inline void radeon_ring_write(struct radeon_device *rdev, uint32_t v)
- #define radeon_cs_parse(p) rdev->asic->cs_parse((p))
- #define radeon_errata(rdev) (rdev)->asic->errata((rdev))
- #define radeon_vram_info(rdev) (rdev)->asic->vram_info((rdev))
-+#define radeon_vga_set_state(rdev, state) (rdev)->asic->vga_set_state((rdev), (state))
- #define radeon_gpu_reset(rdev) (rdev)->asic->gpu_reset((rdev))
- #define radeon_mc_init(rdev) (rdev)->asic->mc_init((rdev))
- #define radeon_mc_fini(rdev) (rdev)->asic->mc_fini((rdev))
-diff --git a/drivers/gpu/drm/radeon/radeon_asic.h b/drivers/gpu/drm/radeon/radeon_asic.h
-index e2e5673..59c505c 100644
---- a/drivers/gpu/drm/radeon/radeon_asic.h
-+++ b/drivers/gpu/drm/radeon/radeon_asic.h
-@@ -46,6 +46,7 @@ uint32_t r100_mm_rreg(struct radeon_device *rdev, uint32_t reg);
+diff -up linux-2.6.30.noarch/drivers/gpu/drm/radeon/radeon_asic.h.arb linux-2.6.30.noarch/drivers/gpu/drm/radeon/radeon_asic.h
+--- linux-2.6.30.noarch/drivers/gpu/drm/radeon/radeon_asic.h.arb 2009-08-05 10:14:24.000000000 +1000
++++ linux-2.6.30.noarch/drivers/gpu/drm/radeon/radeon_asic.h 2009-08-05 10:15:15.000000000 +1000
+@@ -46,6 +46,7 @@ uint32_t r100_mm_rreg(struct radeon_devi
void r100_mm_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v);
void r100_errata(struct radeon_device *rdev);
void r100_vram_info(struct radeon_device *rdev);
@@ -259,7 +203,7 @@ index e2e5673..59c505c 100644
int r100_gpu_reset(struct radeon_device *rdev);
int r100_mc_init(struct radeon_device *rdev);
void r100_mc_fini(struct radeon_device *rdev);
-@@ -76,6 +77,7 @@ static struct radeon_asic r100_asic = {
+@@ -84,6 +85,7 @@ static struct radeon_asic r100_asic = {
.init = &r100_init,
.errata = &r100_errata,
.vram_info = &r100_vram_info,
@@ -267,7 +211,7 @@ index e2e5673..59c505c 100644
.gpu_reset = &r100_gpu_reset,
.mc_init = &r100_mc_init,
.mc_fini = &r100_mc_fini,
-@@ -132,6 +134,7 @@ static struct radeon_asic r300_asic = {
+@@ -147,6 +149,7 @@ static struct radeon_asic r300_asic = {
.init = &r300_init,
.errata = &r300_errata,
.vram_info = &r300_vram_info,
@@ -275,7 +219,7 @@ index e2e5673..59c505c 100644
.gpu_reset = &r300_gpu_reset,
.mc_init = &r300_mc_init,
.mc_fini = &r300_mc_fini,
-@@ -169,6 +172,7 @@ static struct radeon_asic r420_asic = {
+@@ -190,6 +193,7 @@ static struct radeon_asic r420_asic = {
.init = &r300_init,
.errata = &r420_errata,
.vram_info = &r420_vram_info,
@@ -283,7 +227,7 @@ index e2e5673..59c505c 100644
.gpu_reset = &r300_gpu_reset,
.mc_init = &r420_mc_init,
.mc_fini = &r420_mc_fini,
-@@ -213,6 +217,7 @@ static struct radeon_asic rs400_asic = {
+@@ -240,6 +244,7 @@ static struct radeon_asic rs400_asic = {
.init = &r300_init,
.errata = &rs400_errata,
.vram_info = &rs400_vram_info,
@@ -291,7 +235,7 @@ index e2e5673..59c505c 100644
.gpu_reset = &r300_gpu_reset,
.mc_init = &rs400_mc_init,
.mc_fini = &rs400_mc_fini,
-@@ -258,6 +263,7 @@ static struct radeon_asic rs600_asic = {
+@@ -292,6 +297,7 @@ static struct radeon_asic rs600_asic = {
.init = &r300_init,
.errata = &rs600_errata,
.vram_info = &rs600_vram_info,
@@ -299,7 +243,7 @@ index e2e5673..59c505c 100644
.gpu_reset = &r300_gpu_reset,
.mc_init = &rs600_mc_init,
.mc_fini = &rs600_mc_fini,
-@@ -298,6 +304,7 @@ static struct radeon_asic rs690_asic = {
+@@ -337,6 +343,7 @@ static struct radeon_asic rs690_asic = {
.init = &r300_init,
.errata = &rs690_errata,
.vram_info = &rs690_vram_info,
@@ -307,7 +251,7 @@ index e2e5673..59c505c 100644
.gpu_reset = &r300_gpu_reset,
.mc_init = &rs690_mc_init,
.mc_fini = &rs690_mc_fini,
-@@ -343,6 +350,7 @@ static struct radeon_asic rv515_asic = {
+@@ -389,6 +396,7 @@ static struct radeon_asic rv515_asic = {
.init = &rv515_init,
.errata = &rv515_errata,
.vram_info = &rv515_vram_info,
@@ -315,7 +259,7 @@ index e2e5673..59c505c 100644
.gpu_reset = &rv515_gpu_reset,
.mc_init = &rv515_mc_init,
.mc_fini = &rv515_mc_fini,
-@@ -381,6 +389,7 @@ static struct radeon_asic r520_asic = {
+@@ -432,6 +440,7 @@ static struct radeon_asic r520_asic = {
.init = &rv515_init,
.errata = &r520_errata,
.vram_info = &r520_vram_info,
@@ -323,10 +267,9 @@ index e2e5673..59c505c 100644
.gpu_reset = &rv515_gpu_reset,
.mc_init = &r520_mc_init,
.mc_fini = &r520_mc_fini,
-diff --git a/drivers/gpu/drm/radeon/radeon_device.c b/drivers/gpu/drm/radeon/radeon_device.c
-index f97563d..d84e924 100644
---- a/drivers/gpu/drm/radeon/radeon_device.c
-+++ b/drivers/gpu/drm/radeon/radeon_device.c
+diff -up linux-2.6.30.noarch/drivers/gpu/drm/radeon/radeon_device.c.arb linux-2.6.30.noarch/drivers/gpu/drm/radeon/radeon_device.c
+--- linux-2.6.30.noarch/drivers/gpu/drm/radeon/radeon_device.c.arb 2009-08-05 10:14:24.000000000 +1000
++++ linux-2.6.30.noarch/drivers/gpu/drm/radeon/radeon_device.c 2009-08-05 10:15:29.000000000 +1000
@@ -29,6 +29,7 @@
#include <drm/drmP.h>
#include <drm/drm_crtc_helper.h>
@@ -335,7 +278,7 @@ index f97563d..d84e924 100644
#include "radeon_reg.h"
#include "radeon.h"
#include "radeon_asic.h"
-@@ -440,7 +441,18 @@ void radeon_combios_fini(struct radeon_device *rdev)
+@@ -475,7 +476,18 @@ void radeon_combios_fini(struct radeon_d
int radeon_modeset_init(struct radeon_device *rdev);
void radeon_modeset_fini(struct radeon_device *rdev);
@@ -354,33 +297,50 @@ index f97563d..d84e924 100644
/*
* Radeon device.
*/
-@@ -516,7 +528,12 @@ int radeon_device_init(struct radeon_device *rdev,
- /* Initialize surface registers */
- radeon_surface_init(rdev);
-
-- /* TODO: disable VGA need to use VGA request */
-+ /* if we have > 1 VGA cards, then disable the radeon VGA resources */
-+ ret = vga_client_register(rdev->pdev, rdev, NULL, radeon_vga_set_decode);
-+ if (ret) {
-+ return -EINVAL;
-+ }
-+
- /* BIOS*/
- if (!radeon_get_bios(rdev)) {
- if (ASIC_IS_AVIVO(rdev))
-@@ -652,6 +669,7 @@ void radeon_device_fini(struct radeon_device *rdev)
- radeon_agp_fini(rdev);
+@@ -566,6 +578,12 @@ int radeon_device_init(struct radeon_dev
+ /* Initialize surface registers */
+ radeon_surface_init(rdev);
+
++ /* if we have > 1 VGA cards, then disable the radeon VGA resources */
++ ret = vga_client_register(rdev->pdev, rdev, NULL, radeon_vga_set_decode);
++ if (ret) {
++ return -EINVAL;
++ }
++
+ /* TODO: disable VGA need to use VGA request */
+ /* BIOS*/
+ if (!radeon_get_bios(rdev)) {
+@@ -700,6 +718,7 @@ void radeon_device_fini(struct radeon_de
+ radeon_agp_fini(rdev);
#endif
- radeon_irq_kms_fini(rdev);
-+ vga_client_register(rdev->pdev, NULL, NULL, NULL);
- radeon_fence_driver_fini(rdev);
- radeon_clocks_fini(rdev);
- if (rdev->is_atom_bios) {
-diff --git a/include/drm/drmP.h b/include/drm/drmP.h
-index 45b67d9..95106c7 100644
---- a/include/drm/drmP.h
-+++ b/include/drm/drmP.h
-@@ -786,6 +786,9 @@ struct drm_driver {
+ radeon_irq_kms_fini(rdev);
++ vga_client_register(rdev->pdev, NULL, NULL, NULL);
+ radeon_fence_driver_fini(rdev);
+ radeon_clocks_fini(rdev);
+ radeon_object_fini(rdev);
+diff -up linux-2.6.30.noarch/drivers/gpu/drm/radeon/radeon.h.arb linux-2.6.30.noarch/drivers/gpu/drm/radeon/radeon.h
+--- linux-2.6.30.noarch/drivers/gpu/drm/radeon/radeon.h.arb 2009-08-05 10:14:24.000000000 +1000
++++ linux-2.6.30.noarch/drivers/gpu/drm/radeon/radeon.h 2009-08-05 10:15:15.000000000 +1000
+@@ -579,6 +579,7 @@ struct radeon_asic {
+ int (*suspend)(struct radeon_device *rdev);
+ void (*errata)(struct radeon_device *rdev);
+ void (*vram_info)(struct radeon_device *rdev);
++ void (*vga_set_state)(struct radeon_device *rdev, bool state);
+ int (*gpu_reset)(struct radeon_device *rdev);
+ int (*mc_init)(struct radeon_device *rdev);
+ void (*mc_fini)(struct radeon_device *rdev);
+@@ -879,6 +880,7 @@ static inline void radeon_ring_write(str
+ #define radeon_cs_parse(p) rdev->asic->cs_parse((p))
+ #define radeon_errata(rdev) (rdev)->asic->errata((rdev))
+ #define radeon_vram_info(rdev) (rdev)->asic->vram_info((rdev))
++#define radeon_vga_set_state(rdev, state) (rdev)->asic->vga_set_state((rdev), (state))
+ #define radeon_gpu_reset(rdev) (rdev)->asic->gpu_reset((rdev))
+ #define radeon_mc_init(rdev) (rdev)->asic->mc_init((rdev))
+ #define radeon_mc_fini(rdev) (rdev)->asic->mc_fini((rdev))
+diff -up linux-2.6.30.noarch/include/drm/drmP.h.arb linux-2.6.30.noarch/include/drm/drmP.h
+--- linux-2.6.30.noarch/include/drm/drmP.h.arb 2009-08-05 10:14:24.000000000 +1000
++++ linux-2.6.30.noarch/include/drm/drmP.h 2009-08-05 10:15:15.000000000 +1000
+@@ -797,6 +797,9 @@ struct drm_driver {
int (*gem_init_object) (struct drm_gem_object *obj);
void (*gem_free_object) (struct drm_gem_object *obj);
@@ -390,6 +350,3 @@ index 45b67d9..95106c7 100644
/* Driver private ops for this object */
struct vm_operations_struct *gem_vm_ops;
---
-1.5.4.1
-
Index: kernel.spec
===================================================================
RCS file: /cvs/pkgs/rpms/kernel/devel/kernel.spec,v
retrieving revision 1.1689
retrieving revision 1.1690
diff -u -p -r1.1689 -r1.1690
--- kernel.spec 4 Aug 2009 15:18:23 -0000 1.1689
+++ kernel.spec 5 Aug 2009 00:18:53 -0000 1.1690
@@ -676,6 +676,7 @@ Patch1821: drm-page-flip.patch
# anholt's tree as of 2009-08-03
Patch1824: drm-intel-next.patch
Patch1825: drm-intel-pm.patch
+Patch1826: drm-r600-kms.patch
# vga arb
Patch1900: linux-2.6-vga-arb.patch
@@ -1278,6 +1279,8 @@ ApplyPatch linux-2.6-ksm-kvm.patch
ApplyPatch linux-2.6-e1000-ich9.patch
# Nouveau DRM + drm fixes
+ApplyPatch drm-r600-kms.patch
+
ApplyPatch drm-nouveau.patch
# pm broken on my thinkpad t60p - airlied
#ApplyPatch drm-radeon-pm.patch
@@ -1946,6 +1949,10 @@ fi
# and build.
%changelog
+* Wed Aug 05 2009 Dave Airlie <airlied at redhat.com>
+- Add Jeromes initial r600 kms work.
+- rebase arb patch
+
* Tue Aug 04 2009 Kyle McMartin <kyle at redhat.com>
- alsa-tell-user-that-stream-to-be-rewound-is-suspended.patch: apply patch
destined for 2.6.32, requested by Lennart.
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