rpms/kernel/devel drm-radeon-dp-support.patch, NONE, 1.1 drm-radeon-fixes.patch, 1.2, 1.3 kernel.spec, 1.1859, 1.1860

Dave Airlie airlied at fedoraproject.org
Wed Dec 2 01:54:01 UTC 2009


Author: airlied

Update of /cvs/pkgs/rpms/kernel/devel
In directory cvs1.fedora.phx.redhat.com:/tmp/cvs-serv9312

Modified Files:
	kernel.spec 
Added Files:
	drm-radeon-dp-support.patch drm-radeon-fixes.patch 
Log Message:
* Wed Dec 02 2009 Dave Airlie <airlied at redhat.com> 2.6.32-0.62.rc8.git2
- forward port radeon fixes from F-12 + add radeon display port support


drm-radeon-dp-support.patch:
 b/drivers/gpu/drm/Makefile                   |    2 
 b/drivers/gpu/drm/drm_dp_helper.c            |  274 +++++++++
 b/drivers/gpu/drm/i915/Makefile              |    1 
 b/drivers/gpu/drm/i915/intel_display.c       |    1 
 b/drivers/gpu/drm/i915/intel_dp.c            |    2 
 b/drivers/gpu/drm/radeon/Makefile            |    2 
 b/drivers/gpu/drm/radeon/atom.c              |   33 +
 b/drivers/gpu/drm/radeon/atom.h              |    2 
 b/drivers/gpu/drm/radeon/atombios_dp.c       |  750 +++++++++++++++++++++++++++
 b/drivers/gpu/drm/radeon/radeon_atombios.c   |   57 +-
 b/drivers/gpu/drm/radeon/radeon_combios.c    |  158 +++--
 b/drivers/gpu/drm/radeon/radeon_connectors.c |   91 +++
 b/drivers/gpu/drm/radeon/radeon_device.c     |    2 
 b/drivers/gpu/drm/radeon/radeon_display.c    |    5 
 b/drivers/gpu/drm/radeon/radeon_encoders.c   |  189 ++++--
 b/drivers/gpu/drm/radeon/radeon_i2c.c        |   73 ++
 b/drivers/gpu/drm/radeon/radeon_mode.h       |   39 +
 b/drivers/gpu/drm/radeon/radeon_reg.h        |   12 
 b/include/drm/drm_dp_helper.c                |  273 +++++++++
 b/include/drm/drm_dp_helper.h                |  174 ++++++
 drivers/gpu/drm/i915/intel_dp.h              |  144 -----
 drivers/gpu/drm/i915/intel_dp_i2c.c          |  273 ---------
 22 files changed, 1956 insertions(+), 601 deletions(-)

--- NEW FILE drm-radeon-dp-support.patch ---
diff --git a/drivers/gpu/drm/Makefile b/drivers/gpu/drm/Makefile
index 3c8827a..5ce2ce8 100644
--- a/drivers/gpu/drm/Makefile
+++ b/drivers/gpu/drm/Makefile
@@ -15,7 +15,7 @@ drm-y       :=	drm_auth.o drm_bufs.o drm_cache.o \
 
 drm-$(CONFIG_COMPAT) += drm_ioc32.o
 
-drm_kms_helper-y := drm_fb_helper.o drm_crtc_helper.o
+drm_kms_helper-y := drm_fb_helper.o drm_crtc_helper.o drm_dp_helper.o
 
 obj-$(CONFIG_DRM_KMS_HELPER) += drm_kms_helper.o
 
diff --git a/drivers/gpu/drm/drm_dp_helper.c b/drivers/gpu/drm/drm_dp_helper.c
new file mode 100644
index 0000000..70399b2
--- /dev/null
+++ b/drivers/gpu/drm/drm_dp_helper.c
@@ -0,0 +1,274 @@
+/*
+ * Copyright © 2009 Keith Packard
+ *
+ * Permission to use, copy, modify, distribute, and sell this software and its
+ * documentation for any purpose is hereby granted without fee, provided that
+ * the above copyright notice appear in all copies and that both that copyright
+ * notice and this permission notice appear in supporting documentation, and
+ * that the name of the copyright holders not be used in advertising or
+ * publicity pertaining to distribution of the software without specific,
+ * written prior permission.  The copyright holders make no representations
+ * about the suitability of this software for any purpose.  It is provided "as
+ * is" without express or implied warranty.
+ *
+ * THE COPYRIGHT HOLDERS DISCLAIM ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
+ * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
+ * EVENT SHALL THE COPYRIGHT HOLDERS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
+ * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
+ * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
+ * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE
+ * OF THIS SOFTWARE.
+ */
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/delay.h>
+#include <linux/slab.h>
+#include <linux/init.h>
+#include <linux/errno.h>
+#include <linux/sched.h>
+#include <linux/i2c.h>
+#include "drm_dp_helper.h"
+#include "drmP.h"
+
+/* Run a single AUX_CH I2C transaction, writing/reading data as necessary */
+
+#define MODE_I2C_START	1
+#define MODE_I2C_WRITE	2
+#define MODE_I2C_READ	4
+#define MODE_I2C_STOP	8
+
+static int
+i2c_algo_dp_aux_transaction(struct i2c_adapter *adapter, int mode,
+			    uint8_t write_byte, uint8_t *read_byte)
+{
+	struct i2c_algo_dp_aux_data *algo_data = adapter->algo_data;
+	uint16_t address = algo_data->address;
+	uint8_t msg[5];
+	uint8_t reply[2];
+	int msg_bytes;
+	int reply_bytes;
+	int ret;
+
+	memset(msg, 0, 5);
+	/* Set up the command byte */
+	if (mode & MODE_I2C_READ)
+		msg[0] = AUX_I2C_READ << 4;
+	else
+		msg[0] = AUX_I2C_WRITE << 4;
+
+	if (!(mode & MODE_I2C_STOP))
+		msg[0] |= AUX_I2C_MOT << 4;
+
+	msg[1] = address >> 8;
+	msg[2] = address;
+
+	switch (mode) {
+	case MODE_I2C_WRITE:
+		msg[3] = 0;
+		msg[4] = write_byte;
+		msg_bytes = 5;
+		reply_bytes = 1;
+		break;
+	case MODE_I2C_READ:
+		msg[3] = 0;
+		msg_bytes = 4;
+		reply_bytes = 2;
+		break;
+	default:
+		msg_bytes = 3;
+		reply_bytes = 1;
+		break;
+	}
+
+	for (;;) {
+		ret = (*algo_data->aux_ch)(adapter,
+					   msg, msg_bytes,
+					   reply, reply_bytes);
+		if (ret < 0) {
+			DRM_DEBUG("aux_ch failed %d\n", ret);
+			return ret;
+		}
+		switch (reply[0] & AUX_I2C_REPLY_MASK) {
+		case AUX_I2C_REPLY_ACK:
+			if (mode == MODE_I2C_READ) {
+				*read_byte = reply[1];
+			}
+			return reply_bytes - 1;
+		case AUX_I2C_REPLY_NACK:
+			DRM_DEBUG("aux_ch nack\n");
+			return -EREMOTEIO;
+		case AUX_I2C_REPLY_DEFER:
+			DRM_DEBUG("aux_ch defer\n");
+			udelay(100);
+			break;
+		default:
+			DRM_ERROR("aux_ch invalid reply 0x%02x\n", reply[0]);
+			return -EREMOTEIO;
+		}
+	}
+}
+
+/*
+ * I2C over AUX CH
+ */
+
+/*
+ * Send the address. If the I2C link is running, this 'restarts'
+ * the connection with the new address, this is used for doing
+ * a write followed by a read (as needed for DDC)
+ */
+static int
+i2c_algo_dp_aux_address(struct i2c_adapter *adapter, u16 address, bool reading)
+{
+	struct i2c_algo_dp_aux_data *algo_data = adapter->algo_data;
+	int mode = MODE_I2C_START;
+	int ret;
+
+	if (reading)
+		mode |= MODE_I2C_READ;
+	else
+		mode |= MODE_I2C_WRITE;
+	algo_data->address = address;
+	algo_data->running = true;
+	ret = i2c_algo_dp_aux_transaction(adapter, mode, 0, NULL);
+	return ret;
+}
+
+/*
+ * Stop the I2C transaction. This closes out the link, sending
+ * a bare address packet with the MOT bit turned off
+ */
+static void
+i2c_algo_dp_aux_stop(struct i2c_adapter *adapter, bool reading)
+{
+	struct i2c_algo_dp_aux_data *algo_data = adapter->algo_data;
+	int mode = MODE_I2C_STOP;
+
+	if (reading)
+		mode |= MODE_I2C_READ;
+	else
+		mode |= MODE_I2C_WRITE;
+	if (algo_data->running) {
+		(void) i2c_algo_dp_aux_transaction(adapter, mode, 0, NULL);
+		algo_data->running = false;
+	}
+}
+
+/*
+ * Write a single byte to the current I2C address, the
+ * the I2C link must be running or this returns -EIO
+ */
+static int
+i2c_algo_dp_aux_put_byte(struct i2c_adapter *adapter, u8 byte)
+{
+	struct i2c_algo_dp_aux_data *algo_data = adapter->algo_data;
+	int ret;
+
+	if (!algo_data->running)
+		return -EIO;
+
+	ret = i2c_algo_dp_aux_transaction(adapter, MODE_I2C_WRITE, byte, NULL);
+	return ret;
+}
+
+/*
+ * Read a single byte from the current I2C address, the
+ * I2C link must be running or this returns -EIO
+ */
+static int
+i2c_algo_dp_aux_get_byte(struct i2c_adapter *adapter, u8 *byte_ret)
[...2893 lines suppressed...]
+i2c_dp_aux_prepare_bus(struct i2c_adapter *adapter)
+{
+	adapter->algo = &i2c_dp_aux_algo;
+	adapter->retries = 3;
+	i2c_dp_aux_reset_bus(adapter);
+	return 0;
+}
+
+int
+i2c_dp_aux_add_bus(struct i2c_adapter *adapter)
+{
+	int error;
+	
+	error = i2c_dp_aux_prepare_bus(adapter);
+	if (error)
+		return error;
+	error = i2c_add_adapter(adapter);
+	return error;
+}
+EXPORT_SYMBOL(i2c_dp_aux_add_bus);
diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
new file mode 100644
index 0000000..dc56b2c
--- /dev/null
+++ b/include/drm/drm_dp_helper.h
@@ -0,0 +1,174 @@
+/*
+ * Copyright © 2008 Keith Packard
+ *
+ * Permission to use, copy, modify, distribute, and sell this software and its
+ * documentation for any purpose is hereby granted without fee, provided that
+ * the above copyright notice appear in all copies and that both that copyright
+ * notice and this permission notice appear in supporting documentation, and
+ * that the name of the copyright holders not be used in advertising or
+ * publicity pertaining to distribution of the software without specific,
+ * written prior permission.  The copyright holders make no representations
+ * about the suitability of this software for any purpose.  It is provided "as
+ * is" without express or implied warranty.
+ *
+ * THE COPYRIGHT HOLDERS DISCLAIM ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
+ * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
+ * EVENT SHALL THE COPYRIGHT HOLDERS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
+ * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
+ * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
+ * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE
+ * OF THIS SOFTWARE.
+ */
+
+#ifndef _DRM_DP_HELPER_H_
+#define _DRM_DP_HELPER_H_
+/* From the VESA DisplayPort spec */
+
+#define AUX_NATIVE_WRITE	0x8
+#define AUX_NATIVE_READ		0x9
+#define AUX_I2C_WRITE		0x0
+#define AUX_I2C_READ		0x1
+#define AUX_I2C_STATUS		0x2
+#define AUX_I2C_MOT		0x4
+
+#define AUX_NATIVE_REPLY_ACK	(0x0 << 4)
+#define AUX_NATIVE_REPLY_NACK	(0x1 << 4)
+#define AUX_NATIVE_REPLY_DEFER	(0x2 << 4)
+#define AUX_NATIVE_REPLY_MASK	(0x3 << 4)
+
+#define AUX_I2C_REPLY_ACK	(0x0 << 6)
+#define AUX_I2C_REPLY_NACK	(0x1 << 6)
+#define AUX_I2C_REPLY_DEFER	(0x2 << 6)
+#define AUX_I2C_REPLY_MASK	(0x3 << 6)
+
+/* AUX CH addresses */
+/* DPCD */
+#define DP_DPCD_REV                         0x000
+
+#define DP_MAX_LINK_RATE                    0x001
+
+#define DP_MAX_LANE_COUNT                   0x002
+# define DP_MAX_LANE_COUNT_MASK		    0x1f
+# define DP_ENHANCED_FRAME_CAP		    (1 << 7)
+
+#define DP_MAX_DOWNSPREAD                   0x003
+# define DP_NO_AUX_HANDSHAKE_LINK_TRAINING  (1 << 6)
+
+#define DP_NORP                             0x004
+
+#define DP_DOWNSTREAMPORT_PRESENT           0x005
+# define DP_DWN_STRM_PORT_PRESENT           (1 << 0)
+# define DP_DWN_STRM_PORT_TYPE_MASK         0x06
+/* 00b = DisplayPort */
+/* 01b = Analog */
+/* 10b = TMDS or HDMI */
+/* 11b = Other */
+# define DP_FORMAT_CONVERSION               (1 << 3)
+
+#define DP_MAIN_LINK_CHANNEL_CODING         0x006
+
+/* link configuration */
+#define	DP_LINK_BW_SET		            0x100
+# define DP_LINK_BW_1_62		    0x06
+# define DP_LINK_BW_2_7			    0x0a
+
+#define DP_LANE_COUNT_SET	            0x101
+# define DP_LANE_COUNT_MASK		    0x0f
+# define DP_LANE_COUNT_ENHANCED_FRAME_EN    (1 << 7)
+
+#define DP_TRAINING_PATTERN_SET	            0x102
+# define DP_TRAINING_PATTERN_DISABLE	    0
+# define DP_TRAINING_PATTERN_1		    1
+# define DP_TRAINING_PATTERN_2		    2
+# define DP_TRAINING_PATTERN_MASK	    0x3
+
+# define DP_LINK_QUAL_PATTERN_DISABLE	    (0 << 2)
+# define DP_LINK_QUAL_PATTERN_D10_2	    (1 << 2)
+# define DP_LINK_QUAL_PATTERN_ERROR_RATE    (2 << 2)
+# define DP_LINK_QUAL_PATTERN_PRBS7	    (3 << 2)
+# define DP_LINK_QUAL_PATTERN_MASK	    (3 << 2)
+
+# define DP_RECOVERED_CLOCK_OUT_EN	    (1 << 4)
+# define DP_LINK_SCRAMBLING_DISABLE	    (1 << 5)
+
+# define DP_SYMBOL_ERROR_COUNT_BOTH	    (0 << 6)
+# define DP_SYMBOL_ERROR_COUNT_DISPARITY    (1 << 6)
+# define DP_SYMBOL_ERROR_COUNT_SYMBOL	    (2 << 6)
+# define DP_SYMBOL_ERROR_COUNT_MASK	    (3 << 6)
+
+#define DP_TRAINING_LANE0_SET		    0x103
+#define DP_TRAINING_LANE1_SET		    0x104
+#define DP_TRAINING_LANE2_SET		    0x105
+#define DP_TRAINING_LANE3_SET		    0x106
+
+# define DP_TRAIN_VOLTAGE_SWING_MASK	    0x3
+# define DP_TRAIN_VOLTAGE_SWING_SHIFT	    0
+# define DP_TRAIN_MAX_SWING_REACHED	    (1 << 2)
+# define DP_TRAIN_VOLTAGE_SWING_400	    (0 << 0)
+# define DP_TRAIN_VOLTAGE_SWING_600	    (1 << 0)
+# define DP_TRAIN_VOLTAGE_SWING_800	    (2 << 0)
+# define DP_TRAIN_VOLTAGE_SWING_1200	    (3 << 0)
+
+# define DP_TRAIN_PRE_EMPHASIS_MASK	    (3 << 3)
+# define DP_TRAIN_PRE_EMPHASIS_0	    (0 << 3)
+# define DP_TRAIN_PRE_EMPHASIS_3_5	    (1 << 3)
+# define DP_TRAIN_PRE_EMPHASIS_6	    (2 << 3)
+# define DP_TRAIN_PRE_EMPHASIS_9_5	    (3 << 3)
+
+# define DP_TRAIN_PRE_EMPHASIS_SHIFT	    3
+# define DP_TRAIN_MAX_PRE_EMPHASIS_REACHED  (1 << 5)
+
+#define DP_DOWNSPREAD_CTRL		    0x107
+# define DP_SPREAD_AMP_0_5		    (1 << 4)
+
+#define DP_MAIN_LINK_CHANNEL_CODING_SET	    0x108
+# define DP_SET_ANSI_8B10B		    (1 << 0)
+
+#define DP_LANE0_1_STATUS		    0x202
+#define DP_LANE2_3_STATUS		    0x203
+# define DP_LANE_CR_DONE		    (1 << 0)
+# define DP_LANE_CHANNEL_EQ_DONE	    (1 << 1)
+# define DP_LANE_SYMBOL_LOCKED		    (1 << 2)
+
+#define DP_CHANNEL_EQ_BITS (DP_LANE_CR_DONE |		\
+			    DP_LANE_CHANNEL_EQ_DONE |	\
+			    DP_LANE_SYMBOL_LOCKED)
+
+#define DP_LANE_ALIGN_STATUS_UPDATED	    0x204
+
+#define DP_INTERLANE_ALIGN_DONE		    (1 << 0)
+#define DP_DOWNSTREAM_PORT_STATUS_CHANGED   (1 << 6)
+#define DP_LINK_STATUS_UPDATED		    (1 << 7)
+
+#define DP_SINK_STATUS			    0x205
+
+#define DP_RECEIVE_PORT_0_STATUS	    (1 << 0)
+#define DP_RECEIVE_PORT_1_STATUS	    (1 << 1)
+
+#define DP_ADJUST_REQUEST_LANE0_1	    0x206
+#define DP_ADJUST_REQUEST_LANE2_3	    0x207
+# define DP_ADJUST_VOLTAGE_SWING_LANE0_MASK  0x03
+# define DP_ADJUST_VOLTAGE_SWING_LANE0_SHIFT 0
+# define DP_ADJUST_PRE_EMPHASIS_LANE0_MASK   0x0c
+# define DP_ADJUST_PRE_EMPHASIS_LANE0_SHIFT  2
+# define DP_ADJUST_VOLTAGE_SWING_LANE1_MASK  0x30
+# define DP_ADJUST_VOLTAGE_SWING_LANE1_SHIFT 4
+# define DP_ADJUST_PRE_EMPHASIS_LANE1_MASK   0xc0
+# define DP_ADJUST_PRE_EMPHASIS_LANE1_SHIFT  6
+
+#define DP_SET_POWER                        0x600
+# define DP_SET_POWER_D0                    0x1
+# define DP_SET_POWER_D3                    0x2
+
+struct i2c_algo_dp_aux_data {
+	bool running;
+	u16 address;
+	int (*aux_ch) (struct i2c_adapter *adapter,
+		       uint8_t *send, int send_bytes,
+		       uint8_t *recv, int recv_bytes);
+};
+
+int
+i2c_dp_aux_add_bus(struct i2c_adapter *adapter);
+
+#endif /* DRM_DP_HELPER */

drm-radeon-fixes.patch:
 atombios_crtc.c          |    7 
 r100.c                   |   27 ++-
 r300.c                   |   12 -
 r420.c                   |   14 -
 r520.c                   |    3 
 r600.c                   |   10 +
 r600d.h                  |    1 
 radeon.h                 |    4 
 radeon_asic.h            |   12 +
 radeon_atombios.c        |   40 +++-
 radeon_clocks.c          |    8 
 radeon_combios.c         |  392 ++++++++++++++++++++++++++++++++++++++++-------
 radeon_connectors.c      |   59 +++++--
 radeon_device.c          |   20 ++
 radeon_display.c         |   29 ++-
 radeon_encoders.c        |   91 +++++++---
 radeon_fb.c              |    9 -
 radeon_gem.c             |   10 -
 radeon_i2c.c             |  109 ++++++++++---
 radeon_legacy_crtc.c     |   37 +++-
 radeon_legacy_encoders.c |  125 +++++++-------
 radeon_mode.h            |   76 ++++++---
 radeon_object.c          |    1 
 radeon_reg.h             |   40 ++--
 rs400.c                  |    8 
 rs600.c                  |    7 
 rs690.c                  |    7 
 rv515.c                  |    6 
 rv770.c                  |    6 
 29 files changed, 886 insertions(+), 284 deletions(-)

View full diff with command:
/usr/bin/cvs -n -f diff -kk -u -p -N -r 1.2 -r 1.3 drm-radeon-fixes.patchIndex: drm-radeon-fixes.patch
===================================================================
RCS file: drm-radeon-fixes.patch
diff -N drm-radeon-fixes.patch
--- /dev/null	1 Jan 1970 00:00:00 -0000
+++ drm-radeon-fixes.patch	2 Dec 2009 01:53:59 -0000	1.3
@@ -0,0 +1,2184 @@
+diff --git a/drivers/gpu/drm/radeon/atombios_crtc.c b/drivers/gpu/drm/radeon/atombios_crtc.c
+index c15287a..f5987af 100644
+--- a/drivers/gpu/drm/radeon/atombios_crtc.c
++++ b/drivers/gpu/drm/radeon/atombios_crtc.c
+@@ -578,8 +578,11 @@ int atombios_crtc_set_base(struct drm_crtc *crtc, int x, int y,
+ 	uint64_t fb_location;
+ 	uint32_t fb_format, fb_pitch_pixels, tiling_flags;
+ 
+-	if (!crtc->fb)
+-		return -EINVAL;
++	/* no fb bound */
++	if (!crtc->fb) {
++		DRM_DEBUG("No FB bound\n");
++		return 0;
++	}
+ 
+ 	radeon_fb = to_radeon_framebuffer(crtc->fb);
+ 
+diff --git a/drivers/gpu/drm/radeon/r100.c b/drivers/gpu/drm/radeon/r100.c
+index c9e93ea..0862fa4 100644
+--- a/drivers/gpu/drm/radeon/r100.c
++++ b/drivers/gpu/drm/radeon/r100.c
+@@ -94,6 +94,15 @@ int r100_pci_gart_init(struct radeon_device *rdev)
+ 	return radeon_gart_table_ram_alloc(rdev);
+ }
+ 
++/* required on r1xx, r2xx, r300, r(v)350, r420/r481, rs400/rs480 */
++void r100_enable_bm(struct radeon_device *rdev)
++{
++	uint32_t tmp;
++	/* Enable bus mastering */
++	tmp = RREG32(RADEON_BUS_CNTL) & ~RADEON_BUS_MASTER_DIS;
++	WREG32(RADEON_BUS_CNTL, tmp);
++}
++
+ int r100_pci_gart_enable(struct radeon_device *rdev)
+ {
+ 	uint32_t tmp;
+@@ -105,9 +114,6 @@ int r100_pci_gart_enable(struct radeon_device *rdev)
+ 	WREG32(RADEON_AIC_LO_ADDR, rdev->mc.gtt_location);
+ 	tmp = rdev->mc.gtt_location + rdev->mc.gtt_size - 1;
+ 	WREG32(RADEON_AIC_HI_ADDR, tmp);
+-	/* Enable bus mastering */
+-	tmp = RREG32(RADEON_BUS_CNTL) & ~RADEON_BUS_MASTER_DIS;
+-	WREG32(RADEON_BUS_CNTL, tmp);
+ 	/* set PCI GART page-table base address */
+ 	WREG32(RADEON_AIC_PT_BASE, rdev->gart.table_addr);
+ 	tmp = RREG32(RADEON_AIC_CNTL) | RADEON_PCIGART_TRANSLATE_EN;
+@@ -1583,6 +1589,14 @@ void r100_gpu_init(struct radeon_device *rdev)
+ 	r100_hdp_reset(rdev);
+ }
+ 
++void r100_hdp_flush(struct radeon_device *rdev)
++{
++	u32 tmp;
++	tmp = RREG32(RADEON_HOST_PATH_CNTL);
++	tmp |= RADEON_HDP_READ_BUFFER_INVALIDATE;
++	WREG32(RADEON_HOST_PATH_CNTL, tmp);
++}
++
+ void r100_hdp_reset(struct radeon_device *rdev)
+ {
+ 	uint32_t tmp;
+@@ -3108,6 +3122,7 @@ static int r100_startup(struct radeon_device *rdev)
+ 	r100_gpu_init(rdev);
+ 	/* Initialize GART (initialize after TTM so we can allocate
+ 	 * memory through TTM but finalize after TTM) */
++	r100_enable_bm(rdev);
+ 	if (rdev->flags & RADEON_IS_PCI) {
+ 		r = r100_pci_gart_enable(rdev);
+ 		if (r)
+@@ -3242,10 +3257,8 @@ int r100_init(struct radeon_device *rdev)
+ 			RREG32(R_0007C0_CP_STAT));
+ 	}
+ 	/* check if cards are posted or not */
+-	if (!radeon_card_posted(rdev) && rdev->bios) {
+-		DRM_INFO("GPU not posted. posting now...\n");
+-		radeon_combios_asic_init(rdev->ddev);
+-	}
++	if (radeon_boot_test_post_card(rdev) == false)
++		return -EINVAL;
+ 	/* Set asic errata */
+ 	r100_errata(rdev);
+ 	/* Initialize clocks */
+diff --git a/drivers/gpu/drm/radeon/r300.c b/drivers/gpu/drm/radeon/r300.c
+index 2f43ee8..430fc2a 100644
+--- a/drivers/gpu/drm/radeon/r300.c
++++ b/drivers/gpu/drm/radeon/r300.c
+@@ -1193,6 +1193,12 @@ static int r300_startup(struct radeon_device *rdev)
+ 		if (r)
+ 			return r;
+ 	}
++
++	if (rdev->family == CHIP_R300 ||
++	    rdev->family == CHIP_R350 ||
++	    rdev->family == CHIP_RV350)
++		r100_enable_bm(rdev);
++
+ 	if (rdev->flags & RADEON_IS_PCI) {
+ 		r = r100_pci_gart_enable(rdev);
+ 		if (r)
+@@ -1303,10 +1309,8 @@ int r300_init(struct radeon_device *rdev)
+ 			RREG32(R_0007C0_CP_STAT));
+ 	}
+ 	/* check if cards are posted or not */
+-	if (!radeon_card_posted(rdev) && rdev->bios) {
+-		DRM_INFO("GPU not posted. posting now...\n");
+-		radeon_combios_asic_init(rdev->ddev);
+-	}
++	if (radeon_boot_test_post_card(rdev) == false)
++		return -EINVAL;
+ 	/* Set asic errata */
+ 	r300_errata(rdev);
+ 	/* Initialize clocks */
+diff --git a/drivers/gpu/drm/radeon/r420.c b/drivers/gpu/drm/radeon/r420.c
+index 1cefdbc..e7c3477 100644
+--- a/drivers/gpu/drm/radeon/r420.c
++++ b/drivers/gpu/drm/radeon/r420.c
+@@ -301,14 +301,9 @@ int r420_init(struct radeon_device *rdev)
+ 			RREG32(R_0007C0_CP_STAT));
+ 	}
+ 	/* check if cards are posted or not */
+-	if (!radeon_card_posted(rdev) && rdev->bios) {
+-		DRM_INFO("GPU not posted. posting now...\n");
+-		if (rdev->is_atom_bios) {
+-			atom_asic_init(rdev->mode_info.atom_context);
+-		} else {
+-			radeon_combios_asic_init(rdev->ddev);
+-		}
+-	}
++	if (radeon_boot_test_post_card(rdev) == false)
++		return -EINVAL;
++
+ 	/* Initialize clocks */
+ 	radeon_get_clock_info(rdev->ddev);
+ 	/* Initialize power management */
+@@ -335,6 +330,9 @@ int r420_init(struct radeon_device *rdev)
+ 	if (r) {
+ 		return r;
+ 	}
++	if (rdev->family == CHIP_R420)
++		r100_enable_bm(rdev);
++
+ 	if (rdev->flags & RADEON_IS_PCIE) {
+ 		r = rv370_pcie_gart_init(rdev);
+ 		if (r)
+diff --git a/drivers/gpu/drm/radeon/r520.c b/drivers/gpu/drm/radeon/r520.c
+index f743518..26c3779 100644
+--- a/drivers/gpu/drm/radeon/r520.c
++++ b/drivers/gpu/drm/radeon/r520.c
+@@ -254,6 +254,9 @@ int r520_init(struct radeon_device *rdev)
+ 			RREG32(R_0007C0_CP_STAT));
+ 	}
+ 	/* check if cards are posted or not */
++	if (radeon_boot_test_post_card(rdev) == false)
++		return -EINVAL;
++
+ 	if (!radeon_card_posted(rdev) && rdev->bios) {
+ 		DRM_INFO("GPU not posted. posting now...\n");
+ 		atom_asic_init(rdev->mode_info.atom_context);
+diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c
+index 278f646..3dbd93e 100644
+--- a/drivers/gpu/drm/radeon/r600.c
++++ b/drivers/gpu/drm/radeon/r600.c
+@@ -1101,6 +1101,10 @@ void r600_pciep_wreg(struct radeon_device *rdev, u32 reg, u32 v)
+ 	(void)RREG32(PCIE_PORT_DATA);
+ }
+ 
++void r600_hdp_flush(struct radeon_device *rdev)
++{
++	WREG32(R_005480_HDP_MEM_COHERENCY_FLUSH_CNTL, 0x1);
++}
+ 
+ /*
+  * CP & Ring
+@@ -1627,7 +1631,11 @@ int r600_init(struct radeon_device *rdev)
+ 	if (r)
+ 		return r;
+ 	/* Post card if necessary */
+-	if (!r600_card_posted(rdev) && rdev->bios) {
++	if (!r600_card_posted(rdev)) {
++		if (!rdev->bios) {
++			dev_err(rdev->dev, "Card not posted and no BIOS - ignoring\n");
++			return -EINVAL;
++		}
+ 		DRM_INFO("GPU not posted. posting now...\n");
+ 		atom_asic_init(rdev->mode_info.atom_context);
+ 	}
+diff --git a/drivers/gpu/drm/radeon/r600d.h b/drivers/gpu/drm/radeon/r600d.h
+index 27ab428..b7f4ce2 100644
+--- a/drivers/gpu/drm/radeon/r600d.h
++++ b/drivers/gpu/drm/radeon/r600d.h
+@@ -674,4 +674,5 @@
[...1791 lines suppressed...]
+ extern void radeon_combios_output_lock(struct drm_encoder *encoder, bool lock);
+ extern void radeon_combios_initialize_bios_scratch_regs(struct drm_device *dev);
+ extern void radeon_atom_output_lock(struct drm_encoder *encoder, bool lock);
+@@ -426,16 +469,13 @@ void radeon_atombios_init_crtc(struct drm_device *dev,
+ 			       struct radeon_crtc *radeon_crtc);
+ void radeon_legacy_init_crtc(struct drm_device *dev,
+ 			     struct radeon_crtc *radeon_crtc);
+-void radeon_i2c_do_lock(struct radeon_connector *radeon_connector, int lock_state);
++extern void radeon_i2c_do_lock(struct radeon_i2c_chan *i2c, int lock_state);
+ 
+ void radeon_get_clock_info(struct drm_device *dev);
+ 
+ extern bool radeon_get_atom_connector_info_from_object_table(struct drm_device *dev);
+ extern bool radeon_get_atom_connector_info_from_supported_devices_table(struct drm_device *dev);
+ 
+-void radeon_rmx_mode_fixup(struct drm_encoder *encoder,
+-			   struct drm_display_mode *mode,
+-			   struct drm_display_mode *adjusted_mode);
+ void radeon_enc_destroy(struct drm_encoder *encoder);
+ void radeon_copy_fb(struct drm_device *dev, struct drm_gem_object *dst_obj);
+ void radeon_combios_asic_init(struct drm_device *dev);
+diff --git a/drivers/gpu/drm/radeon/radeon_object.c b/drivers/gpu/drm/radeon/radeon_object.c
+index 1f056da..98835f5 100644
+--- a/drivers/gpu/drm/radeon/radeon_object.c
++++ b/drivers/gpu/drm/radeon/radeon_object.c
+@@ -315,6 +315,7 @@ int radeon_object_wait(struct radeon_object *robj)
+ 	}
+ 	spin_unlock(&robj->tobj.lock);
+ 	radeon_object_unreserve(robj);
++	radeon_hdp_flush(robj->rdev);
+ 	return r;
+ }
+ 
+diff --git a/drivers/gpu/drm/radeon/radeon_reg.h b/drivers/gpu/drm/radeon/radeon_reg.h
+index 29ab759..34ba06d 100644
+--- a/drivers/gpu/drm/radeon/radeon_reg.h
++++ b/drivers/gpu/drm/radeon/radeon_reg.h
+@@ -1051,20 +1051,25 @@
+ 
+        /* Multimedia I2C bus */
+ #define RADEON_I2C_CNTL_0		    0x0090
+-#define RADEON_I2C_DONE (1<<0)
+-#define RADEON_I2C_NACK (1<<1)
+-#define RADEON_I2C_HALT (1<<2)
+-#define RADEON_I2C_SOFT_RST (1<<5)
+-#define RADEON_I2C_DRIVE_EN (1<<6)
+-#define RADEON_I2C_DRIVE_SEL (1<<7)
+-#define RADEON_I2C_START (1<<8)
+-#define RADEON_I2C_STOP (1<<9)
+-#define RADEON_I2C_RECEIVE (1<<10)
+-#define RADEON_I2C_ABORT (1<<11)
+-#define RADEON_I2C_GO (1<<12)
++#define RADEON_I2C_DONE                     (1 << 0)
++#define RADEON_I2C_NACK                     (1 << 1)
++#define RADEON_I2C_HALT                     (1 << 2)
++#define RADEON_I2C_SOFT_RST                 (1 << 5)
++#define RADEON_I2C_DRIVE_EN                 (1 << 6)
++#define RADEON_I2C_DRIVE_SEL                (1 << 7)
++#define RADEON_I2C_START                    (1 << 8)
++#define RADEON_I2C_STOP                     (1 << 9)
++#define RADEON_I2C_RECEIVE                  (1 << 10)
++#define RADEON_I2C_ABORT                    (1 << 11)
++#define RADEON_I2C_GO                       (1 << 12)
++#define RADEON_I2C_PRESCALE_SHIFT           16
+ #define RADEON_I2C_CNTL_1                   0x0094
+-#define RADEON_I2C_SEL         (1<<16)
+-#define RADEON_I2C_EN          (1<<17)
++#define RADEON_I2C_DATA_COUNT_SHIFT         0
++#define RADEON_I2C_ADDR_COUNT_SHIFT         4
++#define RADEON_I2C_INTRA_BYTE_DELAY_SHIFT   8
++#define RADEON_I2C_SEL                      (1 << 16)
++#define RADEON_I2C_EN                       (1 << 17)
++#define RADEON_I2C_TIME_LIMIT_SHIFT         24
+ #define RADEON_I2C_DATA			    0x0098
+ 
+ #define RADEON_DVI_I2C_CNTL_0		    0x02e0
+@@ -1072,7 +1077,7 @@
+ #       define R200_SEL_DDC1                0 /* 0x60 - VGA_DDC */
+ #       define R200_SEL_DDC2                1 /* 0x64 - DVI_DDC */
+ #       define R200_SEL_DDC3                2 /* 0x68 - MONID_DDC */
+-#define RADEON_DVI_I2C_CNTL_1               0x02e4 /* ? */
++#define RADEON_DVI_I2C_CNTL_1               0x02e4
+ #define RADEON_DVI_I2C_DATA		    0x02e8
+ 
+ #define RADEON_INTERRUPT_LINE               0x0f3c /* PCI */
+@@ -1143,14 +1148,15 @@
+ #       define RADEON_IO_MCLK_MAX_DYN_STOP_LAT (1 << 13)
+ #       define RADEON_MC_MCLK_DYN_ENABLE    (1 << 14)
+ #       define RADEON_IO_MCLK_DYN_ENABLE    (1 << 15)
+-#define RADEON_LCD_GPIO_MASK                0x01a0
++#define RADEON_GPIOPAD_MASK                 0x0198
++#define RADEON_GPIOPAD_A		    0x019c
+ #define RADEON_GPIOPAD_EN                   0x01a0
++#define RADEON_GPIOPAD_Y                    0x01a4
++#define RADEON_LCD_GPIO_MASK                0x01a0
+ #define RADEON_LCD_GPIO_Y_REG               0x01a4
+ #define RADEON_MDGPIO_A_REG                 0x01ac
+ #define RADEON_MDGPIO_EN_REG                0x01b0
+ #define RADEON_MDGPIO_MASK                  0x0198
+-#define RADEON_GPIOPAD_MASK                 0x0198
+-#define RADEON_GPIOPAD_A		    0x019c
+ #define RADEON_MDGPIO_Y_REG                 0x01b4
+ #define RADEON_MEM_ADDR_CONFIG              0x0148
+ #define RADEON_MEM_BASE                     0x0f10 /* PCI */
+diff --git a/drivers/gpu/drm/radeon/rs400.c b/drivers/gpu/drm/radeon/rs400.c
+index ca03716..2e5b945 100644
+--- a/drivers/gpu/drm/radeon/rs400.c
++++ b/drivers/gpu/drm/radeon/rs400.c
+@@ -387,6 +387,7 @@ static int rs400_startup(struct radeon_device *rdev)
+ 	r300_clock_startup(rdev);
+ 	/* Initialize GPU configuration (# pipes, ...) */
+ 	rs400_gpu_init(rdev);
++	r100_enable_bm(rdev);
+ 	/* Initialize GART (initialize after TTM so we can allocate
+ 	 * memory through TTM but finalize after TTM) */
+ 	r = rs400_gart_enable(rdev);
+@@ -490,10 +491,9 @@ int rs400_init(struct radeon_device *rdev)
+ 			RREG32(R_0007C0_CP_STAT));
+ 	}
+ 	/* check if cards are posted or not */
+-	if (!radeon_card_posted(rdev) && rdev->bios) {
+-		DRM_INFO("GPU not posted. posting now...\n");
+-		radeon_combios_asic_init(rdev->ddev);
+-	}
++	if (radeon_boot_test_post_card(rdev) == false)
++		return -EINVAL;
++
+ 	/* Initialize clocks */
+ 	radeon_get_clock_info(rdev->ddev);
+ 	/* Get vram informations */
+diff --git a/drivers/gpu/drm/radeon/rs600.c b/drivers/gpu/drm/radeon/rs600.c
+index 5f117cd..d2dac45 100644
+--- a/drivers/gpu/drm/radeon/rs600.c
++++ b/drivers/gpu/drm/radeon/rs600.c
+@@ -482,10 +482,9 @@ int rs600_init(struct radeon_device *rdev)
+ 			RREG32(R_0007C0_CP_STAT));
+ 	}
+ 	/* check if cards are posted or not */
+-	if (!radeon_card_posted(rdev) && rdev->bios) {
+-		DRM_INFO("GPU not posted. posting now...\n");
+-		atom_asic_init(rdev->mode_info.atom_context);
+-	}
++	if (radeon_boot_test_post_card(rdev) == false)
++		return -EINVAL;
++
+ 	/* Initialize clocks */
+ 	radeon_get_clock_info(rdev->ddev);
+ 	/* Initialize power management */
+diff --git a/drivers/gpu/drm/radeon/rs690.c b/drivers/gpu/drm/radeon/rs690.c
+index 2754717..7ffd6db 100644
+--- a/drivers/gpu/drm/radeon/rs690.c
++++ b/drivers/gpu/drm/radeon/rs690.c
+@@ -700,10 +700,9 @@ int rs690_init(struct radeon_device *rdev)
+ 			RREG32(R_0007C0_CP_STAT));
+ 	}
+ 	/* check if cards are posted or not */
+-	if (!radeon_card_posted(rdev) && rdev->bios) {
+-		DRM_INFO("GPU not posted. posting now...\n");
+-		atom_asic_init(rdev->mode_info.atom_context);
+-	}
++	if (radeon_boot_test_post_card(rdev) == false)
++		return -EINVAL;
++
+ 	/* Initialize clocks */
+ 	radeon_get_clock_info(rdev->ddev);
+ 	/* Initialize power management */
+diff --git a/drivers/gpu/drm/radeon/rv515.c b/drivers/gpu/drm/radeon/rv515.c
+index ba68c9f..93de4a9 100644
+--- a/drivers/gpu/drm/radeon/rv515.c
++++ b/drivers/gpu/drm/radeon/rv515.c
+@@ -580,10 +580,8 @@ int rv515_init(struct radeon_device *rdev)
+ 			RREG32(R_0007C0_CP_STAT));
+ 	}
+ 	/* check if cards are posted or not */
+-	if (!radeon_card_posted(rdev) && rdev->bios) {
+-		DRM_INFO("GPU not posted. posting now...\n");
+-		atom_asic_init(rdev->mode_info.atom_context);
+-	}
++	if (radeon_boot_test_post_card(rdev) == false)
++		return -EINVAL;
+ 	/* Initialize clocks */
+ 	radeon_get_clock_info(rdev->ddev);
+ 	/* Initialize power management */
+diff --git a/drivers/gpu/drm/radeon/rv770.c b/drivers/gpu/drm/radeon/rv770.c
+index b0efd0d..f546284 100644
+--- a/drivers/gpu/drm/radeon/rv770.c
++++ b/drivers/gpu/drm/radeon/rv770.c
+@@ -975,7 +975,11 @@ int rv770_init(struct radeon_device *rdev)
+ 	if (r)
+ 		return r;
+ 	/* Post card if necessary */
+-	if (!r600_card_posted(rdev) && rdev->bios) {
++	if (!r600_card_posted(rdev)) {
++		if (!rdev->bios) {
++			dev_err(rdev->dev, "Card not posted and no BIOS - ignoring\n");
++			return -EINVAL;
++		}
+ 		DRM_INFO("GPU not posted. posting now...\n");
+ 		atom_asic_init(rdev->mode_info.atom_context);
+ 	}


Index: kernel.spec
===================================================================
RCS file: /cvs/pkgs/rpms/kernel/devel/kernel.spec,v
retrieving revision 1.1859
retrieving revision 1.1860
diff -u -p -r1.1859 -r1.1860
--- kernel.spec	1 Dec 2009 06:58:35 -0000	1.1859
+++ kernel.spec	2 Dec 2009 01:53:59 -0000	1.1860
@@ -679,6 +679,8 @@ Patch1517: hdpvr-ir-enable.patch
 Patch1551: linux-2.6-ksm-kvm.patch
 
 # nouveau + drm fixes
+Patch1811: drm-radeon-fixes.patch
+Patch1812: drm-radeon-dp-support.patch
 Patch1813: drm-radeon-pm.patch
 Patch1814: drm-nouveau.patch
 Patch1818: drm-i915-resume-force-mode.patch
@@ -1300,6 +1302,8 @@ ApplyPatch hdpvr-ir-enable.patch
 ApplyPatch linux-2.6-e1000-ich9.patch
 
 # Nouveau DRM + drm fixes
+ApplyPatch drm-radeon-fixes.patch
+ApplyPatch drm-radeon-dp-support.patch
 ApplyPatch drm-nouveau.patch
 # pm broken on my thinkpad t60p - airlied
 #ApplyPatch drm-radeon-pm.patch
@@ -1985,6 +1989,9 @@ fi
 # and build.
 
 %changelog
+* Wed Dec 02 2009 Dave Airlie <airlied at redhat.com> 2.6.32-0.62.rc8.git2
+- forward port radeon fixes from F-12 + add radeon display port support
+
 * Mon Nov 30 2009 Kyle McMartin <kyle at redhat.com> 2.6.32-0.61.rc8.git2
 - fix-9p-fscache.patch: fix build.
 




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