rpms/kernel/F-12 drm-nouveau.patch, 1.67, 1.68 kernel.spec, 1.1924, 1.1925
Ben Skeggs
bskeggs at fedoraproject.org
Thu Nov 19 00:26:22 UTC 2009
Author: bskeggs
Update of /cvs/pkgs/rpms/kernel/F-12
In directory cvs1.fedora.phx.redhat.com:/tmp/cvs-serv30765
Modified Files:
drm-nouveau.patch kernel.spec
Log Message:
* Thu Nov 19 2009 Ben Skeggs <bskeggs at redhat.com> 2.6.31.6-139
- nouveau: s/r fixes on chipsets using bios opcode 0x87
- nouveau: fixes to bios opcode 0x8e
- nouveau: hopefully fix nv1x context switching issues (rh#526577)
- nouveau: support for NVA5 (GeForce G220)
- nouveau: fixes for NVAA support
drm-nouveau.patch:
drivers/gpu/drm/Kconfig | 56
drivers/gpu/drm/Makefile | 2
drivers/gpu/drm/i2c/Makefile | 4
drivers/gpu/drm/i2c/ch7006_drv.c | 531
drivers/gpu/drm/i2c/ch7006_mode.c | 473
drivers/gpu/drm/i2c/ch7006_priv.h | 344
drivers/gpu/drm/nouveau/Makefile | 29
drivers/gpu/drm/nouveau/nouveau_acpi.c | 125
drivers/gpu/drm/nouveau/nouveau_backlight.c | 155
drivers/gpu/drm/nouveau/nouveau_bios.c | 5734 +++++
drivers/gpu/drm/nouveau/nouveau_bios.h | 236
drivers/gpu/drm/nouveau/nouveau_bo.c | 663
drivers/gpu/drm/nouveau/nouveau_calc.c | 626
drivers/gpu/drm/nouveau/nouveau_channel.c | 468
drivers/gpu/drm/nouveau/nouveau_connector.c | 811
drivers/gpu/drm/nouveau/nouveau_connector.h | 55
drivers/gpu/drm/nouveau/nouveau_crtc.h | 95
drivers/gpu/drm/nouveau/nouveau_debugfs.c | 155
drivers/gpu/drm/nouveau/nouveau_display.c | 115
drivers/gpu/drm/nouveau/nouveau_dma.c | 206
drivers/gpu/drm/nouveau/nouveau_dma.h | 157
drivers/gpu/drm/nouveau/nouveau_drv.c | 413
drivers/gpu/drm/nouveau/nouveau_drv.h | 1288 +
drivers/gpu/drm/nouveau/nouveau_encoder.h | 66
drivers/gpu/drm/nouveau/nouveau_fb.h | 47
drivers/gpu/drm/nouveau/nouveau_fbcon.c | 380
drivers/gpu/drm/nouveau/nouveau_fbcon.h | 47
drivers/gpu/drm/nouveau/nouveau_fence.c | 262
drivers/gpu/drm/nouveau/nouveau_gem.c | 981 +
drivers/gpu/drm/nouveau/nouveau_hw.c | 1078 +
drivers/gpu/drm/nouveau/nouveau_hw.h | 448
drivers/gpu/drm/nouveau/nouveau_i2c.c | 257
drivers/gpu/drm/nouveau/nouveau_i2c.h | 45
drivers/gpu/drm/nouveau/nouveau_ioc32.c | 72
drivers/gpu/drm/nouveau/nouveau_irq.c | 696
drivers/gpu/drm/nouveau/nouveau_mem.c | 585
drivers/gpu/drm/nouveau/nouveau_notifier.c | 196
drivers/gpu/drm/nouveau/nouveau_object.c | 1294 +
drivers/gpu/drm/nouveau/nouveau_reg.h | 788
drivers/gpu/drm/nouveau/nouveau_sgdma.c | 321
drivers/gpu/drm/nouveau/nouveau_state.c | 872
drivers/gpu/drm/nouveau/nouveau_ttm.c | 131
drivers/gpu/drm/nouveau/nv04_crtc.c | 992 +
drivers/gpu/drm/nouveau/nv04_cursor.c | 70
drivers/gpu/drm/nouveau/nv04_dac.c | 529
drivers/gpu/drm/nouveau/nv04_dfp.c | 621
drivers/gpu/drm/nouveau/nv04_display.c | 293
drivers/gpu/drm/nouveau/nv04_fb.c | 21
drivers/gpu/drm/nouveau/nv04_fbcon.c | 316
drivers/gpu/drm/nouveau/nv04_fifo.c | 271
drivers/gpu/drm/nouveau/nv04_graph.c | 579
drivers/gpu/drm/nouveau/nv04_instmem.c | 210
drivers/gpu/drm/nouveau/nv04_mc.c | 20
drivers/gpu/drm/nouveau/nv04_timer.c | 51
drivers/gpu/drm/nouveau/nv04_tv.c | 305
drivers/gpu/drm/nouveau/nv10_fb.c | 24
drivers/gpu/drm/nouveau/nv10_fifo.c | 260
drivers/gpu/drm/nouveau/nv10_graph.c | 892
drivers/gpu/drm/nouveau/nv17_tv.c | 689
drivers/gpu/drm/nouveau/nv17_tv.h | 156
drivers/gpu/drm/nouveau/nv17_tv_modes.c | 583
drivers/gpu/drm/nouveau/nv20_graph.c | 778
drivers/gpu/drm/nouveau/nv40_fb.c | 62
drivers/gpu/drm/nouveau/nv40_fifo.c | 314
drivers/gpu/drm/nouveau/nv40_graph.c | 2239 ++
drivers/gpu/drm/nouveau/nv40_mc.c | 38
drivers/gpu/drm/nouveau/nv50_crtc.c | 788
drivers/gpu/drm/nouveau/nv50_cursor.c | 153
drivers/gpu/drm/nouveau/nv50_dac.c | 304
drivers/gpu/drm/nouveau/nv50_display.c | 902
drivers/gpu/drm/nouveau/nv50_display.h | 46
drivers/gpu/drm/nouveau/nv50_evo.h | 113
drivers/gpu/drm/nouveau/nv50_fbcon.c | 273
drivers/gpu/drm/nouveau/nv50_fifo.c | 494
drivers/gpu/drm/nouveau/nv50_graph.c | 479
drivers/gpu/drm/nouveau/nv50_grctx.h |26832 ++++++++++++++++++++++++++++
drivers/gpu/drm/nouveau/nv50_instmem.c | 509
drivers/gpu/drm/nouveau/nv50_mc.c | 40
drivers/gpu/drm/nouveau/nv50_sor.c | 265
drivers/gpu/drm/nouveau/nvreg.h | 535
drivers/gpu/drm/ttm/ttm_bo.c | 4
include/drm/Kbuild | 1
include/drm/i2c/ch7006.h | 86
include/drm/nouveau_drm.h | 220
84 files changed, 63664 insertions(+)
View full diff with command:
/usr/bin/cvs -n -f diff -kk -u -p -N -r 1.67 -r 1.68 drm-nouveau.patchIndex: drm-nouveau.patch
===================================================================
RCS file: /cvs/pkgs/rpms/kernel/F-12/drm-nouveau.patch,v
retrieving revision 1.67
retrieving revision 1.68
diff -u -p -r1.67 -r1.68
--- drm-nouveau.patch 4 Nov 2009 23:42:28 -0000 1.67
+++ drm-nouveau.patch 19 Nov 2009 00:26:21 -0000 1.68
@@ -1,8 +1,8 @@
diff --git a/drivers/gpu/drm/Kconfig b/drivers/gpu/drm/Kconfig
-index e4d971c..62dd13c 100644
+index f831ea1..a2320ac 100644
--- a/drivers/gpu/drm/Kconfig
+++ b/drivers/gpu/drm/Kconfig
-@@ -153,3 +153,59 @@ config DRM_SAVAGE
+@@ -154,3 +154,59 @@ config DRM_SAVAGE
help
Choose this option if you have a Savage3D/4/SuperSavage/Pro/Twister
chipset. If M is selected the module will be called savage.
@@ -1777,10 +1777,10 @@ index 0000000..20564f8
+}
diff --git a/drivers/gpu/drm/nouveau/nouveau_bios.c b/drivers/gpu/drm/nouveau/nouveau_bios.c
new file mode 100644
-index 0000000..34d193e
+index 0000000..ba946df
--- /dev/null
+++ b/drivers/gpu/drm/nouveau/nouveau_bios.c
-@@ -0,0 +1,5716 @@
+@@ -0,0 +1,5734 @@
+/*
+ * Copyright 2005-2006 Erik Waling
+ * Copyright 2006 Stephane Marchesin
@@ -4255,103 +4255,120 @@ index 0000000..34d193e
+}
+
+static bool
-+init_87(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
++init_ram_restrict_pll(struct nvbios *bios, uint16_t offset,
++ struct init_exec *iexec)
+{
+ /*
-+ * INIT_87 opcode: 0x87 ('')
++ * INIT_RAM_RESTRICT_PLL opcode: 0x87 ('')
+ *
+ * offset (8 bit): opcode
-+ * offset + 1 (8 bit): unknown
-+ * offset + 4 (32 bit): unknown entry 0
++ * offset + 1 (8 bit): PLL type
++ * offset + 2 (32 bit): frequency 0
+ *
-+ * Unknown function. Stubbed here as one of my cards can resume
-+ * fine without it, but we'd still want to run the remainder
-+ * of the script instead of aborting.
++ * Uses the RAMCFG strap of PEXTDEV_BOOT as an index into the table at
++ * ram_restrict_table_ptr. The value read from there is used to select
++ * a frequency from the table starting at 'frequency 0' to be
++ * programmed into the PLL corresponding to 'type'.
+ *
-+ * Starting from offset+4 there are BIT_M+2 32-bit entries.
++ * The PLL limits table on cards using this opcode has a mapping of
++ * 'type' to the relevant registers.
+ */
+
-+ NV_WARN(bios->dev, "INIT_87 stubbed!\n");
++ struct drm_device *dev = bios->dev;
++ uint32_t strap = (bios_rd32(bios, NV_PEXTDEV_BOOT_0) & 0x0000003c) >> 2;
++ uint8_t index = bios->data[bios->ram_restrict_tbl_ptr + strap];
++ uint8_t type = bios->data[offset + 1];
++ uint32_t freq = ROM32(bios->data[offset + 2 + (index * 4)]);
++ uint8_t *pll_limits = &bios->data[bios->pll_limit_tbl_ptr], *entry;
++ int i;
++
++ if (!iexec->execute)
++ return true;
++
++ if (!bios->pll_limit_tbl_ptr || (pll_limits[0] & 0xf0) != 0x30) {
++ NV_ERROR(dev, "PLL limits table not version 3.x\n");
++ return true; /* deliberate, allow default clocks to remain */
++ }
++
++ entry = pll_limits + pll_limits[1];
++ for (i = 0; i < pll_limits[3]; i++, entry += pll_limits[2]) {
++ if (entry[0] == type) {
++ uint32_t reg = ROM32(entry[3]);
++
++ BIOSLOG(bios, "0x%04X: "
++ "Type %02x Reg 0x%08x Freq %dKHz\n",
++ offset, type, reg, freq);
++
++ setPLL(bios, reg, freq);
++ return true;
++ }
++ }
++
++ NV_ERROR(dev, "PLL type 0x%02x not found in PLL limits table", type);
+ return true;
+}
+
+static bool
-+init_8e(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
++init_gpio(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
+{
+ /*
-+ * INIT_8E opcode: 0x8E ('')
++ * INIT_GPIO opcode: 0x8E ('')
+ *
+ * offset (8 bit): opcode
+ *
-+ * The purpose of this opcode is unclear (being for nv50 cards), and
-+ * the literal functionality can be seen in the code below.
-+ *
-+ * A brief synopsis is that for each entry in a table pointed to by the
-+ * DCB table header, depending on the settings of various bits, various
-+ * other bits in registers 0xe100, 0xe104, and 0xe108, are set or
-+ * cleared.
++ * Loop over all entries in the DCB GPIO table, and initialise
++ * each GPIO according to various values listed in each entry
+ */
+
-+ uint8_t headerlen = bios->data[bios->bdcb.init8e_table_ptr + 1];
-+ uint8_t entries = bios->data[bios->bdcb.init8e_table_ptr + 2];
-+ uint8_t recordlen = bios->data[bios->bdcb.init8e_table_ptr + 3];
++ const uint32_t nv50_gpio_reg[4] = { 0xe104, 0xe108, 0xe280, 0xe284 };
++ const uint32_t nv50_gpio_ctl[2] = { 0xe100, 0xe28c };
++ const uint8_t *gpio_table = &bios->data[bios->bdcb.init8e_table_ptr];
++ const uint8_t *gpio_entry;
+ int i;
+
+ if (bios->bdcb.version != 0x40) {
+ NV_ERROR(bios->dev, "DCB table not version 4.0\n");
+ return false;
+ }
++
+ if (!bios->bdcb.init8e_table_ptr) {
+ NV_WARN(bios->dev, "Invalid pointer to INIT_8E table\n");
+ return false;
+ }
+
-+ for (i = 0; i < entries; i++) {
-+ uint32_t entry = ROM32(bios->data[bios->bdcb.init8e_table_ptr + headerlen + recordlen * i]);
-+ int shift = (entry & 0x1f) * 4;
-+ uint32_t mask;
-+ uint32_t reg = 0xe104;
-+ uint32_t data;
++ gpio_entry = gpio_table + gpio_table[1];
++ for (i = 0; i < gpio_table[2]; i++, gpio_entry += gpio_table[3]) {
++ uint32_t entry = ROM32(gpio_entry[0]), r, s, v;
++ int line = (entry & 0x0000001f);
++
++ BIOSLOG(bios, "0x%04X: Entry: 0x%08X\n", offset, entry);
+
-+ if ((entry & 0xff00) == 0xff00)
++ if ((entry & 0x0000ff00) == 0x0000ff00)
+ continue;
+
-+ if (shift >= 32) {
-+ reg += 4;
-+ shift -= 32;
-+ }
-+ shift %= 32;
-+
-+ mask = ~(3 << shift);
-+ if (entry & (1 << 24))
-+ data = (entry >> 21);
++ r = nv50_gpio_reg[line >> 3];
++ s = (line & 0x07) << 2;
++ v = bios_rd32(bios, r) & ~(0x00000003 << s);
++ if (entry & 0x01000000)
++ v |= (((entry & 0x60000000) >> 29) ^ 2) << s;
+ else
-+ data = (entry >> 19);
-+ data = ((data & 3) ^ 2) << shift;
++ v |= (((entry & 0x18000000) >> 27) ^ 2) << s;
++ bios_wr32(bios, r, v);
+
-+ BIOSLOG(bios, "0x%04X: Entry: 0x%08X, Reg: 0x%08X, "
-+ "Shift: 0x%02X, Mask: 0x%08X, Data: 0x%08X\n",
-+ offset, entry, reg, shift, mask, data);
-+
-+ bios_wr32(bios, reg, (bios_rd32(bios, reg) & mask) | data);
-+
-+ reg = 0xe100;
-+ shift = entry & 0x1f;
-+
-+ mask = ~(1 << 16 | 1);
-+ mask = mask << shift | mask >> (32 - shift);
-+ data = 0;
-+ if ((entry & (3 << 25)) == (1 << 25))
-+ data |= 1;
-+ if ((entry & (3 << 25)) == (2 << 25))
-+ data |= 0x10000;
-+ data <<= shift;
-+
-+ BIOSLOG(bios, "0x%04X: Entry: 0x%08X, Reg: 0x%08X, "
-+ "Shift: 0x%02X, Mask: 0x%08X, Data: 0x%08X\n",
-+ offset, entry, reg, shift, mask, data);
-+
-+ bios_wr32(bios, reg, (bios_rd32(bios, reg) & mask) | data);
++ r = nv50_gpio_ctl[line >> 4];
++ s = (line & 0x0f);
[...3394 lines suppressed...]
++ 0x0001, 0x00000001,
++ 0x0017, 0x00000000,
++ 0x0001, 0x00000001,
++ 0x005f, 0x00000000,
++ 0x0001, 0x00000001,
++ 0x0007, 0x00000000,
++ 0x0001, 0x00000001,
++ 0x0007, 0x00000000,
++ 0x0001, 0x00000001,
++ 0x0007, 0x00000000,
++ 0x0001, 0x00000001,
++ 0x0007, 0x00000000,
++ 0x0001, 0x00000001,
++ 0x0007, 0x00000000,
++ 0x0001, 0x00000001,
++ 0x0007, 0x00000000,
++ 0x0001, 0x00000001,
++ 0x0007, 0x00000000,
++ 0x0001, 0x00000001,
++ 0x0007, 0x00000000,
++ 0x0001, 0x00000011,
++ 0x003f, 0x00000000,
++ 0x0001, 0x0fac6881,
++ 0x0007, 0x00000000,
++ 0x0001, 0x0000000f,
++ 0x003f, 0x00000000,
++ 0x0001, 0x00000011,
++ 0x0007, 0x00000000,
++ 0x0001, 0x00000001,
++ 0x002c, 0x00000000,
++ 0x0001, 0x0000000f,
++ 0x000a, 0x00000000,
++ 0x0001, 0x00000001,
++ 0x0037, 0x00000000,
++ 0x0001, 0x04e3bfdf,
++ 0x0007, 0x00000000,
++ 0x0001, 0x04e3bfdf,
++ 0x0007, 0x00000000,
++ 0x0001, 0x00000001,
++ 0x000f, 0x00000000,
++ 0x0001, 0x00ffff00,
++ 0x0007, 0x00000000,
++ 0x0001, 0x00000001,
++ 0x0007, 0x00000000,
++ 0x0001, 0x00000001,
++ 0x0017, 0x00000000,
++ 0x0001, 0x00ffff00,
++ 0x0047, 0x00000000,
++ 0x0001, 0x00000001,
++ 0x000f, 0x00000000,
+ 0x0001, 0x00000001,
+ 0x0007, 0x00000000,
+ 0x0001, 0x30201000,
@@ -54388,8 +57177,8 @@ index 0000000..62914d8
+ 0x0007, 0x00000000,
+ 0x0001, 0xf8e8d8c8,
+ 0x000f, 0x00000000,
-+ 0x0001, 0x0000001a,
-+ 0x000f, 0x00000000,
++ 0x0001, 0x0000001a,
++ 0x000f, 0x00000000,
+ 0x0001, 0x00000004,
+ 0x0127, 0x00000000,
+ 0x0001, 0x00000004,
@@ -54981,8 +57770,10 @@ index 0000000..62914d8
+ 0x0001, 0x00000000,
+ 0x0001, 0x00000800,
+ 0x0005, 0x00000000,
++ 0x0002, 0x00000001,
++ 0x0001, 0x000e0080,
+ 0x0001, 0x00000004,
-+ 0x0009, 0x00000000,
++ 0x0006, 0x00000000,
+ 0x0001, 0x00000002,
+ 0x0001, 0x00000001,
+ 0x0003, 0x00000000,
@@ -54998,10 +57789,14 @@ index 0000000..62914d8
+ 0x0001, 0x00000000,
+ 0x0002, 0x00000001,
+ 0x0001, 0x00000000,
++ 0x0003, 0x00000001,
++ 0x0001, 0x00000004,
++ 0x0003, 0x00000001,
+ 0x0001, 0x00000007,
-+ 0x0007, 0x00000000,
+ 0x0001, 0x00000001,
-+ 0x0008, 0x00000000,
++ 0x0001, 0x00000007,
++ 0x0003, 0x00000001,
++ 0x0004, 0x00000000,
+ 0x0001, 0x00000001,
+ 0x0001, 0x00000100,
+ 0x0001, 0x00000000,
@@ -55024,16 +57819,34 @@ index 0000000..62914d8
+ 0x0001, 0x00000008,
+ 0x0001, 0x00000014,
+ 0x0001, 0x00000000,
++ 0x0001, 0x00000029,
+ 0x0001, 0x00000027,
-+ 0x0007, 0x00000000,
++ 0x0001, 0x00000026,
++ 0x0001, 0x00000008,
++ 0x0001, 0x00000004,
++ 0x0001, 0x00000027,
++ 0x0002, 0x00000000,
+ 0x0001, 0x00000001,
-+ 0x0017, 0x00000000,
++ 0x0001, 0x00000002,
++ 0x0001, 0x00000003,
++ 0x0001, 0x00000004,
++ 0x0001, 0x00000005,
++ 0x0001, 0x00000006,
++ 0x0001, 0x00000007,
++ 0x0001, 0x00000001,
++ 0x0010, 0x00000000,
+ 0x0001, 0x000000cf,
+ 0x000b, 0x00000000,
++ 0x0001, 0x00000080,
++ 0x0002, 0x00000004,
++ 0x0001, 0x00000003,
+ 0x0001, 0x00000001,
-+ 0x0006, 0x00000000,
++ 0x0002, 0x00000000,
++ 0x0001, 0x00000012,
++ 0x0001, 0x00000010,
++ 0x0001, 0x0000000c,
+ 0x0001, 0x00000001,
-+ 0x0006, 0x00000000,
++ 0x0003, 0x00000000,
+ 0x0001, 0x00000004,
+ 0x0001, 0x00000002,
+ 0x0001, 0x00000004,
@@ -55052,10 +57865,14 @@ index 0000000..62914d8
+ 0x0004, 0x00000000,
+ 0x0001, 0x00000001,
+ 0x0001, 0x00000000,
++ 0x0001, 0x00000002,
++ 0x0001, 0x00001000,
++ 0x0001, 0x00000e00,
++ 0x0001, 0x00001000,
+ 0x0001, 0x00001e00,
-+ 0x0005, 0x00000000,
-+ 0x0001, 0x00000001,
-+ 0x0007, 0x00000000,
++ 0x0001, 0x00000000,
++ 0x0005, 0x00000001,
++ 0x0003, 0x00000000,
+ 0x0001, 0x00000200,
+ 0x0001, 0x00000000,
+ 0x0001, 0x00000001,
@@ -55181,12 +57998,28 @@ index 0000000..62914d8
+ 0x0003, 0x00000000,
+ 0x0001, 0x07ffffff,
+ 0x0006, 0x00000000,
++ 0x0001, 0x00120407,
++ 0x0001, 0x05091507,
++ 0x0001, 0x05010202,
+ 0x0001, 0x00030201,
-+ 0x0009, 0x00000000,
++ 0x0006, 0x00000000,
++ 0x0001, 0x00000040,
++ 0x0001, 0x0d0c0b0a,
++ 0x0001, 0x00141210,
++ 0x0001, 0x000001f0,
++ 0x0001, 0x00000001,
++ 0x0001, 0x00000003,
+ 0x0001, 0x00008000,
-+ 0x0007, 0x00000000,
++ 0x0001, 0x00000000,
++ 0x0001, 0x00039e00,
++ 0x0001, 0x00000100,
++ 0x0001, 0x00003800,
++ 0x0001, 0x003fe006,
++ 0x0001, 0x003fe000,
++ 0x0001, 0x00404040,
++ 0x0001, 0x0cf7f007,
+ 0x0001, 0x02bf7fff,
-+ 0x0010, 0x00000000,
++ 0x0009, 0x00000000,
+ 0x0001, 0x00000004,
+ 0x0004, 0x00000000,
+ 0x0001, 0x0000003f,
@@ -56236,7 +59069,7 @@ index 0000000..62914d8
+ 0x005000cb, 0x0048004d, ~0
+};
+
-+static unsigned nvac_ctxvals[] = {
++static uint32_t nvac_ctxvals[] = {
+ 0x0043, 0x00000000,
+ 0x0001, 0x00000030,
+ 0x0007, 0x00000000,
@@ -57585,7 +60418,7 @@ index 0000000..62914d8
+ 0x0070000e, 0x0070001c, 0x0060000c, ~0
+};
+
-+static unsigned nv94_ctxvals[] = {
++static uint32_t nv94_ctxvals[] = {
+ 0x0043, 0x00000000,
+ 0x0001, 0x00000030,
+ 0x0008, 0x00000000,
Index: kernel.spec
===================================================================
RCS file: /cvs/pkgs/rpms/kernel/F-12/kernel.spec,v
retrieving revision 1.1924
retrieving revision 1.1925
diff -u -p -r1.1924 -r1.1925
--- kernel.spec 19 Nov 2009 00:17:22 -0000 1.1924
+++ kernel.spec 19 Nov 2009 00:26:21 -0000 1.1925
@@ -2128,6 +2128,13 @@ fi
# and build.
%changelog
+* Thu Nov 19 2009 Ben Skeggs <bskeggs at redhat.com> 2.6.31.6-139
+- nouveau: s/r fixes on chipsets using bios opcode 0x87
+- nouveau: fixes to bios opcode 0x8e
+- nouveau: hopefully fix nv1x context switching issues (rh#526577)
+- nouveau: support for NVA5 (GeForce G220)
+- nouveau: fixes for NVAA support
+
* Thu Nov 19 2009 Dave Airlie <airlied at redhat.com> 2.6.31.6-138
- drm-next-d56672a9.patch: fix some rn50 cloning issues
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