rpms/kernel/F-12 drm-nouveau.patch, 1.62, 1.63 kernel.spec, 1.1850, 1.1851
Ben Skeggs
bskeggs at fedoraproject.org
Thu Oct 8 04:42:13 UTC 2009
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Author: bskeggs
Update of /cvs/pkgs/rpms/kernel/F-12
In directory cvs1.fedora.phx.redhat.com:/tmp/cvs-serv12991
Modified Files:
drm-nouveau.patch kernel.spec
Log Message:
* Thu Oct 08 2009 Ben Skeggs <bskeggs at redhat.com> 2.6.31.1-65
- nouveau: {drm-next,context,fbcon,misc} fixes, connector forcing
drm-nouveau.patch:
drivers/gpu/drm/Kconfig | 45
drivers/gpu/drm/Makefile | 2
drivers/gpu/drm/i2c/Makefile | 4
drivers/gpu/drm/i2c/ch7006_drv.c | 531
drivers/gpu/drm/i2c/ch7006_mode.c | 473
drivers/gpu/drm/i2c/ch7006_priv.h | 344
drivers/gpu/drm/nouveau/Makefile | 29
drivers/gpu/drm/nouveau/nouveau_acpi.c | 125
drivers/gpu/drm/nouveau/nouveau_backlight.c | 155
drivers/gpu/drm/nouveau/nouveau_bios.c | 5536 ++++++
drivers/gpu/drm/nouveau/nouveau_bios.h | 236
drivers/gpu/drm/nouveau/nouveau_bo.c | 620
drivers/gpu/drm/nouveau/nouveau_calc.c | 626
drivers/gpu/drm/nouveau/nouveau_channel.c | 464
drivers/gpu/drm/nouveau/nouveau_connector.c | 781
drivers/gpu/drm/nouveau/nouveau_connector.h | 55
drivers/gpu/drm/nouveau/nouveau_crtc.h | 95
drivers/gpu/drm/nouveau/nouveau_debugfs.c | 157
drivers/gpu/drm/nouveau/nouveau_display.c | 115
drivers/gpu/drm/nouveau/nouveau_dma.c | 206
drivers/gpu/drm/nouveau/nouveau_dma.h | 151
drivers/gpu/drm/nouveau/nouveau_drv.c | 413
drivers/gpu/drm/nouveau/nouveau_drv.h | 1282 +
drivers/gpu/drm/nouveau/nouveau_encoder.h | 66
drivers/gpu/drm/nouveau/nouveau_fb.h | 47
drivers/gpu/drm/nouveau/nouveau_fbcon.c | 381
drivers/gpu/drm/nouveau/nouveau_fbcon.h | 49
drivers/gpu/drm/nouveau/nouveau_fence.c | 262
drivers/gpu/drm/nouveau/nouveau_gem.c | 954 +
drivers/gpu/drm/nouveau/nouveau_hw.c | 1078 +
drivers/gpu/drm/nouveau/nouveau_hw.h | 448
drivers/gpu/drm/nouveau/nouveau_i2c.c | 256
drivers/gpu/drm/nouveau/nouveau_i2c.h | 45
drivers/gpu/drm/nouveau/nouveau_ioc32.c | 72
drivers/gpu/drm/nouveau/nouveau_irq.c | 696
drivers/gpu/drm/nouveau/nouveau_mem.c | 572
drivers/gpu/drm/nouveau/nouveau_notifier.c | 195
drivers/gpu/drm/nouveau/nouveau_object.c | 1294 +
drivers/gpu/drm/nouveau/nouveau_reg.h | 788
drivers/gpu/drm/nouveau/nouveau_sgdma.c | 321
drivers/gpu/drm/nouveau/nouveau_state.c | 872 +
drivers/gpu/drm/nouveau/nouveau_swmthd.h | 33
drivers/gpu/drm/nouveau/nouveau_ttm.c | 131
drivers/gpu/drm/nouveau/nv04_crtc.c | 995 +
drivers/gpu/drm/nouveau/nv04_cursor.c | 70
drivers/gpu/drm/nouveau/nv04_dac.c | 529
drivers/gpu/drm/nouveau/nv04_dfp.c | 621
drivers/gpu/drm/nouveau/nv04_display.c | 293
drivers/gpu/drm/nouveau/nv04_fb.c | 21
drivers/gpu/drm/nouveau/nv04_fbcon.c | 316
drivers/gpu/drm/nouveau/nv04_fifo.c | 271
drivers/gpu/drm/nouveau/nv04_graph.c | 579
drivers/gpu/drm/nouveau/nv04_instmem.c | 210
drivers/gpu/drm/nouveau/nv04_mc.c | 20
drivers/gpu/drm/nouveau/nv04_timer.c | 51
drivers/gpu/drm/nouveau/nv04_tv.c | 305
drivers/gpu/drm/nouveau/nv10_fb.c | 24
drivers/gpu/drm/nouveau/nv10_fifo.c | 260
drivers/gpu/drm/nouveau/nv10_graph.c | 891 +
drivers/gpu/drm/nouveau/nv17_tv.c | 689
drivers/gpu/drm/nouveau/nv17_tv.h | 156
drivers/gpu/drm/nouveau/nv17_tv_modes.c | 583
drivers/gpu/drm/nouveau/nv20_graph.c | 778
drivers/gpu/drm/nouveau/nv40_fb.c | 62
drivers/gpu/drm/nouveau/nv40_fifo.c | 314
drivers/gpu/drm/nouveau/nv40_graph.c | 2239 ++
drivers/gpu/drm/nouveau/nv40_mc.c | 38
drivers/gpu/drm/nouveau/nv50_crtc.c | 784
drivers/gpu/drm/nouveau/nv50_cursor.c | 151
drivers/gpu/drm/nouveau/nv50_dac.c | 295
drivers/gpu/drm/nouveau/nv50_display.c | 902 +
drivers/gpu/drm/nouveau/nv50_display.h | 46
drivers/gpu/drm/nouveau/nv50_evo.h | 113
drivers/gpu/drm/nouveau/nv50_fbcon.c | 273
drivers/gpu/drm/nouveau/nv50_fifo.c | 493
drivers/gpu/drm/nouveau/nv50_graph.c | 465
drivers/gpu/drm/nouveau/nv50_grctx.h |22284 ++++++++++++++++++++++++++++
drivers/gpu/drm/nouveau/nv50_instmem.c | 508
drivers/gpu/drm/nouveau/nv50_mc.c | 40
drivers/gpu/drm/nouveau/nv50_sor.c | 250
drivers/gpu/drm/nouveau/nvreg.h | 535
drivers/gpu/drm/ttm/ttm_bo.c | 4
include/drm/Kbuild | 1
include/drm/i2c/ch7006.h | 86
include/drm/nouveau_drm.h | 216
85 files changed, 58766 insertions(+)
View full diff with command:
/usr/bin/cvs -n -f diff -kk -u -p -N -r 1.62 -r 1.63 drm-nouveau.patchIndex: drm-nouveau.patch
===================================================================
RCS file: /cvs/pkgs/rpms/kernel/F-12/drm-nouveau.patch,v
retrieving revision 1.62
retrieving revision 1.63
diff -u -p -r1.62 -r1.63
--- drm-nouveau.patch 8 Oct 2009 04:32:54 -0000 1.62
+++ drm-nouveau.patch 8 Oct 2009 04:42:12 -0000 1.63
@@ -1766,10 +1766,10 @@ index 0000000..20564f8
+}
diff --git a/drivers/gpu/drm/nouveau/nouveau_bios.c b/drivers/gpu/drm/nouveau/nouveau_bios.c
new file mode 100644
-index 0000000..09ccffd
+index 0000000..7a55199
--- /dev/null
+++ b/drivers/gpu/drm/nouveau/nouveau_bios.c
-@@ -0,0 +1,5499 @@
+@@ -0,0 +1,5536 @@
+/*
+ * Copyright 2005-2006 Erik Waling
+ * Copyright 2006 Stephane Marchesin
@@ -4230,6 +4230,27 @@ index 0000000..09ccffd
+}
+
+static bool
++init_87(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
++{
++ /*
++ * INIT_87 opcode: 0x87 ('')
++ *
++ * offset (8 bit): opcode
++ * offset + 1 (8 bit): unknown
++ * offset + 4 (32 bit): unknown entry 0
++ *
++ * Unknown function. Stubbed here as one of my cards can resume
++ * fine without it, but we'd still want to run the remainder
++ * of the script instead of aborting.
++ *
++ * Starting from offset+4 there are BIT_M+2 32-bit entries.
++ */
++
++ NV_WARN(bios->dev, "INIT_87 stubbed!\n");
++ return true;
++}
++
++static bool
+init_8e(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
+{
+ /*
@@ -4560,6 +4581,7 @@ index 0000000..09ccffd
+ { "INIT_INDEX_IO" , 0x78, 6 , 0 , 0 , init_index_io },
+ { "INIT_PLL" , 0x79, 7 , 0 , 0 , init_pll },
+ { "INIT_ZM_REG" , 0x7A, 9 , 0 , 0 , init_zm_reg },
++ { "INIT_87" , 0x87, 2 , 0 , 0 , init_87 },
+ { "INIT_8E" , 0x8E, 1 , 0 , 0 , init_8e },
+ /* INIT_RAM_RESTRICT_ZM_REG_GROUP's mult is loaded by M table in BIT */
+ { "INIT_RAM_RESTRICT_ZM_REG_GROUP" , 0x8F, 7 , 6 , 0 , init_ram_restrict_zm_reg_group },
@@ -6059,10 +6081,14 @@ index 0000000..09ccffd
+ if (bitentry->length < 0x5)
+ return 0;
+
++ /* adjust length of INIT_87 */
++ for (i = 0; itbl_entry[i].name && (itbl_entry[i].id != 0x87); i++);
++ itbl_entry[i].length += bios->data[bitentry->offset + 2] * 4;
++
+ /* set up multiplier for INIT_RAM_RESTRICT_ZM_REG_GROUP */
-+ for (i = 0; itbl_entry[i].name && (itbl_entry[i].id != 0x8f); i++)
-+ ;
++ for (; itbl_entry[i].name && (itbl_entry[i].id != 0x8f); i++);
+ itbl_entry[i].length_multiplier = bios->data[bitentry->offset + 2] * 4;
++
+ init_ram_restrict_zm_reg_group_blocklen = itbl_entry[i].length_multiplier;
+
+ bios->ram_restrict_tbl_ptr = ROM16(bios->data[bitentry->offset + 3]);
@@ -6964,6 +6990,17 @@ index 0000000..09ccffd
+ if (dcb->entry[i].i2c_index == 0xf)
+ continue;
+
++ /*
++ * Ignore the I2C index for on-chip TV-out, as there
++ * are cards with bogus values (nv31m in bug 23212),
++ * and it's otherwise useless.
++ */
++ if (dcb->entry[i].type == OUTPUT_TV &&
++ dcb->entry[i].location == DCB_LOC_ON_CHIP) {
++ dcb->entry[i].i2c_index = 0xf;
++ continue;
++ }
++
+ dcb->entry[i].connector = dcb->entry[i].i2c_index;
+ if (dcb->entry[i].connector > high)
+ high = dcb->entry[i].connector;
@@ -7271,10 +7308,10 @@ index 0000000..09ccffd
+}
diff --git a/drivers/gpu/drm/nouveau/nouveau_bios.h b/drivers/gpu/drm/nouveau/nouveau_bios.h
new file mode 100644
-index 0000000..a7f02b4
+index 0000000..33f3172
--- /dev/null
+++ b/drivers/gpu/drm/nouveau/nouveau_bios.h
-@@ -0,0 +1,235 @@
+@@ -0,0 +1,236 @@
+/*
+ * Copyright 2007-2008 Nouveau Project
+ *
@@ -7362,6 +7399,7 @@ index 0000000..a7f02b4
+ OUTPUT_TMDS = 2,
+ OUTPUT_LVDS = 3,
+ OUTPUT_DP = 6,
++ OUTPUT_ANY = -1
+};
+
+enum nouveau_or {
@@ -8770,10 +8808,10 @@ index 0000000..3f80db8
+}
diff --git a/drivers/gpu/drm/nouveau/nouveau_channel.c b/drivers/gpu/drm/nouveau/nouveau_channel.c
new file mode 100644
-index 0000000..1a87041
+index 0000000..8e7a9fe
--- /dev/null
+++ b/drivers/gpu/drm/nouveau/nouveau_channel.c
-@@ -0,0 +1,482 @@
+@@ -0,0 +1,464 @@
+/*
+ * Copyright 2005-2006 Stephane Marchesin
+ * All Rights Reserved.
@@ -9060,32 +9098,18 @@ index 0000000..1a87041
+ struct drm_nouveau_private *dev_priv = dev->dev_private;
+ struct nouveau_pgraph_engine *pgraph = &dev_priv->engine.graph;
+ struct nouveau_fifo_engine *pfifo = &dev_priv->engine.fifo;
-+ struct nouveau_timer_engine *ptimer = &dev_priv->engine.timer;
-+ unsigned fbdev_flags = 0;
-+ uint64_t t_start;
-+ bool timeout = false;
++ unsigned long flags;
+ int ret;
+
+ NV_INFO(dev, "%s: freeing fifo %d\n", __func__, chan->id);
+
+ nouveau_debugfs_channel_fini(chan);
+
-+ /* Give the channel a chance to idle, wait 2s (hopefully) */
-+ t_start = ptimer->read(dev);
-+ while (!nouveau_channel_idle(chan)) {
-+ if (ptimer->read(dev) - t_start > 2000000000ULL) {
-+ NV_ERROR(dev, "Failed to idle channel %d. "
-+ "Prepare for strangeness..\n", chan->id);
-+ timeout = true;
-+ break;
-+ }
-+ }
-+
-+ /* Wait on a fence until channel goes idle, this ensures the engine
-+ * has finished with the last push buffer completely before we destroy
-+ * the channel.
-+ */
-+ if (!timeout) {
++ /* Give outstanding push buffers a chance to complete */
++ spin_lock_irqsave(&chan->fence.lock, flags);
++ nouveau_fence_update(chan);
++ spin_unlock_irqrestore(&chan->fence.lock, flags);
++ if (chan->fence.sequence != chan->fence.sequence_ack) {
+ struct nouveau_fence *fence = NULL;
+
+ ret = nouveau_fence_new(chan, &fence, true);
@@ -9094,11 +9118,8 @@ index 0000000..1a87041
+ nouveau_fence_unref((void *)&fence);
+ }
+
-+ if (ret) {
-+ NV_ERROR(dev, "Failed to fence channel %d. "
-+ "Prepare for strangeness..\n", chan->id);
-+ timeout = true;
-+ }
++ if (ret)
++ NV_ERROR(dev, "Failed to idle channel %d.\n", chan->id);
+ }
+
+ /* Ensure all outstanding fences are signaled. They should be if the
@@ -9107,31 +9128,30 @@ index 0000000..1a87041
+ */
+ nouveau_fence_fini(chan);
+
-+ /* disable the fifo caches */
-+ if (dev_priv->fbdev_info) {
-+ fbdev_flags = dev_priv->fbdev_info->flags;
-+ dev_priv->fbdev_info->flags |= FBINFO_HWACCEL_DISABLED;
++ /* Ensure the channel is no longer active on the GPU */
++ pfifo->reassign(dev, false);
++
++ if (pgraph->channel(dev) == chan) {
++ pgraph->fifo_access(dev, false);
++ pgraph->unload_context(dev);
++ pgraph->fifo_access(dev, true);
+ }
++ pgraph->destroy_context(chan);
+
-+ pfifo->reassign(dev, false);
-+ pfifo->disable(dev);
++ if (pfifo->channel_id(dev) == chan->id) {
[...2326 lines suppressed...]
@@ -34191,19 +34222,30 @@ index 0000000..aca9ea6
+ int ret, format;
+
+ switch (info->var.bits_per_pixel) {
++ case 8:
++ format = 0xf3;
++ break;
++ case 15:
++ format = 0xf8;
++ break;
+ case 16:
+ format = 0xe8;
+ break;
-+ default:
++ case 32:
+ switch (info->var.transp.length) {
-+ case 2:
++ case 0: /* depth 24 */
++ case 8: /* depth 32, just use 24.. */
++ format = 0xe6;
++ break;
++ case 2: /* depth 30 */
+ format = 0xd1;
+ break;
+ default:
-+ format = 0xe6;
-+ break;
++ return -EINVAL;
+ }
+ break;
++ default:
++ return -EINVAL;
+ }
+
+ ret = nouveau_gpuobj_gr_new(dev_priv->channel, 0x502d, &eng2d);
@@ -34290,10 +34332,10 @@ index 0000000..aca9ea6
+
diff --git a/drivers/gpu/drm/nouveau/nv50_fifo.c b/drivers/gpu/drm/nouveau/nv50_fifo.c
new file mode 100644
-index 0000000..10ed193
+index 0000000..c2396a6
--- /dev/null
+++ b/drivers/gpu/drm/nouveau/nv50_fifo.c
-@@ -0,0 +1,481 @@
+@@ -0,0 +1,493 @@
+/*
+ * Copyright (C) 2007 Ben Skeggs.
+ * All Rights Reserved.
@@ -34616,9 +34658,6 @@ index 0000000..10ed193
+
+ NV_DEBUG(dev, "ch%d\n", chan->id);
+
-+ if ((nv_rd32(dev, NV03_PFIFO_CACHE1_PUSH1) & 0xffff) == chan->id)
-+ nv_wr32(dev, NV03_PFIFO_CACHE1_PUSH1, 127);
-+
+ nouveau_gpuobj_ref_del(dev, &chan->ramfc);
+ nouveau_gpuobj_ref_del(dev, &chan->cache);
+
@@ -34697,21 +34736,35 @@ index 0000000..10ed193
+
+ dev_priv->engine.instmem.finish_access(dev);
+
++ nv_wr32(dev, NV03_PFIFO_CACHE1_GET, 0);
++ nv_wr32(dev, NV03_PFIFO_CACHE1_PUT, 0);
+ nv_wr32(dev, NV03_PFIFO_CACHE1_PUSH1, chan->id | (1<<16));
+ return 0;
+}
+
+int
-+nv50_fifo_save_context(struct nouveau_channel *chan)
++nv50_fifo_unload_context(struct drm_device *dev)
+{
-+ struct drm_device *dev = chan->dev;
+ struct drm_nouveau_private *dev_priv = dev->dev_private;
-+ struct nouveau_gpuobj *ramfc = chan->ramfc->gpuobj;
-+ struct nouveau_gpuobj *cache = chan->cache->gpuobj;
-+ int put, get, ptr;
++ struct nouveau_fifo_engine *pfifo = &dev_priv->engine.fifo;
++ struct nouveau_gpuobj *ramfc, *cache;
++ struct nouveau_channel *chan = NULL;
++ int chid, get, put, ptr;
+
+ NV_DEBUG(chan->dev, "ch%d\n", chan->id);
+
++ chid = pfifo->channel_id(dev);
++ if (chid < 0 || chid >= dev_priv->engine.fifo.channels)
++ return 0;
++
++ chan = dev_priv->fifos[chid];
++ if (!chan) {
++ NV_ERROR(dev, "Inactive channel on PFIFO: %d\n", chid);
++ return -EINVAL;
++ }
++ ramfc = chan->ramfc->gpuobj;
++ cache = chan->cache->gpuobj;
++
+ dev_priv->engine.instmem.prepare_access(dev, true);
+
+ nv_wo32(dev, ramfc, 0x00/4, nv_rd32(dev, 0x3330));
@@ -34761,7 +34814,6 @@ index 0000000..10ed193
+
+ /* guessing that all the 0x34xx regs aren't on NV50 */
+ if (!IS_G80) {
-+
+ nv_wo32(dev, ramfc, 0x84/4, ptr >> 1);
+ nv_wo32(dev, ramfc, 0x88/4, nv_rd32(dev, 0x340c));
+ nv_wo32(dev, ramfc, 0x8c/4, nv_rd32(dev, 0x3400));
@@ -34772,15 +34824,17 @@ index 0000000..10ed193
+
+ dev_priv->engine.instmem.finish_access(dev);
+
++ /*XXX: probably reload ch127 (NULL) state back too */
++ nv_wr32(dev, NV03_PFIFO_CACHE1_PUSH1, 127);
+ return 0;
+}
+
diff --git a/drivers/gpu/drm/nouveau/nv50_graph.c b/drivers/gpu/drm/nouveau/nv50_graph.c
new file mode 100644
-index 0000000..d9c3e21
+index 0000000..93a4b66
--- /dev/null
+++ b/drivers/gpu/drm/nouveau/nv50_graph.c
-@@ -0,0 +1,472 @@
+@@ -0,0 +1,465 @@
+/*
+ * Copyright (C) 2007 Ben Skeggs.
+ * All Rights Reserved.
@@ -35080,20 +35134,12 @@ index 0000000..d9c3e21
+ struct drm_device *dev = chan->dev;
+ struct drm_nouveau_private *dev_priv = dev->dev_private;
+ int i, hdr = IS_G80 ? 0x200 : 0x20;
-+ uint32_t inst;
+
+ NV_DEBUG(dev, "ch%d\n", chan->id);
+
+ if (!chan->ramin || !chan->ramin->gpuobj)
+ return;
+
-+ inst = nv_rd32(dev, NV50_PGRAPH_CTXCTL_CUR);
-+ if (inst & NV50_PGRAPH_CTXCTL_CUR_LOADED) {
-+ inst &= NV50_PGRAPH_CTXCTL_CUR_INSTANCE;
-+ if (inst == chan->ramin->instance >> 12)
-+ nv_wr32(dev, NV50_PGRAPH_CTXCTL_CUR, inst);
-+ }
-+
+ dev_priv->engine.instmem.prepare_access(dev, true);
+ for (i = hdr; i < hdr + 24; i += 4)
+ nv_wo32(dev, chan->ramin->gpuobj, i/4, 0);
@@ -35119,6 +35165,7 @@ index 0000000..d9c3e21
+ if (nouveau_wait_for_idle(dev))
+ nv_wr32(dev, 0x40032c, inst | (1<<31));
+ nv_wr32(dev, 0x400500, fifo);
++
+ return 0;
+}
+
@@ -35147,12 +35194,18 @@ index 0000000..d9c3e21
+}
+
+int
-+nv50_graph_save_context(struct nouveau_channel *chan)
++nv50_graph_unload_context(struct drm_device *dev)
+{
-+ uint32_t inst = chan->ramin->instance >> 12;
++ uint32_t inst;
++ int ret;
+
-+ NV_DEBUG(chan->dev, "ch%d\n", chan->id);
-+ return nv50_graph_do_save_context(chan->dev, inst);
++ inst = nv_rd32(dev, NV50_PGRAPH_CTXCTL_CUR);
++ if (!(inst & NV50_PGRAPH_CTXCTL_CUR_LOADED))
++ return 0;
++ inst &= NV50_PGRAPH_CTXCTL_CUR_INSTANCE;
++ ret = nv50_graph_do_save_context(dev, inst);
++ nv_wr32(dev, NV50_PGRAPH_CTXCTL_CUR, inst);
++ return 0;
+}
+
+void
@@ -35160,17 +35213,11 @@ index 0000000..d9c3e21
+{
+ uint32_t inst;
+
-+ inst = nv_rd32(dev, NV50_PGRAPH_CTXCTL_CUR);
-+ if (inst & NV50_PGRAPH_CTXCTL_CUR_LOADED)
-+ nv50_graph_do_save_context(dev, inst);
-+ nv_wr32(dev, NV50_PGRAPH_CTXCTL_CUR,
-+ inst & NV50_PGRAPH_CTXCTL_CUR_INSTANCE);
++ nv50_graph_unload_context(dev);
+
-+ inst = nv_rd32(dev, NV50_PGRAPH_CTXCTL_NEXT) &
-+ NV50_PGRAPH_CTXCTL_NEXT_INSTANCE;
++ inst = nv_rd32(dev, NV50_PGRAPH_CTXCTL_NEXT);
++ inst &= NV50_PGRAPH_CTXCTL_NEXT_INSTANCE;
+ nv50_graph_do_load_context(dev, inst);
-+ nv_wr32(dev, NV50_PGRAPH_CTXCTL_CUR,
-+ inst | NV50_PGRAPH_CTXCTL_CUR_LOADED);
+
+ nv_wr32(dev, NV40_PGRAPH_INTR_EN, nv_rd32(dev,
+ NV40_PGRAPH_INTR_EN) | NV_PGRAPH_INTR_CONTEXT_SWITCH);
Index: kernel.spec
===================================================================
RCS file: /cvs/pkgs/rpms/kernel/F-12/kernel.spec,v
retrieving revision 1.1850
retrieving revision 1.1851
diff -u -p -r1.1850 -r1.1851
--- kernel.spec 8 Oct 2009 04:32:54 -0000 1.1850
+++ kernel.spec 8 Oct 2009 04:42:12 -0000 1.1851
@@ -2079,6 +2079,9 @@ fi
# and build.
%changelog
+* Thu Oct 08 2009 Ben Skeggs <bskeggs at redhat.com> 2.6.31.1-65
+- nouveau: {drm-next,context,fbcon,misc} fixes, connector forcing
+
* Thu Oct 08 2009 Dave Airlie <airlied at redhat.com> 2.6.31.1-64
- rebase latest drm-next, fixes many s/r and r600 problems
- Previous message: rpms/kernel/F-12 drm-next-d4ac6a05.patch, NONE, 1.1 drm-nouveau.patch, 1.61, 1.62 drm-vga-arb.patch, 1.8, 1.9 kernel.spec, 1.1849, 1.1850 drm-next-4c57edba4.patch, 1.1, NONE
- Next message: rpms/gnome-panel/F-12 bookmarks-submenu.patch, NONE, 1.1 gnome-panel.spec, 1.371, 1.372
- Messages sorted by:
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