rpms/gcc/devel gcc44-pr41175-2.patch, NONE, 1.1 gcc44-rh518303.patch, NONE, 1.1 gcc44-rh522577.patch, NONE, 1.1 .cvsignore, 1.290, 1.291 gcc.spec, 1.68, 1.69 sources, 1.294, 1.295 gcc44-vta-cselib-subreg-of-value-more-pr41276.patch, 1.2, NONE
Jakub Jelinek
jakub at fedoraproject.org
Fri Sep 11 09:52:13 UTC 2009
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Author: jakub
Update of /cvs/pkgs/rpms/gcc/devel
In directory cvs1.fedora.phx.redhat.com:/tmp/cvs-serv18307
Modified Files:
.cvsignore gcc.spec sources
Added Files:
gcc44-pr41175-2.patch gcc44-rh518303.patch
gcc44-rh522577.patch
Removed Files:
gcc44-vta-cselib-subreg-of-value-more-pr41276.patch
Log Message:
4.4.1-13
gcc44-pr41175-2.patch:
config/rs6000/rs6000.c | 24 +
testsuite/gcc.target/powerpc/pr41175.c | 451 +++++++++++++++++++++++++++++++++
2 files changed, 466 insertions(+), 9 deletions(-)
--- NEW FILE gcc44-pr41175-2.patch ---
2009-09-11 Jakub Jelinek <jakub at redhat.com>
PR target/41175
* config/rs6000/rs6000.c (rs6000_emit_stack_reset): Handle savres
if sp_offset != 0 and frame_reg_rtx != sp_reg_rtx. Use gen_add3_insn
instead of gen_addsi3.
(rs6000_emit_epilogue): Set r11 from offsetted frame_reg_rtx instead
sp_reg_rtx, if frame_reg_rtx is r11, adjust sp_offset. Use
gen_add3_insn instead of gen_addsi3. Merge two adjacent ifs with the
same condition.
* gcc.target/powerpc/pr41175.c: New test.
--- gcc/config/rs6000/rs6000.c.jj 2009-09-09 20:46:57.000000000 +0200
+++ gcc/config/rs6000/rs6000.c 2009-09-11 10:29:01.101406443 +0200
@@ -18104,8 +18104,12 @@ rs6000_emit_stack_reset (rs6000_stack_t
if (frame_reg_rtx != sp_reg_rtx)
{
if (sp_offset != 0)
- return emit_insn (gen_addsi3 (sp_reg_rtx, frame_reg_rtx,
- GEN_INT (sp_offset)));
+ {
+ rtx dest_reg = savres ? gen_rtx_REG (Pmode, 11) : sp_reg_rtx;
+
+ return emit_insn (gen_add3_insn (dest_reg, frame_reg_rtx,
+ GEN_INT (sp_offset)));
+ }
else if (!savres)
return emit_move_insn (sp_reg_rtx, frame_reg_rtx);
}
@@ -19541,9 +19545,13 @@ rs6000_emit_epilogue (int sibcall)
rs6000_emit_stack_reset (info, sp_reg_rtx, frame_reg_rtx,
sp_offset, can_use_exit);
else
- emit_insn (gen_addsi3 (gen_rtx_REG (Pmode, 11),
- sp_reg_rtx,
- GEN_INT (sp_offset - info->fp_size)));
+ {
+ emit_insn (gen_add3_insn (gen_rtx_REG (Pmode, 11),
+ frame_reg_rtx,
+ GEN_INT (sp_offset - info->fp_size)));
+ if (REGNO (frame_reg_rtx) == 11)
+ sp_offset += info->fp_size;
+ }
par = rs6000_make_savres_rtx (info, frame_reg_rtx,
info->gp_save_offset, reg_mode,
@@ -19648,12 +19656,10 @@ rs6000_emit_epilogue (int sibcall)
info->lr_save_offset + sp_offset);
emit_move_insn (gen_rtx_REG (Pmode, 0), mem);
+ emit_move_insn (gen_rtx_REG (Pmode, LR_REGNO),
+ gen_rtx_REG (Pmode, 0));
}
- if (restore_lr && !restoring_GPRs_inline)
- emit_move_insn (gen_rtx_REG (Pmode, LR_REGNO),
- gen_rtx_REG (Pmode, 0));
-
/* Restore fpr's if we need to do it without calling a function. */
if (restoring_FPRs_inline)
for (i = 0; i < 64 - info->first_fp_reg_save; i++)
--- gcc/testsuite/gcc.target/powerpc/pr41175.c.jj 2009-09-11 10:28:50.529527601 +0200
+++ gcc/testsuite/gcc.target/powerpc/pr41175.c 2009-09-11 10:18:59.000000000 +0200
@@ -0,0 +1,451 @@
+/* PR target/41175 */
+/* { dg-do run } */
+/* { dg-options "-Os" } */
+
+#define X2(n) X1(n##0) X1(n##1)
+#define X4(n) X2(n##0) X2(n##1)
+#define X8(n) X4(n##0) X4(n##1)
+
+volatile int ll;
+
+__attribute__((noinline)) void
+foo (void)
+{
+ asm volatile ("" : : : "memory");
+}
+
+__attribute__((noinline)) void
+bar (char *p)
+{
+ asm volatile ("" : : "r" (p) : "memory");
+}
+
+__attribute__((noinline)) void
+f1 (void)
+{
+ int mem;
+#undef X1
+#define X1(n) int gpr##n = 0;
+ X8(a) X8(b) X8(c)
+#undef X1
+#define X1(n) "+r" (gpr##n),
+ asm volatile ("" : X8(a) "=m" (mem) : : "memory");
+ asm volatile ("" : X8(b) "=m" (mem) : : "memory");
+ asm volatile ("" : X8(c) "=m" (mem) : : "memory");
+ foo ();
+#undef X1
+#define X1(n) "r" (gpr##n),
+ asm volatile ("" : : X8(a) "m" (mem) : "memory");
+ asm volatile ("" : : X8(b) "m" (mem) : "memory");
+ asm volatile ("" : : X8(c) "m" (mem) : "memory");
+}
+
+__attribute__((noinline)) void
+f2 (void)
+{
+ int mem;
+#undef X1
+#define X1(n) int gpr##n = 0;
+ X8(a) X8(b) X8(c)
+#undef X1
+#define X1(n) "+r" (gpr##n),
+ asm volatile ("" : X8(a) "=m" (mem) : : "memory");
+ asm volatile ("" : X8(b) "=m" (mem) : : "memory");
+ asm volatile ("" : X8(c) "=m" (mem) : : "memory");
+ char *pp = __builtin_alloca (ll);
+ bar (pp);
+#undef X1
+#define X1(n) "r" (gpr##n),
+ asm volatile ("" : : X8(a) "m" (mem) : "memory");
+ asm volatile ("" : : X8(b) "m" (mem) : "memory");
+ asm volatile ("" : : X8(c) "m" (mem) : "memory");
+}
+
+__attribute__((noinline)) void
+f3 (void)
+{
+ int mem;
+#undef X1
+#define X1(n) int gpr##n = 0;
+ X8(a) X8(b) X8(c)
+#undef X1
+#define X1(n) "+r" (gpr##n),
+ asm volatile ("" : X8(a) "=m" (mem) : : "memory");
+ asm volatile ("" : X8(b) "=m" (mem) : : "memory");
+ asm volatile ("" : X8(c) "=m" (mem) : : "memory");
+#undef X1
+#define X1(n) "r" (gpr##n),
+ asm volatile ("" : : X8(a) "m" (mem) : "memory");
+ asm volatile ("" : : X8(b) "m" (mem) : "memory");
+ asm volatile ("" : : X8(c) "m" (mem) : "memory");
+}
+
+__attribute__((noinline)) void
+f4 (void)
+{
+ int mem;
+#undef X1
+#define X1(n) int gpr##n = 0;
+ X8(a) X8(b) X8(c)
+#undef X1
+#define X1(n) double fpr##n = 0.0;
+ X4(d)
+#undef X1
+#define X1(n) "+r" (gpr##n),
+ asm volatile ("" : X8(a) "=m" (mem) : : "memory");
+ asm volatile ("" : X8(b) "=m" (mem) : : "memory");
+ asm volatile ("" : X8(c) "=m" (mem) : : "memory");
+#undef X1
+#define X1(n) "+f" (fpr##n),
+ asm volatile ("" : X4(d) "=m" (mem) : : "memory");
+ foo ();
+#undef X1
+#define X1(n) "r" (gpr##n),
+ asm volatile ("" : : X8(a) "m" (mem) : "memory");
+ asm volatile ("" : : X8(b) "m" (mem) : "memory");
+ asm volatile ("" : : X8(c) "m" (mem) : "memory");
+#undef X1
+#define X1(n) "f" (fpr##n),
+ asm volatile ("" : : X4(d) "m" (mem) : "memory");
+}
+
+__attribute__((noinline)) void
+f5 (void)
+{
+ int mem;
+#undef X1
+#define X1(n) int gpr##n = 0;
+ X8(a) X8(b) X8(c)
+#undef X1
+#define X1(n) double fpr##n = 0.0;
+ X4(d)
+#undef X1
+#define X1(n) "+r" (gpr##n),
+ asm volatile ("" : X8(a) "=m" (mem) : : "memory");
+ asm volatile ("" : X8(b) "=m" (mem) : : "memory");
+ asm volatile ("" : X8(c) "=m" (mem) : : "memory");
+#undef X1
+#define X1(n) "+f" (fpr##n),
+ asm volatile ("" : X4(d) "=m" (mem) : : "memory");
+ char *pp = __builtin_alloca (ll);
+ bar (pp);
+#undef X1
+#define X1(n) "r" (gpr##n),
+ asm volatile ("" : : X8(a) "m" (mem) : "memory");
+ asm volatile ("" : : X8(b) "m" (mem) : "memory");
+ asm volatile ("" : : X8(c) "m" (mem) : "memory");
+#undef X1
+#define X1(n) "f" (fpr##n),
+ asm volatile ("" : : X4(d) "m" (mem) : "memory");
+}
+
+__attribute__((noinline)) void
+f6 (void)
+{
+ int mem;
+#undef X1
+#define X1(n) int gpr##n = 0;
+ X8(a) X8(b) X8(c)
+#undef X1
+#define X1(n) double fpr##n = 0.0;
+ X4(d)
+#undef X1
+#define X1(n) "+r" (gpr##n),
+ asm volatile ("" : X8(a) "=m" (mem) : : "memory");
+ asm volatile ("" : X8(b) "=m" (mem) : : "memory");
+ asm volatile ("" : X8(c) "=m" (mem) : : "memory");
+#undef X1
+#define X1(n) "+f" (fpr##n),
+ asm volatile ("" : X4(d) "=m" (mem) : : "memory");
+#undef X1
+#define X1(n) "r" (gpr##n),
+ asm volatile ("" : : X8(a) "m" (mem) : "memory");
+ asm volatile ("" : : X8(b) "m" (mem) : "memory");
+ asm volatile ("" : : X8(c) "m" (mem) : "memory");
+#undef X1
+#define X1(n) "f" (fpr##n),
+ asm volatile ("" : : X4(d) "m" (mem) : "memory");
+}
+
+__attribute__((noinline)) void
+f7 (void)
+{
+ int mem;
+#undef X1
+#define X1(n) int gpr##n = 0;
+ X8(a) X8(b) X8(c)
+#undef X1
+#define X1(n) double fpr##n = 0.0;
+ X2(d)
+#undef X1
+#define X1(n) "+r" (gpr##n),
+ asm volatile ("" : X8(a) "=m" (mem) : : "memory");
+ asm volatile ("" : X8(b) "=m" (mem) : : "memory");
+ asm volatile ("" : X8(c) "=m" (mem) : : "memory");
+#undef X1
+#define X1(n) "+f" (fpr##n),
+ asm volatile ("" : X2(d) "=m" (mem) : : "memory");
+ foo ();
+#undef X1
+#define X1(n) "r" (gpr##n),
+ asm volatile ("" : : X8(a) "m" (mem) : "memory");
+ asm volatile ("" : : X8(b) "m" (mem) : "memory");
+ asm volatile ("" : : X8(c) "m" (mem) : "memory");
+#undef X1
+#define X1(n) "f" (fpr##n),
+ asm volatile ("" : : X2(d) "m" (mem) : "memory");
+}
+
+__attribute__((noinline)) void
+f8 (void)
+{
+ int mem;
+#undef X1
+#define X1(n) int gpr##n = 0;
+ X8(a) X8(b) X8(c)
+#undef X1
+#define X1(n) double fpr##n = 0.0;
+ X2(d)
+#undef X1
+#define X1(n) "+r" (gpr##n),
+ asm volatile ("" : X8(a) "=m" (mem) : : "memory");
+ asm volatile ("" : X8(b) "=m" (mem) : : "memory");
+ asm volatile ("" : X8(c) "=m" (mem) : : "memory");
+#undef X1
+#define X1(n) "+f" (fpr##n),
+ asm volatile ("" : X2(d) "=m" (mem) : : "memory");
+ char *pp = __builtin_alloca (ll);
+ bar (pp);
+#undef X1
+#define X1(n) "r" (gpr##n),
+ asm volatile ("" : : X8(a) "m" (mem) : "memory");
+ asm volatile ("" : : X8(b) "m" (mem) : "memory");
+ asm volatile ("" : : X8(c) "m" (mem) : "memory");
+#undef X1
+#define X1(n) "f" (fpr##n),
+ asm volatile ("" : : X2(d) "m" (mem) : "memory");
+}
+
+__attribute__((noinline)) void
+f9 (void)
+{
+ int mem;
+#undef X1
+#define X1(n) int gpr##n = 0;
+ X8(a) X8(b) X8(c)
+#undef X1
+#define X1(n) double fpr##n = 0.0;
+ X2(d)
+#undef X1
+#define X1(n) "+r" (gpr##n),
+ asm volatile ("" : X8(a) "=m" (mem) : : "memory");
+ asm volatile ("" : X8(b) "=m" (mem) : : "memory");
+ asm volatile ("" : X8(c) "=m" (mem) : : "memory");
+#undef X1
+#define X1(n) "+f" (fpr##n),
+ asm volatile ("" : X2(d) "=m" (mem) : : "memory");
+#undef X1
+#define X1(n) "r" (gpr##n),
+ asm volatile ("" : : X8(a) "m" (mem) : "memory");
+ asm volatile ("" : : X8(b) "m" (mem) : "memory");
+ asm volatile ("" : : X8(c) "m" (mem) : "memory");
+#undef X1
+#define X1(n) "f" (fpr##n),
+ asm volatile ("" : : X2(d) "m" (mem) : "memory");
+}
+
+__attribute__((noinline)) void
+f10 (void)
+{
+ int mem;
+#undef X1
+#define X1(n) int gpr##n = 0;
+ X8(a) X8(b) X4(c)
+#undef X1
+#define X1(n) double fpr##n = 0.0;
+ X1(d)
+#undef X1
+#define X1(n) "+r" (gpr##n),
+ asm volatile ("" : X8(a) "=m" (mem) : : "memory");
+ asm volatile ("" : X8(b) "=m" (mem) : : "memory");
+ asm volatile ("" : X4(c) "=m" (mem) : : "memory");
+#undef X1
+#define X1(n) "+f" (fpr##n),
+ asm volatile ("" : X1(d) "=m" (mem) : : "memory");
+ foo ();
+#undef X1
+#define X1(n) "r" (gpr##n),
+ asm volatile ("" : : X8(a) "m" (mem) : "memory");
+ asm volatile ("" : : X8(b) "m" (mem) : "memory");
+ asm volatile ("" : : X4(c) "m" (mem) : "memory");
+#undef X1
+#define X1(n) "f" (fpr##n),
+ asm volatile ("" : : X1(d) "m" (mem) : "memory");
+}
+
+__attribute__((noinline)) void
+f11 (void)
+{
+ int mem;
+#undef X1
+#define X1(n) int gpr##n = 0;
+ X8(a) X8(b) X4(c)
+#undef X1
+#define X1(n) double fpr##n = 0.0;
+ X1(d)
+#undef X1
+#define X1(n) "+r" (gpr##n),
+ asm volatile ("" : X8(a) "=m" (mem) : : "memory");
+ asm volatile ("" : X8(b) "=m" (mem) : : "memory");
+ asm volatile ("" : X4(c) "=m" (mem) : : "memory");
+#undef X1
+#define X1(n) "+f" (fpr##n),
+ asm volatile ("" : X1(d) "=m" (mem) : : "memory");
+ char *pp = __builtin_alloca (ll);
+ bar (pp);
+#undef X1
+#define X1(n) "r" (gpr##n),
+ asm volatile ("" : : X8(a) "m" (mem) : "memory");
+ asm volatile ("" : : X8(b) "m" (mem) : "memory");
+ asm volatile ("" : : X4(c) "m" (mem) : "memory");
+#undef X1
+#define X1(n) "f" (fpr##n),
+ asm volatile ("" : : X1(d) "m" (mem) : "memory");
+}
+
+__attribute__((noinline)) void
+f12 (void)
+{
+ int mem;
+#undef X1
+#define X1(n) int gpr##n = 0;
+ X8(a) X8(b) X4(c)
+#undef X1
+#define X1(n) double fpr##n = 0.0;
+ X1(d)
+#undef X1
+#define X1(n) "+r" (gpr##n),
+ asm volatile ("" : X8(a) "=m" (mem) : : "memory");
+ asm volatile ("" : X8(b) "=m" (mem) : : "memory");
+ asm volatile ("" : X4(c) "=m" (mem) : : "memory");
+#undef X1
+#define X1(n) "+f" (fpr##n),
+ asm volatile ("" : X1(d) "=m" (mem) : : "memory");
+#undef X1
+#define X1(n) "r" (gpr##n),
+ asm volatile ("" : : X8(a) "m" (mem) : "memory");
+ asm volatile ("" : : X8(b) "m" (mem) : "memory");
+ asm volatile ("" : : X4(c) "m" (mem) : "memory");
+#undef X1
+#define X1(n) "f" (fpr##n),
+ asm volatile ("" : : X1(d) "m" (mem) : "memory");
+}
+
+__attribute__((noinline)) void
+f13 (void)
+{
+ int mem;
+#undef X1
+#define X1(n) int gpr##n = 0;
+ X8(a) X8(b) X2(c)
+#undef X1
+#define X1(n) double fpr##n = 0.0;
+ X8(d)
+#undef X1
+#define X1(n) "+r" (gpr##n),
+ asm volatile ("" : X8(a) "=m" (mem) : : "memory");
+ asm volatile ("" : X8(b) "=m" (mem) : : "memory");
+ asm volatile ("" : X2(c) "=m" (mem) : : "memory");
+#undef X1
+#define X1(n) "+f" (fpr##n),
+ asm volatile ("" : X8(d) "=m" (mem) : : "memory");
+ foo ();
+#undef X1
+#define X1(n) "r" (gpr##n),
+ asm volatile ("" : : X8(a) "m" (mem) : "memory");
+ asm volatile ("" : : X8(b) "m" (mem) : "memory");
+ asm volatile ("" : : X2(c) "m" (mem) : "memory");
+#undef X1
+#define X1(n) "f" (fpr##n),
+ asm volatile ("" : : X8(d) "m" (mem) : "memory");
+}
+
+__attribute__((noinline)) void
+f14 (void)
+{
+ int mem;
+#undef X1
+#define X1(n) int gpr##n = 0;
+ X8(a) X8(b) X2(c)
+#undef X1
+#define X1(n) double fpr##n = 0.0;
+ X8(d)
+#undef X1
+#define X1(n) "+r" (gpr##n),
+ asm volatile ("" : X8(a) "=m" (mem) : : "memory");
+ asm volatile ("" : X8(b) "=m" (mem) : : "memory");
+ asm volatile ("" : X2(c) "=m" (mem) : : "memory");
+#undef X1
+#define X1(n) "+f" (fpr##n),
+ asm volatile ("" : X8(d) "=m" (mem) : : "memory");
+ char *pp = __builtin_alloca (ll);
+ bar (pp);
+#undef X1
+#define X1(n) "r" (gpr##n),
+ asm volatile ("" : : X8(a) "m" (mem) : "memory");
+ asm volatile ("" : : X8(b) "m" (mem) : "memory");
+ asm volatile ("" : : X2(c) "m" (mem) : "memory");
+#undef X1
+#define X1(n) "f" (fpr##n),
+ asm volatile ("" : : X8(d) "m" (mem) : "memory");
+}
+
+__attribute__((noinline)) void
+f15 (void)
+{
+ int mem;
+#undef X1
+#define X1(n) int gpr##n = 0;
+ X8(a) X8(b) X2(c)
+#undef X1
+#define X1(n) double fpr##n = 0.0;
+ X8(d)
+#undef X1
+#define X1(n) "+r" (gpr##n),
+ asm volatile ("" : X8(a) "=m" (mem) : : "memory");
+ asm volatile ("" : X8(b) "=m" (mem) : : "memory");
+ asm volatile ("" : X2(c) "=m" (mem) : : "memory");
+#undef X1
+#define X1(n) "+f" (fpr##n),
+ asm volatile ("" : X8(d) "=m" (mem) : : "memory");
+#undef X1
+#define X1(n) "r" (gpr##n),
+ asm volatile ("" : : X8(a) "m" (mem) : "memory");
+ asm volatile ("" : : X8(b) "m" (mem) : "memory");
+ asm volatile ("" : : X2(c) "m" (mem) : "memory");
+#undef X1
+#define X1(n) "f" (fpr##n),
+ asm volatile ("" : : X8(d) "m" (mem) : "memory");
+}
+
+int
+main ()
+{
+ ll = 60;
+ f1 ();
+ f2 ();
+ f3 ();
+ f4 ();
+ f5 ();
+ f6 ();
+ f7 ();
+ f8 ();
+ f9 ();
+ f10 ();
+ f11 ();
+ f12 ();
+ f13 ();
+ f14 ();
+ f15 ();
+ return 0;
+}
gcc44-rh518303.patch:
integrate.c | 9 +++++++++
1 file changed, 9 insertions(+)
--- NEW FILE gcc44-rh518303.patch ---
2009-09-09 Jakub Jelinek <jakub at redhat.com>
* integrate.c (set_block_abstract_flags): Call
set_decl_abstract_flags also on BLOCK_NONLOCALIZED_VARs.
--- gcc/integrate.c.jj 2009-03-04 12:12:03.000000000 +0100
+++ gcc/integrate.c 2009-09-09 18:07:07.000000000 +0200
@@ -167,6 +167,7 @@ set_block_abstract_flags (tree stmt, int
{
tree local_decl;
tree subblock;
+ unsigned int i;
BLOCK_ABSTRACT (stmt) = setting;
@@ -175,6 +176,14 @@ set_block_abstract_flags (tree stmt, int
local_decl = TREE_CHAIN (local_decl))
set_decl_abstract_flags (local_decl, setting);
+ for (i = 0; i < BLOCK_NUM_NONLOCALIZED_VARS (stmt); i++)
+ {
+ local_decl = BLOCK_NONLOCALIZED_VAR (stmt, i);
+ if ((TREE_CODE (local_decl) == VAR_DECL && !TREE_STATIC (local_decl))
+ || TREE_CODE (local_decl) == PARM_DECL)
+ set_decl_abstract_flags (local_decl, setting);
+ }
+
for (subblock = BLOCK_SUBBLOCKS (stmt);
subblock != NULL_TREE;
subblock = BLOCK_CHAIN (subblock))
gcc44-rh522577.patch:
combine.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--- NEW FILE gcc44-rh522577.patch ---
2009-09-11 Jakub Jelinek <jakub at redhat.com>
* combine.c (propagate_for_debug_subst): Call wrap_constant on top.
--- gcc/combine.c.jj 2009-09-08 12:32:31.000000000 +0200
+++ gcc/combine.c 2009-09-11 11:01:32.000000000 +0200
@@ -2311,7 +2311,7 @@ propagate_for_debug_subst (rtx *loc, voi
to = simplify_gen_subreg (GET_MODE (x), to,
GET_MODE (from), SUBREG_BYTE (x));
}
- *loc = to;
+ *loc = wrap_constant (GET_MODE (x), to);
pair->changed = true;
return -1;
}
Index: .cvsignore
===================================================================
RCS file: /cvs/pkgs/rpms/gcc/devel/.cvsignore,v
retrieving revision 1.290
retrieving revision 1.291
diff -u -p -r1.290 -r1.291
--- .cvsignore 10 Sep 2009 14:24:08 -0000 1.290
+++ .cvsignore 11 Sep 2009 09:52:12 -0000 1.291
@@ -1,2 +1,2 @@
fastjar-0.97.tar.gz
-gcc-4.4.1-20090910.tar.bz2
+gcc-4.4.1-20090911.tar.bz2
Index: gcc.spec
===================================================================
RCS file: /cvs/pkgs/rpms/gcc/devel/gcc.spec,v
retrieving revision 1.68
retrieving revision 1.69
diff -u -p -r1.68 -r1.69
--- gcc.spec 10 Sep 2009 14:24:08 -0000 1.68
+++ gcc.spec 11 Sep 2009 09:52:12 -0000 1.69
@@ -1,9 +1,9 @@
-%global DATE 20090910
-%global SVNREV 151593
+%global DATE 20090911
+%global SVNREV 151630
%global gcc_version 4.4.1
# Note, gcc_release must be integer, if you want to add suffixes to
# %{release}, append them after %{gcc_release} on Release: line.
-%global gcc_release 12
+%global gcc_release 13
%global _unpackaged_files_terminate_build 0
%global multilib_64_archs sparc64 ppc64 s390x x86_64
%global include_gappletviewer 1
@@ -160,9 +160,11 @@ Patch16: gcc44-unwind-debug-hook.patch
Patch17: gcc44-pr38757.patch
Patch18: gcc44-libstdc++-docs.patch
Patch19: gcc44-vta-cfgexpand-ptr-mode-pr41248.patch
-Patch20: gcc44-vta-cselib-subreg-of-value-more-pr41276.patch
-Patch21: gcc44-powerpc-libgcc_s_so.patch
-Patch22: gcc44-pr41175.patch
+Patch20: gcc44-powerpc-libgcc_s_so.patch
+Patch21: gcc44-pr41175.patch
+Patch22: gcc44-pr41175-2.patch
+Patch23: gcc44-rh518303.patch
+Patch24: gcc44-rh522577.patch
Patch1000: fastjar-0.97-segfault.patch
@@ -469,9 +471,11 @@ which are required to compile with the G
%patch18 -p0 -b .libstdc++-docs~
%endif
%patch19 -p0 -b .vta-cfgexpand-ptr-mode-pr41248~
-%patch20 -p0 -b .gcc44-vta-cselib-subreg-of-value-more-pr41276~
-%patch21 -p0 -b .powerpc-libgcc_s_so~
-%patch22 -p0 -b .pr41175~
+%patch20 -p0 -b .powerpc-libgcc_s_so~
+%patch21 -p0 -b .pr41175~
+%patch22 -p0 -b .pr41175-2~
+%patch23 -p0 -b .rh518303~
+%patch24 -p0 -b .rh522577~
# This testcase doesn't compile.
rm libjava/testsuite/libjava.lang/PR35020*
@@ -1827,6 +1831,11 @@ fi
%doc rpm.doc/changelogs/libmudflap/ChangeLog*
%changelog
+* Fri Sep 11 2009 Jakub Jelinek <jakub at redhat.com> 4.4.1-13
+- fix ICE in debuginfo output with BLOCK_NONLOCALIZED_VARS (#518303)
+- wrap_constant when propagating for subst in debug in the combiner (#522577)
+- further fix for ppc -m32 -Os out of line gpr/fpr restoring (PR target/41175)
+
* Thu Sep 10 2009 Jakub Jelinek <jakub at redhat.com> 4.4.1-12
- update from gcc-4_4-branch
- PRs bootstrap/41180, target/41315
Index: sources
===================================================================
RCS file: /cvs/pkgs/rpms/gcc/devel/sources,v
retrieving revision 1.294
retrieving revision 1.295
diff -u -p -r1.294 -r1.295
--- sources 10 Sep 2009 14:24:09 -0000 1.294
+++ sources 11 Sep 2009 09:52:13 -0000 1.295
@@ -1,2 +1,2 @@
2659f09c2e43ef8b7d4406321753f1b2 fastjar-0.97.tar.gz
-e928ff85387b4b7c8f1f065a15f0a4f9 gcc-4.4.1-20090910.tar.bz2
+36739b78d9654be37ccf6019e72db459 gcc-4.4.1-20090911.tar.bz2
--- gcc44-vta-cselib-subreg-of-value-more-pr41276.patch DELETED ---
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