rpms/flashrom/EL-4 flashrom-r710-r893.diff, NONE, 1.1 flashrom.spec, 1.18, 1.19 import.log, 1.8, 1.9
Peter Lemenkov
peter at fedoraproject.org
Mon Feb 8 10:08:02 UTC 2010
Author: peter
Update of /cvs/pkgs/rpms/flashrom/EL-4
In directory cvs1.fedora.phx.redhat.com:/tmp/cvs-serv26180/EL-4
Modified Files:
flashrom.spec import.log
Added Files:
flashrom-r710-r893.diff
Log Message:
Updated to svn rev. 893 (lots of new hardware added)
flashrom-r710-r893.diff:
82802ab.c | 78 -
Makefile | 207 ++
README | 44
am29f040b.c | 25
bitbang_spi.c | 164 ++
board_enable.c | 1125 ++++++++-------
buspirate_spi.c | 318 ++++
cbtable.c | 38
chipdrivers.h | 180 ++
chipset_enable.c | 435 ++++--
cli_classic.c | 386 +++++
cli_output.c | 51
dediprog.c | 394 +++++
dmi.c | 168 ++
drkaiser.c | 79 +
dummyflasher.c | 58
en29f002a.c | 40
flash.h | 475 +++---
flashchips.c | 3926 +++++++++++++++++++++++++++++++++++++++++++++++++------
flashchips.h | 32
flashrom.8 | 23
flashrom.c | 954 ++++++++-----
ft2232_spi.c | 169 +-
gfxnvidia.c | 104 +
hwaccess.h | 156 ++
ichspi.c | 71
internal.c | 121 -
it87spi.c | 98 -
jedec.c | 361 +++--
layout.c | 4
m29f002.c | 2
m29f400bt.c | 29
mx29f002.c | 66
nic3com.c | 3
pcidev.c | 24
physmap.c | 61
pm29f002.c | 6
pm49fl00x.c | 14
print.c | 682 ++-------
print_wiki.c | 571 +++++++
programmer.c | 99 +
satasii.c | 5
sb600spi.c | 51
serial.c | 231 +++
serprog.c | 228 ---
sharplhf00l04.c | 103 -
spi.c | 180 +-
spi.h | 6
sst28sf040.c | 49
sst49lf040.c | 4
sst49lfxxxc.c | 39
sst_fwhub.c | 62
stm50flw0x0x.c | 115 -
udelay.c | 13
w29ee011.c | 2
w39v040c.c | 28
w39v080fa.c | 33
w49f002u.c | 4
wbsio_spi.c | 49
59 files changed, 9773 insertions(+), 3270 deletions(-)
--- NEW FILE flashrom-r710-r893.diff ---
diff --git a/82802ab.c b/82802ab.c
index 28fa177..dfe81e8 100644
--- a/82802ab.c
+++ b/82802ab.c
@@ -33,13 +33,13 @@
// I need that Berkeley bit-map printer
void print_82802ab_status(uint8_t status)
{
- printf("%s", status & 0x80 ? "Ready:" : "Busy:");
- printf("%s", status & 0x40 ? "BE SUSPEND:" : "BE RUN/FINISH:");
- printf("%s", status & 0x20 ? "BE ERROR:" : "BE OK:");
- printf("%s", status & 0x10 ? "PROG ERR:" : "PROG OK:");
- printf("%s", status & 0x8 ? "VP ERR:" : "VPP OK:");
- printf("%s", status & 0x4 ? "PROG SUSPEND:" : "PROG RUN/FINISH:");
- printf("%s", status & 0x2 ? "WP|TBL#|WP#,ABORT:" : "UNLOCK:");
+ printf_debug("%s", status & 0x80 ? "Ready:" : "Busy:");
+ printf_debug("%s", status & 0x40 ? "BE SUSPEND:" : "BE RUN/FINISH:");
+ printf_debug("%s", status & 0x20 ? "BE ERROR:" : "BE OK:");
+ printf_debug("%s", status & 0x10 ? "PROG ERR:" : "PROG OK:");
+ printf_debug("%s", status & 0x8 ? "VP ERR:" : "VPP OK:");
+ printf_debug("%s", status & 0x4 ? "PROG SUSPEND:" : "PROG RUN/FINISH:");
+ printf_debug("%s", status & 0x2 ? "WP|TBL#|WP#,ABORT:" : "UNLOCK:");
}
int probe_82802ab(struct flashchip *flash)
@@ -47,14 +47,11 @@ int probe_82802ab(struct flashchip *flash)
chipaddr bios = flash->virtual_memory;
uint8_t id1, id2;
-#if 0
- chip_writeb(0xAA, bios + 0x5555);
- chip_writeb(0x55, bios + 0x2AAA);
- chip_writeb(0x90, bios + 0x5555);
-#endif
-
- chip_writeb(0xff, bios);
+ /* Reset to get a clean state */
+ chip_writeb(0xFF, bios);
programmer_delay(10);
+
+ /* Enter ID mode */
chip_writeb(0x90, bios);
programmer_delay(10);
@@ -62,13 +59,11 @@ int probe_82802ab(struct flashchip *flash)
id2 = chip_readb(bios + 0x01);
/* Leave ID mode */
- chip_writeb(0xAA, bios + 0x5555);
- chip_writeb(0x55, bios + 0x2AAA);
- chip_writeb(0xF0, bios + 0x5555);
+ chip_writeb(0xFF, bios);
programmer_delay(10);
- printf_debug("%s: id1 0x%02x, id2 0x%02x\n", __FUNCTION__, id1, id2);
+ printf_debug("%s: id1 0x%02x, id2 0x%02x\n", __func__, id1, id2);
if (id1 != flash->manufacture_id || id2 != flash->model_id)
return 0;
@@ -81,7 +76,6 @@ int probe_82802ab(struct flashchip *flash)
uint8_t wait_82802ab(chipaddr bios)
{
uint8_t status;
- uint8_t id1, id2;
chip_writeb(0x70, bios);
if ((chip_readb(bios) & 0x80) == 0) { // it's busy
@@ -90,49 +84,38 @@ uint8_t wait_82802ab(chipaddr bios)
status = chip_readb(bios);
- // put another command to get out of status register mode
-
- chip_writeb(0x90, bios);
- programmer_delay(10);
-
- id1 = chip_readb(bios);
- id2 = chip_readb(bios + 0x01);
-
- // this is needed to jam it out of "read id" mode
- chip_writeb(0xAA, bios + 0x5555);
- chip_writeb(0x55, bios + 0x2AAA);
- chip_writeb(0xF0, bios + 0x5555);
+ /* Reset to get a clean state */
+ chip_writeb(0xFF, bios);
return status;
}
-int erase_82802ab_block(struct flashchip *flash, int offset)
+int erase_82802ab_block(struct flashchip *flash, unsigned int page, unsigned int pagesize)
{
- chipaddr bios = flash->virtual_memory + offset;
- chipaddr wrprotect = flash->virtual_registers + offset + 2;
+ chipaddr bios = flash->virtual_memory;
+ chipaddr wrprotect = flash->virtual_registers + page + 2;
uint8_t status;
// clear status register
- chip_writeb(0x50, bios);
- //printf("Erase at %p\n", bios);
+ chip_writeb(0x50, bios + page);
+
// clear write protect
- //printf("write protect is at %p\n", (wrprotect));
- //printf("write protect is 0x%x\n", *(wrprotect));
chip_writeb(0, wrprotect);
- //printf("write protect is 0x%x\n", *(wrprotect));
// now start it
- chip_writeb(0x20, bios);
- chip_writeb(0xd0, bios);
+ chip_writeb(0x20, bios + page);
+ chip_writeb(0xd0, bios + page);
programmer_delay(10);
+
// now let's see what the register is
- status = wait_82802ab(flash->virtual_memory);
- //print_82802ab_status(status);
- if (check_erased_range(flash, offset, flash->page_size)) {
+ status = wait_82802ab(bios);
+ print_82802ab_status(status);
+
+ if (check_erased_range(flash, page, pagesize)) {
fprintf(stderr, "ERASE FAILED!\n");
return -1;
}
- printf("DONE BLOCK 0x%x\n", offset);
+ printf("DONE BLOCK 0x%x\n", page);
return 0;
}
@@ -145,7 +128,7 @@ int erase_82802ab(struct flashchip *flash)
printf("total_size is %d; flash->page_size is %d\n",
total_size, flash->page_size);
for (i = 0; i < total_size; i += flash->page_size)
- if (erase_82802ab_block(flash, i)) {
+ if (erase_82802ab_block(flash, i, flash->page_size)) {
fprintf(stderr, "ERASE FAILED!\n");
return -1;
}
@@ -199,7 +182,7 @@ int write_82802ab(struct flashchip *flash, uint8_t *buf)
}
/* erase block by block and write block by block; this is the most secure way */
- if (erase_82802ab_block(flash, i * page_size)) {
+ if (erase_82802ab_block(flash, i * page_size, page_size)) {
fprintf(stderr, "ERASE FAILED!\n");
return -1;
}
@@ -207,7 +190,6 @@ int write_82802ab(struct flashchip *flash, uint8_t *buf)
bios + i * page_size, page_size);
}
printf("\n");
- protect_jedec(bios);
free(tmpbuf);
return 0;
diff --git a/Makefile b/Makefile
index 881c8f2..62c6a74 100644
--- a/Makefile
+++ b/Makefile
@@ -25,7 +25,7 @@ INSTALL = install
DIFF = diff
PREFIX ?= /usr/local
MANDIR ?= $(PREFIX)/share/man
-CFLAGS ?= -Os -Wall -Werror
+CFLAGS ?= -Os -Wall -Werror -Wshadow
EXPORTDIR ?= .
OS_ARCH = $(shell uname)
@@ -33,24 +33,23 @@ ifneq ($(OS_ARCH), SunOS)
STRIP_ARGS = -s
endif
ifeq ($(OS_ARCH), Darwin)
-CFLAGS += -I/usr/local/include
-LDFLAGS += -framework IOKit -framework DirectIO -L/usr/local/lib
+CPPFLAGS += -I/opt/local/include -I/usr/local/include
+LDFLAGS += -framework IOKit -framework DirectIO -L/opt/local/lib -L/usr/local/lib
endif
ifeq ($(OS_ARCH), FreeBSD)
-CFLAGS += -I/usr/local/include
+CPPFLAGS += -I/usr/local/include
LDFLAGS += -L/usr/local/lib
endif
-LIBS += -lpci -lz
+CHIP_OBJS = jedec.o stm50flw0x0x.o w39v080fa.o sharplhf00l04.o w29ee011.o \
+ sst28sf040.o m29f400bt.o 82802ab.o pm49fl00x.o \
+ sst49lfxxxc.o sst_fwhub.o flashchips.o spi.o
-OBJS = chipset_enable.o board_enable.o udelay.o jedec.o stm50flw0x0x.o \
- sst28sf040.o am29f040b.o mx29f002.o m29f400bt.o pm29f002.o \
- w49f002u.o 82802ab.o pm49fl00x.o sst49lf040.o en29f002a.o \
- sst49lfxxxc.o sst_fwhub.o layout.o cbtable.o flashchips.o physmap.o \
- flashrom.o w39v080fa.o sharplhf00l04.o w29ee011.o spi.o it87spi.o \
- ichspi.o w39v040c.o sb600spi.o wbsio_spi.o m29f002.o internal.o \
- dummyflasher.o pcidev.o nic3com.o satasii.o ft2232_spi.o \
[...17767 lines suppressed...]
- /* Read product ID */
- id1 = chip_readb(bios);
- id2 = chip_readb(bios + 0x01);
-
- /* Product Identifixation Exit */
- chip_writeb(0xAA, bios + 0x5555);
- chip_writeb(0x55, bios + 0x2AAA);
- chip_writeb(0xF0, bios + 0x5555);
- programmer_delay(10);
-
- printf_debug("%s: id1 0x%x, id2 0x%x\n", __FUNCTION__, id1, id2);
-
- if (id1 != flash->manufacture_id || id2 != flash->model_id)
- return 0;
-
- map_flash_registers(flash);
-
- return 1;
-}
-
static int unlock_block_winbond_fwhub(struct flashchip *flash, int offset)
{
chipaddr wrprotect = flash->virtual_registers + offset + 2;
@@ -201,7 +170,7 @@ int write_winbond_fwhub(struct flashchip *flash, uint8_t *buf)
printf("Programming: ");
for (i = 0; i < total_size; i += flash->page_size) {
printf("0x%08x\b\b\b\b\b\b\b\b\b\b", i);
- write_sector_jedec(bios, buf + i, bios + i, flash->page_size);
+ write_sector_jedec_common(flash, buf + i, bios + i, flash->page_size, 0xffff);
}
printf("\n");
diff --git a/w49f002u.c b/w49f002u.c
index d12bc72..87ce000 100644
--- a/w49f002u.c
+++ b/w49f002u.c
@@ -36,8 +36,8 @@ int write_49f002(struct flashchip *flash, uint8_t *buf)
for (i = 0; i < total_size / page_size; i++) {
printf("%04d at address: 0x%08x ", i, i * page_size);
/* Byte-wise writing of 'page_size' bytes. */
- write_sector_jedec(bios, buf + i * page_size,
- bios + i * page_size, page_size);
+ write_sector_jedec_common(flash, buf + i * page_size,
+ bios + i * page_size, page_size, 0xffff);
printf("\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b");
fflush(stdout);
}
diff --git a/wbsio_spi.c b/wbsio_spi.c
index 6b9425f..922aff1 100644
--- a/wbsio_spi.c
+++ b/wbsio_spi.c
@@ -2,6 +2,7 @@
* This file is part of the flashrom project.
*
* Copyright (C) 2008 Peter Stuge <peter at stuge.se>
+ * Copyright (C) 2009,2010 Carl-Daniel Hailfinger
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -34,18 +35,18 @@ static uint16_t wbsio_get_spibase(uint16_t port)
w836xx_ext_enter(port);
id = sio_read(port, 0x20);
if (id != 0xa0) {
- fprintf(stderr, "\nW83627 not found at 0x%x, id=0x%02x want=0xa0.\n", port, id);
+ msg_perr("\nW83627 not found at 0x%x, id=0x%02x want=0xa0.\n", port, id);
goto done;
}
if (0 == (sio_read(port, 0x24) & 2)) {
- fprintf(stderr, "\nW83627 found at 0x%x, but SPI pins are not enabled. (CR[0x24] bit 1=0)\n", port);
+ msg_perr("\nW83627 found at 0x%x, but SPI pins are not enabled. (CR[0x24] bit 1=0)\n", port);
goto done;
}
sio_write(port, 0x07, 0x06);
if (0 == (sio_read(port, 0x30) & 1)) {
- fprintf(stderr, "\nW83627 found at 0x%x, but SPI is not enabled. (LDN6[0x30] bit 0=0)\n", port);
+ msg_perr("\nW83627 found at 0x%x, but SPI is not enabled. (LDN6[0x30] bit 0=0)\n", port);
goto done;
}
@@ -62,7 +63,7 @@ int wbsio_check_for_spi(const char *name)
if (0 == (wbsio_spibase = wbsio_get_spibase(WBSIO_PORT2)))
return 1;
- printf_debug("\nwbsio_spibase = 0x%x\n", wbsio_spibase);
+ msg_pspew("\nwbsio_spibase = 0x%x\n", wbsio_spibase);
buses_supported |= CHIP_BUSTYPE_SPI;
spi_controller = SPI_CONTROLLER_WBSIO;
@@ -96,42 +97,42 @@ int wbsio_spi_send_command(unsigned int writecnt, unsigned int readcnt,
int i;
uint8_t mode = 0;
- printf_debug("%s:", __func__);
+ msg_pspew("%s:", __func__);
if (1 == writecnt && 0 == readcnt) {
mode = 0x10;
} else if (2 == writecnt && 0 == readcnt) {
OUTB(writearr[1], wbsio_spibase + 4);
- printf_debug(" data=0x%02x", writearr[1]);
+ msg_pspew(" data=0x%02x", writearr[1]);
mode = 0x20;
} else if (1 == writecnt && 2 == readcnt) {
mode = 0x30;
} else if (4 == writecnt && 0 == readcnt) {
- printf_debug(" addr=0x%02x", (writearr[1] & 0x0f));
+ msg_pspew(" addr=0x%02x", (writearr[1] & 0x0f));
for (i = 2; i < writecnt; i++) {
OUTB(writearr[i], wbsio_spibase + i);
- printf_debug("%02x", writearr[i]);
+ msg_pspew("%02x", writearr[i]);
}
mode = 0x40 | (writearr[1] & 0x0f);
} else if (5 == writecnt && 0 == readcnt) {
- printf_debug(" addr=0x%02x", (writearr[1] & 0x0f));
+ msg_pspew(" addr=0x%02x", (writearr[1] & 0x0f));
for (i = 2; i < 4; i++) {
OUTB(writearr[i], wbsio_spibase + i);
- printf_debug("%02x", writearr[i]);
+ msg_pspew("%02x", writearr[i]);
}
OUTB(writearr[i], wbsio_spibase + i);
- printf_debug(" data=0x%02x", writearr[i]);
+ msg_pspew(" data=0x%02x", writearr[i]);
mode = 0x50 | (writearr[1] & 0x0f);
} else if (8 == writecnt && 0 == readcnt) {
- printf_debug(" addr=0x%02x", (writearr[1] & 0x0f));
+ msg_pspew(" addr=0x%02x", (writearr[1] & 0x0f));
for (i = 2; i < 4; i++) {
OUTB(writearr[i], wbsio_spibase + i);
- printf_debug("%02x", writearr[i]);
+ msg_pspew("%02x", writearr[i]);
}
- printf_debug(" data=0x");
+ msg_pspew(" data=0x");
for (; i < writecnt; i++) {
OUTB(writearr[i], wbsio_spibase + i);
- printf_debug("%02x", writearr[i]);
+ msg_pspew("%02x", writearr[i]);
}
mode = 0x60 | (writearr[1] & 0x0f);
} else if (5 == writecnt && 4 == readcnt) {
@@ -142,17 +143,17 @@ int wbsio_spi_send_command(unsigned int writecnt, unsigned int readcnt,
*/
;
} else if (4 == writecnt && readcnt >= 1 && readcnt <= 4) {
- printf_debug(" addr=0x%02x", (writearr[1] & 0x0f));
+ msg_pspew(" addr=0x%02x", (writearr[1] & 0x0f));
for (i = 2; i < writecnt; i++) {
OUTB(writearr[i], wbsio_spibase + i);
- printf_debug("%02x", writearr[i]);
+ msg_pspew("%02x", writearr[i]);
}
mode = ((7 + readcnt) << 4) | (writearr[1] & 0x0f);
}
- printf_debug(" cmd=%02x mode=%02x\n", writearr[0], mode);
+ msg_pspew(" cmd=%02x mode=%02x\n", writearr[0], mode);
if (!mode) {
- fprintf(stderr, "%s: unsupported command type wr=%d rd=%d\n",
+ msg_perr("%s: unsupported command type wr=%d rd=%d\n",
__func__, writecnt, readcnt);
/* Command type refers to the number of bytes read/written. */
return SPI_INVALID_LENGTH;
@@ -165,12 +166,12 @@ int wbsio_spi_send_command(unsigned int writecnt, unsigned int readcnt,
if (!readcnt)
return 0;
- printf_debug("%s: returning data =", __func__);
+ msg_pspew("%s: returning data =", __func__);
for (i = 0; i < readcnt; i++) {
readarr[i] = INB(wbsio_spibase + 4 + i);
- printf_debug(" 0x%02x", readarr[i]);
+ msg_pspew(" 0x%02x", readarr[i]);
}
- printf_debug("\n");
+ msg_pspew("\n");
return 0;
}
@@ -179,7 +180,7 @@ int wbsio_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len)
int size = flash->total_size * 1024;
if (size > 1024 * 1024) {
- fprintf(stderr, "%s: Winbond saved on 4 register bits so max chip size is 1024 KB!\n", __func__);
+ msg_perr("%s: Winbond saved on 4 register bits so max chip size is 1024 KB!\n", __func__);
return 1;
}
@@ -191,7 +192,7 @@ int wbsio_spi_write_1(struct flashchip *flash, uint8_t *buf)
int size = flash->total_size * 1024;
if (size > 1024 * 1024) {
- fprintf(stderr, "%s: Winbond saved on 4 register bits so max chip size is 1024 KB!\n", __func__);
+ msg_perr("%s: Winbond saved on 4 register bits so max chip size is 1024 KB!\n", __func__);
return 1;
}
Index: flashrom.spec
===================================================================
RCS file: /cvs/pkgs/rpms/flashrom/EL-4/flashrom.spec,v
retrieving revision 1.18
retrieving revision 1.19
diff -u -p -r1.18 -r1.19
--- flashrom.spec 4 Sep 2009 09:22:46 -0000 1.18
+++ flashrom.spec 8 Feb 2010 10:08:02 -0000 1.19
@@ -1,12 +1,15 @@
+%global svnrev 893
+
Summary: Simple program for reading/writing BIOS chips content
Name: flashrom
Version: 0.9.1
-Release: 1%{?dist}
+Release: 2.svn%{svnrev}%{?dist}
License: GPLv2
Group: Applications/System
URL: http://flashrom.org
Source0: http://qa.coreboot.org/releases/%{name}-%{version}.tar.bz2
Source1: http://qa.coreboot.org/releases/%{name}-%{version}.tar.bz2.asc
+Patch0: flashrom-r710-r893.diff
BuildRequires: pciutils-devel
BuildRequires: zlib-devel
BuildRoot: %{_tmppath}/%{name}-%{version}-%{release}-root-%(%{__id_u} -n)
@@ -20,6 +23,7 @@ and write new contents on the chips ("fl
%prep
%setup -q
+%patch0 -p1
%build
CFLAGS="%{optflags}" %{__make} %{?_smp_mflags}
@@ -38,6 +42,41 @@ CFLAGS="%{optflags}" %{__make} %{?_smp_m
%{_mandir}/man8/%{name}.*
%changelog
+* Mon Feb 8 2010 Peter Lemenkov <lemenkov at gmail.com> 0.9.1-2.svn893
+- Updated to latest svn ver. 893
+- ST M29W512B chip
+- Tekram P6Pro-A5 board
+- Fixed GIGABYTE GA-7ZM board
+- SST39SF512 chip
+- Fixed SyncMOS S29C51004T chip
+- Intel NM10 chipset
+- Fixed A25L40PU and A2540PT chip
+- Spansion S25FL008A chip
+- MSI 651M-L board
+- Several Eon EN25Bxx{T,B} chips
+- Fixed Sharp LHF00L04 chip
+- VIA VT8233A chipset
+- MSI K8N Neo4-F board
+- Intel Poulsbo chipset
+- ECS K7S6A board
+- ASRock M3A790GXH/128M board
+- Asus M2V-MX board
+- Shuttle AK31 board
+- Fixed MSI KT4V board
+- Asus P4B266LM board
+- Asrock P4i65GV board
+- Intel 3400 series / 5 series chipset
+- W25x32 and W25x64 chips
+- Sanyo LF25FW203A chip (sometimes labeled as 25FW203T)
+- Shuttle FN25 (SN25P) board
+- EPoX EP-8RDA3+ board
+- ASUS P5ND2-SLI Deluxe board
+- nVidia nForce 4 chipset
+- VIA VT82C596 chipset
+- Wyse Winterm S50 board
+- Dell S1850 board
+- Dr. Kaiser PC-Waechter PCI devices
+
* Fri Sep 4 2009 Peter Lemenkov <lemenkov at gmail.com> 0.9.1-1
- Ver. 0.9.1
- See release notes at http://www.coreboot.org/Flashrom/0.9.1
Index: import.log
===================================================================
RCS file: /cvs/pkgs/rpms/flashrom/EL-4/import.log,v
retrieving revision 1.8
retrieving revision 1.9
diff -u -p -r1.8 -r1.9
--- import.log 4 Sep 2009 09:22:46 -0000 1.8
+++ import.log 8 Feb 2010 10:08:02 -0000 1.9
@@ -6,3 +6,4 @@ flashrom-0-0_17_20090311svn3984_fc10:EL-
flashrom-0-0_18_20090414svn4107_fc10:EL-4:flashrom-0-0.18.20090414svn4107.fc10.src.rpm:1239697521
flashrom-0_9_0-1_fc10:EL-4:flashrom-0.9.0-1.fc10.src.rpm:1241504157
flashrom-0_9_1-1_fc11:EL-4:flashrom-0.9.1-1.fc11.src.rpm:1252056138
+flashrom-0_9_1-2_svn893_fc12:EL-4:flashrom-0.9.1-2.svn893.fc12.src.rpm:1265623655
More information about the scm-commits
mailing list