rpms/kernel/F-12 drm-nouveau-bios-paranoia.patch, NONE, 1.1 drm-nouveau-g80-ctxprog.patch, NONE, 1.1 drm-nouveau-nvac-noaccel.patch, NONE, 1.1 drm-nouveau-safetile-getparam.patch, NONE, 1.1 drm-nouveau-shared-fb.patch, NONE, 1.1 drm-nouveau-tvout-disable.patch, NONE, 1.1 kernel.spec, 1.1974, 1.1975
Ben Skeggs
bskeggs at fedoraproject.org
Tue Jan 12 00:14:08 UTC 2010
Author: bskeggs
Update of /cvs/pkgs/rpms/kernel/F-12
In directory cvs1.fedora.phx.redhat.com:/tmp/cvs-serv15789
Modified Files:
kernel.spec
Added Files:
drm-nouveau-bios-paranoia.patch drm-nouveau-g80-ctxprog.patch
drm-nouveau-nvac-noaccel.patch
drm-nouveau-safetile-getparam.patch
drm-nouveau-shared-fb.patch drm-nouveau-tvout-disable.patch
Log Message:
* Tue Jan 12 2010 Ben Skeggs <bskeggs at redhat.com> 2.6.32.3-15
- nouveau: patches and firmware from F12 that aren't in upstream kernel
drm-nouveau-bios-paranoia.patch:
nouveau_bios.c | 60 ++++++++-------------------------------------------------
1 file changed, 9 insertions(+), 51 deletions(-)
--- NEW FILE drm-nouveau-bios-paranoia.patch ---
>From 76cf2708ee7892bf36bc9daa3edf86ed1faad255 Mon Sep 17 00:00:00 2001
From: Ben Skeggs <bskeggs at redhat.com>
Date: Fri, 10 Jul 2009 10:14:47 +1000
Subject: [PATCH 3/6] drm/nouveau: make the bios parser less paranoid..
---
drivers/gpu/drm/nouveau/nouveau_bios.c | 61 +++++--------------------------
1 files changed, 10 insertions(+), 51 deletions(-)
diff --git a/drivers/gpu/drm/nouveau/nouveau_bios.c b/drivers/gpu/drm/nouveau/nouveau_bios.c
index ba14397..9710e69 100644
--- a/drivers/gpu/drm/nouveau/nouveau_bios.c
+++ b/drivers/gpu/drm/nouveau/nouveau_bios.c
@@ -310,63 +310,22 @@ valid_reg(struct nvbios *bios, uint32_t reg)
struct drm_device *dev = bios->dev;
/* C51 has misaligned regs on purpose. Marvellous */
- if (reg & 0x2 || (reg & 0x1 && dev_priv->VBIOS.pub.chip_version != 0x51)) {
- NV_ERROR(dev, "========== misaligned reg 0x%08X ==========\n",
- reg);
- return 0;
- }
- /*
- * Warn on C51 regs that have not been verified accessible in
- * mmiotracing
- */
+ if (reg & 0x2 ||
+ (reg & 0x1 && dev_priv->VBIOS.pub.chip_version != 0x51))
+ NV_ERROR(dev, "======= misaligned reg 0x%08X =======\n", reg);
+
+ /* warn on C51 regs that haven't been verified accessible in tracing */
if (reg & 0x1 && dev_priv->VBIOS.pub.chip_version == 0x51 &&
reg != 0x130d && reg != 0x1311 && reg != 0x60081d)
NV_WARN(dev, "=== C51 misaligned reg 0x%08X not verified ===\n",
reg);
- /* Trust the init scripts on G80 */
- if (dev_priv->card_type >= NV_50)
- return 1;
-
- #define WITHIN(x, y, z) ((x >= y) && (x < y + z))
- if (WITHIN(reg, NV_PMC_OFFSET, NV_PMC_SIZE))
- return 1;
- if (WITHIN(reg, NV_PBUS_OFFSET, NV_PBUS_SIZE))
- return 1;
- if (WITHIN(reg, NV_PFIFO_OFFSET, NV_PFIFO_SIZE))
- return 1;
- if (dev_priv->VBIOS.pub.chip_version >= 0x30 &&
- (WITHIN(reg, 0x4000, 0x600) || reg == 0x00004600))
- return 1;
- if (dev_priv->VBIOS.pub.chip_version >= 0x40 &&
- WITHIN(reg, 0xc000, 0x48))
- return 1;
- if (dev_priv->VBIOS.pub.chip_version >= 0x17 && reg == 0x0000d204)
- return 1;
- if (dev_priv->VBIOS.pub.chip_version >= 0x40) {
- if (reg == 0x00011014 || reg == 0x00020328)
- return 1;
- if (WITHIN(reg, 0x88000, NV_PBUS_SIZE)) /* new PBUS */
- return 1;
+ if (reg >= (8*1024*1024)) {
+ NV_ERROR(dev, "=== reg 0x%08x out of mapped bounds ===\n", reg);
+ return 0;
}
- if (WITHIN(reg, NV_PFB_OFFSET, NV_PFB_SIZE))
- return 1;
- if (WITHIN(reg, NV_PEXTDEV_OFFSET, NV_PEXTDEV_SIZE))
- return 1;
- if (WITHIN(reg, NV_PCRTC0_OFFSET, NV_PCRTC0_SIZE * 2))
- return 1;
- if (WITHIN(reg, NV_PRAMDAC0_OFFSET, NV_PRAMDAC0_SIZE * 2))
- return 1;
- if (dev_priv->VBIOS.pub.chip_version >= 0x17 && reg == 0x0070fff0)
- return 1;
- if (dev_priv->VBIOS.pub.chip_version == 0x51 &&
- WITHIN(reg, NV_PRAMIN_OFFSET, NV_PRAMIN_SIZE))
- return 1;
- #undef WITHIN
- NV_ERROR(dev, "========== unknown reg 0x%08X ==========\n", reg);
-
- return 0;
+ return 1;
}
static bool
--
1.6.5.2
drm-nouveau-g80-ctxprog.patch:
Makefile | 12
nouveau/nv50.ctxprog.ihex | 100 ++
nouveau/nv50.ctxvals.ihex | 1335 +++++++++++++++++++++++++++++++++
nouveau/nv84.ctxprog.ihex | 91 ++
nouveau/nv84.ctxvals.ihex | 557 +++++++++++++
nouveau/nv86.ctxprog.ihex | 58 +
nouveau/nv86.ctxvals.ihex | 340 ++++++++
nouveau/nv92.ctxprog.ihex | 103 ++
nouveau/nv92.ctxvals.ihex | 1232 ++++++++++++++++++++++++++++++
nouveau/nv94.ctxprog.ihex | 79 +
nouveau/nv94.ctxvals.ihex | 761 +++++++++++++++++++
nouveau/nv96.ctxprog.ihex | 79 +
nouveau/nv96.ctxvals.ihex | 761 +++++++++++++++++++
nouveau/nv98.ctxprog.ihex | 57 +
nouveau/nv98.ctxvals.ihex | 326 ++++++++
nouveau/nva0.ctxprog.ihex | 89 ++
nouveau/nva0.ctxvals.ihex | 1836 ++++++++++++++++++++++++++++++++++++++++++++++
nouveau/nva5.ctxprog.ihex | 77 +
nouveau/nva5.ctxvals.ihex | 772 +++++++++++++++++++
nouveau/nva8.ctxprog.ihex | 75 +
nouveau/nva8.ctxvals.ihex | 475 +++++++++++
nouveau/nvaa.ctxprog.ihex | 79 +
nouveau/nvaa.ctxvals.ihex | 356 ++++++++
nouveau/nvac.ctxprog.ihex | 79 +
nouveau/nvac.ctxvals.ihex | 363 +++++++++
25 files changed, 10091 insertions(+), 1 deletion(-)
--- NEW FILE drm-nouveau-g80-ctxprog.patch ---
>From c771c11d2febd217b9ee11156211296c7aad77cc Mon Sep 17 00:00:00 2001
From: Ben Skeggs <bskeggs at redhat.com>
Date: Fri, 11 Dec 2009 14:04:08 +1000
Subject: [PATCH 1/6] drm/nouveau: add ctxprog/ctxvals firmware for >=G80 chipsets
---
firmware/Makefile | 12 +
firmware/nouveau/nv50.ctxprog.ihex | 100 ++
firmware/nouveau/nv50.ctxvals.ihex | 1335 ++++++++++++++++++++++++++
firmware/nouveau/nv84.ctxprog.ihex | 91 ++
firmware/nouveau/nv84.ctxvals.ihex | 557 +++++++++++
firmware/nouveau/nv86.ctxprog.ihex | 58 ++
firmware/nouveau/nv86.ctxvals.ihex | 340 +++++++
firmware/nouveau/nv92.ctxprog.ihex | 103 ++
firmware/nouveau/nv92.ctxvals.ihex | 1232 ++++++++++++++++++++++++
firmware/nouveau/nv94.ctxprog.ihex | 79 ++
firmware/nouveau/nv94.ctxvals.ihex | 761 +++++++++++++++
firmware/nouveau/nv96.ctxprog.ihex | 79 ++
firmware/nouveau/nv96.ctxvals.ihex | 761 +++++++++++++++
firmware/nouveau/nv98.ctxprog.ihex | 57 ++
firmware/nouveau/nv98.ctxvals.ihex | 326 +++++++
firmware/nouveau/nva0.ctxprog.ihex | 89 ++
firmware/nouveau/nva0.ctxvals.ihex | 1836 ++++++++++++++++++++++++++++++++++++
firmware/nouveau/nva5.ctxprog.ihex | 77 ++
firmware/nouveau/nva5.ctxvals.ihex | 772 +++++++++++++++
firmware/nouveau/nva8.ctxprog.ihex | 75 ++
firmware/nouveau/nva8.ctxvals.ihex | 475 ++++++++++
firmware/nouveau/nvaa.ctxprog.ihex | 79 ++
firmware/nouveau/nvaa.ctxvals.ihex | 356 +++++++
firmware/nouveau/nvac.ctxprog.ihex | 79 ++
firmware/nouveau/nvac.ctxvals.ihex | 362 +++++++
25 files changed, 10091 insertions(+), 0 deletions(-)
create mode 100644 firmware/nouveau/nv50.ctxprog.ihex
create mode 100644 firmware/nouveau/nv50.ctxvals.ihex
create mode 100644 firmware/nouveau/nv84.ctxprog.ihex
create mode 100644 firmware/nouveau/nv84.ctxvals.ihex
create mode 100644 firmware/nouveau/nv86.ctxprog.ihex
create mode 100644 firmware/nouveau/nv86.ctxvals.ihex
create mode 100644 firmware/nouveau/nv92.ctxprog.ihex
create mode 100644 firmware/nouveau/nv92.ctxvals.ihex
create mode 100644 firmware/nouveau/nv94.ctxprog.ihex
create mode 100644 firmware/nouveau/nv94.ctxvals.ihex
create mode 100644 firmware/nouveau/nv96.ctxprog.ihex
create mode 100644 firmware/nouveau/nv96.ctxvals.ihex
create mode 100644 firmware/nouveau/nv98.ctxprog.ihex
create mode 100644 firmware/nouveau/nv98.ctxvals.ihex
create mode 100644 firmware/nouveau/nva0.ctxprog.ihex
create mode 100644 firmware/nouveau/nva0.ctxvals.ihex
create mode 100644 firmware/nouveau/nva5.ctxprog.ihex
create mode 100644 firmware/nouveau/nva5.ctxvals.ihex
create mode 100644 firmware/nouveau/nva8.ctxprog.ihex
create mode 100644 firmware/nouveau/nva8.ctxvals.ihex
create mode 100644 firmware/nouveau/nvaa.ctxprog.ihex
create mode 100644 firmware/nouveau/nvaa.ctxvals.ihex
create mode 100644 firmware/nouveau/nvac.ctxprog.ihex
create mode 100644 firmware/nouveau/nvac.ctxvals.ihex
diff --git a/firmware/Makefile b/firmware/Makefile
index f4ca0c7..7766c96 100644
--- a/firmware/Makefile
+++ b/firmware/Makefile
@@ -62,6 +62,18 @@ fw-shipped-$(CONFIG_DRM_RADEON) += radeon/R100_cp.bin radeon/R200_cp.bin \
radeon/RV770_pfp.bin radeon/RV770_me.bin \
radeon/RV730_pfp.bin radeon/RV730_me.bin \
radeon/RV710_pfp.bin radeon/RV710_me.bin
+fw-shipped-$(CONFIG_DRM_NOUVEAU) += nouveau/nv50.ctxprog nouveau/nv50.ctxvals \
+ nouveau/nv84.ctxprog nouveau/nv84.ctxvals \
+ nouveau/nv86.ctxprog nouveau/nv86.ctxvals \
+ nouveau/nv92.ctxprog nouveau/nv92.ctxvals \
+ nouveau/nv94.ctxprog nouveau/nv94.ctxvals \
+ nouveau/nv96.ctxprog nouveau/nv96.ctxvals \
+ nouveau/nv98.ctxprog nouveau/nv98.ctxvals \
+ nouveau/nva0.ctxprog nouveau/nva0.ctxvals \
+ nouveau/nva5.ctxprog nouveau/nva5.ctxvals \
+ nouveau/nva8.ctxprog nouveau/nva8.ctxvals \
+ nouveau/nvaa.ctxprog nouveau/nvaa.ctxvals \
+ nouveau/nvac.ctxprog nouveau/nvac.ctxvals
fw-shipped-$(CONFIG_DVB_AV7110) += av7110/bootcode.bin
fw-shipped-$(CONFIG_DVB_TTUSB_BUDGET) += ttusb-budget/dspbootcode.bin
fw-shipped-$(CONFIG_E100) += e100/d101m_ucode.bin e100/d101s_ucode.bin \
diff --git a/firmware/nouveau/nv50.ctxprog.ihex b/firmware/nouveau/nv50.ctxprog.ihex
new file mode 100644
index 0000000..684781a
--- /dev/null
+++ b/firmware/nouveau/nv50.ctxprog.ihex
@@ -0,0 +1,100 @@
+:100000004E564350008A018E0070009C0070002004
+:10001000002000080060004C005000890E400000E5
+:100020000020000700600000003000FF00C000005A
+:10003000002000FF008000090070004D874100444F
+:100040001E4000051E40000D1E40000663410005D5
+:10005000006000C5154000110060000B1C4000FF4F
+:10006000FF9000FFFF910020002000080060004C7E
+:1000700000500009006000456341004D7E41009D35
+:10008000007000CF2240009F0070009F005000C011
+:100090001F400080002000080060004F1F4000C08B
+:1000A0001F4000CC254000810070000000200006A9
+:1000B00000600000007000FC1B1100830070000055
+:1000C0000030000059210007006000010BC0001C37
+:1000D00000200001008000CB005000FF00C0008025
+:1000E0000070008300700047002000060060000AD6
+:1000F000021100C00520000700600000003000FF72
+:1001000000C000FF00C800076E410027262000FF46
+:100110000080008C454000CB0050003F02A0004012
+:10012000002000060060000F007000020217000AA5
+:10013000021100320020000D02100042021B0002DA
+:1001400003120002041400000518000905130050F2
+:100150000515000506110007061E00000711000026
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+:1004900000500000000000C6381100C9381500D017
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+:1004C0003B12008B3B1100943B1900E7434100199C
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+:100510003F1900000000000F4A4100CB00500000CE
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+:1005500000600004002000FF00C000FF008000CB0E
+:10056000005000000070000000200006006000FE47
+:100570001B11004D7E4100000070000000200006AD
+:10058000006000FE1B1100800070001D0070004D17
+:1005900011400081007000040060004A0050008893
+:1005A0006841000B006000000020000600600000B1
+:1005B0000070000B7E4100FD1B11004D37400027ED
+:1005C000262000FD008000CB0050000200C000C0CB
+:1005D000052000070060005F01200002008000CBC2
+:1005E0000050000218C000C824200002008000CB88
+:1005F0000050004D4340000B0060004D7C41000165
+:100600000070000300700006824100058341000D68
+:10061000006000050070000D007000060070000B07
+:0F0620000070000E0070001C0070000C006000E5
+:00000001FF
diff --git a/firmware/nouveau/nv50.ctxvals.ihex b/firmware/nouveau/nv50.ctxvals.ihex
new file mode 100644
index 0000000..9c82e73
--- /dev/null
+++ b/firmware/nouveau/nv50.ctxvals.ihex
@@ -0,0 +1,1335 @@
+:100000004E56435600690A000043000000300000CD
+:100010000048000000400040FF490000008000F060
+:10002000FF4A0000009000F7FF4B000000A806E820
+:10003000FF4C0000000200000075000000030000FB
+:10004000007600000000100000850000000CFE009B
+:10005000008A000000001000009500000087FD01EC
+:10006000009A000000181000009B000000FF000034
[...9907 lines suppressed...]
+:100A500000750700003F000000960700000400003A
+:100A600000A607000001000000A7070000880000A2
+:100A700000AD07000001000000AE070000150000F7
+:100A800000AF07000088000000BD07000001000063
+:100A900000C707000004000000CD070000010000AF
+:100AA00000CE07000080444404E507000001100068
+:100AB0000045080000110000007F0800002600002B
+:100AC00000850800000F000000970800000000806B
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+:100B10000025090000020000002D0900000100006E
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+:011680000069
+:00000001FF
--
1.6.5.2
drm-nouveau-nvac-noaccel.patch:
b/drivers/gpu/drm/nouveau/nv50_graph.c | 88 ++++++++
firmware/nouveau/nvac.ctxprog.ihex | 79 -------
firmware/nouveau/nvac.ctxvals.ihex | 363 ---------------------------------
3 files changed, 88 insertions(+), 442 deletions(-)
--- NEW FILE drm-nouveau-nvac-noaccel.patch ---
>From 89aee1bfe529ae0c1a8e2b907aa9257c1e48e690 Mon Sep 17 00:00:00 2001
From: Ben Skeggs <bskeggs at redhat.com>
Date: Fri, 8 Jan 2010 16:23:11 +1000
Subject: [PATCH 6/6] drm/nouveau: remove ctxprog/ctxvals for NVAC, accel is broken there
---
drivers/gpu/drm/nouveau/nv50_graph.c | 88 ++++++++
firmware/nouveau/nvac.ctxprog.ihex | 79 --------
firmware/nouveau/nvac.ctxvals.ihex | 362 ----------------------------------
3 files changed, 88 insertions(+), 441 deletions(-)
delete mode 100644 firmware/nouveau/nvac.ctxprog.ihex
delete mode 100644 firmware/nouveau/nvac.ctxvals.ihex
diff --git a/drivers/gpu/drm/nouveau/nv50_graph.c b/drivers/gpu/drm/nouveau/nv50_graph.c
index ca79f32..7f43a50 100644
--- a/drivers/gpu/drm/nouveau/nv50_graph.c
+++ b/drivers/gpu/drm/nouveau/nv50_graph.c
@@ -111,8 +111,50 @@ nv50_graph_init_ctxctl(struct drm_device *dev)
NV_DEBUG(dev, "\n");
+<<<<<<< HEAD
nouveau_grctx_prog_load(dev);
if (!dev_priv->engine.graph.ctxprog)
+=======
+ switch (dev_priv->chipset) {
+ case 0x50:
+ voodoo = nv50_ctxprog;
+ break;
+ case 0x84:
+ voodoo = nv84_ctxprog;
+ break;
+ case 0x86:
+ voodoo = nv86_ctxprog;
+ break;
+ case 0x92:
+ voodoo = nv92_ctxprog;
+ break;
+ case 0x94:
+ case 0x96:
+ voodoo = nv94_ctxprog;
+ break;
+ case 0x98:
+ voodoo = nv98_ctxprog;
+ break;
+ case 0xa0:
+ voodoo = nva0_ctxprog;
+ break;
+ case 0xa5:
+ voodoo = nva5_ctxprog;
+ break;
+ case 0xa8:
+ voodoo = nva8_ctxprog;
+ break;
+ case 0xaa:
+ voodoo = nvaa_ctxprog;
+ break;
+#if 0 /* block accel for now, it won't work */
+ case 0xac:
+ voodoo = nvac_ctxprog;
+ break;
+#endif
+ default:
+ NV_ERROR(dev, "no ctxprog for chipset NV%02x\n", dev_priv->chipset);
+>>>>>>> drm/nv50: block accel on nvac for the moment, it's broken
dev_priv->engine.graph.accel_blocked = true;
nv_wr32(dev, 0x400320, 4);
@@ -210,6 +252,52 @@ nv50_graph_create_context(struct nouveau_channel *chan)
nv_wo32(dev, ramin, (hdr + 0x14)/4, 0x00010000);
dev_priv->engine.instmem.finish_access(dev);
+<<<<<<< HEAD
+=======
+ switch (dev_priv->chipset) {
+ case 0x50:
+ ctxvals = nv50_ctxvals;
+ break;
+ case 0x84:
+ ctxvals = nv84_ctxvals;
+ break;
+ case 0x86:
+ ctxvals = nv86_ctxvals;
+ break;
+ case 0x92:
+ ctxvals = nv92_ctxvals;
+ break;
+ case 0x94:
+ ctxvals = nv94_ctxvals;
+ break;
+ case 0x96:
+ ctxvals = nv96_ctxvals;
+ break;
+ case 0x98:
+ ctxvals = nv98_ctxvals;
+ break;
+ case 0xa0:
+ ctxvals = nva0_ctxvals;
+ break;
+ case 0xa5:
+ ctxvals = nva5_ctxvals;
+ break;
+ case 0xa8:
+ ctxvals = nva8_ctxvals;
+ break;
+ case 0xaa:
+ ctxvals = nvaa_ctxvals;
+ break;
+#if 0 /* block accel for now, it won't work */
+ case 0xac:
+ ctxvals = nvac_ctxvals;
+ break;
+#endif
+ default:
+ break;
+ }
+
+>>>>>>> drm/nv50: block accel on nvac for the moment, it's broken
dev_priv->engine.instmem.prepare_access(dev, true);
nouveau_grctx_vals_load(dev, ctx);
nv_wo32(dev, ctx, 0x00000/4, chan->ramin->instance >> 12);
diff --git a/firmware/nouveau/nvac.ctxprog.ihex b/firmware/nouveau/nvac.ctxprog.ihex
deleted file mode 100644
index 41b1bea..0000000
--- a/firmware/nouveau/nvac.ctxprog.ihex
+++ /dev/null
@@ -1,79 +0,0 @@
-:100000004E5643500034019C00700000003000093F
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diff --git a/firmware/nouveau/nvac.ctxvals.ihex b/firmware/nouveau/nvac.ctxvals.ihex
deleted file mode 100644
index fb35ebd..0000000
--- a/firmware/nouveau/nvac.ctxvals.ihex
+++ /dev/null
@@ -1,362 +0,0 @@
-:100000004E56435600CF020000430000003000006F
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-:1009C0003F8D0600000000803F8E06000001000001
-:1009D00000950600000000803F9606000000010020
-:1009E000009E06000000010000A6060000110000A5
-:1009F00000B606000008000000E606000001000046
-:100A000000F606000001000000FE060000010000E4
-:100A10000006070000010000000E070000CF0000E4
-:100A20000016070000020000004E07000001000051
-:100A3000005E0700000100000065070000100000D4
-:100A40000066070000010000006E070000010000C2
-:100A500000750700003F000000960700000400003A
-:100A600000A607000001000000A7070000880000A2
-:100A700000AD07000001000000AE070000150000F7
-:100A800000AF07000088000000BD07000001000063
-:100A900000C707000004000000CD070000010000AF
-:100AA00000CE07000080444404E507000001100068
-:100AB0000045080000110000007F0800002600002B
-:100AC00000850800000F000000970800000000806B
-:100AD0003FB70800001A000000BF08000010000027
-:100AE00000C508000011000000FD08000001000022
-:100AF0000005090000010000000D090000010000D0
-:100B00000015090000020000001D0900000100009E
-:100B10000025090000020000002D0900000100006E
-:100B2000003D09000067FE1F004D0900008168AC10
-:100B30000FA609000001000000B609000001000036
-:100B400000D60900008824712AE609000000C0854B
-:100B500040EE09000040000000F60900000001001E
-:100B600000FE09000000010100060A0000000080EC
-:100B700002070A000052000000170A0000260000C9
-:100B800000270A0000040000002D0A0000010000F8
-:100B9000002F0A000004000000350A0000020000D7
-:100BA000003D0A0000010000003F0A00001A00009A
-:100BB00000450A0000010000004D0A00000200008C
-:100BC00000550A000001000000570A000000FFFF66
-:100BD000005D0A000001000000850A00001100000D
-:100BE000008D0A000001000000D60A00000F00007E
-:100BF00000360B0000040000003E0B0000FFFF0069
-:100C000000460B0000FFFF00004E0B0000FFFF003E
-:100C100000560B0000FFFF00009E0B0000010000CB
-:100C200000BE0B000001000000EE0B000001000000
-:100C300000060C0000010000005E0C000001000036
-:100C400000660C0000010000006E0C0000020000B5
-:100C500000760C0000010000007E0C000001000086
-:100C600000860C0000020000008E0C000001000055
-:100C7000009E0C000011000000DE0C00008168AC3A
-:100C80000FF60C000004000000160D00001100001B
-:100C9000001E0D0000010000002E0D0000CF00001E
-:100CA00000360D0000CF0000003E0D0000CF000018
-:100CB000008B0D00000F000000960D0000010000E9
-:100CC000009B0D0000010000009E0D0000010000CF
-:100CD00000A60D000002000000AE0D0000010000A3
-:100CE00000B60D000001000000BE0D000002000073
-:100CF00000C60D000001000000D60D00000100003C
-:100D000000DE0D000001000000E60D000001000003
-:100D100000EE0D000001000000F60D0000010000D3
-:100D200000FE0D000001000000060E0000010000A2
-:100D3000000E0E000001000000160E000011000061
-:100D400000560E00008168AC0F5E0E00000F000020
-:100D5000009E0E000067FE1F00B60E00001100008E
-:100D600000BE0E000001000000DE0E0000040000C6
-:100D7000000E0F000001000000360F0000110000FF
-:100D800000760F00008168AC0F960F000011000084
-:100D9000009E0F000001000000AE0F0000010000E7
-:100DA00000BE0F000001000000CE0F0000FF070092
-:100DB00000DE0F000001000000EE0F000001000047
-:100DC00000731000000F0000004611000008000032
-:100DD000004E11000008000000561100000800003D
-:100DE000005E11000008000000661100000800000D
-:100DF000006E1100000800000076110000080000DD
-:100E0000007E1100000800000086110000110000A3
-:100E100000C61100008168AC0FCE11000000040074
-:100E200000D611000000040000DE110000000400E4
-:100E300000E611000000040000EE110000000400B4
-:100E400000F611000000040000FE11000000040084
-:100E50000006120000000400000E12000000030053
-:100E60000016120000000300001E12000000030024
-:100E70000026120000000300002E120000000300F4
-:100E80000036120000000300003E120000000300C4
-:100E90000046120000000300004E12000001000096
-:100EA00000561200000F0000009612000020000003
-:100EB000009E12000011000000A6120000000100B8
-:100EC00000B612000001000000CE12000040000039
-:100ED00000D612000000010000E61200000300002E
-:100EE000000E13000067FE1F002E1300000200001A
-:100EF00000361300008168AC0F861300000100006B
-:100F000000AE13000004000000BE1300000100004A
-:100F100000C613000000040000CE13000000030010
-:100F200000D613000001100000F6130000110000AD
-:100F300000361400008168AC0F3E1400000F000062
-:100F400000FE1400008168AC0F0615000067FE1F4C
-:100F50000026150000110000003E150000040000EE
-:100F6000004E1500000100000056150000010000B1
-:100F70000076150000010000009E1500008168AC9D
-:100F80000FC615000004000000D615000001000087
-:100F900000DE15000001000000F615000001000051
-:100FA000004E16000001000000561600000100006F
-:100FB000005E16000001000000661600000100003F
-:100FC000006E16000001000000761600000100000F
-:100FD000007E1600000100000086160000010000DF
-:100FE000008E16000011000000CE1600008168ACD3
-:100FF0000FD61600000F00000016170000110000A9
-:10100000001E170000010000007E170000DFBFE394
-:101010000486170000DFBFE3048E17000001000004
-:10102000009E17000000FFFF00A61700000100004F
-:1010300000BE17000000FFFF0006180000010000BE
-:101040000016180000010000001E1800000010200B
-:101050003026180000405060702E1800008898A8B4
-:10106000B836180000C8D8E8F8461800001A000082
-:10107000005618000004000000FE180000040000E4
-:101080000006190000040000000E19000000010213
-:101090000336190000040000004E1900000400008F
-:1010A0000056190000040000005E190000800000D6
-:1010B0000066190000001E00006E19000004000008
-:1010C00000961A0000040000009E1A000080000034
-:1010D00000A61A000004000000AE1A000000010281
-:1010E00003B61A000003000000BE1A0000001E0034
-:1010F00000C61A000004000000EE1A000004000000
-:1011000000F61A000003000000161B000004000097
-:1011100000E81E000021000000F01E000001000099
-:1011200000F81E000002000000001F000000010087
-:1011300000081F000000010000101F000001000057
-:1011400000281F000001000000301F000002000006
-:1011500000381F000000010000401F0000000100D7
-:1011600000481F000001000000BE2B00000400002A
-:1011700000C62B000003000000D12C00000400007A
-:1011800000D92C000004000000E92C0000800000C1
-:1011900000F12C000004000000F92C000001000008
-:1011A00000092D000027000000192D000026000076
-:1011B00000135200000F00000054560000FFFF3FD4
-:1011C000006C560000FF1F0000F0690000000000E6
-:1011D00004F869000000000004006A00000000003C
-:1011E00004086A000000000004106A00000000000B
-:1011F00004186A000000000004206A0000000000DB
-:1012000004286A000000000004306A0000000000AA
-:1012100004386A000000000004406A00000000007A
-:1012200004486A000000000004506A00000000004A
-:1012300004586A000000000004606A00000000001A
-:1012400004686A000000000004906B0000DFBFE348
-:1012500004986B0000DFBFE304B06B000021FE01C7
-:1012600000B86B00008168AC0FE06B0000120C103E
-:1012700008086C000000010000206C000001000163
-:1012800000306C000001000100386C00000100001B
-:1012900000406C000001000100486C0000010000EB
-:1012A00000506C000004000000586C0000020000B8
-:1012B00000C86F00000000803F00700000040000C4
-:1012C00000087000001A00000020700000010000FB
-:1012D00000B870000000FFFF00F07000000F000079
-:1012E00000307100008168AC0F38710000110000FF
-:1012F00000B871000004000000D07100000100007F
-:1013000000E871000002000000F071000000000021
-:1013100004F87100000000000418720000050000CD
-:10132000002072000052000000487200000100001E
-:1013300000D07200000000803FD8720000000080E2
-:101340003FE07200000000803FE872000000008073
-:101350003FF07200000000803FF872000000008043
-:101360003F007300000000803F0873000000008011
-:101370003F107300000000803F18730000000080E1
-:101380003F207300000000803F28730000000080B1
-:101390003F307300000000803F3873000000008081
-:1013A0003F407300000000803F4873000000008051
-:1013B0003F507300001000000088740000120C10F1
-:1013C000089074000005000000A8740000010000EF
-:1013D00000B8740000FFFF0000C0740000FFFF00B1
-:1013E00000C8740000FFFF0000D0740000FFFF0081
-:1013F00000D874000003000000F874000000FFFF34
-:1014000000007500001A00000010750000030000C5
-:1014100000F87600000201000008770000040000D8
-:10142000001077000004000000187700000400009E
-:10143000002077000004000000687700000400002E
-:1014400000707700000400000080770000FF0700B4
-:10145000009077000002010000E077000004000027
-:1014600000E877000004000000F0770000040000AE
-:1014700000F8770000040000009AE6000004000075
-:1014800000A2E6000004000000AAE60000120C1012
-:1014900008B2E6000003000000C2E60000120C10D3
-:1014A00008D2E60000140C0800DAE6000001000093
-:1014B00000E2E6000004000000EAE600000400008C
-:1014C00000F2E60000140C08000AE70000120C10FD
-:1014D0000812E70000270000002AE70000010000D2
-:1014E000003A05010001000000F2050100120C1095
-:1014F0000800060100120C10081006010080000010
-:10150000001806010004700080200601000004009D
-:101510000428060100C00000003006010000100091
-:101520000048060100000E000050060100001E00E9
-:1015300000580601000100000070060100010000D3
-:10154000008006010004000000880601000200007F
-:1015500000F006010080000000F8060100047000A1
-:1015600080000701000004000408070100C000001B
-:1015700000100701000010000028070100000E0005
-:101580000030070100001E000038070100010000C4
-:101590000050070100010000006007010004000086
-:1015A000006807010002000000C8070100120C10CB
-:1015B00008D807010021FE010008080100FFFF0014
-:1015C0000010080100FFFF000018080100FFFF00E5
-:1015D0000020080100FFFF000028080100010000B2
-:1015E000003008010001000100380801000100017D
-:1015F0000040080100010000005008010021FE0128
-:101600000080080100120C10088808010004000086
-:10161000009808010002000000A00801001100006D
-:1016200000E80801008168AC0F1009010004000007
-:1016300000600901000200000068090100010000CB
-:10164000007009010001000000780901000200009B
-:10165000008009010001000000880901000100006C
-:10166000009009010001000000A009010004000031
-:1016700000C026010011000000D02601000100007A
-:011680000069
-:00000001FF
--
1.6.5.2
drm-nouveau-safetile-getparam.patch:
nouveau_state.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
--- NEW FILE drm-nouveau-safetile-getparam.patch ---
>From 2aa78d8442bd947637ed81da00fd9c22232d2ed0 Mon Sep 17 00:00:00 2001
From: Ben Skeggs <bskeggs at redhat.com>
Date: Wed, 9 Sep 2009 16:16:44 +1000
Subject: [PATCH 5/6] f12: add getparam to know scanout tile_flags is safe
---
drivers/gpu/drm/nouveau/nouveau_state.c | 3 +++
1 files changed, 3 insertions(+), 0 deletions(-)
diff --git a/drivers/gpu/drm/nouveau/nouveau_state.c b/drivers/gpu/drm/nouveau/nouveau_state.c
index 36f8268..27c4d48 100644
--- a/drivers/gpu/drm/nouveau/nouveau_state.c
+++ b/drivers/gpu/drm/nouveau/nouveau_state.c
@@ -861,6 +861,9 @@ int nouveau_ioctl_getparam(struct drm_device *dev, void *data,
getparam->value = dev_priv->sfb_gem->size;
break;
+ case 0xdeadcafe00000003: /* NOUVEAU_GETPARAM_SCANOUT_TILEFLAGS */
+ getparam->value = 1;
+ break;
default:
NV_ERROR(dev, "unknown parameter %lld\n", getparam->param);
return -EINVAL;
--
1.6.5.2
drm-nouveau-shared-fb.patch:
nouveau_drv.h | 2 +
nouveau_state.c | 67 +++++++++++++++++++++++++++++++++++++++++++++++++++++++-
2 files changed, 68 insertions(+), 1 deletion(-)
--- NEW FILE drm-nouveau-shared-fb.patch ---
>From 42670e54412d2b72248bca3fe8c9bd76aa98ebfa Mon Sep 17 00:00:00 2001
From: Ben Skeggs <bskeggs at redhat.com>
Date: Sun, 28 Jun 2009 20:24:26 +1000
Subject: [PATCH 2/6] drm/nouveau: support needed for multiple xservers
---
drivers/gpu/drm/nouveau/nouveau_drv.h | 2 +
drivers/gpu/drm/nouveau/nouveau_state.c | 66 +++++++++++++++++++++++++++++++
2 files changed, 68 insertions(+), 0 deletions(-)
diff --git a/drivers/gpu/drm/nouveau/nouveau_drv.h b/drivers/gpu/drm/nouveau/nouveau_drv.h
index 5f8cbb7..bf9acc6 100644
--- a/drivers/gpu/drm/nouveau/nouveau_drv.h
+++ b/drivers/gpu/drm/nouveau/nouveau_drv.h
@@ -593,6 +593,8 @@ struct drm_nouveau_private {
struct {
struct dentry *channel_root;
} debugfs;
+
+ struct drm_gem_object *sfb_gem;
};
static inline struct drm_nouveau_private *
diff --git a/drivers/gpu/drm/nouveau/nouveau_state.c b/drivers/gpu/drm/nouveau/nouveau_state.c
index e76ec2d..36f8268 100644
--- a/drivers/gpu/drm/nouveau/nouveau_state.c
+++ b/drivers/gpu/drm/nouveau/nouveau_state.c
@@ -37,6 +37,50 @@
static int nouveau_stub_init(struct drm_device *dev) { return 0; }
static void nouveau_stub_takedown(struct drm_device *dev) {}
+static int
+sfbhack_init(struct drm_device *dev)
+{
+ struct drm_nouveau_private *dev_priv = dev->dev_private;
+ struct nouveau_bo *nvbo = NULL;
+ uint32_t tile_flags = dev_priv->card_type == NV_50 ? 0x7000 : 0x0000;
+ int ret, size;
+
+ if (dev_priv->sfb_gem)
+ return 0;
+
+ size = nouveau_mem_fb_amount(dev);
+ if (size > drm_get_resource_len(dev, 1))
+ size = drm_get_resource_len(dev, 1);
+ size >>= 1;
+
+ ret = nouveau_gem_new(dev, dev_priv->channel, size, 0, TTM_PL_FLAG_VRAM,
+ 0, tile_flags, false, true, &nvbo);
+ if (ret)
+ return ret;
+
+ ret = nouveau_bo_pin(nvbo, TTM_PL_FLAG_VRAM);
+ if (ret) {
+ nouveau_bo_ref(NULL, &nvbo);
+ return ret;
+ }
+
+ dev_priv->sfb_gem = nvbo->gem;
+ return 0;
+}
+
+static void
+sfbhack_takedown(struct drm_device *dev)
+{
+ struct drm_nouveau_private *dev_priv = dev->dev_private;
+
+ if (dev_priv->sfb_gem) {
+ mutex_lock(&dev->struct_mutex);
+ drm_gem_object_unreference(dev_priv->sfb_gem);
+ mutex_unlock(&dev->struct_mutex);
+ dev_priv->sfb_gem = NULL;
+ }
+}
+
static int nouveau_init_engine_ptrs(struct drm_device *dev)
{
struct drm_nouveau_private *dev_priv = dev->dev_private;
@@ -712,6 +756,8 @@ static void nouveau_close(struct drm_device *dev)
/* KMS: we need mmio at load time, not when the first drm client opens. */
void nouveau_lastclose(struct drm_device *dev)
{
+ sfbhack_takedown(dev);
+
if (drm_core_check_feature(dev, DRIVER_MODESET))
return;
@@ -750,6 +796,8 @@ int nouveau_ioctl_getparam(struct drm_device *dev, void *data,
{
struct drm_nouveau_private *dev_priv = dev->dev_private;
struct drm_nouveau_getparam *getparam = data;
+ uint32_t sfb_handle;
+ int ret;
NOUVEAU_CHECK_INITIALISED_WITH_RETURN;
@@ -795,6 +843,24 @@ int nouveau_ioctl_getparam(struct drm_device *dev, void *data,
case NOUVEAU_GETPARAM_VM_VRAM_BASE:
getparam->value = dev_priv->vm_vram_base;
break;
+ case 0xdeadcafe00000001: /* NOUVEAU_GETPARAM_SHAREDFB_HANDLE */
+ ret = sfbhack_init(dev);
+ if (ret)
+ return ret;
+
+ ret = drm_gem_handle_create(file_priv, dev_priv->sfb_gem,
+ &sfb_handle);
+ if (ret)
+ return ret;
+ getparam->value = sfb_handle;
+ break;
+ case 0xdeadcafe00000002: /* NOUVEAU_GETPARAM_SHAREDFB_SIZE */
+ ret = sfbhack_init(dev);
+ if (ret)
+ return ret;
+
+ getparam->value = dev_priv->sfb_gem->size;
+ break;
default:
NV_ERROR(dev, "unknown parameter %lld\n", getparam->param);
return -EINVAL;
--
1.6.5.2
drm-nouveau-tvout-disable.patch:
nouveau_drv.c | 4 ++++
nouveau_drv.h | 1 +
nv04_display.c | 6 +++++-
3 files changed, 10 insertions(+), 1 deletion(-)
--- NEW FILE drm-nouveau-tvout-disable.patch ---
>From 1c48b3294c0efe6b28ef84139eb838725bb34ccc Mon Sep 17 00:00:00 2001
From: Ben Skeggs <bskeggs at redhat.com>
Date: Tue, 8 Sep 2009 13:57:50 +1000
Subject: [PATCH 4/6] drm/nouveau: disable tv-out by default for the moment
---
drivers/gpu/drm/nouveau/nouveau_drv.c | 4 ++++
drivers/gpu/drm/nouveau/nouveau_drv.h | 1 +
drivers/gpu/drm/nouveau/nv04_display.c | 5 +++++
3 files changed, 10 insertions(+), 0 deletions(-)
diff --git a/drivers/gpu/drm/nouveau/nouveau_drv.c b/drivers/gpu/drm/nouveau/nouveau_drv.c
index 06eb993..d117ab5 100644
--- a/drivers/gpu/drm/nouveau/nouveau_drv.c
+++ b/drivers/gpu/drm/nouveau/nouveau_drv.c
@@ -71,6 +71,10 @@ MODULE_PARM_DESC(uscript_tmds, "TMDS output script table ID (>=GeForce 8)");
int nouveau_uscript_tmds = -1;
module_param_named(uscript_tmds, nouveau_uscript_tmds, int, 0400);
+MODULE_PARM_DESC(tv, "Enable TV-out support (<GeForce 8)");
+int nouveau_tv = 0;
+module_param_named(tv, nouveau_tv, int, 0400);
+
MODULE_PARM_DESC(tv_norm, "Default TV norm.\n"
"\t\tSupported: PAL, PAL-M, PAL-N, PAL-Nc, NTSC-M, NTSC-J,\n"
"\t\t\thd480i, hd480p, hd576i, hd576p, hd720p, hd1080i.\n"
diff --git a/drivers/gpu/drm/nouveau/nouveau_drv.h b/drivers/gpu/drm/nouveau/nouveau_drv.h
index bf9acc6..0941725 100644
--- a/drivers/gpu/drm/nouveau/nouveau_drv.h
+++ b/drivers/gpu/drm/nouveau/nouveau_drv.h
@@ -648,6 +648,7 @@ extern int nouveau_uscript_tmds;
extern int nouveau_vram_pushbuf;
extern int nouveau_vram_notify;
extern int nouveau_fbpercrtc;
+extern int nouveau_tv;
extern char *nouveau_tv_norm;
extern int nouveau_reg_debug;
extern char *nouveau_vbios;
diff --git a/drivers/gpu/drm/nouveau/nv04_display.c b/drivers/gpu/drm/nouveau/nv04_display.c
index ef77215..dfae228 100644
--- a/drivers/gpu/drm/nouveau/nv04_display.c
+++ b/drivers/gpu/drm/nouveau/nv04_display.c
@@ -142,6 +142,11 @@ nv04_display_create(struct drm_device *dev)
ret = nv04_dfp_create(dev, dcbent);
break;
case OUTPUT_TV:
+ if (!nouveau_tv) {
+ NV_INFO(dev, "Enable TV-Out with tv module option\n");
+ continue;
+ }
+
if (dcbent->location == DCB_LOC_ON_CHIP)
ret = nv17_tv_create(dev, dcbent);
else
--
1.6.5.2
Index: kernel.spec
===================================================================
RCS file: /cvs/pkgs/rpms/kernel/F-12/kernel.spec,v
retrieving revision 1.1974
retrieving revision 1.1975
diff -u -p -r1.1974 -r1.1975
--- kernel.spec 11 Jan 2010 23:43:06 -0000 1.1974
+++ kernel.spec 12 Jan 2010 00:14:08 -0000 1.1975
@@ -686,18 +686,24 @@ Patch1552: linux-2.6-userspace_kvmclock_
# nouveau + drm fixes
Patch1810: drm-upgrayedd.patch
-Patch1811: drm-radeon-fixes.patch
-Patch1812: drm-radeon-dp-support.patch
+#Patch1811: drm-radeon-fixes.patch
+#Patch1812: drm-radeon-dp-support.patch
Patch1813: drm-radeon-pm.patch
-Patch1814: drm-nouveau.patch
+#Patch1814: drm-nouveau.patch
Patch1818: drm-i915-resume-force-mode.patch
Patch1819: drm-intel-big-hammer.patch
Patch1820: drm-intel-no-tv-hotplug.patch
-Patch1821: drm-page-flip.patch
+#Patch1821: drm-page-flip.patch
# intel drm is all merged upstream
Patch1824: drm-intel-next.patch
-Patch1825: drm-intel-pm.patch
+#Patch1825: drm-intel-pm.patch
#Patch1827: linux-2.6-intel-agp-clear-gtt.patch
+Patch1828: drm-nouveau-g80-ctxprog.patch
+Patch1829: drm-nouveau-shared-fb.patch
+Patch1830: drm-nouveau-bios-paranoia.patch
+Patch1831: drm-nouveau-tvout-disable.patch
+Patch1832: drm-nouveau-safetile-getparam.patch
+Patch1833: drm-nouveau-nvac-noaccel.patch
# kludge to make ich9 e1000 work
Patch2000: linux-2.6-e1000-ich9.patch
@@ -1322,6 +1328,12 @@ ApplyPatch drm-upgrayedd.patch
#ApplyPatch drm-intel-big-hammer.patch
#ApplyPatch drm-intel-no-tv-hotplug.patch
ApplyOptionalPatch drm-intel-next.patch
+ApplyPatch drm-nouveau-g80-ctxprog.patch
+ApplyPatch drm-nouveau-shared-fb.patch
+ApplyPatch drm-nouveau-bios-paranoia.patch
+ApplyPatch drm-nouveau-tvout-disable.patch
+ApplyPatch drm-nouveau-safetile-getparam.patch
+ApplyPatch drm-nouveau-nvac-noaccel.patch
# linux1394 git patches
#ApplyPatch linux-2.6-firewire-git-update.patch
@@ -1998,6 +2010,9 @@ fi
# and build.
%changelog
+* Tue Jan 12 2010 Ben Skeggs <bskeggs at redhat.com> 2.6.32.3-15
+- nouveau: patches and firmware from F12 that aren't in upstream kernel
+
* Mon Jan 11 2010 Dave Airlie <airlied at redhat.com> 2.6.32.3-14
- drm-upgrayedd.patch: rebase to present 2.6.33 (drm-linus)
- nouveau TODO - comment out no-tv-hp for now, leave patch
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