rpms/kernel/F-13 drm-nouveau-updates.patch, 1.10, 1.11 kernel.spec, 1.2071, 1.2072
Ben Skeggs
bskeggs at fedoraproject.org
Fri Jun 25 06:32:41 UTC 2010
Author: bskeggs
Update of /cvs/pkgs/rpms/kernel/F-13
In directory cvs01.phx2.fedoraproject.org:/tmp/cvs-serv14906
Modified Files:
drm-nouveau-updates.patch kernel.spec
Log Message:
* Fri Jun 25 2010 Ben Skeggs <bskeggs at redhat.com> 2.6.33.5-135
- nouveau: backport important fixes from upstream
- Fixes unPOSTed detection + support nv4x multi-card (rhbz#607190)
- Various VBIOS parser fixes (potential culprit for many suspend bugs)
- Fixes memory detection on some GF8 IGPs, and boards with 4GiB VRAM
- Corrects various problems in the behaviour of GF8 dual-link TMDS
drm-nouveau-updates.patch:
Makefile | 7
nouveau_bios.c | 1057 ++++++++++++++---------
nouveau_bios.h | 132 +-
nouveau_bo.c | 68 -
nouveau_calc.c | 4
nouveau_channel.c | 17
nouveau_connector.c | 197 ++--
nouveau_connector.h | 3
nouveau_debugfs.c | 18
nouveau_dma.c | 5
nouveau_dp.c | 8
nouveau_drv.c | 14
nouveau_drv.h | 62 -
nouveau_encoder.h | 3
nouveau_fence.c | 31
nouveau_gem.c | 55 -
nouveau_hw.c | 6
nouveau_i2c.c | 23
nouveau_irq.c | 615 ++++++++++++-
nouveau_mem.c | 129 +-
nouveau_reg.h | 1
nouveau_sgdma.c | 18
nouveau_state.c | 39
nv04_crtc.c | 6
nv04_dac.c | 8
nv04_dfp.c | 4
nv04_display.c | 49 -
nv04_fbcon.c | 6
nv04_fifo.c | 5
nv04_graph.c | 3
nv04_tv.c | 2
nv17_tv.c | 6
nv40_fifo.c | 7
nv40_graph.c | 21
nv50_calc.c | 88 +
nv50_crtc.c | 46 -
nv50_dac.c | 4
nv50_display.c | 111 +-
nv50_display.h | 1
nv50_fb.c | 38
nv50_fbcon.c | 17
nv50_fifo.c | 5
nv50_gpio.c | 76 +
nv50_graph.c | 103 +-
nv50_grctx.c | 2383 ++++++++++++++++++++++++++++++++++++++++++++++++++++
nv50_instmem.c | 18
nv50_sor.c | 26
47 files changed, 4567 insertions(+), 978 deletions(-)
View full diff with command:
/usr/bin/cvs -n -f diff -kk -u -p -N -r 1.10 -r 1.11 drm-nouveau-updates.patchIndex: drm-nouveau-updates.patch
===================================================================
RCS file: /cvs/pkgs/rpms/kernel/F-13/drm-nouveau-updates.patch,v
retrieving revision 1.10
retrieving revision 1.11
diff -u -p -r1.10 -r1.11
--- drm-nouveau-updates.patch 7 Jun 2010 04:41:08 -0000 1.10
+++ drm-nouveau-updates.patch 25 Jun 2010 06:32:37 -0000 1.11
@@ -1,4 +1,4 @@
-From a4cbb7f1379aa9817c85840c6d079dd222641dbd Mon Sep 17 00:00:00 2001
+From 4d67e7955f066668f8174583a3ce47844b8e67a8 Mon Sep 17 00:00:00 2001
From: Marcin Slusarz <marcin.slusarz at gmail.com>
Date: Wed, 17 Feb 2010 19:04:00 +0100
Subject: [PATCH] drm-nouveau-updates
@@ -444,35 +444,173 @@ Signed-off-by: Ben Skeggs <bskeggs at redha
drm/nv50: fix iommu errors caused by device reading from address 0
Signed-off-by: Ben Skeggs <bskeggs at redhat.com>
+
+drm/nouveau: fix POST detection for certain chipsets
+
+We totally fail at detecting un-POSTed chipsets prior to G80. This commit
+changes the pre-G80 POST detection to read the programmed horizontal total
+from CRTC 0, and assume the card isn't POSTed if it's 0.
+
+NVIDIA use some other heuristics more similar to what we do on G80, but I
+wasted quite a long time trying to figure out the exact specifics of what
+they do so we can try this for a bit instead.
+
+Signed-off-by: Ben Skeggs <bskeggs at redhat.com>
+
+drm/nv40: allow cold-booting of nv4x chipsets
+
+Signed-off-by: Ben Skeggs <bskeggs at redhat.com>
+
+drm/nouveau: fix init table handlers to return proper error codes
+
+We really want to be able to distinguish between INIT_DONE and an actual
+error sometimes. This commit fixes up several lazy "return 0;" to be
+actual error codes, and explicitly reserves "0" as "success, but stop
+parsing this table".
+
+Signed-off-by: Ben Skeggs <bskeggs at redhat.com>
+
+drm/nouveau: display error message for any failed init table opcode
+
+Some handlers don't report specific errors, but we still *really* want to
+know if we failed to parse a complete init table.
+
+Signed-off-by: Ben Skeggs <bskeggs at redhat.com>
+
+drm/nouveau: ensure we've parsed i2c table entry for INIT_*I2C* handlers
+
+We may not have parsed the entry yet if the i2c_index is for an i2c bus
+that's not referenced by a DCB encoder.
+
+This could be done oh so much more nicely, except we have to care about
+prehistoric DCB tables too, and they make life painful.
+
+Signed-off-by: Ben Skeggs <bskeggs at redhat.com>
+
+drm/nouveau: support init table i2c device identifier 0x81
+
+It appears to be meant to reference the second "default index".
+
+Signed-off-by: Ben Skeggs <bskeggs at redhat.com>
+
+drm/nouveau: fix i2c-related init table handlers
+
+Mutliple issues. INIT_ZM_I2C_BYTE/INIT_I2C_BYTE didn't even try and
+use the register value, and all the handlers were using the wrong
+slave address.
+
+Signed-off-by: Ben Skeggs <bskeggs at redhat.com>
+
+drm/nv50: cast IGP memory location to u64 before shifting
+
+Signed-off-by: Ben Skeggs <bskeggs at redhat.com>
+
+drm/nouveau: match U/DP script against SOR link
+
+It appears version 0x21 'U' and 'd' tables require us to take the SOR link
+into account when selecting the appropriate table for a particular output.
+
+Signed-off-by: Ben Skeggs <bskeggs at redhat.com>
+
+drm/nv50: fix memory detection for cards with >=4GiB VRAM
+
+Signed-off-by: Ben Skeggs <bskeggs at redhat.com>
+
+drm/nouveau: completely fail init if we fail to map the PRAMIN BAR
+
+On cards where there's a specific BAR for PRAMIN, we used to try and fall
+back to the "legacy" aperture within the mmio BAR.
+
+This is doomed to cause problems, so lets just fail completely as there's
+obviously something else very wrong anyway.
+
+Signed-off-by: Ben Skeggs <bskeggs at redhat.com>
+
+drm/nouveau: Don't clear AGPCMD completely on INIT_RESET.
+
+We just need to clear the SBA and ENABLE bits to reset the AGP
+controller: If the AGP bridge was configured to use "fast writes",
+clearing the FW bit would break the subsequent MMIO writes and
+eventually end with a lockup.
+
+Note that all the BIOSes I've seen do the same as we did (it works for
+them because they don't use MMIO), OTOH the blob leaves FW untouched.
+
+Signed-off-by: Francisco Jerez <currojerez at riseup.net>
+
+drm/nouveau: Ignore broken legacy I2C entries.
+
+The nv05 card in the bug report [1] doesn't have usable I2C port
+register offsets (they're all filled with zeros). Ignore them and use
+the defaults.
+
+[1] http://bugs.launchpad.net/bugs/569505
+
+Signed-off-by: Francisco Jerez <currojerez at riseup.net>
+
+drm/nv50: use alternate source of SOR_MODE_CTRL for DP hack
+
+Fixes module unload+reload on Dell M4500, where the "normal" registers
+get reset to 0.
+
+Signed-off-by: Ben Skeggs <bskeggs at redhat.com>
+
+drm/nv50: fix duallink_possible calculation for DCB 4.0 cards
+
+Signed-off-by: Ben Skeggs <bskeggs at redhat.com>
+
+drm/nv50: obey dcb->duallink_possible
+
+It was once assumed that all G8x had dual-link TMDS everywhere, this isn't
+actually the case - especially considering passive DP->DVI converters and
+some HDMI connectors only support single-link.
+
+Signed-off-by: Ben Skeggs <bskeggs at redhat.com>
+
+drm/nouveau: fix dual-link displays when plugged into single-link outputs
+
+When selecting the native mode for a display we weren't taking into account
+whether or not it was actually supported on that particular output.
+
+This patch modifies our native mode selection to run all modes through
+mode_valid() first.
+
+Signed-off-by: Ben Skeggs <bskeggs at redhat.com>
+
+drm/nouveau: reduce usage of fence spinlock to when absolutely necessary
+
+Signed-off-by: Ben Skeggs <bskeggs at redhat.com>
---
drivers/gpu/drm/nouveau/Makefile | 7 +-
- drivers/gpu/drm/nouveau/nouveau_bios.c | 672 +++++---
+ drivers/gpu/drm/nouveau/nouveau_bios.c | 1057 ++++++++-----
drivers/gpu/drm/nouveau/nouveau_bios.h | 132 +-
drivers/gpu/drm/nouveau/nouveau_bo.c | 68 +-
drivers/gpu/drm/nouveau/nouveau_calc.c | 4 +-
- drivers/gpu/drm/nouveau/nouveau_channel.c | 15 +-
- drivers/gpu/drm/nouveau/nouveau_connector.c | 163 ++-
+ drivers/gpu/drm/nouveau/nouveau_channel.c | 17 +-
+ drivers/gpu/drm/nouveau/nouveau_connector.c | 197 ++-
drivers/gpu/drm/nouveau/nouveau_connector.h | 3 +-
drivers/gpu/drm/nouveau/nouveau_debugfs.c | 18 +-
drivers/gpu/drm/nouveau/nouveau_dma.c | 5 +
drivers/gpu/drm/nouveau/nouveau_dp.c | 8 +-
drivers/gpu/drm/nouveau/nouveau_drv.c | 14 +-
- drivers/gpu/drm/nouveau/nouveau_drv.h | 59 +-
+ drivers/gpu/drm/nouveau/nouveau_drv.h | 62 +-
drivers/gpu/drm/nouveau/nouveau_encoder.h | 3 +
+ drivers/gpu/drm/nouveau/nouveau_fence.c | 31 +-
drivers/gpu/drm/nouveau/nouveau_gem.c | 55 +-
drivers/gpu/drm/nouveau/nouveau_hw.c | 6 +-
drivers/gpu/drm/nouveau/nouveau_i2c.c | 23 +-
drivers/gpu/drm/nouveau/nouveau_irq.c | 615 +++++++-
- drivers/gpu/drm/nouveau/nouveau_mem.c | 124 +-
+ drivers/gpu/drm/nouveau/nouveau_mem.c | 129 +-
drivers/gpu/drm/nouveau/nouveau_reg.h | 1 +
drivers/gpu/drm/nouveau/nouveau_sgdma.c | 18 +
- drivers/gpu/drm/nouveau/nouveau_state.c | 20 +-
+ drivers/gpu/drm/nouveau/nouveau_state.c | 39 +-
drivers/gpu/drm/nouveau/nv04_crtc.c | 6 +-
drivers/gpu/drm/nouveau/nv04_dac.c | 8 +-
drivers/gpu/drm/nouveau/nv04_dfp.c | 4 +-
drivers/gpu/drm/nouveau/nv04_display.c | 49 +-
drivers/gpu/drm/nouveau/nv04_fbcon.c | 6 +-
drivers/gpu/drm/nouveau/nv04_fifo.c | 5 +
+ drivers/gpu/drm/nouveau/nv04_graph.c | 3 +-
drivers/gpu/drm/nouveau/nv04_tv.c | 2 +-
drivers/gpu/drm/nouveau/nv17_tv.c | 6 +-
drivers/gpu/drm/nouveau/nv40_fifo.c | 7 +-
@@ -489,8 +627,8 @@ Signed-off-by: Ben Skeggs <bskeggs at redha
drivers/gpu/drm/nouveau/nv50_graph.c | 103 +-
drivers/gpu/drm/nouveau/nv50_grctx.c | 2383 +++++++++++++++++++++++++++
drivers/gpu/drm/nouveau/nv50_instmem.c | 18 +-
- drivers/gpu/drm/nouveau/nv50_sor.c | 30 +-
- 45 files changed, 4304 insertions(+), 763 deletions(-)
[...1698 lines suppressed...]
+
+-void
+-nouveau_fence_handler(struct drm_device *dev, int channel)
+-{
+- struct drm_nouveau_private *dev_priv = dev->dev_private;
+- struct nouveau_channel *chan = NULL;
+-
+- if (channel >= 0 && channel < dev_priv->engine.fifo.channels)
+- chan = dev_priv->fifos[channel];
+-
+- if (chan) {
+- spin_lock_irq(&chan->fence.lock);
+- nouveau_fence_update(chan);
+- spin_unlock_irq(&chan->fence.lock);
+- }
+-}
+-
+ int
+ nouveau_fence_init(struct nouveau_channel *chan)
+ {
+ INIT_LIST_HEAD(&chan->fence.pending);
+ spin_lock_init(&chan->fence.lock);
++ atomic_set(&chan->fence.last_sequence_irq, 0);
+ return 0;
+ }
+
diff --git a/drivers/gpu/drm/nouveau/nouveau_gem.c b/drivers/gpu/drm/nouveau/nouveau_gem.c
index 8265fed..0846a1e 100644
--- a/drivers/gpu/drm/nouveau/nouveau_gem.c
@@ -3800,7 +4764,7 @@ index 447f9f6..13e73ce 100644
return IRQ_HANDLED;
}
diff --git a/drivers/gpu/drm/nouveau/nouveau_mem.c b/drivers/gpu/drm/nouveau/nouveau_mem.c
-index 2dc09db..775a701 100644
+index 2dc09db..816948b 100644
--- a/drivers/gpu/drm/nouveau/nouveau_mem.c
+++ b/drivers/gpu/drm/nouveau/nouveau_mem.c
@@ -347,6 +347,20 @@ nv50_mem_vm_bind_linear(struct drm_device *dev, uint64_t virt, uint32_t size,
@@ -3892,7 +4856,7 @@ index 2dc09db..775a701 100644
pci_read_config_dword(bridge, 0x84, &mem);
return (uint64_t)(((mem >> 4) & 127) + 1)*1024*1024;
}
-@@ -477,50 +526,32 @@ nouveau_mem_fb_amount_igp(struct drm_device *dev)
+@@ -477,50 +526,39 @@ nouveau_mem_fb_amount_igp(struct drm_device *dev)
}
/* returns the amount of FB ram in bytes */
@@ -3934,19 +4898,25 @@ index 2dc09db..775a701 100644
- NV10_FIFO_DATA_RAM_AMOUNT_MB_MASK) >>
- NV10_FIFO_DATA_RAM_AMOUNT_MB_SHIFT;
- return mem * 1024 * 1024;
-- }
-- break;
+
+ if (dev_priv->card_type == NV_04) {
+ dev_priv->vram_size = nouveau_mem_detect_nv04(dev);
+ } else
+ if (dev_priv->flags & (NV_NFORCE | NV_NFORCE2)) {
+ dev_priv->vram_size = nouveau_mem_detect_nforce(dev);
-+ } else {
++ } else
++ if (dev_priv->card_type < NV_50) {
+ dev_priv->vram_size = nv_rd32(dev, NV04_FIFO_DATA);
+ dev_priv->vram_size &= NV10_FIFO_DATA_RAM_AMOUNT_MB_MASK;
-+ if (dev_priv->chipset == 0xaa || dev_priv->chipset == 0xac)
-+ dev_priv->vram_sys_base = nv_rd32(dev, 0x100e10) << 12;
++ } else {
++ dev_priv->vram_size = nv_rd32(dev, NV04_FIFO_DATA);
++ dev_priv->vram_size |= (dev_priv->vram_size & 0xff) << 32;
++ dev_priv->vram_size &= 0xffffffff00;
++ if (dev_priv->chipset == 0xaa || dev_priv->chipset == 0xac) {
++ dev_priv->vram_sys_base = nv_rd32(dev, 0x100e10);
++ dev_priv->vram_sys_base <<= 12;
+ }
+- break;
}
- NV_ERROR(dev,
@@ -3965,7 +4935,7 @@ index 2dc09db..775a701 100644
}
#if __OS_HAS_AGP
-@@ -631,15 +662,12 @@ nouveau_mem_init(struct drm_device *dev)
+@@ -631,15 +669,12 @@ nouveau_mem_init(struct drm_device *dev)
spin_lock_init(&dev_priv->ttm.bo_list_lock);
spin_lock_init(&dev_priv->tile.lock);
@@ -4024,7 +4994,7 @@ index ed15905..554fb45 100644
return 0;
}
diff --git a/drivers/gpu/drm/nouveau/nouveau_state.c b/drivers/gpu/drm/nouveau/nouveau_state.c
-index a8d77c8..a11cd7f 100644
+index a8d77c8..7c1d252 100644
--- a/drivers/gpu/drm/nouveau/nouveau_state.c
+++ b/drivers/gpu/drm/nouveau/nouveau_state.c
@@ -34,7 +34,6 @@
@@ -4103,6 +5073,43 @@ index a8d77c8..a11cd7f 100644
nouveau_mem_close(dev);
out_instmem:
engine->instmem.takedown(dev);
+@@ -691,29 +701,24 @@ int nouveau_load(struct drm_device *dev, unsigned long flags)
+ NV_INFO(dev, "Detected an NV%2x generation card (0x%08x)\n",
+ dev_priv->card_type, reg0);
+
+- /* map larger RAMIN aperture on NV40 cards */
+- dev_priv->ramin = NULL;
++ /* Map PRAMIN BAR, or on older cards, the aperture withing BAR0 */
+ if (dev_priv->card_type >= NV_40) {
+ int ramin_bar = 2;
+ if (pci_resource_len(dev->pdev, ramin_bar) == 0)
+ ramin_bar = 3;
+
+ dev_priv->ramin_size = pci_resource_len(dev->pdev, ramin_bar);
+- dev_priv->ramin = ioremap(
+- pci_resource_start(dev->pdev, ramin_bar),
++ dev_priv->ramin =
++ ioremap(pci_resource_start(dev->pdev, ramin_bar),
+ dev_priv->ramin_size);
+ if (!dev_priv->ramin) {
+- NV_ERROR(dev, "Failed to init RAMIN mapping, "
+- "limited instance memory available\n");
++ NV_ERROR(dev, "Failed to PRAMIN BAR");
++ return -ENOMEM;
+ }
+- }
+-
+- /* On older cards (or if the above failed), create a map covering
+- * the BAR0 PRAMIN aperture */
+- if (!dev_priv->ramin) {
++ } else {
+ dev_priv->ramin_size = 1 * 1024 * 1024;
+ dev_priv->ramin = ioremap(mmio_start_offs + NV_RAMIN,
+- dev_priv->ramin_size);
++ dev_priv->ramin_size);
+ if (!dev_priv->ramin) {
+ NV_ERROR(dev, "Failed to map BAR0 PRAMIN.\n");
+ return -ENOMEM;
diff --git a/drivers/gpu/drm/nouveau/nv04_crtc.c b/drivers/gpu/drm/nouveau/nv04_crtc.c
index d2f143e..9986aba 100644
--- a/drivers/gpu/drm/nouveau/nv04_crtc.c
@@ -4285,6 +5292,20 @@ index f31347b..66fe559 100644
return 0;
}
+diff --git a/drivers/gpu/drm/nouveau/nv04_graph.c b/drivers/gpu/drm/nouveau/nv04_graph.c
+index e260986..f0cbbc0 100644
+--- a/drivers/gpu/drm/nouveau/nv04_graph.c
++++ b/drivers/gpu/drm/nouveau/nv04_graph.c
+@@ -527,8 +527,7 @@ static int
+ nv04_graph_mthd_set_ref(struct nouveau_channel *chan, int grclass,
+ int mthd, uint32_t data)
+ {
+- chan->fence.last_sequence_irq = data;
+- nouveau_fence_handler(chan->dev, chan->id);
++ atomic_set(&chan->fence.last_sequence_irq, data);
+ return 0;
+ }
+
diff --git a/drivers/gpu/drm/nouveau/nv04_tv.c b/drivers/gpu/drm/nouveau/nv04_tv.c
index 9c63099..c4e3404 100644
--- a/drivers/gpu/drm/nouveau/nv04_tv.c
@@ -7632,7 +8653,7 @@ index f0dc4e3..5f21df3 100644
return -EINVAL;
diff --git a/drivers/gpu/drm/nouveau/nv50_sor.c b/drivers/gpu/drm/nouveau/nv50_sor.c
-index c2fff54..b11eaf9 100644
+index c2fff54..812778d 100644
--- a/drivers/gpu/drm/nouveau/nv50_sor.c
+++ b/drivers/gpu/drm/nouveau/nv50_sor.c
@@ -211,7 +211,7 @@ nv50_sor_mode_set(struct drm_encoder *encoder, struct drm_display_mode *mode,
@@ -7644,15 +8665,7 @@ index c2fff54..b11eaf9 100644
if (nv_encoder->dcb->sorconf.link & 1)
mode_ctl |= 0x00000800;
else
-@@ -274,6 +274,7 @@ static const struct drm_encoder_funcs nv50_sor_encoder_funcs = {
- int
- nv50_sor_create(struct drm_device *dev, struct dcb_entry *entry)
- {
-+ struct drm_nouveau_private *dev_priv = dev->dev_private;
- struct nouveau_encoder *nv_encoder = NULL;
- struct drm_encoder *encoder;
- bool dum;
-@@ -319,5 +320,32 @@ nv50_sor_create(struct drm_device *dev, struct dcb_entry *entry)
+@@ -319,5 +319,28 @@ nv50_sor_create(struct drm_device *dev, struct dcb_entry *entry)
encoder->possible_crtcs = entry->heads;
encoder->possible_clones = 0;
@@ -7660,11 +8673,7 @@ index c2fff54..b11eaf9 100644
+ int or = nv_encoder->or, link = !(entry->dpconf.sor.link & 1);
+ uint32_t tmp;
+
-+ if (dev_priv->chipset < 0x90 ||
-+ dev_priv->chipset == 0x92 || dev_priv->chipset == 0xa0)
-+ tmp = nv_rd32(dev, NV50_PDISPLAY_SOR_MODE_CTRL_C(or));
-+ else
-+ tmp = nv_rd32(dev, NV90_PDISPLAY_SOR_MODE_CTRL_C(or));
++ tmp = nv_rd32(dev, 0x61c700 + (or * 0x800));
+
+ switch ((tmp & 0x00000f00) >> 8) {
+ case 8:
Index: kernel.spec
===================================================================
RCS file: /cvs/pkgs/rpms/kernel/F-13/kernel.spec,v
retrieving revision 1.2071
retrieving revision 1.2072
diff -u -p -r1.2071 -r1.2072
--- kernel.spec 23 Jun 2010 12:21:59 -0000 1.2071
+++ kernel.spec 25 Jun 2010 06:32:38 -0000 1.2072
@@ -2237,6 +2237,13 @@ fi
# and build.
%changelog
+* Fri Jun 25 2010 Ben Skeggs <bskeggs at redhat.com> 2.6.33.5-135
+- nouveau: backport important fixes from upstream
+- Fixes unPOSTed detection + support nv4x multi-card (rhbz#607190)
+- Various VBIOS parser fixes (potential culprit for many suspend bugs)
+- Fixes memory detection on some GF8 IGPs, and boards with 4GiB VRAM
+- Corrects various problems in the behaviour of GF8 dual-link TMDS
+
* Wed Jun 23 2010 Kyle McMartin <kyle at redhat.com> 2.6.33.5-134
- l2tp: fix oops in pppol2tp_xmit (#607054)
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