[verilator/f14/master] 3.805

[Chitlesh GOORAH]

commit b1c5daef72455ba03b97ebe8e58eb7b9a54498c7
Author: Chitlesh Goorah <chitlesh at fedoraproject.org>
Date:   Sun Nov 7 21:06:52 2010 +0100

    3.805

 verilator-3.804.tgz |  Bin 1536487 -> 0 bytes
 verilator-3.805.tgz |  Bin 0 -> 1537530 bytes
 verilator.spec      |    8 ++++----
 3 files changed, 4 insertions(+), 4 deletions(-)
---
diff --git a/verilator-3.805.tgz b/verilator-3.805.tgz
new file mode 100644
index 0000000..eec8b74
Binary files /dev/null and b/verilator-3.805.tgz differ
diff --git a/verilator.spec b/verilator.spec
index 7e27a25..b2b358b 100644
--- a/verilator.spec
+++ b/verilator.spec
@@ -1,6 +1,6 @@
 Name:           verilator
-Version:        3.804
-Release:        1%{?dist}.1
+Version:        3.805
+Release:        1%{?dist}
 Summary:        A fast simulator for synthesizable Verilog
 License:        GPLv2
 Group:          Applications/Engineering
@@ -65,8 +65,8 @@ SYSTEMPERL_INCLUDE=%{_includedir}/perl-SystemPerl %{__make} %{?_smp_mflags}
 
 
 %changelog
-* Tue Oct 05 2010 jkeating - 3.804-1.1
-- Rebuilt for gcc bug 634757
+* Sat Nov 07 2010  Chitlesh Goorah <chitlesh [AT] fedoraproject DOT org> - 3.805-1
+- updated to 3.805
 
 * Sat Sep 25 2010  Chitlesh Goorah <chitlesh [AT] fedoraproject DOT org> - 3.804-1
 - updated to 3.804