[flashrom] svn ver. 1180
Peter Lemenkov
peter at fedoraproject.org
Fri Sep 24 10:59:24 UTC 2010
commit ebb066d53a2825c906cf5a5bc99d790a0b0a0dbc
Author: Peter Lemenkov <lemenkov at gmail.com>
Date: Tue Sep 21 13:34:26 2010 +0400
svn ver. 1180
Signed-off-by: Peter Lemenkov <lemenkov at gmail.com>
...m-r1002-r1158.diff => flashrom-r1002-r1180.diff | 4446 +++++++++++++++-----
flashrom-svn_ver.diff | 2 +-
flashrom.spec | 25 +-
3 files changed, 3446 insertions(+), 1027 deletions(-)
---
diff --git a/flashrom-r1002-r1158.diff b/flashrom-r1002-r1180.diff
similarity index 83%
rename from flashrom-r1002-r1158.diff
rename to flashrom-r1002-r1180.diff
index 07d2bd7..b74e86a 100644
--- a/flashrom-r1002-r1158.diff
+++ b/flashrom-r1002-r1180.diff
@@ -507,7 +507,7 @@ index c87bc36..3504407 100644
release_io_perms();
return 0;
diff --git a/bitbang_spi.c b/bitbang_spi.c
-index 8d6a9a1..f697f5a 100644
+index 8d6a9a1..fe85b60 100644
--- a/bitbang_spi.c
+++ b/bitbang_spi.c
@@ -1,7 +1,7 @@
@@ -519,7 +519,7 @@ index 8d6a9a1..f697f5a 100644
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
-@@ -24,48 +24,57 @@
+@@ -24,48 +24,94 @@
#include <ctype.h>
#include "flash.h"
#include "chipdrivers.h"
@@ -537,36 +537,46 @@ index 8d6a9a1..f697f5a 100644
-const struct bitbang_spi_master_entry bitbang_spi_master_table[] = {
- {}, /* This entry corresponds to BITBANG_SPI_INVALID. */
-};
--
--const int bitbang_spi_master_count = ARRAY_SIZE(bitbang_spi_master_table);
--
--void bitbang_spi_set_cs(int val)
+/* Note that CS# is active low, so val=0 means the chip is active. */
+static void bitbang_spi_set_cs(int val)
++{
++ bitbang_spi_master->set_cs(val);
++}
+
+-const int bitbang_spi_master_count = ARRAY_SIZE(bitbang_spi_master_table);
++static void bitbang_spi_set_sck(int val)
++{
++ bitbang_spi_master->set_sck(val);
++}
+
+-void bitbang_spi_set_cs(int val)
++static void bitbang_spi_set_mosi(int val)
{
- bitbang_spi_master_table[bitbang_spi_master].set_cs(val);
-+ bitbang_spi_master->set_cs(val);
++ bitbang_spi_master->set_mosi(val);
}
-void bitbang_spi_set_sck(int val)
-+static void bitbang_spi_set_sck(int val)
++static int bitbang_spi_get_miso(void)
{
- bitbang_spi_master_table[bitbang_spi_master].set_sck(val);
-+ bitbang_spi_master->set_sck(val);
++ return bitbang_spi_master->get_miso();
}
-void bitbang_spi_set_mosi(int val)
-+static void bitbang_spi_set_mosi(int val)
++static void bitbang_spi_request_bus(void)
{
- bitbang_spi_master_table[bitbang_spi_master].set_mosi(val);
-+ bitbang_spi_master->set_mosi(val);
++ if (bitbang_spi_master->request_bus)
++ bitbang_spi_master->request_bus();
}
-int bitbang_spi_get_miso(void)
-+static int bitbang_spi_get_miso(void)
++static void bitbang_spi_release_bus(void)
{
- return bitbang_spi_master_table[bitbang_spi_master].get_miso();
-+ return bitbang_spi_master->get_miso();
++ if (bitbang_spi_master->release_bus)
++ bitbang_spi_master->release_bus();
}
-int bitbang_spi_init(void)
@@ -578,17 +588,42 @@ index 8d6a9a1..f697f5a 100644
+ */
+ if (!master || master->type == BITBANG_SPI_INVALID || !master->set_cs ||
+ !master->set_sck || !master->set_mosi || !master->get_miso) {
-+ msg_perr("Incomplete bitbanging SPI master setting! Please "
-+ "report a bug at flashrom at flashrom.org\n");
++ msg_perr("Incomplete SPI bitbang master setting!\n"
++ "Please report a bug at flashrom at flashrom.org\n");
++ return 1;
++ }
++ if (bitbang_spi_master) {
++ msg_perr("SPI bitbang master already initialized!\n"
++ "Please report a bug at flashrom at flashrom.org\n");
+ return 1;
+ }
++
+ bitbang_spi_master = master;
+ bitbang_spi_half_period = halfperiod;
+
++ /* FIXME: Run bitbang_spi_request_bus here or in programmer init? */
bitbang_spi_set_cs(1);
bitbang_spi_set_sck(0);
- buses_supported = CHIP_BUSTYPE_SPI;
+ bitbang_spi_set_mosi(0);
++ return 0;
++}
++
++int bitbang_spi_shutdown(const struct bitbang_spi_master *master)
++{
++ if (!bitbang_spi_master) {
++ msg_perr("Shutting down an uninitialized SPI bitbang master!\n"
++ "Please report a bug at flashrom at flashrom.org\n");
++ return 1;
++ }
++ if (master != bitbang_spi_master) {
++ msg_perr("Shutting down a mismatched SPI bitbang master!\n"
++ "Please report a bug at flashrom at flashrom.org\n");
++ return 1;
++ }
++
++ /* FIXME: Run bitbang_spi_release_bus here or per command? */
++ bitbang_spi_master = NULL;
return 0;
}
@@ -597,7 +632,7 @@ index 8d6a9a1..f697f5a 100644
{
uint8_t ret = 0;
int i;
-@@ -85,50 +94,17 @@ uint8_t bitbang_spi_readwrite_byte(uint8_t val)
+@@ -85,50 +131,24 @@ uint8_t bitbang_spi_readwrite_byte(uint8_t val)
int bitbang_spi_send_command(unsigned int writecnt, unsigned int readcnt,
const unsigned char *writearr, unsigned char *readarr)
{
@@ -637,6 +672,11 @@ index 8d6a9a1..f697f5a 100644
- /* Make sure any non-read data is 0xff. */
- memset(bufin + writecnt, 0xff, readcnt);
-
++ /* FIXME: Run bitbang_spi_request_bus here or in programmer init?
++ * Requesting and releasing the SPI bus is handled in here to allow the
++ * programmer to use its own SPI engine for native accesses.
++ */
++ bitbang_spi_request_bus();
bitbang_spi_set_cs(0);
- for (i = 0; i < readcnt + writecnt; i++) {
- bufin[i] = bitbang_spi_readwrite_byte(bufout[i]);
@@ -650,10 +690,12 @@ index 8d6a9a1..f697f5a 100644
bitbang_spi_set_cs(1);
programmer_delay(bitbang_spi_half_period);
- memcpy(readarr, bufin + writecnt, readcnt);
++ /* FIXME: Run bitbang_spi_release_bus here or in programmer init? */
++ bitbang_spi_release_bus();
return 0;
}
-@@ -139,27 +115,7 @@ int bitbang_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len)
+@@ -139,27 +159,7 @@ int bitbang_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len)
return spi_read_chunked(flash, buf, start, len, 64 * 1024);
}
@@ -684,7 +726,7 @@ index 8d6a9a1..f697f5a 100644
+ return spi_write_chunked(flash, buf, start, len, 256);
}
diff --git a/board_enable.c b/board_enable.c
-index 2cf81c2..a073d9c 100644
+index 2cf81c2..84ebf0f 100644
--- a/board_enable.c
+++ b/board_enable.c
@@ -25,9 +25,10 @@
@@ -890,12 +932,7 @@ index 2cf81c2..a073d9c 100644
+ w836xx_ext_leave(base);
+ return chip;
+}
-
-- /* Is this the W83627THF? */
-- if (sio_read(port, 0x20) != 0x82) { /* Super I/O device ID reg. */
-- msg_perr("\nERROR: %s: W83627THF: Wrong ID: 0x%02X.\n",
-- name, sio_read(port, 0x20));
-- w836xx_ext_leave(port);
++
+/*
+ * The chipid parameter goes away as soon as we have Super I/O matching in the
+ * board enable table. The call to winbond_superio_detect() goes away as
@@ -922,29 +959,34 @@ index 2cf81c2..a073d9c 100644
+ if (bit >= 8 || port == 0 || port > chip->gpio_port_count) {
+ msg_perr("\nERROR: winbond_gpio_set: Invalid GPIO number %d\n",
+ pin);
++ return -1;
++ }
++
++ gpio = &chip->port[port - 1];
+
+- /* Is this the W83627THF? */
+- if (sio_read(port, 0x20) != 0x82) { /* Super I/O device ID reg. */
+- msg_perr("\nERROR: %s: W83627THF: Wrong ID: 0x%02X.\n",
+- name, sio_read(port, 0x20));
+- w836xx_ext_leave(port);
++ if (gpio->ldn == 0) {
++ msg_perr("\nERROR: GPIO%d is not supported yet on this"
++ " winbond chip\n", port);
return -1;
}
- /* PINxxxxS: GPIO4/bit 4 multiplex -> GPIOXXX */
-+ gpio = &chip->port[port - 1];
++ w836xx_ext_enter(base);
- sio_write(port, 0x07, 0x09); /* Select LDN 9: GPIO port 4 */
- sio_mask(port, 0x30, 0x02, 0x02); /* Activate logical device. */
- sio_mask(port, 0xF4, 0x00, 0x10); /* GPIO4 bit 4 -> output */
- sio_mask(port, 0xF6, 0x00, 0x10); /* Clear GPIO4 bit 4 inversion */
- sio_mask(port, 0xF5, 0x10, 0x10); /* Raise GPIO4 bit 4 */
-+ if (gpio->ldn == 0) {
-+ msg_perr("\nERROR: GPIO%d is not supported yet on this"
-+ " winbond chip\n", port);
-+ return -1;
-+ }
-
-- w836xx_ext_leave(port);
-+ w836xx_ext_enter(base);
-+
+ /* Select logical device. */
+ sio_write(base, 0x07, gpio->ldn);
-+
+
+- w836xx_ext_leave(port);
+ /* Activate logical device. */
+ sio_mask(base, 0x30, 1 << gpio->enable_bit, 1 << gpio->enable_bit);
+
@@ -971,10 +1013,12 @@ index 2cf81c2..a073d9c 100644
+ * - IWILL DK8-HTX
+ */
+static int w83627hf_gpio24_raise_2e(void)
-+{
+ {
+- return w83627thf_gpio4_4_raise(0x2e, name);
+ return winbond_gpio_set(0x2e, WINBOND_W83627HF_ID, 24, 1);
-+}
-+
+ }
+
+-static int w83627thf_gpio4_4_raise_4e(const char *name)
+/*
+ * Winbond W83627HF: Raise GPIO25.
+ *
@@ -982,10 +1026,13 @@ index 2cf81c2..a073d9c 100644
+ * - MSI MS-6577
+ */
+static int w83627hf_gpio25_raise_2e(void)
-+{
+ {
+- return w83627thf_gpio4_4_raise(0x4e, name);
+ return winbond_gpio_set(0x2e, WINBOND_W83627HF_ID, 25, 1);
-+}
-+
+ }
+
+-/**
+- * w83627: Enable MEMW# and set ROM size to max.
+/*
+ * Winbond W83627EHF: Raise GPIO24.
+ *
@@ -993,12 +1040,10 @@ index 2cf81c2..a073d9c 100644
+ * - ASUS A8N-VM CSM: AMD Socket 939 + GeForce 6150 (C51) + MCP51
+ */
+static int w83627ehf_gpio24_raise_2e(void)
- {
-- return w83627thf_gpio4_4_raise(0x2e, name);
++{
+ return winbond_gpio_set(0x2e, WINBOND_W83627EHF_ID, 24, 1);
- }
-
--static int w83627thf_gpio4_4_raise_4e(const char *name)
++}
++
+/*
+ * Winbond W83627THF: Raise GPIO 44.
+ *
@@ -1006,13 +1051,10 @@ index 2cf81c2..a073d9c 100644
+ * - MSI K8T Neo2-F
+ */
+static int w83627thf_gpio44_raise_2e(void)
- {
-- return w83627thf_gpio4_4_raise(0x4e, name);
++{
+ return winbond_gpio_set(0x2e, WINBOND_W83627THF_ID, 44, 1);
- }
-
--/**
-- * w83627: Enable MEMW# and set ROM size to max.
++}
++
+/*
+ * Winbond W83627THF: Raise GPIO 44.
+ *
@@ -1030,7 +1072,7 @@ index 2cf81c2..a073d9c 100644
*/
static void w836xx_memw_enable(uint16_t port)
{
-@@ -190,102 +380,166 @@ static void w836xx_memw_enable(uint16_t port)
+@@ -190,102 +380,208 @@ static void w836xx_memw_enable(uint16_t port)
w836xx_ext_leave(port);
}
@@ -1161,13 +1203,47 @@ index 2cf81c2..a073d9c 100644
+ /* Not sure if this is an error or not. */
+ ret = 0;
+ }
++ exit_conf_mode_ite(port);
++
++ return ret;
++}
++
++/*
++ * The ITE IT8707F is a custom chip made by ITE exclusively for ASUS.
++ * It uses the Winbond command sequence to enter extended configuration
++ * mode and the ITE sequence to exit.
++ *
++ * Registers seems similar to the ones on ITE IT8710F.
++ */
++static int it8707f_write_enable(uint8_t port)
++{
++ uint8_t tmp;
++
++ w836xx_ext_enter(port);
++
++ /* Set bit 3 (GLB_REG_WE) of reg 0x23: Makes reg 0x24-0x2A rw */
++ tmp = sio_read(port, 0x23);
++ tmp |= (1 << 3);
++ sio_write(port, 0x23, tmp);
++
++ /* Set bit 2 (FLASH_WE) and bit 3 (FLASH_IF_EN) of reg 0x24 */
++ tmp = sio_read(port, 0x24);
++ tmp |= (1 << 2) | (1 << 3);
++ sio_write(port, 0x24, tmp);
++
++ /* Clear bit 3 (GLB_REG_WE) of reg 0x23: Makes reg 0x24-0x2A ro */
++ tmp = sio_read(port, 0x23);
++ tmp &= ~(1 << 3);
++ sio_write(port, 0x23, tmp);
++
exit_conf_mode_ite(port);
-- return 0;
--}
--
+ return 0;
+ }
+
-/**
-- * Suited for:
++/*
+ * Suited for:
- * - AOpen vKM400Am-S: VIA KM400 + VT8237 + IT8705F.
- * - Biostar P4M80-M4: VIA P4M800 + VT8237 + IT8705AF
- * - Elitegroup K7S6A: SiS745 + ITE IT8705F
@@ -1176,11 +1252,13 @@ index 2cf81c2..a073d9c 100644
- * - Shuttle AK38N: VIA KT333CF + VIA VT8235 + ITE IT8705F
- *
- * The SIS950 Super I/O probably requires the same flash write enable.
-- */
++ * - ASUS P4SC-E: SiS 651 + 962 + ITE IT8707F
+ */
-static int it8705f_write_enable_2e(const char *name)
--{
++static int it8707f_write_enable_2e(void)
+ {
- return it8705f_write_enable(0x2e, name);
-+ return ret;
++ return it8707f_write_enable(0x2e);
}
static int pc87360_gpio_set(uint8_t gpio, int raise)
@@ -1262,7 +1340,7 @@ index 2cf81c2..a073d9c 100644
*/
static int via_vt823x_gpio_set(uint8_t gpio, int raise)
{
-@@ -340,42 +594,45 @@ static int via_vt823x_gpio_set(uint8_t gpio, int raise)
+@@ -340,42 +636,45 @@ static int via_vt823x_gpio_set(uint8_t gpio, int raise)
return 0;
}
@@ -1321,7 +1399,7 @@ index 2cf81c2..a073d9c 100644
{
int ret;
-@@ -385,14 +642,15 @@ static int board_msi_kt4v(const char *name)
+@@ -385,14 +684,15 @@ static int board_msi_kt4v(const char *name)
return ret;
}
@@ -1340,7 +1418,7 @@ index 2cf81c2..a073d9c 100644
{
uint8_t tmp;
int i;
-@@ -411,7 +669,7 @@ static int board_asus_p5a(const char *name)
+@@ -411,7 +711,7 @@ static int board_asus_p5a(const char *name)
}
if (i == ASUSP5A_LOOP) {
@@ -1349,7 +1427,7 @@ index 2cf81c2..a073d9c 100644
return -1;
}
-@@ -427,7 +685,7 @@ static int board_asus_p5a(const char *name)
+@@ -427,7 +727,7 @@ static int board_asus_p5a(const char *name)
}
if ((i == ASUSP5A_LOOP) || !(tmp & 0x10)) {
@@ -1358,7 +1436,7 @@ index 2cf81c2..a073d9c 100644
return -1;
}
-@@ -454,7 +712,7 @@ static int board_asus_p5a(const char *name)
+@@ -454,7 +754,7 @@ static int board_asus_p5a(const char *name)
}
if ((i == ASUSP5A_LOOP) || !(tmp & 0x10)) {
@@ -1367,7 +1445,7 @@ index 2cf81c2..a073d9c 100644
return -1;
}
-@@ -464,9 +722,9 @@ static int board_asus_p5a(const char *name)
+@@ -464,9 +764,9 @@ static int board_asus_p5a(const char *name)
/*
* Set GPIO lines in the Broadcom HT-1000 southbridge.
*
@@ -1379,7 +1457,7 @@ index 2cf81c2..a073d9c 100644
{
/* GPIO 0 reg from PM regs */
/* Set GPIO 2 and 5 high, connected to flash WP# and TBL# pins. */
-@@ -475,18 +733,33 @@ static int board_hp_dl145_g3_enable(const char *name)
+@@ -475,18 +775,33 @@ static int board_hp_dl145_g3_enable(const char *name)
return 0;
}
@@ -1418,12 +1496,35 @@ index 2cf81c2..a073d9c 100644
{
struct pci_dev *dev;
-@@ -502,13 +775,14 @@ static int board_shuttle_fn25(const char *name)
+@@ -502,13 +817,37 @@ static int board_shuttle_fn25(const char *name)
return 0;
}
-/**
+/*
++ * Suited for:
++ * - Elitegroup GeForce6100SM-M: NVIDIA MCP61 + ITE IT8726F
++ */
++
++static int board_ecs_geforce6100sm_m(void)
++{
++ struct pci_dev *dev;
++ uint32_t tmp;
++
++ dev = pci_dev_find(0x10DE, 0x03EB); /* NVIDIA MCP61 SMBus. */
++ if (!dev) {
++ msg_perr("\nERROR: NVIDIA MCP61 SMBus not found.\n");
++ return -1;
++ }
++
++ tmp = pci_read_byte(dev, 0xE0);
++ tmp &= ~(1 << 3);
++ pci_write_byte(dev, 0xE0, tmp);
++
++ return 0;
++}
++
++/*
* Very similar to AMD 8111 IO Hub.
*/
static int nvidia_mcp_gpio_set(int gpio, int raise)
@@ -1434,7 +1535,7 @@ index 2cf81c2..a073d9c 100644
uint8_t tmp;
if ((gpio < 0) || (gpio >= 0x40)) {
-@@ -522,18 +796,43 @@ static int nvidia_mcp_gpio_set(int gpio, int raise)
+@@ -522,18 +861,43 @@ static int nvidia_mcp_gpio_set(int gpio, int raise)
case 0x0030: /* CK804 */
case 0x0050: /* MCP04 */
case 0x0060: /* MCP2 */
@@ -1486,7 +1587,7 @@ index 2cf81c2..a073d9c 100644
}
base = pci_read_long(dev, 0x64) & 0x0000FF00; /* System control area */
-@@ -549,78 +848,130 @@ static int nvidia_mcp_gpio_set(int gpio, int raise)
+@@ -549,78 +913,130 @@ static int nvidia_mcp_gpio_set(int gpio, int raise)
return 0;
}
@@ -1564,7 +1665,8 @@ index 2cf81c2..a073d9c 100644
+/*
+ * Suited for:
+ * - MSI K8N Neo2 Platinum: Socket 939 + nForce3 Ultra + CK8
-+ */
+ */
+-static int nvidia_mcp_gpio10_raise(const char *name)
+static int nvidia_mcp_gpio0c_raise(void)
+{
+ return nvidia_mcp_gpio_set(0x0c, 1);
@@ -1582,8 +1684,7 @@ index 2cf81c2..a073d9c 100644
+/*
+ * Suited for:
+ * - ASUS P5ND2-SLI Deluxe: LGA775 + nForce4 SLI + MCP04
- */
--static int nvidia_mcp_gpio10_raise(const char *name)
++ */
+static int nvidia_mcp_gpio10_raise(void)
{
return nvidia_mcp_gpio_set(0x10, 1);
@@ -1648,7 +1749,7 @@ index 2cf81c2..a073d9c 100644
msr_t msr;
unsigned long boot_loc;
-@@ -648,7 +999,7 @@ static int board_artecgroup_dbe6x(const char *name)
+@@ -648,7 +1064,7 @@ static int board_artecgroup_dbe6x(const char *name)
return 0;
}
@@ -1657,7 +1758,7 @@ index 2cf81c2..a073d9c 100644
* Helper function to raise/drop a given gpo line on Intel PIIX4{,E,M}.
*/
static int intel_piix4_gpo_set(unsigned int gpo, int raise)
-@@ -657,48 +1008,61 @@ static int intel_piix4_gpo_set(unsigned int gpo, int raise)
+@@ -657,48 +1073,61 @@ static int intel_piix4_gpo_set(unsigned int gpo, int raise)
struct pci_dev *dev;
uint32_t tmp, base;
@@ -1748,7 +1849,7 @@ index 2cf81c2..a073d9c 100644
dev = pci_dev_find(0x8086, 0x7113); /* Intel PIIX4 PM */
if (!dev) {
msg_perr("\nERROR: Intel PIIX4 PM not found.\n");
-@@ -720,23 +1084,34 @@ static int intel_piix4_gpo_set(unsigned int gpo, int raise)
+@@ -720,23 +1149,52 @@ static int intel_piix4_gpo_set(unsigned int gpo, int raise)
return 0;
}
@@ -1757,8 +1858,7 @@ index 2cf81c2..a073d9c 100644
+/*
+ * Suited for:
+ * - ASUS P2B-N
- */
--static int board_epox_ep_bx3(const char *name)
++ */
+static int intel_piix4_gpo18_lower(void)
+{
+ return intel_piix4_gpo_set(18, 0);
@@ -1766,6 +1866,16 @@ index 2cf81c2..a073d9c 100644
+
+/*
+ * Suited for:
++ * - MSI MS-6163 v2 (MS-6163 Pro): Intel 440BX + PIIX4E + Winbond W83977EF
+ */
+-static int board_epox_ep_bx3(const char *name)
++static int intel_piix4_gpo14_raise(void)
++{
++ return intel_piix4_gpo_set(14, 1);
++}
++
++/*
++ * Suited for:
+ * - EPoX EP-BX3
+ */
+static int intel_piix4_gpo22_raise(void)
@@ -1777,6 +1887,15 @@ index 2cf81c2..a073d9c 100644
- * Suited for Intel SE440BX-2
+/*
+ * Suited for:
++ * - abit BM6
++ */
++static int intel_piix4_gpo26_lower(void)
++{
++ return intel_piix4_gpo_set(26, 0);
++}
++
++/*
++ * Suited for:
+ * - Intel SE440BX-2
*/
-static int intel_piix4_gpo27_lower(const char *name)
@@ -1791,7 +1910,7 @@ index 2cf81c2..a073d9c 100644
* Set a GPIO line on a given Intel ICH LPC controller.
*/
static int intel_ich_gpio_set(int gpio, int raise)
-@@ -789,9 +1164,11 @@ static int intel_ich_gpio_set(int gpio, int raise)
+@@ -789,9 +1247,11 @@ static int intel_ich_gpio_set(int gpio, int raise)
/* First, look for a known LPC bridge */
for (dev = pacc->devices; dev; dev = dev->next) {
@@ -1805,7 +1924,7 @@ index 2cf81c2..a073d9c 100644
/* Is this device in our list? */
for (i = 0; intel_ich_gpio_table[i].id; i++)
if (dev->device_id == intel_ich_gpio_table[i].id)
-@@ -807,12 +1184,14 @@ static int intel_ich_gpio_set(int gpio, int raise)
+@@ -807,12 +1267,14 @@ static int intel_ich_gpio_set(int gpio, int raise)
return -1;
}
@@ -1824,7 +1943,7 @@ index 2cf81c2..a073d9c 100644
if (gpio < 32)
allowed = (intel_ich_gpio_table[i].bank0 >> gpio) & 0x01;
else if (gpio < 64)
-@@ -830,7 +1209,7 @@ static int intel_ich_gpio_set(int gpio, int raise)
+@@ -830,7 +1292,7 @@ static int intel_ich_gpio_set(int gpio, int raise)
raise ? "Rais" : "Dropp", gpio);
if (gpio < 32) {
@@ -1833,7 +1952,7 @@ index 2cf81c2..a073d9c 100644
tmp = INL(base);
/* ICH/ICH0 multiplexes 27/28 on the line set. */
if ((gpio == 28) &&
-@@ -852,12 +1231,12 @@ static int intel_ich_gpio_set(int gpio, int raise)
+@@ -852,12 +1314,12 @@ static int intel_ich_gpio_set(int gpio, int raise)
}
}
@@ -1848,7 +1967,7 @@ index 2cf81c2..a073d9c 100644
tmp = INL(base + 0x0C);
if (raise)
tmp |= 1 << gpio;
-@@ -867,7 +1246,7 @@ static int intel_ich_gpio_set(int gpio, int raise)
+@@ -867,7 +1329,7 @@ static int intel_ich_gpio_set(int gpio, int raise)
} else if (gpio < 64) {
gpio -= 32;
@@ -1857,7 +1976,7 @@ index 2cf81c2..a073d9c 100644
tmp = INL(base + 0x30);
tmp |= 1 << gpio;
OUTL(tmp, base + 0x30);
-@@ -884,12 +1263,12 @@ static int intel_ich_gpio_set(int gpio, int raise)
+@@ -884,12 +1346,12 @@ static int intel_ich_gpio_set(int gpio, int raise)
}
}
@@ -1872,7 +1991,7 @@ index 2cf81c2..a073d9c 100644
tmp = INL(base + 0x38);
if (raise)
tmp |= 1 << gpio;
-@@ -899,7 +1278,7 @@ static int intel_ich_gpio_set(int gpio, int raise)
+@@ -899,7 +1361,7 @@ static int intel_ich_gpio_set(int gpio, int raise)
} else {
gpio -= 64;
@@ -1881,7 +2000,7 @@ index 2cf81c2..a073d9c 100644
tmp = INL(base + 0x40);
tmp |= 1 << gpio;
OUTL(tmp, base + 0x40);
-@@ -911,12 +1290,12 @@ static int intel_ich_gpio_set(int gpio, int raise)
+@@ -911,12 +1373,12 @@ static int intel_ich_gpio_set(int gpio, int raise)
return -1;
}
@@ -1896,7 +2015,7 @@ index 2cf81c2..a073d9c 100644
tmp = INL(base + 0x48);
if (raise)
tmp |= 1 << gpio;
-@@ -928,90 +1307,128 @@ static int intel_ich_gpio_set(int gpio, int raise)
+@@ -928,90 +1390,129 @@ static int intel_ich_gpio_set(int gpio, int raise)
return 0;
}
@@ -1958,6 +2077,7 @@ index 2cf81c2..a073d9c 100644
+ * - ASUS P4P800: Intel socket478 + 865PE + ICH5R
+ * - ASUS P4P800-E Deluxe: Intel socket478 + 865PE + ICH5R
+ * - ASUS P5GD1 Pro: Intel LGA 775 + 915P + ICH6R
++ * - ASUS P5GDC Deluxe: Intel socket775 + 915P + ICH6R
+ * - ASUS P5PE-VM: Intel LGA775 + 865G + ICH5
+ * - Samsung Polaris 32: socket478 + 865P + ICH5
*/
@@ -2049,8 +2169,7 @@ index 2cf81c2..a073d9c 100644
+ * Suited for:
+ * - P4SD-LA (HP OEM): i865 + ICH5
+ * - GIGABYTE GA-8PE667 Ultra 2: socket 478 + i845PE + ICH4
- */
--static int board_acorp_6a815epd(const char *name)
++ */
+static int intel_ich_gpio32_raise(void)
+{
+ return intel_ich_gpio_set(32, 1);
@@ -2059,12 +2178,13 @@ index 2cf81c2..a073d9c 100644
+/*
+ * Suited for:
+ * - Acorp 6A815EPD: socket 370 + intel 815 + ICH2
-+ */
+ */
+-static int board_acorp_6a815epd(const char *name)
+static int board_acorp_6a815epd(void)
{
int ret;
-@@ -1023,10 +1440,11 @@ static int board_acorp_6a815epd(const char *name)
+@@ -1023,10 +1524,11 @@ static int board_acorp_6a815epd(const char *name)
return ret;
}
@@ -2079,7 +2199,7 @@ index 2cf81c2..a073d9c 100644
{
int ret;
-@@ -1037,8 +1455,9 @@ static int board_kontron_986lcd_m(const char *name)
+@@ -1037,8 +1539,9 @@ static int board_kontron_986lcd_m(const char *name)
return ret;
}
@@ -2091,7 +2211,7 @@ index 2cf81c2..a073d9c 100644
*/
static int via_apollo_gpo_set(int gpio, int raise)
{
-@@ -1089,29 +1508,34 @@ static int via_apollo_gpo_set(int gpio, int raise)
+@@ -1089,29 +1592,34 @@ static int via_apollo_gpo_set(int gpio, int raise)
return 0;
}
@@ -2136,7 +2256,7 @@ index 2cf81c2..a073d9c 100644
uint16_t base, temp;
dev = pci_dev_find(0x1039, 0x0962);
-@@ -1120,7 +1544,7 @@ static int board_msi_651ml(const char *name)
+@@ -1120,7 +1628,7 @@ static int board_msi_651ml(const char *name)
return 1;
}
@@ -2145,7 +2265,7 @@ index 2cf81c2..a073d9c 100644
base = pci_read_word(dev, 0x74);
temp = INW(base + 0x68);
temp &= ~(1 << 0); /* Make pin output? */
-@@ -1135,7 +1559,7 @@ static int board_msi_651ml(const char *name)
+@@ -1135,7 +1643,7 @@ static int board_msi_651ml(const char *name)
return 0;
}
@@ -2154,7 +2274,7 @@ index 2cf81c2..a073d9c 100644
* Find the runtime registers of an SMSC Super I/O, after verifying its
* chip ID.
*
-@@ -1169,11 +1593,11 @@ out:
+@@ -1169,11 +1677,11 @@ out:
return rt_port;
}
@@ -2169,7 +2289,7 @@ index 2cf81c2..a073d9c 100644
{
struct pci_dev *dev;
uint16_t rt_port;
-@@ -1202,15 +1626,16 @@ static int board_mitac_6513wu(const char *name)
+@@ -1202,15 +1710,17 @@ static int board_mitac_6513wu(const char *name)
return 0;
}
@@ -2177,10 +2297,11 @@ index 2cf81c2..a073d9c 100644
- * Suited for ASUS A7V8X: VIA KT400 + VT8235 + IT8703F-A
+/*
+ * Suited for:
++ * - ASUS A7V333: VIA KT333 + VT8233A + IT8703F
+ * - ASUS A7V8X: VIA KT400 + VT8235 + IT8703F
*/
-static int board_asus_a7v8x(const char *name)
-+static int board_asus_a7v8x(void)
++static int it8703f_gpio51_raise(void)
{
uint16_t id, base;
uint8_t tmp;
@@ -2190,7 +2311,7 @@ index 2cf81c2..a073d9c 100644
w836xx_ext_enter(0x2E);
id = (sio_read(0x2E, 0x20) << 8) | sio_read(0x2E, 0x21);
w836xx_ext_leave(0x2E);
-@@ -1220,7 +1645,7 @@ static int board_asus_a7v8x(const char *name)
+@@ -1220,7 +1730,7 @@ static int board_asus_a7v8x(const char *name)
return -1;
}
@@ -2199,7 +2320,7 @@ index 2cf81c2..a073d9c 100644
w836xx_ext_enter(0x2E);
sio_write(0x2E, 0x07, 0x0C);
base = (sio_read(0x2E, 0x60) << 8) | sio_read(0x2E, 0x61);
-@@ -1257,11 +1682,11 @@ static int it8712f_gpio_set(unsigned int line, int raise)
+@@ -1257,11 +1767,11 @@ static int it8712f_gpio_set(unsigned int line, int raise)
/* Check line */
if ((port > 4) || /* also catches unsigned -1 */
((port < 4) && (line > 7)) || ((port == 4) && (line > 5))) {
@@ -2213,7 +2334,7 @@ index 2cf81c2..a073d9c 100644
enter_conf_mode_ite(0x2E);
id = (sio_read(0x2E, 0x20) << 8) | sio_read(0x2E, 0x21);
exit_conf_mode_ite(0x2E);
-@@ -1294,17 +1719,19 @@ static int it8712f_gpio_set(unsigned int line, int raise)
+@@ -1294,17 +1804,19 @@ static int it8712f_gpio_set(unsigned int line, int raise)
return 0;
}
@@ -2236,7 +2357,7 @@ index 2cf81c2..a073d9c 100644
* Below is the list of boards which need a special "board enable" code in
* flashrom before their ROM chip can be accessed/written to.
*
-@@ -1344,88 +1771,110 @@ static int it8712f_gpio3_1_raise(const char *name)
+@@ -1344,88 +1856,116 @@ static int it8712f_gpio3_1_raise(const char *name)
*/
/* Please keep this list alphabetically ordered by vendor/board name. */
@@ -2252,6 +2373,7 @@ index 2cf81c2..a073d9c 100644
- {0x1106, 0x0691, 0, 0, 0x1106, 0x3057, 0, 0, NULL, "abit", "vt6x4", "Abit", "VT6X4", 0, OK, via_apollo_gpo4_lower},
+#if defined(__i386__) || defined(__x86_64__)
+ {0x10DE, 0x0547, 0x147B, 0x1C2F, 0x10DE, 0x0548, 0x147B, 0x1C2F, NULL, NULL, NULL, "abit", "AN-M2", 0, NT, nvidia_mcp_gpio2_raise},
++ {0x8086, 0x7190, 0, 0, 0x8086, 0x7110, 0, 0, "^i440BX-W977 (BM6)$", NULL, NULL, "abit", "BM6", 0, OK, intel_piix4_gpo26_lower},
+ {0x8086, 0x24d3, 0x147b, 0x1014, 0x8086, 0x2578, 0x147b, 0x1014, NULL, NULL, NULL, "abit", "IC7", 0, NT, intel_ich_gpio23_raise},
+ {0x8086, 0x2930, 0x147b, 0x1084, 0x11ab, 0x4364, 0x147b, 0x1084, NULL, NULL, NULL, "abit", "IP35", 0, OK, intel_ich_gpio16_raise},
+ {0x8086, 0x2930, 0x147b, 0x1083, 0x10ec, 0x8167, 0x147b, 0x1083, NULL, NULL, NULL, "abit", "IP35 Pro", 0, OK, intel_ich_gpio16_raise},
@@ -2271,13 +2393,15 @@ index 2cf81c2..a073d9c 100644
+ {0x8086, 0x24D4, 0x1849, 0x24D0, 0x8086, 0x24D5, 0x1849, 0x9739, NULL, NULL, NULL, "ASRock", "P4i65GV", 0, OK, intel_ich_gpio23_raise},
+ {0x8086, 0x2570, 0x1849, 0x2570, 0x8086, 0x24d3, 0x1849, 0x24d0, NULL, NULL, NULL, "ASRock", "775i65G", 0, OK, intel_ich_gpio23_raise},
{0x1106, 0x3189, 0x1043, 0x807F, 0x1106, 0x3065, 0x1043, 0x80ED, NULL, NULL, NULL, "ASUS", "A7V600-X", 0, OK, it8712f_gpio3_1_raise},
-+ {0x1106, 0x3177, 0x1043, 0x80A1, 0x1106, 0x3205, 0x1043, 0x8118, NULL, NULL, NULL, "ASUS", "A7V8X-MX SE", 0, OK, w836xx_memw_enable_2e},
- {0x1106, 0x3189, 0x1043, 0x807F, 0x1106, 0x3177, 0x1043, 0x808C, NULL, NULL, NULL, "ASUS", "A7V8X", 0, OK, board_asus_a7v8x},
- {0x1106, 0x3189, 0x1043, 0x807F, 0x1106, 0x3177, 0x1043, 0x80A1, NULL, NULL, NULL, "ASUS", "A7V8X-X", 0, OK, it8712f_gpio3_1_raise},
-- {0x1106, 0x3177, 0x1043, 0x80A1, 0x1106, 0x3205, 0x1043, 0x8118, NULL, NULL, NULL, "ASUS", "A7V8X-MX SE", 0, OK, w836xx_memw_enable_2e},
+- {0x1106, 0x3189, 0x1043, 0x807F, 0x1106, 0x3177, 0x1043, 0x808C, NULL, NULL, NULL, "ASUS", "A7V8X", 0, OK, board_asus_a7v8x},
+- {0x1106, 0x3189, 0x1043, 0x807F, 0x1106, 0x3177, 0x1043, 0x80A1, NULL, NULL, NULL, "ASUS", "A7V8X-X", 0, OK, it8712f_gpio3_1_raise},
+ {0x1106, 0x3177, 0x1043, 0x80A1, 0x1106, 0x3205, 0x1043, 0x8118, NULL, NULL, NULL, "ASUS", "A7V8X-MX SE", 0, OK, w836xx_memw_enable_2e},
- {0x8086, 0x27A0, 0x1043, 0x1287, 0x8086, 0x27DF, 0x1043, 0x1287, "^A8J", NULL, NULL, "ASUS", "A8JM", 0, NT, intel_ich_gpio34_raise},
- {0x10DE, 0x005E, 0x1043, 0x815A, 0x10DE, 0x0054, 0x1043, 0x815A, NULL, NULL, NULL, "ASUS", "A8N", 0, NT, board_shuttle_fn25},
- {0x10DE, 0x0260, 0x103c, 0x2a3e, 0x10DE, 0x0264, 0x103c, 0x2a3e, "NAGAMI", NULL, NULL, "ASUS", "A8N-LA", 0, NT, nvidia_mcp_gpio0_raise},
++ {0x1106, 0x3189, 0x1043, 0x807F, 0x1106, 0x3177, 0x1043, 0x808C, NULL, NULL, NULL, "ASUS", "A7V8X", 0, OK, it8703f_gpio51_raise},
++ {0x1106, 0x3099, 0x1043, 0x807F, 0x1106, 0x3147, 0x1043, 0x808C, NULL, NULL, NULL, "ASUS", "A7V333", 0, OK, it8703f_gpio51_raise},
++ {0x1106, 0x3189, 0x1043, 0x807F, 0x1106, 0x3177, 0x1043, 0x80A1, NULL, NULL, NULL, "ASUS", "A7V8X-X", 0, OK, it8712f_gpio3_1_raise},
+ {0x8086, 0x27A0, 0x1043, 0x1287, 0x8086, 0x27DF, 0x1043, 0x1287, "^A8J", NULL, NULL, "ASUS", "A8Jm", 0, NT, intel_ich_gpio34_raise},
+ {0x10DE, 0x0260, 0x103c, 0x2a3e, 0x10DE, 0x0264, 0x103c, 0x2a3e, "NAGAMI2L", NULL, NULL, "ASUS", "A8N-LA (Nagami-GL8E)", 0, OK, nvidia_mcp_gpio0_raise},
+ {0x10DE, 0x005E, 0x1043, 0x815A, 0x10DE, 0x0054, 0x1043, 0x815A, NULL, NULL, NULL, "ASUS", "A8N", 0, NT, board_shuttle_fn25}, /* TODO: This should probably be A8N-SLI Deluxe, see http://www.coreboot.org/pipermail/flashrom/2009-November/000878.html. */
@@ -2292,16 +2416,19 @@ index 2cf81c2..a073d9c 100644
{0x8086, 0x24D3, 0x1043, 0x80A6, 0x8086, 0x2578, 0x1043, 0x80F6, NULL, NULL, NULL, "ASUS", "P4C800-E Deluxe", 0, OK, intel_ich_gpio21_raise},
+ {0x8086, 0x2570, 0x1043, 0x80F2, 0x8086, 0x24D5, 0x1043, 0x80F3, NULL, NULL, NULL, "ASUS", "P4P800", 0, NT, intel_ich_gpio21_raise},
{0x8086, 0x2570, 0x1043, 0x80F2, 0x105A, 0x3373, 0x1043, 0x80F5, NULL, NULL, NULL, "ASUS", "P4P800-E Deluxe", 0, OK, intel_ich_gpio21_raise},
++ {0x1039, 0x0651, 0x1043, 0x8081, 0x1039, 0x0962, 0, 0, NULL, NULL, NULL, "ASUS", "P4SC-E", 0, OK, it8707f_write_enable_2e},
+ {0x8086, 0x2570, 0x1043, 0x80A5, 0x105A, 0x24D3, 0x1043, 0x80A6, NULL, NULL, NULL, "ASUS", "P4SD-LA", 0, NT, intel_ich_gpio32_raise},
+ {0x1039, 0x0661, 0x1043, 0x8113, 0x1039, 0x5513, 0x1043, 0x8087, NULL, NULL, NULL, "ASUS", "P4S800-MX", 512, OK, w836xx_memw_enable_2e},
{0x10B9, 0x1541, 0, 0, 0x10B9, 0x1533, 0, 0, "^P5A$", "asus", "p5a", "ASUS", "P5A", 0, OK, board_asus_p5a},
+ {0x8086, 0x266a, 0x1043, 0x80a6, 0x8086, 0x2668, 0x1043, 0x814e, NULL, NULL, NULL, "ASUS", "P5GD1 Pro", 0, OK, intel_ich_gpio21_raise},
++ {0x8086, 0x266a, 0x1043, 0x80a6, 0x8086, 0x2668, 0x1043, 0x813d, NULL, NULL, NULL, "ASUS", "P5GDC Deluxe", 0, OK, intel_ich_gpio21_raise},
{0x10DE, 0x0030, 0x1043, 0x818a, 0x8086, 0x100E, 0x1043, 0x80EE, NULL, NULL, NULL, "ASUS", "P5ND2-SLI Deluxe", 0, OK, nvidia_mcp_gpio10_raise},
- {0x1106, 0x3149, 0x1565, 0x3206, 0x1106, 0x3344, 0x1565, 0x1202, NULL, NULL, NULL, "Biostar", "P4M80-M4", 0, OK, it8705f_write_enable_2e},
+ {0x8086, 0x24dd, 0x1043, 0x80a6, 0x8086, 0x2570, 0x1043, 0x8157, NULL, NULL, NULL, "ASUS", "P5PE-VM", 0, OK, intel_ich_gpio21_raise},
{0x8086, 0x3590, 0x1028, 0x016c, 0x1000, 0x0030, 0x1028, 0x016c, NULL, NULL, NULL, "Dell", "PowerEdge 1850", 0, OK, intel_ich_gpio23_raise},
- {0x1039, 0x5513, 0x1019, 0x0A41, 0x1039, 0x0018, 0, 0, NULL, NULL, NULL, "Elitegroup", "K7S6A", 0, OK, it8705f_write_enable_2e},
- {0x1106, 0x3038, 0x1019, 0x0996, 0x1106, 0x3177, 0x1019, 0x0996, NULL, NULL, NULL, "Elitegroup", "K7VTA3", 256, OK, it8705f_write_enable_2e},
++ {0x10de, 0x03ea, 0x1019, 0x2602, 0x10de, 0x03e0, 0x1019, 0x2602, NULL, NULL, NULL, "Elitegroup", "GeForce6100SM-M", 0, OK, board_ecs_geforce6100sm_m},
+ {0x1106, 0x3038, 0x1019, 0x0996, 0x1106, 0x3177, 0x1019, 0x0996, NULL, NULL, NULL, "Elitegroup", "K7VTA3", 256, OK, NULL},
{0x1106, 0x3177, 0x1106, 0x3177, 0x1106, 0x3059, 0x1695, 0x3005, NULL, NULL, NULL, "EPoX", "EP-8K5A2", 0, OK, w836xx_memw_enable_2e},
{0x10EC, 0x8139, 0x1695, 0x9001, 0x11C1, 0x5811, 0x1695, 0x9015, NULL, NULL, NULL, "EPoX", "EP-8RDA3+", 0, OK, nvidia_mcp_gpio31_raise},
@@ -2330,13 +2457,14 @@ index 2cf81c2..a073d9c 100644
{0x8086, 0x27A0, 0x8086, 0x27a0, 0x8086, 0x27b8, 0x8086, 0x27b8, NULL, "kontron", "986lcd-m", "Kontron", "986LCD-M", 0, OK, board_kontron_986lcd_m},
{0x8086, 0x2411, 0x8086, 0x2411, 0x8086, 0x7125, 0x0e11, 0xb165, NULL, NULL, NULL, "Mitac", "6513WU", 0, OK, board_mitac_6513wu},
+ {0x10DE, 0x005E, 0x1462, 0x7125, 0x10DE, 0x0052, 0x1462, 0x7125, NULL, NULL, NULL, "MSI", "K8N Neo4-F", 0, OK, nvidia_mcp_gpio2_raise}, /* TODO: Should probably be K8N Neo4 Platinum, see http://www.coreboot.org/pipermail/flashrom/2010-August/004362.html. */
++ {0x8086, 0x7190, 0, 0, 0x8086, 0x7110, 0, 0, "^MS-6163 (i440BX)$", NULL, NULL, "MSI", "MS-6163 (MS-6163 Pro)", 0, OK, intel_piix4_gpo14_raise},
+ {0x1039, 0x0745, 0, 0, 0x1039, 0x0018, 0, 0, "^MS-6561", NULL, NULL, "MSI", "MS-6561 (745 Ultra)", 0, OK, w836xx_memw_enable_2e},
+ {0x8086, 0x2560, 0x1462, 0x5770, 0x8086, 0x2562, 0x1462, 0x5778, NULL, NULL, NULL, "MSI", "MS-6577 (Xenon)", 0, OK, w83627hf_gpio25_raise_2e},
{0x13f6, 0x0111, 0x1462, 0x5900, 0x1106, 0x3177, 0x1106, 0, NULL, NULL, NULL, "MSI", "MS-6590 (KT4 Ultra)", 0, OK, board_msi_kt4v},
- {0x1106, 0x3149, 0x1462, 0x7094, 0x10ec, 0x8167, 0x1462, 0x094c, NULL, NULL, NULL, "MSI", "MS-6702E (K8T Neo2-F)", 0, OK, w83627thf_gpio4_4_raise_2e},
+ {0x1106, 0x3149, 0x1462, 0x7094, 0x10ec, 0x8167, 0x1462, 0x094c, NULL, NULL, NULL, "MSI", "MS-6702E (K8T Neo2-F)", 0, OK, w83627thf_gpio44_raise_2e},
{0x1106, 0x0571, 0x1462, 0x7120, 0x1106, 0x3065, 0x1462, 0x7120, NULL, NULL, NULL, "MSI", "MS-6712 (KT4V)", 0, OK, board_msi_kt4v},
-+ {0x1106, 0x3148, 0 , 0 , 0x1106, 0x3177, 0 , 0 , NULL, "msi", "ms6787", "MSI", "MS-6787 (P4MAM-V/P4MAM-L)", 0, NT, w836xx_memw_enable_2e},
++ {0x1106, 0x3148, 0 , 0 , 0x1106, 0x3177, 0 , 0 , NULL, "msi", "ms6787", "MSI", "MS-6787 (P4MAM-V/P4MAM-L)", 0, OK, w836xx_memw_enable_2e},
{0x1039, 0x7012, 0x1462, 0x0050, 0x1039, 0x6325, 0x1462, 0x0058, NULL, NULL, NULL, "MSI", "MS-7005 (651M-L)", 0, OK, board_msi_651ml},
+ {0x10DE, 0x00E0, 0x1462, 0x0250, 0x10DE, 0x00E1, 0x1462, 0x0250, NULL, NULL, NULL, "MSI", "MS-7025 (K8N Neo2 Platinum)", 0, OK, nvidia_mcp_gpio0c_raise},
{0x8086, 0x2658, 0x1462, 0x7046, 0x1106, 0x3044, 0x1462, 0x046d, NULL, NULL, NULL, "MSI", "MS-7046", 0, OK, intel_ich_gpio19_raise},
@@ -2381,7 +2509,7 @@ index 2cf81c2..a073d9c 100644
for (; board->vendor_name; board++) {
if (vendor && (!board->lb_vendor
-@@ -1470,13 +1919,13 @@ static struct board_pciid_enable *board_match_coreboot_name(const char *vendor,
+@@ -1470,13 +2010,13 @@ static struct board_pciid_enable *board_match_coreboot_name(const char *vendor,
return NULL;
}
@@ -2398,7 +2526,7 @@ index 2cf81c2..a073d9c 100644
for (; board->vendor_name; board++) {
if ((!board->first_card_vendor || !board->first_card_device) &&
-@@ -1522,7 +1971,7 @@ static struct board_pciid_enable *board_match_pci_card_ids(void)
+@@ -1522,7 +2062,7 @@ static struct board_pciid_enable *board_match_pci_card_ids(void)
int board_flash_enable(const char *vendor, const char *part)
{
@@ -2407,7 +2535,7 @@ index 2cf81c2..a073d9c 100644
int ret = 0;
if (part)
-@@ -1531,19 +1980,19 @@ int board_flash_enable(const char *vendor, const char *part)
+@@ -1531,19 +2071,19 @@ int board_flash_enable(const char *vendor, const char *part)
if (!board)
board = board_match_pci_card_ids();
@@ -2440,7 +2568,7 @@ index 2cf81c2..a073d9c 100644
}
}
-@@ -1554,10 +2003,10 @@ int board_flash_enable(const char *vendor, const char *part)
+@@ -1554,10 +2094,10 @@ int board_flash_enable(const char *vendor, const char *part)
if (board->enable != NULL) {
msg_pinfo("Disabling flash write protection for "
@@ -2455,7 +2583,7 @@ index 2cf81c2..a073d9c 100644
msg_pinfo("FAILED!\n");
else
diff --git a/buspirate_spi.c b/buspirate_spi.c
-index dc491e2..c56155f 100644
+index dc491e2..9890d48 100644
--- a/buspirate_spi.c
+++ b/buspirate_spi.c
@@ -1,7 +1,7 @@
@@ -2467,8 +2595,11 @@ index dc491e2..c56155f 100644
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
-@@ -24,13 +24,14 @@
+@@ -22,15 +22,17 @@
+ #include <string.h>
+ #include <stdlib.h>
#include <ctype.h>
++#include <unistd.h>
#include "flash.h"
#include "chipdrivers.h"
+#include "programmer.h"
@@ -2483,7 +2614,7 @@ index dc491e2..c56155f 100644
{
/* 115200bps, 8 databits, no parity, 1 stopbit */
sp_fd = sp_openserport(dev, 115200);
-@@ -44,7 +45,7 @@ int buspirate_serialport_setup(char *dev)
+@@ -44,7 +46,7 @@ int buspirate_serialport_setup(char *dev)
#define sp_flush_incoming(...) 0
#endif
@@ -2492,7 +2623,7 @@ index dc491e2..c56155f 100644
{
int i, ret = 0;
-@@ -101,24 +102,14 @@ int buspirate_spi_init(void)
+@@ -101,24 +103,14 @@ int buspirate_spi_init(void)
char *speed = NULL;
int spispeed = 0x7;
@@ -2522,7 +2653,7 @@ index dc491e2..c56155f 100644
if (speed) {
for (i = 0; spispeeds[i].name; i++)
if (!strncasecmp(spispeeds[i].name, speed,
-@@ -129,12 +120,15 @@ int buspirate_spi_init(void)
+@@ -129,12 +121,15 @@ int buspirate_spi_init(void)
if (!spispeeds[i].name)
msg_perr("Invalid SPI speed, using default.\n");
}
@@ -2538,7 +2669,50 @@ index dc491e2..c56155f 100644
/* This is the brute force version, but it should work. */
for (i = 0; i < 19; i++) {
-@@ -266,8 +260,8 @@ int buspirate_spi_send_command(unsigned int writecnt, unsigned int readcnt,
+@@ -147,6 +142,20 @@ int buspirate_spi_init(void)
+ /* Read any response and discard it. */
+ sp_flush_incoming();
+ }
++ /* USB is slow. The Bus Pirate is even slower. Apparently the flush
++ * action above is too fast or too early. Some stuff still remains in
++ * the pipe after the flush above, and one additional flush is not
++ * sufficient either. Use a 1.5 ms delay inside the loop to make
++ * mostly sure that at least one USB frame had time to arrive.
++ * Looping only 5 times is not sufficient and causes the
++ * ocassional failure.
++ * Folding the delay into the loop above is not reliable either.
++ */
++ for (i = 0; i < 10; i++) {
++ usleep(1500);
++ /* Read any response and discard it. */
++ sp_flush_incoming();
++ }
+ /* Enter raw bitbang mode */
+ buf[0] = 0x00;
+ ret = buspirate_sendrecv(buf, 1, 5);
+@@ -154,6 +163,8 @@ int buspirate_spi_init(void)
+ return ret;
+ if (memcmp(buf, "BBIO", 4)) {
+ msg_perr("Entering raw bitbang mode failed!\n");
++ msg_pdbg("Got %02x%02x%02x%02x%02x\n",
++ buf[0], buf[1], buf[2], buf[3], buf[4]);
+ return 1;
+ }
+ msg_pdbg("Raw bitbang mode version %c\n", buf[4]);
+@@ -165,8 +176,12 @@ int buspirate_spi_init(void)
+ /* Enter raw SPI mode */
+ buf[0] = 0x01;
+ ret = buspirate_sendrecv(buf, 1, 4);
++ if (ret)
++ return ret;
+ if (memcmp(buf, "SPI", 3)) {
+ msg_perr("Entering raw SPI mode failed!\n");
++ msg_pdbg("Got %02x%02x%02x%02x\n",
++ buf[0], buf[1], buf[2], buf[3]);
+ return 1;
+ }
+ msg_pdbg("Raw SPI mode version %c\n", buf[3]);
+@@ -266,8 +281,8 @@ int buspirate_spi_send_command(unsigned int writecnt, unsigned int readcnt,
if (writecnt > 16 || readcnt > 16 || (readcnt + writecnt) > 16)
return SPI_INVALID_LENGTH;
@@ -2549,7 +2723,7 @@ index dc491e2..c56155f 100644
if (!buf) {
msg_perr("Out of memory!\n");
exit(1); // -1
-@@ -275,39 +269,41 @@ int buspirate_spi_send_command(unsigned int writecnt, unsigned int readcnt,
+@@ -275,39 +290,41 @@ int buspirate_spi_send_command(unsigned int writecnt, unsigned int readcnt,
/* Assert CS# */
buf[i++] = 0x02;
@@ -2609,7 +2783,7 @@ index dc491e2..c56155f 100644
return ret;
}
-@@ -316,39 +312,7 @@ int buspirate_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len
+@@ -316,39 +333,7 @@ int buspirate_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len
return spi_read_chunked(flash, buf, start, len, 12);
}
@@ -2728,7 +2902,7 @@ index 6d5cef0..119ea70 100644
void write_page_m29f400bt(chipaddr bios, uint8_t *src,
chipaddr dst, int page_size);
diff --git a/chipset_enable.c b/chipset_enable.c
-index 69f1623..4ac3a55 100644
+index 69f1623..ac2edc2 100644
--- a/chipset_enable.c
+++ b/chipset_enable.c
@@ -30,11 +30,13 @@
@@ -3145,7 +3319,31 @@ index 69f1623..4ac3a55 100644
}
static int enable_flash_nvidia_nforce2(struct pci_dev *dev, const char *name)
-@@ -1054,18 +868,16 @@ static int enable_flash_mcp55(struct pci_dev *dev, const char *name)
+@@ -988,6 +802,23 @@ static int enable_flash_ck804(struct pci_dev *dev, const char *name)
+ return 0;
+ }
+
++static int enable_flash_osb4(struct pci_dev *dev, const char *name)
++{
++ uint8_t tmp;
++
++ buses_supported = CHIP_BUSTYPE_PARALLEL;
++
++ tmp = INB(0xc06);
++ tmp |= 0x1;
++ OUTB(tmp, 0xc06);
++
++ tmp = INB(0xc6f);
++ tmp |= 0x40;
++ OUTB(tmp, 0xc6f);
++
++ return 0;
++}
++
+ /* ATI Technologies Inc IXP SB400 PCI-ISA Bridge (rev 80) */
+ static int enable_flash_sb400(struct pci_dev *dev, const char *name)
+ {
+@@ -1054,18 +885,16 @@ static int enable_flash_mcp55(struct pci_dev *dev, const char *name)
return 0;
}
@@ -3170,7 +3368,7 @@ index 69f1623..4ac3a55 100644
msg_pinfo("This chipset is not really supported yet. Guesswork...\n");
-@@ -1073,20 +885,31 @@ static int enable_flash_mcp6x_7x_common(struct pci_dev *dev, const char *name)
+@@ -1073,20 +902,31 @@ static int enable_flash_mcp6x_7x_common(struct pci_dev *dev, const char *name)
val = pci_read_byte(dev, 0x8a);
msg_pdbg("ISA/LPC bridge reg 0x8a contents: 0x%02x, bit 6 is %i, bit 5 "
"is %i\n", val, (val >> 6) & 0x1, (val >> 5) & 0x1);
@@ -3207,7 +3405,7 @@ index 69f1623..4ac3a55 100644
/* Force enable SPI and disable LPC? Not a good idea. */
#if 0
-@@ -1095,62 +918,8 @@ static int enable_flash_mcp6x_7x_common(struct pci_dev *dev, const char *name)
+@@ -1095,62 +935,8 @@ static int enable_flash_mcp6x_7x_common(struct pci_dev *dev, const char *name)
pci_write_byte(dev, 0x8a, val);
#endif
@@ -3271,7 +3469,7 @@ index 69f1623..4ac3a55 100644
}
out_msg:
msg_pinfo("Please send the output of \"flashrom -V\" to "
-@@ -1160,68 +929,6 @@ out_msg:
+@@ -1160,68 +946,6 @@ out_msg:
return ret;
}
@@ -3340,7 +3538,7 @@ index 69f1623..4ac3a55 100644
static int enable_flash_ht1000(struct pci_dev *dev, const char *name)
{
uint8_t val;
-@@ -1238,7 +945,7 @@ static int enable_flash_ht1000(struct pci_dev *dev, const char *name)
+@@ -1238,7 +962,7 @@ static int enable_flash_ht1000(struct pci_dev *dev, const char *name)
return 0;
}
@@ -3349,7 +3547,7 @@ index 69f1623..4ac3a55 100644
* Usually on the x86 architectures (and on other PC-like platforms like some
* Alphas or Itanium) the system flash is mapped right below 4G. On the AMD
* Elan SC520 only a small piece of the system flash is mapped there, but the
-@@ -1285,8 +992,11 @@ static int get_flashbase_sc520(struct pci_dev *dev, const char *name)
+@@ -1285,8 +1009,11 @@ static int get_flashbase_sc520(struct pci_dev *dev, const char *name)
return 0;
}
@@ -3361,7 +3559,11 @@ index 69f1623..4ac3a55 100644
{0x10B9, 0x1533, OK, "ALi", "M1533", enable_flash_ali_m1533},
{0x1022, 0x7440, OK, "AMD", "AMD-768", enable_flash_amd8111},
{0x1022, 0x7468, OK, "AMD", "AMD8111", enable_flash_amd8111},
-@@ -1301,7 +1011,21 @@ const struct penable chipset_enables[] = {
+@@ -1298,10 +1025,25 @@ const struct penable chipset_enables[] = {
+ {0x1002, 0x439d, OK, "AMD", "SB700/SB710/SB750", enable_flash_sb600},
+ {0x100b, 0x0510, NT, "AMD", "SC1100", enable_flash_sc1100},
+ {0x1002, 0x4377, OK, "ATI", "SB400", enable_flash_sb400},
++ {0x1166, 0x0200, OK, "Broadcom", "OSB4", enable_flash_osb4},
{0x1166, 0x0205, OK, "Broadcom", "HT-1000", enable_flash_ht1000},
{0x8086, 0x3b00, NT, "Intel", "3400 Desktop", enable_flash_ich10},
{0x8086, 0x3b01, NT, "Intel", "3400 Mobile", enable_flash_ich10},
@@ -3383,7 +3585,7 @@ index 69f1623..4ac3a55 100644
{0x8086, 0x7198, OK, "Intel", "440MX", enable_flash_piix4},
{0x8086, 0x25a1, OK, "Intel", "6300ESB", enable_flash_ich_4e},
{0x8086, 0x2670, OK, "Intel", "631xESB/632xESB/3100", enable_flash_ich_dc},
-@@ -1347,6 +1071,7 @@ const struct penable chipset_enables[] = {
+@@ -1347,6 +1089,7 @@ const struct penable chipset_enables[] = {
{0x10de, 0x0050, OK, "NVIDIA", "CK804", enable_flash_ck804}, /* LPC */
{0x10de, 0x0051, OK, "NVIDIA", "CK804", enable_flash_ck804}, /* Pro */
{0x10de, 0x0060, OK, "NVIDIA", "NForce2", enable_flash_nvidia_nforce2},
@@ -3391,7 +3593,7 @@ index 69f1623..4ac3a55 100644
/* Slave, should not be here, to fix known bug for A01. */
{0x10de, 0x00d3, OK, "NVIDIA", "CK804", enable_flash_ck804},
{0x10de, 0x0260, NT, "NVIDIA", "MCP51", enable_flash_ck804},
-@@ -1354,29 +1079,37 @@ const struct penable chipset_enables[] = {
+@@ -1354,29 +1097,37 @@ const struct penable chipset_enables[] = {
{0x10de, 0x0262, NT, "NVIDIA", "MCP51", enable_flash_ck804},
{0x10de, 0x0263, NT, "NVIDIA", "MCP51", enable_flash_ck804},
{0x10de, 0x0360, OK, "NVIDIA", "MCP55", enable_flash_mcp55}, /* M57SLI*/
@@ -3446,7 +3648,7 @@ index 69f1623..4ac3a55 100644
{0x1039, 0x0496, NT, "SiS", "85C496+497", enable_flash_sis85c496},
{0x1039, 0x0406, NT, "SiS", "501/5101/5501", enable_flash_sis501},
{0x1039, 0x5511, NT, "SiS", "5511", enable_flash_sis5511},
-@@ -1397,14 +1130,23 @@ const struct penable chipset_enables[] = {
+@@ -1397,14 +1148,23 @@ const struct penable chipset_enables[] = {
{0x1039, 0x0650, NT, "SiS", "650", enable_flash_sis540},
{0x1039, 0x0651, NT, "SiS", "651", enable_flash_sis540},
{0x1039, 0x0655, NT, "SiS", "655", enable_flash_sis540},
@@ -3471,7 +3673,7 @@ index 69f1623..4ac3a55 100644
{0x1106, 0x8324, OK, "VIA", "CX700", enable_flash_vt823x},
{0x1106, 0x8231, NT, "VIA", "VT8231", enable_flash_vt823x},
{0x1106, 0x3074, NT, "VIA", "VT8233", enable_flash_vt823x},
-@@ -1417,7 +1159,7 @@ const struct penable chipset_enables[] = {
+@@ -1417,7 +1177,7 @@ const struct penable chipset_enables[] = {
{0x1106, 0x0596, OK, "VIA", "VT82C596", enable_flash_amd8111},
{0x1106, 0x0586, OK, "VIA", "VT82C586A/B", enable_flash_amd8111},
{0x1106, 0x0686, NT, "VIA", "VT82C686A/B", enable_flash_amd8111},
@@ -3480,7 +3682,7 @@ index 69f1623..4ac3a55 100644
{},
};
-@@ -1431,22 +1173,36 @@ int chipset_flash_enable(void)
+@@ -1431,22 +1191,36 @@ int chipset_flash_enable(void)
for (i = 0; chipset_enables[i].vendor_name != NULL; i++) {
dev = pci_dev_find(chipset_enables[i].vendor_id,
chipset_enables[i].device_id);
@@ -3525,7 +3727,7 @@ index 69f1623..4ac3a55 100644
flashbuses_to_text(buses_supported));
diff --git a/cli_classic.c b/cli_classic.c
-index 6e8f098..d78c575 100644
+index 6e8f098..09504d7 100644
--- a/cli_classic.c
+++ b/cli_classic.c
@@ -21,6 +21,7 @@
@@ -3827,6 +4029,17 @@ index 6e8f098..d78c575 100644
}
// FIXME: flash writes stay enabled!
programmer_shutdown();
+@@ -455,5 +456,10 @@ int cli_classic(int argc, char *argv[])
+ if (write_it && !dont_verify_it)
+ verify_it = 1;
+
++ /* FIXME: We should issue an unconditional chip reset here. This can be
++ * done once we have a .reset function in struct flashchip.
++ * Give the chip time to settle.
++ */
++ programmer_delay(100000);
+ return doit(flash, force, filename, read_it, write_it, erase_it, verify_it);
+ }
diff --git a/dediprog.c b/dediprog.c
index 2d0d060..cf4bd64 100644
--- a/dediprog.c
@@ -4809,10 +5022,15 @@ index f1ecb21..6f0d7c0 100644
-
#endif /* !__FLASH_H__ */
diff --git a/flashchips.c b/flashchips.c
-index 10c0989..c9cae79 100644
+index 10c0989..946e4fc 100644
--- a/flashchips.c
+++ b/flashchips.c
-@@ -65,7 +65,7 @@ struct flashchip flashchips[] = {
+@@ -61,11 +61,11 @@ struct flashchip flashchips[] = {
+ .name = "Am29F010A/B",
+ .bustype = CHIP_BUSTYPE_PARALLEL,
+ .manufacture_id = AMD_ID,
+- .model_id = AM_29F010B, /* Same as Am29F010A */
++ .model_id = AMD_AM29F010B, /* Same as Am29F010A */
.total_size = 128,
.page_size = 16 * 1024,
.feature_bits = FEATURE_ADDR_2AA | FEATURE_EITHER_RESET,
@@ -4821,14 +5039,66 @@ index 10c0989..c9cae79 100644
.probe = probe_jedec,
.probe_timing = TIMING_ZERO,
.block_erasers =
-@@ -105,90 +105,812 @@ struct flashchip flashchips[] = {
- },
- .block_erase = erase_sector_jedec,
- }, {
-- .eraseblocks = { {256 * 1024, 1} },
-- .block_erase = erase_chip_block_jedec,
-- },
-+ .eraseblocks = { {256 * 1024, 1} },
+@@ -87,7 +87,7 @@ struct flashchip flashchips[] = {
+ .name = "Am29F002(N)BB",
+ .bustype = CHIP_BUSTYPE_PARALLEL,
+ .manufacture_id = AMD_ID,
+- .model_id = AM_29F002BB,
++ .model_id = AMD_AM29F002BB,
+ .total_size = 256,
+ .page_size = 256,
+ .feature_bits = FEATURE_SHORT_RESET | FEATURE_ADDR_2AA,
+@@ -118,7 +118,7 @@ struct flashchip flashchips[] = {
+ .name = "Am29F002(N)BT",
+ .bustype = CHIP_BUSTYPE_PARALLEL,
+ .manufacture_id = AMD_ID,
+- .model_id = AM_29F002BT,
++ .model_id = AMD_AM29F002BT,
+ .total_size = 256,
+ .page_size = 256,
+ .feature_bits = FEATURE_EITHER_RESET | FEATURE_ADDR_2AA,
+@@ -149,7 +149,7 @@ struct flashchip flashchips[] = {
+ .name = "Am29F016D",
+ .bustype = CHIP_BUSTYPE_PARALLEL,
+ .manufacture_id = AMD_ID,
+- .model_id = AM_29F016D,
++ .model_id = AMD_AM29F016D,
+ .total_size = 2 * 1024,
+ .page_size = 64 * 1024,
+ .feature_bits = FEATURE_ADDR_2AA | FEATURE_SHORT_RESET,
+@@ -175,7 +175,7 @@ struct flashchip flashchips[] = {
+ .name = "Am29F040B",
+ .bustype = CHIP_BUSTYPE_PARALLEL,
+ .manufacture_id = AMD_ID,
+- .model_id = AM_29F040B,
++ .model_id = AMD_AM29F040B,
+ .total_size = 512,
+ .page_size = 64 * 1024,
+ .feature_bits = FEATURE_ADDR_2AA | FEATURE_SHORT_RESET,
+@@ -197,24 +197,720 @@ struct flashchip flashchips[] = {
+ },
+
+ {
+- .vendor = "AMD",
+- .name = "Am29F080B",
++ .vendor = "AMD",
++ .name = "Am29F080B",
++ .bustype = CHIP_BUSTYPE_PARALLEL,
++ .manufacture_id = AMD_ID,
++ .model_id = AMD_AM29F080B,
++ .total_size = 1024,
++ .page_size = 64 * 1024,
++ .feature_bits = FEATURE_ADDR_2AA | FEATURE_SHORT_RESET,
++ .tested = TEST_UNTESTED,
++ .probe = probe_jedec,
++ .probe_timing = TIMING_ZERO,
++ .block_erasers =
++ {
++ {
++ .eraseblocks = { {64 * 1024, 16} },
++ .block_erase = erase_sector_jedec,
++ }, {
++ .eraseblocks = { {1024 * 1024, 1} },
+ .block_erase = erase_chip_block_jedec,
+ },
+ },
@@ -4838,119 +5108,10 @@ index 10c0989..c9cae79 100644
+
+ {
+ .vendor = "AMD",
-+ .name = "Am29F002(N)BT",
++ .name = "Am29LV040B",
+ .bustype = CHIP_BUSTYPE_PARALLEL,
+ .manufacture_id = AMD_ID,
-+ .model_id = AM_29F002BT,
-+ .total_size = 256,
-+ .page_size = 256,
-+ .feature_bits = FEATURE_EITHER_RESET | FEATURE_ADDR_2AA,
-+ .tested = TEST_UNTESTED,
-+ .probe = probe_jedec,
-+ .probe_timing = TIMING_ZERO,
-+ .block_erasers =
-+ {
-+ {
-+ .eraseblocks = {
-+ {64 * 1024, 3},
-+ {32 * 1024, 1},
-+ {8 * 1024, 2},
-+ {16 * 1024, 1},
-+ },
-+ .block_erase = erase_sector_jedec,
-+ }, {
-+ .eraseblocks = { {256 * 1024, 1} },
-+ .block_erase = erase_chip_block_jedec,
-+ },
-+ },
-+ .write = write_jedec_1,
-+ .read = read_memmapped,
-+ },
-+
-+ {
-+ .vendor = "AMD",
-+ .name = "Am29F016D",
-+ .bustype = CHIP_BUSTYPE_PARALLEL,
-+ .manufacture_id = AMD_ID,
-+ .model_id = AM_29F016D,
-+ .total_size = 2 * 1024,
-+ .page_size = 64 * 1024,
-+ .feature_bits = FEATURE_ADDR_2AA | FEATURE_SHORT_RESET,
-+ .tested = TEST_UNTESTED,
-+ .probe = probe_jedec,
-+ .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (am29f040b.c) */
-+ .block_erasers =
-+ {
-+ {
-+ .eraseblocks = { {64 * 1024, 32} },
-+ .block_erase = erase_sector_jedec,
-+ }, {
-+ .eraseblocks = { {2048 * 1024, 1} },
-+ .block_erase = erase_chip_block_jedec,
-+ },
-+ },
-+ .write = write_jedec_1,
-+ .read = read_memmapped,
-+ },
-+
-+ {
-+ .vendor = "AMD",
-+ .name = "Am29F040B",
-+ .bustype = CHIP_BUSTYPE_PARALLEL,
-+ .manufacture_id = AMD_ID,
-+ .model_id = AM_29F040B,
-+ .total_size = 512,
-+ .page_size = 64 * 1024,
-+ .feature_bits = FEATURE_ADDR_2AA | FEATURE_SHORT_RESET,
-+ .tested = TEST_UNTESTED,
-+ .probe = probe_jedec,
-+ .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (am29f040b.c) */
-+ .block_erasers =
-+ {
-+ {
-+ .eraseblocks = { {64 * 1024, 8} },
-+ .block_erase = erase_sector_jedec,
-+ }, {
-+ .eraseblocks = { {512 * 1024, 1} },
-+ .block_erase = erase_chip_block_jedec,
-+ },
-+ },
-+ .write = write_jedec_1,
-+ .read = read_memmapped,
-+ },
-+
-+ {
-+ .vendor = "AMD",
-+ .name = "Am29F080B",
-+ .bustype = CHIP_BUSTYPE_PARALLEL,
-+ .manufacture_id = AMD_ID,
-+ .model_id = AM_29F080B,
-+ .total_size = 1024,
-+ .page_size = 64 * 1024,
-+ .feature_bits = FEATURE_ADDR_2AA | FEATURE_SHORT_RESET,
-+ .tested = TEST_UNTESTED,
-+ .probe = probe_jedec,
-+ .probe_timing = TIMING_ZERO,
-+ .block_erasers =
-+ {
-+ {
-+ .eraseblocks = { {64 * 1024, 16} },
-+ .block_erase = erase_sector_jedec,
-+ }, {
-+ .eraseblocks = { {1024 * 1024, 1} },
-+ .block_erase = erase_chip_block_jedec,
-+ },
-+ },
-+ .write = write_jedec_1,
-+ .read = read_memmapped,
-+ },
-+
-+ {
-+ .vendor = "AMD",
-+ .name = "Am29LV040B",
-+ .bustype = CHIP_BUSTYPE_PARALLEL,
-+ .manufacture_id = AMD_ID,
-+ .model_id = AM_29LV040B,
++ .model_id = AMD_AM29LV040B,
+ .total_size = 512,
+ .page_size = 64 * 1024,
+ .feature_bits = FEATURE_ADDR_2AA | FEATURE_SHORT_RESET,
@@ -4976,7 +5137,7 @@ index 10c0989..c9cae79 100644
+ .name = "Am29LV081B",
+ .bustype = CHIP_BUSTYPE_PARALLEL,
+ .manufacture_id = AMD_ID,
-+ .model_id = AM_29LV080B,
++ .model_id = AMD_AM29LV080B,
+ .total_size = 1024,
+ .page_size = 64 * 1024,
+ .feature_bits = FEATURE_ADDR_2AA | FEATURE_SHORT_RESET,
@@ -5532,50 +5693,30 @@ index 10c0989..c9cae79 100644
+ .eraseblocks = { { 2048 * 1024, 1 } },
+ .block_erase = spi_block_erase_c7,
+ }
- },
-- .write = write_jedec_1,
-- .read = read_memmapped,
++ },
+ .unlock = spi_disable_blockprotect,
+ .write = spi_chip_write_256,
+ .read = spi_chip_read,
- },
-
- {
-- .vendor = "AMD",
-- .name = "Am29F002(N)BT",
-- .bustype = CHIP_BUSTYPE_PARALLEL,
-- .manufacture_id = AMD_ID,
-- .model_id = AM_29F002BT,
-- .total_size = 256,
++ },
++
++ {
+ .vendor = "AMIC",
+ .name = "A25L032",
+ .bustype = CHIP_BUSTYPE_SPI,
+ .manufacture_id = AMIC_ID_NOPREFIX,
+ .model_id = AMIC_A25L032,
+ .total_size = 4096,
- .page_size = 256,
-- .feature_bits = FEATURE_EITHER_RESET | FEATURE_ADDR_2AA,
++ .page_size = 256,
+ .feature_bits = FEATURE_WRSR_WREN,
- .tested = TEST_UNTESTED,
-- .probe = probe_jedec,
++ .tested = TEST_UNTESTED,
+ .probe = probe_spi_rdid,
- .probe_timing = TIMING_ZERO,
- .block_erasers =
- {
- {
-- .eraseblocks = {
-- {64 * 1024, 3},
-- {32 * 1024, 1},
-- {8 * 1024, 2},
-- {16 * 1024, 1},
-- },
-- .block_erase = erase_sector_jedec,
++ .probe_timing = TIMING_ZERO,
++ .block_erasers =
++ {
++ {
+ .eraseblocks = { { 4 * 1024, 1024 } },
+ .block_erase = spi_block_erase_20,
- }, {
-- .eraseblocks = { {256 * 1024, 1} },
-- .block_erase = erase_chip_block_jedec,
-- },
++ }, {
+ .eraseblocks = { { 64 * 1024, 64 } },
+ .block_erase = spi_block_erase_52,
+ }, {
@@ -5588,23 +5729,13 @@ index 10c0989..c9cae79 100644
+ .eraseblocks = { { 4096 * 1024, 1 } },
+ .block_erase = spi_block_erase_c7,
+ }
- },
-- .write = write_jedec_1,
-- .read = read_memmapped,
++ },
+ .unlock = NULL, /* Two status reg bytes (read with 0x35 and 0x05) */
+ .write = spi_chip_write_256,
+ .read = spi_chip_read,
- },
-
- {
-- .vendor = "AMD",
-- .name = "Am29F016D",
-- .bustype = CHIP_BUSTYPE_PARALLEL,
-- .manufacture_id = AMD_ID,
-- .model_id = AM_29F016D,
-- .total_size = 2 * 1024,
-- .page_size = 64 * 1024,
-- .feature_bits = FEATURE_ADDR_2AA | FEATURE_SHORT_RESET,
++ },
++
++ {
+ .vendor = "AMIC",
+ .name = "A25LQ032",
+ .bustype = CHIP_BUSTYPE_SPI,
@@ -5613,22 +5744,15 @@ index 10c0989..c9cae79 100644
+ .total_size = 4096,
+ .page_size = 256,
+ .feature_bits = FEATURE_WRSR_WREN,
- .tested = TEST_UNTESTED,
-- .probe = probe_jedec,
-- .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (am29f040b.c) */
++ .tested = TEST_UNTESTED,
+ .probe = probe_spi_rdid,
+ .probe_timing = TIMING_ZERO,
- .block_erasers =
- {
- {
-- .eraseblocks = { {64 * 1024, 32} },
-- .block_erase = erase_sector_jedec,
++ .block_erasers =
++ {
++ {
+ .eraseblocks = { { 4 * 1024, 1024 } },
+ .block_erase = spi_block_erase_20,
- }, {
-- .eraseblocks = { {2048 * 1024, 1} },
-- .block_erase = erase_chip_block_jedec,
-- },
++ }, {
+ .eraseblocks = { { 64 * 1024, 64 } },
+ .block_erase = spi_block_erase_52,
+ }, {
@@ -5641,23 +5765,19 @@ index 10c0989..c9cae79 100644
+ .eraseblocks = { { 4096 * 1024, 1 } },
+ .block_erase = spi_block_erase_c7,
+ }
- },
-- .write = write_jedec_1,
-- .read = read_memmapped,
++ },
+ .unlock = NULL, /* Two status reg bytes (read with 0x35 and 0x05) */
+ .write = spi_chip_write_256,
+ .read = spi_chip_read,
- },
-
- {
-- .vendor = "AMD",
-- .name = "Am29F040B",
++ },
++
++ {
+ .vendor = "AMIC",
+ .name = "A29002B",
.bustype = CHIP_BUSTYPE_PARALLEL,
- .manufacture_id = AMD_ID,
-- .model_id = AM_29F040B,
-- .total_size = 512,
+- .model_id = AM_29F080B,
+- .total_size = 1024,
+ .manufacture_id = AMIC_ID_NOPREFIX,
+ .model_id = AMIC_A29002B,
+ .total_size = 256,
@@ -5665,12 +5785,12 @@ index 10c0989..c9cae79 100644
.feature_bits = FEATURE_ADDR_2AA | FEATURE_SHORT_RESET,
.tested = TEST_UNTESTED,
.probe = probe_jedec,
-- .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (am29f040b.c) */
+- .probe_timing = TIMING_ZERO,
+ .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (mx29f002.c) */
.block_erasers =
{
{
-- .eraseblocks = { {64 * 1024, 8} },
+- .eraseblocks = { {64 * 1024, 16} },
+ .eraseblocks = {
+ {16 * 1024, 1},
+ {8 * 1024, 2},
@@ -5679,23 +5799,23 @@ index 10c0989..c9cae79 100644
+ },
.block_erase = erase_sector_jedec,
}, {
-- .eraseblocks = { {512 * 1024, 1} },
+- .eraseblocks = { {1024 * 1024, 1} },
+ .eraseblocks = { {256 * 1024, 1} },
.block_erase = erase_chip_block_jedec,
},
},
-@@ -197,24 +919,29 @@ struct flashchip flashchips[] = {
+@@ -223,24 +919,29 @@ struct flashchip flashchips[] = {
},
{
- .vendor = "AMD",
-- .name = "Am29F080B",
+- .name = "Am29LV040B",
+ .vendor = "AMIC",
+ .name = "A29002T",
.bustype = CHIP_BUSTYPE_PARALLEL,
- .manufacture_id = AMD_ID,
-- .model_id = AM_29F080B,
-- .total_size = 1024,
+- .model_id = AM_29LV040B,
+- .total_size = 512,
+ .manufacture_id = AMIC_ID_NOPREFIX,
+ .model_id = AMIC_A29002T,
+ .total_size = 256,
@@ -5704,12 +5824,12 @@ index 10c0989..c9cae79 100644
- .tested = TEST_UNTESTED,
+ .tested = TEST_OK_PRW,
.probe = probe_jedec,
-- .probe_timing = TIMING_ZERO,
+- .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (am29f040b.c) */
+ .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (mx29f002.c) */
.block_erasers =
{
{
-- .eraseblocks = { {64 * 1024, 16} },
+- .eraseblocks = { {64 * 1024, 8} },
+ .eraseblocks = {
+ {64 * 1024, 3},
+ {32 * 1024, 1},
@@ -5718,78 +5838,104 @@ index 10c0989..c9cae79 100644
+ },
.block_erase = erase_sector_jedec,
}, {
-- .eraseblocks = { {1024 * 1024, 1} },
+- .eraseblocks = { {512 * 1024, 1} },
+ .eraseblocks = { {256 * 1024, 1} },
.block_erase = erase_chip_block_jedec,
},
},
-@@ -223,11 +950,11 @@ struct flashchip flashchips[] = {
+@@ -249,12 +950,12 @@ struct flashchip flashchips[] = {
},
{
- .vendor = "AMD",
-- .name = "Am29LV040B",
+- .name = "Am29LV081B",
+ .vendor = "AMIC",
+ .name = "A29040B",
.bustype = CHIP_BUSTYPE_PARALLEL,
- .manufacture_id = AMD_ID,
-- .model_id = AM_29LV040B,
+- .model_id = AM_29LV080B,
+- .total_size = 1024,
+ .manufacture_id = AMIC_ID_NOPREFIX,
+ .model_id = AMIC_A29040B,
- .total_size = 512,
++ .total_size = 512,
.page_size = 64 * 1024,
.feature_bits = FEATURE_ADDR_2AA | FEATURE_SHORT_RESET,
-@@ -249,27 +976,28 @@ struct flashchip flashchips[] = {
+ .tested = TEST_UNTESTED,
+@@ -263,10 +964,10 @@ struct flashchip flashchips[] = {
+ .block_erasers =
+ {
+ {
+- .eraseblocks = { {64 * 1024, 16} },
++ .eraseblocks = { {64 * 1024, 8} },
+ .block_erase = erase_sector_jedec,
+ }, {
+- .eraseblocks = { {1024 * 1024, 1} },
++ .eraseblocks = { {512 * 1024, 1} },
+ .block_erase = erase_chip_block_jedec,
+ },
+ },
+@@ -275,33 +976,29 @@ struct flashchip flashchips[] = {
},
{
-- .vendor = "AMD",
-- .name = "Am29LV081B",
+- .vendor = "ASD",
+- .name = "AE49F2008",
- .bustype = CHIP_BUSTYPE_PARALLEL,
-- .manufacture_id = AMD_ID,
-- .model_id = AM_29LV080B,
-- .total_size = 1024,
+- .manufacture_id = ASD_ID,
+- .model_id = ASD_AE49F2008,
+- .total_size = 256,
+- .page_size = 128,
+- .feature_bits = FEATURE_EITHER_RESET,
+- .tested = TEST_UNTESTED,
+ .vendor = "AMIC",
+ .name = "A49LF040A",
+ .bustype = CHIP_BUSTYPE_LPC,
+ .manufacture_id = AMIC_ID_NOPREFIX,
+ .model_id = AMIC_A49LF040A,
+ .total_size = 512,
- .page_size = 64 * 1024,
-- .feature_bits = FEATURE_ADDR_2AA | FEATURE_SHORT_RESET,
-- .tested = TEST_UNTESTED,
++ .page_size = 64 * 1024,
+ .feature_bits = FEATURE_REGISTERMAP | FEATURE_EITHER_RESET,
+ .tested = TEST_OK_PREW,
.probe = probe_jedec,
-- .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (am29f040b.c) */
+- .probe_timing = TIMING_FIXME,
+ .probe_timing = TIMING_ZERO, /* routine is wrapper to probe_jedec (pm49fl00x.c) */
.block_erasers =
{
{
-- .eraseblocks = { {64 * 1024, 16} },
+- .eraseblocks = {
+- {128 * 1024, 1},
+- {96 * 1024, 1},
+- {8 * 1024, 2},
+- {16 * 1024, 1},
+- },
- .block_erase = erase_sector_jedec,
+ .eraseblocks = { {64 * 1024, 8} },
+ .block_erase = erase_block_jedec,
}, {
-- .eraseblocks = { {1024 * 1024, 1} },
+- .eraseblocks = { {256 * 1024, 1} },
+ .eraseblocks = { {512 * 1024, 1} },
.block_erase = erase_chip_block_jedec,
-- },
-+ }
+ }
},
+- .write = write_jedec,
+ .unlock = unlock_49fl00x,
- .write = write_jedec_1,
++ .write = write_jedec_1,
.read = read_memmapped,
},
-@@ -313,6 +1041,7 @@ struct flashchip flashchips[] = {
- .model_id = AT_25DF021,
+
+@@ -310,9 +1007,10 @@ struct flashchip flashchips[] = {
+ .name = "AT25DF021",
+ .bustype = CHIP_BUSTYPE_SPI,
+ .manufacture_id = ATMEL_ID,
+- .model_id = AT_25DF021,
++ .model_id = ATMEL_AT25DF021,
.total_size = 256,
.page_size = 256,
+ .feature_bits = FEATURE_WRSR_WREN,
.tested = TEST_UNTESTED,
.probe = probe_spi_rdid,
.probe_timing = TIMING_ZERO,
-@@ -335,6 +1064,8 @@ struct flashchip flashchips[] = {
+@@ -335,6 +1033,8 @@ struct flashchip flashchips[] = {
.block_erase = spi_block_erase_c7,
}
},
@@ -5798,15 +5944,19 @@ index 10c0989..c9cae79 100644
.write = spi_chip_write_256,
.read = spi_chip_read,
},
-@@ -347,6 +1078,7 @@ struct flashchip flashchips[] = {
- .model_id = AT_25DF041A,
- .total_size = 512,
+@@ -344,9 +1044,10 @@ struct flashchip flashchips[] = {
+ .name = "AT25DF041A",
+ .bustype = CHIP_BUSTYPE_SPI,
+ .manufacture_id = ATMEL_ID,
+- .model_id = AT_25DF041A,
++ .model_id = ATMEL_AT25DF041A,
+ .total_size = 512,
.page_size = 256,
+ .feature_bits = FEATURE_WRSR_WREN,
.tested = TEST_UNTESTED,
.probe = probe_spi_rdid,
.probe_timing = TIMING_ZERO,
-@@ -369,6 +1101,8 @@ struct flashchip flashchips[] = {
+@@ -369,6 +1070,8 @@ struct flashchip flashchips[] = {
.block_erase = spi_block_erase_c7,
}
},
@@ -5815,10 +5965,14 @@ index 10c0989..c9cae79 100644
.write = spi_chip_write_256,
.read = spi_chip_read,
},
-@@ -381,6 +1115,44 @@ struct flashchip flashchips[] = {
- .model_id = AT_25DF081,
- .total_size = 1024,
- .page_size = 256,
+@@ -378,9 +1081,47 @@ struct flashchip flashchips[] = {
+ .name = "AT25DF081",
+ .bustype = CHIP_BUSTYPE_SPI,
+ .manufacture_id = ATMEL_ID,
+- .model_id = AT_25DF081,
++ .model_id = ATMEL_AT25DF081,
++ .total_size = 1024,
++ .page_size = 256,
+ .feature_bits = FEATURE_WRSR_WREN,
+ .tested = TEST_UNTESTED,
+ .probe = probe_spi_rdid,
@@ -5853,14 +6007,14 @@ index 10c0989..c9cae79 100644
+ .name = "AT25DF081A",
+ .bustype = CHIP_BUSTYPE_SPI,
+ .manufacture_id = ATMEL_ID,
-+ .model_id = AT_25DF081A,
-+ .total_size = 1024,
-+ .page_size = 256,
++ .model_id = ATMEL_AT25DF081A,
+ .total_size = 1024,
+ .page_size = 256,
+ .feature_bits = FEATURE_WRSR_WREN,
.tested = TEST_UNTESTED,
.probe = probe_spi_rdid,
.probe_timing = TIMING_ZERO,
-@@ -403,6 +1175,8 @@ struct flashchip flashchips[] = {
+@@ -403,6 +1144,8 @@ struct flashchip flashchips[] = {
.block_erase = spi_block_erase_c7,
}
},
@@ -5869,15 +6023,19 @@ index 10c0989..c9cae79 100644
.write = spi_chip_write_256,
.read = spi_chip_read,
},
-@@ -415,6 +1189,7 @@ struct flashchip flashchips[] = {
- .model_id = AT_25DF161,
+@@ -412,9 +1155,10 @@ struct flashchip flashchips[] = {
+ .name = "AT25DF161",
+ .bustype = CHIP_BUSTYPE_SPI,
+ .manufacture_id = ATMEL_ID,
+- .model_id = AT_25DF161,
++ .model_id = ATMEL_AT25DF161,
.total_size = 2048,
.page_size = 256,
+ .feature_bits = FEATURE_WRSR_WREN,
.tested = TEST_UNTESTED,
.probe = probe_spi_rdid,
.probe_timing = TIMING_ZERO,
-@@ -437,6 +1212,8 @@ struct flashchip flashchips[] = {
+@@ -437,6 +1181,8 @@ struct flashchip flashchips[] = {
.block_erase = spi_block_erase_c7,
}
},
@@ -5886,8 +6044,12 @@ index 10c0989..c9cae79 100644
.write = spi_chip_write_256,
.read = spi_chip_read,
},
-@@ -449,7 +1226,8 @@ struct flashchip flashchips[] = {
- .model_id = AT_25DF321,
+@@ -446,10 +1192,11 @@ struct flashchip flashchips[] = {
+ .name = "AT25DF321",
+ .bustype = CHIP_BUSTYPE_SPI,
+ .manufacture_id = ATMEL_ID,
+- .model_id = AT_25DF321,
++ .model_id = ATMEL_AT25DF321,
.total_size = 4096,
.page_size = 256,
- .tested = TEST_OK_PRW,
@@ -5896,7 +6058,7 @@ index 10c0989..c9cae79 100644
.probe = probe_spi_rdid,
.probe_timing = TIMING_ZERO,
.block_erasers =
-@@ -471,6 +1249,8 @@ struct flashchip flashchips[] = {
+@@ -471,6 +1218,8 @@ struct flashchip flashchips[] = {
.block_erase = spi_block_erase_c7,
}
},
@@ -5905,15 +6067,19 @@ index 10c0989..c9cae79 100644
.write = spi_chip_write_256,
.read = spi_chip_read,
},
-@@ -483,6 +1263,7 @@ struct flashchip flashchips[] = {
- .model_id = AT_25DF321A,
+@@ -480,9 +1229,10 @@ struct flashchip flashchips[] = {
+ .name = "AT25DF321A",
+ .bustype = CHIP_BUSTYPE_SPI,
+ .manufacture_id = ATMEL_ID,
+- .model_id = AT_25DF321A,
++ .model_id = ATMEL_AT25DF321A,
.total_size = 4096,
.page_size = 256,
+ .feature_bits = FEATURE_WRSR_WREN,
.tested = TEST_UNTESTED,
.probe = probe_spi_rdid,
.probe_timing = TIMING_ZERO,
-@@ -505,6 +1286,8 @@ struct flashchip flashchips[] = {
+@@ -505,6 +1255,8 @@ struct flashchip flashchips[] = {
.block_erase = spi_block_erase_c7,
}
},
@@ -5922,15 +6088,19 @@ index 10c0989..c9cae79 100644
.write = spi_chip_write_256,
.read = spi_chip_read,
},
-@@ -517,6 +1300,7 @@ struct flashchip flashchips[] = {
- .model_id = AT_25DF641,
+@@ -514,9 +1266,10 @@ struct flashchip flashchips[] = {
+ .name = "AT25DF641",
+ .bustype = CHIP_BUSTYPE_SPI,
+ .manufacture_id = ATMEL_ID,
+- .model_id = AT_25DF641,
++ .model_id = ATMEL_AT25DF641,
.total_size = 8192,
.page_size = 256,
+ .feature_bits = FEATURE_WRSR_WREN,
.tested = TEST_UNTESTED,
.probe = probe_spi_rdid,
.probe_timing = TIMING_ZERO,
-@@ -539,6 +1323,45 @@ struct flashchip flashchips[] = {
+@@ -539,6 +1292,45 @@ struct flashchip flashchips[] = {
.block_erase = spi_block_erase_c7,
}
},
@@ -5945,7 +6115,7 @@ index 10c0989..c9cae79 100644
+ .name = "AT25DQ161",
+ .bustype = CHIP_BUSTYPE_SPI,
+ .manufacture_id = ATMEL_ID,
-+ .model_id = AT_25DQ161,
++ .model_id = ATMEL_AT25DQ161,
+ .total_size = 2048,
+ .page_size = 256,
+ .feature_bits = FEATURE_WRSR_WREN,
@@ -5976,15 +6146,19 @@ index 10c0989..c9cae79 100644
.write = spi_chip_write_256,
.read = spi_chip_read,
},
-@@ -551,6 +1374,7 @@ struct flashchip flashchips[] = {
- .model_id = AT_25F512B,
+@@ -548,9 +1340,10 @@ struct flashchip flashchips[] = {
+ .name = "AT25F512B",
+ .bustype = CHIP_BUSTYPE_SPI,
+ .manufacture_id = ATMEL_ID,
+- .model_id = AT_25F512B,
++ .model_id = ATMEL_AT25F512B,
.total_size = 64,
.page_size = 256,
+ .feature_bits = FEATURE_WRSR_WREN,
.tested = TEST_UNTESTED,
.probe = probe_spi_rdid,
.probe_timing = TIMING_ZERO,
-@@ -573,6 +1397,8 @@ struct flashchip flashchips[] = {
+@@ -573,6 +1366,8 @@ struct flashchip flashchips[] = {
.block_erase = spi_block_erase_c7,
}
},
@@ -5993,7 +6167,16 @@ index 10c0989..c9cae79 100644
.write = spi_chip_write_256,
.read = spi_chip_read,
},
-@@ -594,6 +1420,9 @@ struct flashchip flashchips[] = {
+@@ -582,7 +1377,7 @@ struct flashchip flashchips[] = {
+ .name = "AT25FS010",
+ .bustype = CHIP_BUSTYPE_SPI,
+ .manufacture_id = ATMEL_ID,
+- .model_id = AT_25FS010,
++ .model_id = ATMEL_AT25FS010,
+ .total_size = 128,
+ .page_size = 256,
+ .tested = TEST_UNTESTED,
+@@ -594,6 +1389,9 @@ struct flashchip flashchips[] = {
.eraseblocks = { {4 * 1024, 32} },
.block_erase = spi_block_erase_20,
}, {
@@ -6003,7 +6186,7 @@ index 10c0989..c9cae79 100644
.eraseblocks = { {32 * 1024, 4} },
.block_erase = spi_block_erase_52,
}, {
-@@ -607,6 +1436,8 @@ struct flashchip flashchips[] = {
+@@ -607,6 +1405,8 @@ struct flashchip flashchips[] = {
.block_erase = spi_block_erase_c7,
}
},
@@ -6012,7 +6195,16 @@ index 10c0989..c9cae79 100644
.write = spi_chip_write_256,
.read = spi_chip_read,
},
-@@ -641,6 +1472,8 @@ struct flashchip flashchips[] = {
+@@ -616,7 +1416,7 @@ struct flashchip flashchips[] = {
+ .name = "AT25FS040",
+ .bustype = CHIP_BUSTYPE_SPI,
+ .manufacture_id = ATMEL_ID,
+- .model_id = AT_25FS040,
++ .model_id = ATMEL_AT25FS040,
+ .total_size = 512,
+ .page_size = 256,
+ .tested = TEST_UNTESTED,
+@@ -641,6 +1441,8 @@ struct flashchip flashchips[] = {
.block_erase = spi_block_erase_c7,
}
},
@@ -6021,8 +6213,21 @@ index 10c0989..c9cae79 100644
.write = spi_chip_write_256,
.read = spi_chip_read,
},
-@@ -675,7 +1508,7 @@ struct flashchip flashchips[] = {
- .model_id = AT_26DF081A,
+@@ -650,7 +1452,7 @@ struct flashchip flashchips[] = {
+ .name = "AT26DF041",
+ .bustype = CHIP_BUSTYPE_SPI,
+ .manufacture_id = ATMEL_ID,
+- .model_id = AT_26DF041,
++ .model_id = ATMEL_AT26DF041,
+ .total_size = 512,
+ .page_size = 256,
+ .tested = TEST_UNTESTED,
+@@ -672,10 +1474,10 @@ struct flashchip flashchips[] = {
+ .name = "AT26DF081A",
+ .bustype = CHIP_BUSTYPE_SPI,
+ .manufacture_id = ATMEL_ID,
+- .model_id = AT_26DF081A,
++ .model_id = ATMEL_AT26DF081A,
.total_size = 1024,
.page_size = 256,
- .tested = TEST_UNTESTED,
@@ -6030,7 +6235,7 @@ index 10c0989..c9cae79 100644
.probe = probe_spi_rdid,
.probe_timing = TIMING_ZERO,
.block_erasers =
-@@ -697,6 +1530,7 @@ struct flashchip flashchips[] = {
+@@ -697,6 +1499,7 @@ struct flashchip flashchips[] = {
.block_erase = spi_block_erase_c7,
}
},
@@ -6038,7 +6243,16 @@ index 10c0989..c9cae79 100644
.write = spi_chip_write_256,
.read = spi_chip_read,
},
-@@ -731,6 +1565,7 @@ struct flashchip flashchips[] = {
+@@ -706,7 +1509,7 @@ struct flashchip flashchips[] = {
+ .name = "AT26DF161",
+ .bustype = CHIP_BUSTYPE_SPI,
+ .manufacture_id = ATMEL_ID,
+- .model_id = AT_26DF161,
++ .model_id = ATMEL_AT26DF161,
+ .total_size = 2048,
+ .page_size = 256,
+ .tested = TEST_UNTESTED,
+@@ -731,6 +1534,7 @@ struct flashchip flashchips[] = {
.block_erase = spi_block_erase_c7,
}
},
@@ -6046,7 +6260,16 @@ index 10c0989..c9cae79 100644
.write = spi_chip_write_256,
.read = spi_chip_read,
},
-@@ -765,6 +1600,7 @@ struct flashchip flashchips[] = {
+@@ -740,7 +1544,7 @@ struct flashchip flashchips[] = {
+ .name = "AT26DF161A",
+ .bustype = CHIP_BUSTYPE_SPI,
+ .manufacture_id = ATMEL_ID,
+- .model_id = AT_26DF161A,
++ .model_id = ATMEL_AT26DF161A,
+ .total_size = 2048,
+ .page_size = 256,
+ .tested = TEST_UNTESTED,
+@@ -765,6 +1569,7 @@ struct flashchip flashchips[] = {
.block_erase = spi_block_erase_c7,
}
},
@@ -6054,7 +6277,14 @@ index 10c0989..c9cae79 100644
.write = spi_chip_write_256,
.read = spi_chip_read,
},
-@@ -781,6 +1617,7 @@ struct flashchip flashchips[] = {
+@@ -775,12 +1580,13 @@ struct flashchip flashchips[] = {
+ .name = "AT26DF321",
+ .bustype = CHIP_BUSTYPE_SPI,
+ .manufacture_id = ATMEL_ID,
+- .model_id = AT_26DF321,
++ .model_id = ATMEL_AT26DF321,
+ .total_size = 4096,
+ .page_size = 256,
.tested = TEST_UNTESTED,
.probe = probe_spi_rdid,
.probe_timing = TIMING_ZERO,
@@ -6062,7 +6292,41 @@ index 10c0989..c9cae79 100644
.write = spi_chip_write_256,
.read = spi_chip_read,
},*/
-@@ -877,7 +1714,7 @@ struct flashchip flashchips[] = {
+@@ -790,7 +1596,7 @@ struct flashchip flashchips[] = {
+ .name = "AT26F004",
+ .bustype = CHIP_BUSTYPE_SPI,
+ .manufacture_id = ATMEL_ID,
+- .model_id = AT_26F004,
++ .model_id = ATMEL_AT26F004,
+ .total_size = 512,
+ .page_size = 256,
+ .tested = TEST_UNTESTED,
+@@ -824,7 +1630,7 @@ struct flashchip flashchips[] = {
+ .name = "AT29C512",
+ .bustype = CHIP_BUSTYPE_PARALLEL,
+ .manufacture_id = ATMEL_ID,
+- .model_id = AT_29C512,
++ .model_id = ATMEL_AT29C512,
+ .total_size = 64,
+ .page_size = 128,
+ .feature_bits = FEATURE_LONG_RESET,
+@@ -848,7 +1654,7 @@ struct flashchip flashchips[] = {
+ .name = "AT29C010A",
+ .bustype = CHIP_BUSTYPE_PARALLEL,
+ .manufacture_id = ATMEL_ID,
+- .model_id = AT_29C010A,
++ .model_id = ATMEL_AT29C010A,
+ .total_size = 128,
+ .page_size = 128,
+ .feature_bits = FEATURE_LONG_RESET,
+@@ -871,13 +1677,13 @@ struct flashchip flashchips[] = {
+ .name = "AT29C020",
+ .bustype = CHIP_BUSTYPE_PARALLEL,
+ .manufacture_id = ATMEL_ID,
+- .model_id = AT_29C020,
++ .model_id = ATMEL_AT29C020,
+ .total_size = 256,
+ .page_size = 256,
.feature_bits = FEATURE_LONG_RESET,
.tested = TEST_UNTESTED,
.probe = probe_jedec,
@@ -6071,60 +6335,181 @@ index 10c0989..c9cae79 100644
.block_erasers =
{
{
-@@ -1049,20 +1886,43 @@ struct flashchip flashchips[] = {
-
- {
- .vendor = "Atmel",
-- .name = "AT49BV512",
-+ .name = "AT49BV512",
-+ .bustype = CHIP_BUSTYPE_PARALLEL,
-+ .manufacture_id = ATMEL_ID,
-+ .model_id = AT_49BV512,
-+ .total_size = 64,
-+ .page_size = 64,
-+ .feature_bits = FEATURE_EITHER_RESET,
-+ .tested = TEST_UNTESTED,
-+ .probe = probe_jedec,
-+ .probe_timing = TIMING_ZERO, /* Datasheet has no timing info specified */
-+ .block_erasers =
-+ {
-+ {
-+ .eraseblocks = { {64 * 1024, 1} },
-+ .block_erase = erase_chip_block_jedec,
-+ }
-+ },
-+ .write = write_jedec_1,
-+ .read = read_memmapped,
-+ },
-+
-+ {
-+ .vendor = "Atmel",
-+ .name = "AT49F020",
+@@ -894,7 +1700,7 @@ struct flashchip flashchips[] = {
+ .name = "AT29C040A",
+ .bustype = CHIP_BUSTYPE_PARALLEL,
+ .manufacture_id = ATMEL_ID,
+- .model_id = AT_29C040A,
++ .model_id = ATMEL_AT29C040A,
+ .total_size = 512,
+ .page_size = 256,
+ .feature_bits = FEATURE_LONG_RESET,
+@@ -917,7 +1723,7 @@ struct flashchip flashchips[] = {
+ .name = "AT45CS1282",
+ .bustype = CHIP_BUSTYPE_SPI,
+ .manufacture_id = ATMEL_ID,
+- .model_id = AT_45CS1282,
++ .model_id = ATMEL_AT45CS1282,
+ .total_size = 16896 /* No power of two sizes */,
+ .page_size = 1056 /* No power of two sizes */,
+ .tested = TEST_BAD_READ,
+@@ -932,7 +1738,7 @@ struct flashchip flashchips[] = {
+ .name = "AT45DB011D",
+ .bustype = CHIP_BUSTYPE_SPI,
+ .manufacture_id = ATMEL_ID,
+- .model_id = AT_45DB011D,
++ .model_id = ATMEL_AT45DB011D,
+ .total_size = 128 /* Size can only be determined from status register */,
+ .page_size = 256 /* Size can only be determined from status register */,
+ .tested = TEST_BAD_READ,
+@@ -947,7 +1753,7 @@ struct flashchip flashchips[] = {
+ .name = "AT45DB021D",
+ .bustype = CHIP_BUSTYPE_SPI,
+ .manufacture_id = ATMEL_ID,
+- .model_id = AT_45DB021D,
++ .model_id = ATMEL_AT45DB021D,
+ .total_size = 256 /* Size can only be determined from status register */,
+ .page_size = 256 /* Size can only be determined from status register */,
+ .tested = TEST_BAD_READ,
+@@ -962,7 +1768,7 @@ struct flashchip flashchips[] = {
+ .name = "AT45DB041D",
+ .bustype = CHIP_BUSTYPE_SPI,
+ .manufacture_id = ATMEL_ID,
+- .model_id = AT_45DB041D,
++ .model_id = ATMEL_AT45DB041D,
+ .total_size = 512 /* Size can only be determined from status register */,
+ .page_size = 256 /* Size can only be determined from status register */,
+ .tested = TEST_BAD_READ,
+@@ -977,7 +1783,7 @@ struct flashchip flashchips[] = {
+ .name = "AT45DB081D",
+ .bustype = CHIP_BUSTYPE_SPI,
+ .manufacture_id = ATMEL_ID,
+- .model_id = AT_45DB081D,
++ .model_id = ATMEL_AT45DB081D,
+ .total_size = 1024 /* Size can only be determined from status register */,
+ .page_size = 256 /* Size can only be determined from status register */,
+ .tested = TEST_BAD_READ,
+@@ -992,7 +1798,7 @@ struct flashchip flashchips[] = {
+ .name = "AT45DB161D",
+ .bustype = CHIP_BUSTYPE_SPI,
+ .manufacture_id = ATMEL_ID,
+- .model_id = AT_45DB161D,
++ .model_id = ATMEL_AT45DB161D,
+ .total_size = 2048 /* Size can only be determined from status register */,
+ .page_size = 512 /* Size can only be determined from status register */,
+ .tested = TEST_BAD_READ,
+@@ -1007,7 +1813,7 @@ struct flashchip flashchips[] = {
+ .name = "AT45DB321C",
+ .bustype = CHIP_BUSTYPE_SPI,
+ .manufacture_id = ATMEL_ID,
+- .model_id = AT_45DB321C,
++ .model_id = ATMEL_AT45DB321C,
+ .total_size = 4224 /* No power of two sizes */,
+ .page_size = 528 /* No power of two sizes */,
+ .tested = TEST_BAD_READ,
+@@ -1022,7 +1828,7 @@ struct flashchip flashchips[] = {
+ .name = "AT45DB321D",
+ .bustype = CHIP_BUSTYPE_SPI,
+ .manufacture_id = ATMEL_ID,
+- .model_id = AT_45DB321D,
++ .model_id = ATMEL_AT45DB321D,
+ .total_size = 4096 /* Size can only be determined from status register */,
+ .page_size = 512 /* Size can only be determined from status register */,
+ .tested = TEST_BAD_READ,
+@@ -1037,7 +1843,7 @@ struct flashchip flashchips[] = {
+ .name = "AT45DB642D",
+ .bustype = CHIP_BUSTYPE_SPI,
+ .manufacture_id = ATMEL_ID,
+- .model_id = AT_45DB642D,
++ .model_id = ATMEL_AT45DB642D,
+ .total_size = 8192 /* Size can only be determined from status register */,
+ .page_size = 1024 /* Size can only be determined from status register */,
+ .tested = TEST_BAD_READ,
+@@ -1052,199 +1858,96 @@ struct flashchip flashchips[] = {
+ .name = "AT49BV512",
.bustype = CHIP_BUSTYPE_PARALLEL,
.manufacture_id = ATMEL_ID,
- .model_id = AT_49BV512,
-- .total_size = 64,
++ .model_id = ATMEL_AT49BV512,
+ .total_size = 64,
- .page_size = 64,
-+ .model_id = AT_49F020,
-+ .total_size = 256,
-+ .page_size = 256,
- .feature_bits = FEATURE_EITHER_RESET,
+- .feature_bits = FEATURE_EITHER_RESET,
- .tested = TEST_UNTESTED,
-+ .tested = TEST_OK_PREW,
- .probe = probe_jedec,
- .probe_timing = TIMING_ZERO, /* Datasheet has no timing info specified */
- .block_erasers =
- {
- {
+- .probe = probe_jedec,
+- .probe_timing = TIMING_ZERO, /* Datasheet has no timing info specified */
+- .block_erasers =
+- {
+- {
- .eraseblocks = { {64 * 1024, 1} },
-+ .eraseblocks = { {256 * 1024, 1} },
- .block_erase = erase_chip_block_jedec,
- }
- },
-@@ -1132,119 +1992,24 @@ struct flashchip flashchips[] = {
- .read = read_memmapped,
- },
-
+- .block_erase = erase_chip_block_jedec,
+- }
+- },
+- .write = write_jedec_1,
+- .read = read_memmapped,
+- },
+-
+- {
+- .vendor = "Atmel",
+- .name = "AT49F002(N)",
+- .bustype = CHIP_BUSTYPE_PARALLEL,
+- .manufacture_id = ATMEL_ID,
+- .model_id = AT_49F002N,
+- .total_size = 256,
+- .page_size = 256,
+- .feature_bits = FEATURE_EITHER_RESET,
+- .tested = TEST_UNTESTED,
+- .probe = probe_jedec,
+- .probe_timing = TIMING_ZERO, /* Datasheet has no timing info specified */
+- .block_erasers =
+- {
+- {
+- .eraseblocks = {
+- {16 * 1024, 1},
+- {8 * 1024, 2},
+- {96 * 1024, 1},
+- {128 * 1024, 1},
+- },
+- .block_erase = erase_sector_jedec,
+- }, {
+- .eraseblocks = { {256 * 1024, 1} },
+- .block_erase = erase_chip_block_jedec,
+- }
+- },
+- .write = write_jedec_1,
+- .read = read_memmapped,
+- },
+-
+- {
+- .vendor = "Atmel",
+- .name = "AT49F002(N)T",
+- .bustype = CHIP_BUSTYPE_PARALLEL,
+- .manufacture_id = ATMEL_ID,
+- .model_id = AT_49F002NT,
+- .total_size = 256,
+- .page_size = 256,
+- .feature_bits = FEATURE_EITHER_RESET,
+- .tested = TEST_OK_PRW,
+- .probe = probe_jedec,
+- .probe_timing = TIMING_ZERO, /* Datasheet has no timing info specified */
+- .block_erasers =
+- {
+- {
+- .eraseblocks = {
+- {128 * 1024, 1},
+- {96 * 1024, 1},
+- {8 * 1024, 2},
+- {16 * 1024, 1},
+- },
+- .block_erase = erase_sector_jedec,
+- }, {
+- .eraseblocks = { {256 * 1024, 1} },
+- .block_erase = erase_chip_block_jedec,
+- }
+- },
+- .write = write_jedec_1,
+- .read = read_memmapped,
+- },
+-
- /* The next two chip definitions have top/bottom boot blocks, but has no
- device differentiation between the two */
- {
@@ -6152,26 +6537,48 @@ index 10c0989..c9cae79 100644
- }, {
- .eraseblocks = { {512 * 1024, 1} },
- .block_erase = spi_block_erase_c7,
-- }
-- },
++ .page_size = 64,
++ .feature_bits = FEATURE_EITHER_RESET,
++ .tested = TEST_UNTESTED,
++ .probe = probe_jedec,
++ .probe_timing = TIMING_ZERO, /* Datasheet has no timing info specified */
++ .block_erasers =
++ {
++ {
++ .eraseblocks = { {64 * 1024, 1} },
++ .block_erase = erase_chip_block_jedec,
+ }
+ },
- .write = spi_chip_write_256,
- .read = spi_chip_read,
-- },
--
-- {
++ .write = write_jedec_1,
++ .read = read_memmapped,
+ },
+
+ {
- .vendor = "AMIC",
- .name = "A25L40PU",
- .bustype = CHIP_BUSTYPE_SPI,
- .manufacture_id = AMIC_ID,
- .model_id = AMIC_A25L40P,
- .total_size = 512,
-- .page_size = 256,
++ .vendor = "Atmel",
++ .name = "AT49F020",
++ .bustype = CHIP_BUSTYPE_PARALLEL,
++ .manufacture_id = ATMEL_ID,
++ .model_id = ATMEL_AT49F020,
++ .total_size = 256,
+ .page_size = 256,
- .tested = TEST_OK_PRW,
- .probe = probe_spi_rdid4,
- .probe_timing = TIMING_ZERO,
-- .block_erasers =
-- {
-- {
++ .feature_bits = FEATURE_EITHER_RESET,
++ .tested = TEST_OK_PREW,
++ .probe = probe_jedec,
++ .probe_timing = TIMING_ZERO, /* Datasheet has no timing info specified */
+ .block_erasers =
+ {
+ {
- .eraseblocks = {
- {4 * 1024, 2},
- {8 * 1024, 1},
@@ -6183,110 +6590,126 @@ index 10c0989..c9cae79 100644
- }, {
- .eraseblocks = { {512 * 1024, 1} },
- .block_erase = spi_block_erase_c7,
-- }
-- },
++ .eraseblocks = { {256 * 1024, 1} },
++ .block_erase = erase_chip_block_jedec,
+ }
+ },
- .write = spi_chip_write_256,
- .read = spi_chip_read,
-- },
--
++ .write = write_jedec_1,
++ .read = read_memmapped,
+ },
+
{
- .vendor = "AMIC",
- .name = "A29002B",
-+ .vendor = "EMST",
-+ .name = "F49B002UA",
++ .vendor = "Atmel",
++ .name = "AT49F002(N)",
.bustype = CHIP_BUSTYPE_PARALLEL,
- .manufacture_id = AMIC_ID_NOPREFIX,
- .model_id = AMIC_A29002B,
-+ .manufacture_id = EMST_ID,
-+ .model_id = EMST_F49B002UA,
++ .manufacture_id = ATMEL_ID,
++ .model_id = ATMEL_AT49F002N,
.total_size = 256,
- .page_size = 64 * 1024,
- .feature_bits = FEATURE_ADDR_2AA | FEATURE_SHORT_RESET,
-+ .page_size = 4096,
++ .page_size = 256,
+ .feature_bits = FEATURE_EITHER_RESET,
.tested = TEST_UNTESTED,
.probe = probe_jedec,
- .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (mx29f002.c) */
-- .block_erasers =
-- {
-- {
++ .probe_timing = TIMING_ZERO, /* Datasheet has no timing info specified */
+ .block_erasers =
+ {
+ {
- .eraseblocks = {
-- {16 * 1024, 1},
-- {8 * 1024, 2},
++ .eraseblocks = {
+ {16 * 1024, 1},
+ {8 * 1024, 2},
- {32 * 1024, 1},
- {64 * 1024, 3},
-- },
-- .block_erase = erase_sector_jedec,
-- }, {
-- .eraseblocks = { {256 * 1024, 1} },
-- .block_erase = erase_chip_block_jedec,
++ {96 * 1024, 1},
++ {128 * 1024, 1},
+ },
+ .block_erase = erase_sector_jedec,
+ }, {
+ .eraseblocks = { {256 * 1024, 1} },
+ .block_erase = erase_chip_block_jedec,
- },
-- },
-- .write = write_jedec_1,
-- .read = read_memmapped,
-- },
--
-- {
++ }
+ },
+ .write = write_jedec_1,
+ .read = read_memmapped,
+ },
+
+ {
- .vendor = "AMIC",
- .name = "A29002T",
-- .bustype = CHIP_BUSTYPE_PARALLEL,
++ .vendor = "Atmel",
++ .name = "AT49F002(N)T",
+ .bustype = CHIP_BUSTYPE_PARALLEL,
- .manufacture_id = AMIC_ID_NOPREFIX,
- .model_id = AMIC_A29002T,
-- .total_size = 256,
++ .manufacture_id = ATMEL_ID,
++ .model_id = ATMEL_AT49F002NT,
+ .total_size = 256,
- .page_size = 64 * 1024,
- .feature_bits = FEATURE_ADDR_2AA | FEATURE_SHORT_RESET,
-- .tested = TEST_OK_PRW,
-- .probe = probe_jedec,
++ .page_size = 256,
++ .feature_bits = FEATURE_EITHER_RESET,
+ .tested = TEST_OK_PRW,
+ .probe = probe_jedec,
- .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (mx29f002.c) */
+ .probe_timing = TIMING_ZERO, /* Datasheet has no timing info specified */
.block_erasers =
{
{
- .eraseblocks = {
+- .eraseblocks = {
- {64 * 1024, 3},
- {32 * 1024, 1},
++ .eraseblocks = {
+ {128 * 1024, 1},
+ {96 * 1024, 1},
{8 * 1024, 2},
{16 * 1024, 1},
},
-@@ -1252,94 +2017,42 @@ struct flashchip flashchips[] = {
+@@ -1252,24 +1955,24 @@ struct flashchip flashchips[] = {
}, {
.eraseblocks = { {256 * 1024, 1} },
.block_erase = erase_chip_block_jedec,
- },
-- },
-- .write = write_jedec_1,
-- .read = read_memmapped,
-- },
--
-- {
++ }
+ },
+ .write = write_jedec_1,
+ .read = read_memmapped,
+ },
+
+ {
- .vendor = "AMIC",
- .name = "A29040B",
-- .bustype = CHIP_BUSTYPE_PARALLEL,
++ .vendor = "Bright",
++ .name = "BM29F040",
+ .bustype = CHIP_BUSTYPE_PARALLEL,
- .manufacture_id = AMIC_ID_NOPREFIX,
- .model_id = AMIC_A29040B,
-- .total_size = 512,
-- .page_size = 64 * 1024,
++ .manufacture_id = BRIGHT_ID,
++ .model_id = BRIGHT_BM29F040,
+ .total_size = 512,
+ .page_size = 64 * 1024,
- .feature_bits = FEATURE_ADDR_2AA | FEATURE_SHORT_RESET,
- .tested = TEST_UNTESTED,
-- .probe = probe_jedec,
++ .feature_bits = FEATURE_EITHER_RESET,
++ .tested = TEST_OK_PR,
+ .probe = probe_jedec,
- .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (am29f040b.c) */
-- .block_erasers =
-- {
-- {
-- .eraseblocks = { {64 * 1024, 8} },
-- .block_erase = erase_sector_jedec,
-- }, {
-- .eraseblocks = { {512 * 1024, 1} },
-- .block_erase = erase_chip_block_jedec,
-- },
-- },
-- .write = write_jedec_1,
-- .read = read_memmapped,
-- },
--
-- {
++ .probe_timing = TIMING_ZERO,
+ .block_erasers =
+ {
+ {
+@@ -1285,33 +1988,6 @@ struct flashchip flashchips[] = {
+ },
+
+ {
- .vendor = "AMIC",
- .name = "A49LF040A",
- .bustype = CHIP_BUSTYPE_LPC,
@@ -6306,47 +6729,37 @@ index 10c0989..c9cae79 100644
- }, {
- .eraseblocks = { {512 * 1024, 1} },
- .block_erase = erase_chip_block_jedec,
- }
- },
+- }
+- },
- .unlock = unlock_49fl00x,
- .write = write_jedec_1,
- .read = read_memmapped,
+- .write = write_jedec_1,
+- .read = read_memmapped,
+- },
+-
+- {
+ .vendor = "EMST",
+ .name = "F49B002UA",
+ .bustype = CHIP_BUSTYPE_PARALLEL,
+@@ -1343,11 +2019,43 @@ struct flashchip flashchips[] = {
},
{
- .vendor = "EMST",
-- .name = "F49B002UA",
-- .bustype = CHIP_BUSTYPE_PARALLEL,
++ .vendor = "EMST",
+ .name = "F25L008A",
+ .bustype = CHIP_BUSTYPE_SPI,
- .manufacture_id = EMST_ID,
-- .model_id = EMST_F49B002UA,
-- .total_size = 256,
-- .page_size = 4096,
-- .feature_bits = FEATURE_EITHER_RESET,
++ .manufacture_id = EMST_ID,
+ .model_id = EMST_F25L008A,
+ .total_size = 1024,
+ .page_size = 256,
- .tested = TEST_UNTESTED,
-- .probe = probe_jedec,
-- .probe_timing = TIMING_ZERO, /* Datasheet has no timing info specified */
++ .tested = TEST_UNTESTED,
+ .probe = probe_spi_rdid,
+ .probe_timing = TIMING_ZERO,
- .block_erasers =
- {
- {
-- .eraseblocks = {
-- {128 * 1024, 1},
-- {96 * 1024, 1},
-- {8 * 1024, 2},
-- {16 * 1024, 1},
-- },
-- .block_erase = erase_sector_jedec,
++ .block_erasers =
++ {
++ {
+ .eraseblocks = { {4 * 1024, 256} },
+ .block_erase = spi_block_erase_20,
- }, {
-- .eraseblocks = { {256 * 1024, 1} },
-- .block_erase = erase_chip_block_jedec,
++ }, {
+ .eraseblocks = { {64 * 1024, 16} },
+ .block_erase = spi_block_erase_d8,
+ }, {
@@ -6355,17 +6768,24 @@ index 10c0989..c9cae79 100644
+ }, {
+ .eraseblocks = { {1024 * 1024, 1} },
+ .block_erase = spi_block_erase_c7,
- }
- },
-- .write = write_jedec_1,
-- .read = read_memmapped,
++ }
++ },
+ .unlock = spi_disable_blockprotect,
+ .write = spi_chip_write_1,
+ .read = spi_chip_read,
- },
-
- {
-@@ -1368,6 +2081,7 @@ struct flashchip flashchips[] = {
++ },
++
++ {
+ .vendor = "Eon",
+ .name = "EN25B05",
+ .bustype = CHIP_BUSTYPE_SPI,
+ .manufacture_id = EON_ID_NOPREFIX,
+- .model_id = EN_25B05,
++ .model_id = EON_EN25B05,
+ .total_size = 64,
+ .page_size = 256,
+ .tested = TEST_UNTESTED,
+@@ -1368,6 +2076,7 @@ struct flashchip flashchips[] = {
.block_erase = spi_block_erase_c7,
}
},
@@ -6373,7 +6793,16 @@ index 10c0989..c9cae79 100644
.write = spi_chip_write_256,
.read = spi_chip_read,
},
-@@ -1398,6 +2112,7 @@ struct flashchip flashchips[] = {
+@@ -1377,7 +2086,7 @@ struct flashchip flashchips[] = {
+ .name = "EN25B05T",
+ .bustype = CHIP_BUSTYPE_SPI,
+ .manufacture_id = EON_ID_NOPREFIX,
+- .model_id = EN_25B05,
++ .model_id = EON_EN25B05,
+ .total_size = 64,
+ .page_size = 256,
+ .tested = TEST_UNTESTED,
+@@ -1398,6 +2107,7 @@ struct flashchip flashchips[] = {
.block_erase = spi_block_erase_c7,
}
},
@@ -6381,7 +6810,16 @@ index 10c0989..c9cae79 100644
.write = spi_chip_write_256,
.read = spi_chip_read,
},
-@@ -1428,6 +2143,7 @@ struct flashchip flashchips[] = {
+@@ -1407,7 +2117,7 @@ struct flashchip flashchips[] = {
+ .name = "EN25B10",
+ .bustype = CHIP_BUSTYPE_SPI,
+ .manufacture_id = EON_ID_NOPREFIX,
+- .model_id = EN_25B10,
++ .model_id = EON_EN25B10,
+ .total_size = 128,
+ .page_size = 256,
+ .tested = TEST_UNTESTED,
+@@ -1428,6 +2138,7 @@ struct flashchip flashchips[] = {
.block_erase = spi_block_erase_c7,
}
},
@@ -6389,7 +6827,16 @@ index 10c0989..c9cae79 100644
.write = spi_chip_write_256,
.read = spi_chip_read,
},
-@@ -1458,6 +2174,7 @@ struct flashchip flashchips[] = {
+@@ -1437,7 +2148,7 @@ struct flashchip flashchips[] = {
+ .name = "EN25B10T",
+ .bustype = CHIP_BUSTYPE_SPI,
+ .manufacture_id = EON_ID_NOPREFIX,
+- .model_id = EN_25B10,
++ .model_id = EON_EN25B10,
+ .total_size = 128,
+ .page_size = 256,
+ .tested = TEST_UNTESTED,
+@@ -1458,6 +2169,7 @@ struct flashchip flashchips[] = {
.block_erase = spi_block_erase_c7,
}
},
@@ -6397,7 +6844,16 @@ index 10c0989..c9cae79 100644
.write = spi_chip_write_256,
.read = spi_chip_read,
},
-@@ -1489,6 +2206,7 @@ struct flashchip flashchips[] = {
+@@ -1467,7 +2179,7 @@ struct flashchip flashchips[] = {
+ .name = "EN25B20",
+ .bustype = CHIP_BUSTYPE_SPI,
+ .manufacture_id = EON_ID_NOPREFIX,
+- .model_id = EN_25B20,
++ .model_id = EON_EN25B20,
+ .total_size = 256,
+ .page_size = 256,
+ .tested = TEST_UNTESTED,
+@@ -1489,6 +2201,7 @@ struct flashchip flashchips[] = {
.block_erase = spi_block_erase_c7,
}
},
@@ -6405,7 +6861,16 @@ index 10c0989..c9cae79 100644
.write = spi_chip_write_256,
.read = spi_chip_read,
},
-@@ -1520,6 +2238,7 @@ struct flashchip flashchips[] = {
+@@ -1498,7 +2211,7 @@ struct flashchip flashchips[] = {
+ .name = "EN25B20T",
+ .bustype = CHIP_BUSTYPE_SPI,
+ .manufacture_id = EON_ID_NOPREFIX,
+- .model_id = EN_25B20,
++ .model_id = EON_EN25B20,
+ .total_size = 256,
+ .page_size = 256,
+ .tested = TEST_UNTESTED,
+@@ -1520,6 +2233,7 @@ struct flashchip flashchips[] = {
.block_erase = spi_block_erase_c7,
}
},
@@ -6413,7 +6878,16 @@ index 10c0989..c9cae79 100644
.write = spi_chip_write_256,
.read = spi_chip_read,
},
-@@ -1551,6 +2270,7 @@ struct flashchip flashchips[] = {
+@@ -1529,7 +2243,7 @@ struct flashchip flashchips[] = {
+ .name = "EN25B40",
+ .bustype = CHIP_BUSTYPE_SPI,
+ .manufacture_id = EON_ID_NOPREFIX,
+- .model_id = EN_25B40,
++ .model_id = EON_EN25B40,
+ .total_size = 512,
+ .page_size = 256,
+ .tested = TEST_UNTESTED,
+@@ -1551,6 +2265,7 @@ struct flashchip flashchips[] = {
.block_erase = spi_block_erase_c7,
}
},
@@ -6421,7 +6895,16 @@ index 10c0989..c9cae79 100644
.write = spi_chip_write_256,
.read = spi_chip_read,
},
-@@ -1582,6 +2302,7 @@ struct flashchip flashchips[] = {
+@@ -1560,7 +2275,7 @@ struct flashchip flashchips[] = {
+ .name = "EN25B40T",
+ .bustype = CHIP_BUSTYPE_SPI,
+ .manufacture_id = EON_ID_NOPREFIX,
+- .model_id = EN_25B40,
++ .model_id = EON_EN25B40,
+ .total_size = 512,
+ .page_size = 256,
+ .tested = TEST_UNTESTED,
+@@ -1582,6 +2297,7 @@ struct flashchip flashchips[] = {
.block_erase = spi_block_erase_c7,
}
},
@@ -6429,7 +6912,16 @@ index 10c0989..c9cae79 100644
.write = spi_chip_write_256,
.read = spi_chip_read,
},
-@@ -1613,6 +2334,7 @@ struct flashchip flashchips[] = {
+@@ -1591,7 +2307,7 @@ struct flashchip flashchips[] = {
+ .name = "EN25B80",
+ .bustype = CHIP_BUSTYPE_SPI,
+ .manufacture_id = EON_ID_NOPREFIX,
+- .model_id = EN_25B80,
++ .model_id = EON_EN25B80,
+ .total_size = 1024,
+ .page_size = 256,
+ .tested = TEST_UNTESTED,
+@@ -1613,6 +2329,7 @@ struct flashchip flashchips[] = {
.block_erase = spi_block_erase_c7,
}
},
@@ -6437,7 +6929,16 @@ index 10c0989..c9cae79 100644
.write = spi_chip_write_256,
.read = spi_chip_read,
},
-@@ -1644,6 +2366,7 @@ struct flashchip flashchips[] = {
+@@ -1622,7 +2339,7 @@ struct flashchip flashchips[] = {
+ .name = "EN25B80T",
+ .bustype = CHIP_BUSTYPE_SPI,
+ .manufacture_id = EON_ID_NOPREFIX,
+- .model_id = EN_25B80,
++ .model_id = EON_EN25B80,
+ .total_size = 1024,
+ .page_size = 256,
+ .tested = TEST_UNTESTED,
+@@ -1644,6 +2361,7 @@ struct flashchip flashchips[] = {
.block_erase = spi_block_erase_c7,
}
},
@@ -6445,7 +6946,16 @@ index 10c0989..c9cae79 100644
.write = spi_chip_write_256,
.read = spi_chip_read,
},
-@@ -1675,6 +2398,7 @@ struct flashchip flashchips[] = {
+@@ -1653,7 +2371,7 @@ struct flashchip flashchips[] = {
+ .name = "EN25B16",
+ .bustype = CHIP_BUSTYPE_SPI,
+ .manufacture_id = EON_ID_NOPREFIX,
+- .model_id = EN_25B16,
++ .model_id = EON_EN25B16,
+ .total_size = 2048,
+ .page_size = 256,
+ .tested = TEST_UNTESTED,
+@@ -1675,6 +2393,7 @@ struct flashchip flashchips[] = {
.block_erase = spi_block_erase_c7,
}
},
@@ -6453,7 +6963,16 @@ index 10c0989..c9cae79 100644
.write = spi_chip_write_256,
.read = spi_chip_read,
},
-@@ -1706,6 +2430,7 @@ struct flashchip flashchips[] = {
+@@ -1684,7 +2403,7 @@ struct flashchip flashchips[] = {
+ .name = "EN25B16T",
+ .bustype = CHIP_BUSTYPE_SPI,
+ .manufacture_id = EON_ID_NOPREFIX,
+- .model_id = EN_25B16,
++ .model_id = EON_EN25B16,
+ .total_size = 2048,
+ .page_size = 256,
+ .tested = TEST_UNTESTED,
+@@ -1706,6 +2425,7 @@ struct flashchip flashchips[] = {
.block_erase = spi_block_erase_c7,
}
},
@@ -6461,7 +6980,16 @@ index 10c0989..c9cae79 100644
.write = spi_chip_write_256,
.read = spi_chip_read,
},
-@@ -1737,6 +2462,7 @@ struct flashchip flashchips[] = {
+@@ -1715,7 +2435,7 @@ struct flashchip flashchips[] = {
+ .name = "EN25B32",
+ .bustype = CHIP_BUSTYPE_SPI,
+ .manufacture_id = EON_ID_NOPREFIX,
+- .model_id = EN_25B32,
++ .model_id = EON_EN25B32,
+ .total_size = 4096,
+ .page_size = 256,
+ .tested = TEST_UNTESTED,
+@@ -1737,6 +2457,7 @@ struct flashchip flashchips[] = {
.block_erase = spi_block_erase_c7,
}
},
@@ -6469,7 +6997,16 @@ index 10c0989..c9cae79 100644
.write = spi_chip_write_256,
.read = spi_chip_read,
},
-@@ -1768,6 +2494,7 @@ struct flashchip flashchips[] = {
+@@ -1746,7 +2467,7 @@ struct flashchip flashchips[] = {
+ .name = "EN25B32T",
+ .bustype = CHIP_BUSTYPE_SPI,
+ .manufacture_id = EON_ID_NOPREFIX,
+- .model_id = EN_25B32,
++ .model_id = EON_EN25B32,
+ .total_size = 4096,
+ .page_size = 256,
+ .tested = TEST_UNTESTED,
+@@ -1768,6 +2489,7 @@ struct flashchip flashchips[] = {
.block_erase = spi_block_erase_c7,
}
},
@@ -6477,15 +7014,19 @@ index 10c0989..c9cae79 100644
.write = spi_chip_write_256,
.read = spi_chip_read,
},
-@@ -1780,6 +2507,7 @@ struct flashchip flashchips[] = {
- .model_id = EN_25B64,
+@@ -1777,9 +2499,10 @@ struct flashchip flashchips[] = {
+ .name = "EN25B64",
+ .bustype = CHIP_BUSTYPE_SPI,
+ .manufacture_id = EON_ID_NOPREFIX,
+- .model_id = EN_25B64,
++ .model_id = EON_EN25B64,
.total_size = 8192,
.page_size = 256,
+ .feature_bits = FEATURE_WRSR_WREN,
.tested = TEST_UNTESTED,
.probe = probe_spi_rdid,
.probe_timing = TIMING_ZERO,
-@@ -1799,6 +2527,7 @@ struct flashchip flashchips[] = {
+@@ -1799,6 +2522,7 @@ struct flashchip flashchips[] = {
.block_erase = spi_block_erase_c7,
}
},
@@ -6493,7 +7034,16 @@ index 10c0989..c9cae79 100644
.write = spi_chip_write_256,
.read = spi_chip_read,
},
-@@ -1830,6 +2559,7 @@ struct flashchip flashchips[] = {
+@@ -1808,7 +2532,7 @@ struct flashchip flashchips[] = {
+ .name = "EN25B64T",
+ .bustype = CHIP_BUSTYPE_SPI,
+ .manufacture_id = EON_ID_NOPREFIX,
+- .model_id = EN_25B64,
++ .model_id = EON_EN25B64,
+ .total_size = 8192,
+ .page_size = 256,
+ .tested = TEST_UNTESTED,
+@@ -1830,6 +2554,7 @@ struct flashchip flashchips[] = {
.block_erase = spi_block_erase_c7,
}
},
@@ -6501,7 +7051,16 @@ index 10c0989..c9cae79 100644
.write = spi_chip_write_256,
.read = spi_chip_read,
},
-@@ -1864,6 +2594,7 @@ struct flashchip flashchips[] = {
+@@ -1839,7 +2564,7 @@ struct flashchip flashchips[] = {
+ .name = "EN25D16",
+ .bustype = CHIP_BUSTYPE_SPI,
+ .manufacture_id = EON_ID_NOPREFIX,
+- .model_id = EN_25D16,
++ .model_id = EON_EN25D16,
+ .total_size = 2048,
+ .page_size = 256,
+ .tested = TEST_UNTESTED,
+@@ -1864,6 +2589,7 @@ struct flashchip flashchips[] = {
.block_erase = spi_block_erase_c7,
}
},
@@ -6509,15 +7068,19 @@ index 10c0989..c9cae79 100644
.write = spi_chip_write_256,
.read = spi_chip_read,
},
-@@ -1876,6 +2607,7 @@ struct flashchip flashchips[] = {
- .model_id = EN_25F05,
+@@ -1873,9 +2599,10 @@ struct flashchip flashchips[] = {
+ .name = "EN25F05",
+ .bustype = CHIP_BUSTYPE_SPI,
+ .manufacture_id = EON_ID_NOPREFIX,
+- .model_id = EN_25F05,
++ .model_id = EON_EN25F05,
.total_size = 64,
.page_size = 256,
+ .feature_bits = FEATURE_WRSR_WREN,
.tested = TEST_UNTESTED,
.probe = probe_spi_rdid,
.probe_timing = TIMING_ZERO,
-@@ -1898,6 +2630,7 @@ struct flashchip flashchips[] = {
+@@ -1898,6 +2625,7 @@ struct flashchip flashchips[] = {
.block_erase = spi_block_erase_c7,
}
},
@@ -6525,15 +7088,19 @@ index 10c0989..c9cae79 100644
.write = spi_chip_write_256,
.read = spi_chip_read,
},
-@@ -1910,6 +2643,7 @@ struct flashchip flashchips[] = {
- .model_id = EN_25F10,
+@@ -1907,9 +2635,10 @@ struct flashchip flashchips[] = {
+ .name = "EN25F10",
+ .bustype = CHIP_BUSTYPE_SPI,
+ .manufacture_id = EON_ID_NOPREFIX,
+- .model_id = EN_25F10,
++ .model_id = EON_EN25F10,
.total_size = 128,
.page_size = 256,
+ .feature_bits = FEATURE_WRSR_WREN,
.tested = TEST_UNTESTED,
.probe = probe_spi_rdid,
.probe_timing = TIMING_ZERO,
-@@ -1932,6 +2666,7 @@ struct flashchip flashchips[] = {
+@@ -1932,6 +2661,7 @@ struct flashchip flashchips[] = {
.block_erase = spi_block_erase_c7,
}
},
@@ -6541,15 +7108,19 @@ index 10c0989..c9cae79 100644
.write = spi_chip_write_256,
.read = spi_chip_read,
},
-@@ -1944,6 +2679,7 @@ struct flashchip flashchips[] = {
- .model_id = EN_25F20,
+@@ -1941,9 +2671,10 @@ struct flashchip flashchips[] = {
+ .name = "EN25F20",
+ .bustype = CHIP_BUSTYPE_SPI,
+ .manufacture_id = EON_ID_NOPREFIX,
+- .model_id = EN_25F20,
++ .model_id = EON_EN25F20,
.total_size = 256,
.page_size = 256,
+ .feature_bits = FEATURE_WRSR_WREN,
.tested = TEST_UNTESTED,
.probe = probe_spi_rdid,
.probe_timing = TIMING_ZERO,
-@@ -1966,6 +2702,7 @@ struct flashchip flashchips[] = {
+@@ -1966,6 +2697,7 @@ struct flashchip flashchips[] = {
.block_erase = spi_block_erase_c7,
}
},
@@ -6557,15 +7128,19 @@ index 10c0989..c9cae79 100644
.write = spi_chip_write_256,
.read = spi_chip_read,
},
-@@ -1978,6 +2715,7 @@ struct flashchip flashchips[] = {
- .model_id = EN_25F40,
+@@ -1975,9 +2707,10 @@ struct flashchip flashchips[] = {
+ .name = "EN25F40",
+ .bustype = CHIP_BUSTYPE_SPI,
+ .manufacture_id = EON_ID_NOPREFIX,
+- .model_id = EN_25F40,
++ .model_id = EON_EN25F40,
.total_size = 512,
.page_size = 256,
+ .feature_bits = FEATURE_WRSR_WREN,
.tested = TEST_OK_PROBE,
.probe = probe_spi_rdid,
.probe_timing = TIMING_ZERO,
-@@ -1997,6 +2735,7 @@ struct flashchip flashchips[] = {
+@@ -1997,6 +2730,7 @@ struct flashchip flashchips[] = {
.block_erase = spi_block_erase_c7,
},
},
@@ -6573,8 +7148,12 @@ index 10c0989..c9cae79 100644
.write = spi_chip_write_256,
.read = spi_chip_read,
},
-@@ -2009,7 +2748,8 @@ struct flashchip flashchips[] = {
- .model_id = EN_25F80,
+@@ -2006,10 +2740,11 @@ struct flashchip flashchips[] = {
+ .name = "EN25F80",
+ .bustype = CHIP_BUSTYPE_SPI,
+ .manufacture_id = EON_ID_NOPREFIX,
+- .model_id = EN_25F80,
++ .model_id = EON_EN25F80,
.total_size = 1024,
.page_size = 256,
- .tested = TEST_UNTESTED,
@@ -6583,7 +7162,7 @@ index 10c0989..c9cae79 100644
.probe = probe_spi_rdid,
.probe_timing = TIMING_ZERO,
.block_erasers =
-@@ -2028,6 +2768,7 @@ struct flashchip flashchips[] = {
+@@ -2028,6 +2763,7 @@ struct flashchip flashchips[] = {
.block_erase = spi_block_erase_c7,
}
},
@@ -6591,15 +7170,19 @@ index 10c0989..c9cae79 100644
.write = spi_chip_write_256,
.read = spi_chip_read,
},
-@@ -2040,6 +2781,7 @@ struct flashchip flashchips[] = {
- .model_id = EN_25F16,
+@@ -2037,9 +2773,10 @@ struct flashchip flashchips[] = {
+ .name = "EN25F16",
+ .bustype = CHIP_BUSTYPE_SPI,
+ .manufacture_id = EON_ID_NOPREFIX,
+- .model_id = EN_25F16,
++ .model_id = EON_EN25F16,
.total_size = 2048,
.page_size = 256,
+ .feature_bits = FEATURE_WRSR_WREN,
.tested = TEST_UNTESTED,
.probe = probe_spi_rdid,
.probe_timing = TIMING_ZERO,
-@@ -2059,6 +2801,7 @@ struct flashchip flashchips[] = {
+@@ -2059,6 +2796,7 @@ struct flashchip flashchips[] = {
.block_erase = spi_block_erase_c7,
}
},
@@ -6607,15 +7190,19 @@ index 10c0989..c9cae79 100644
.write = spi_chip_write_256,
.read = spi_chip_read,
},
-@@ -2071,6 +2814,7 @@ struct flashchip flashchips[] = {
- .model_id = EN_25F32,
+@@ -2068,9 +2806,10 @@ struct flashchip flashchips[] = {
+ .name = "EN25F32",
+ .bustype = CHIP_BUSTYPE_SPI,
+ .manufacture_id = EON_ID_NOPREFIX,
+- .model_id = EN_25F32,
++ .model_id = EON_EN25F32,
.total_size = 4096,
.page_size = 256,
+ .feature_bits = FEATURE_WRSR_WREN,
.tested = TEST_UNTESTED,
.probe = probe_spi_rdid,
.probe_timing = TIMING_ZERO,
-@@ -2090,6 +2834,7 @@ struct flashchip flashchips[] = {
+@@ -2090,6 +2829,7 @@ struct flashchip flashchips[] = {
.block_erase = spi_block_erase_c7,
}
},
@@ -6623,7 +7210,16 @@ index 10c0989..c9cae79 100644
.write = spi_chip_write_256,
.read = spi_chip_read,
},
-@@ -2122,7 +2867,7 @@ struct flashchip flashchips[] = {
+@@ -2099,7 +2839,7 @@ struct flashchip flashchips[] = {
+ .name = "EN29F010",
+ .bustype = CHIP_BUSTYPE_PARALLEL,
+ .manufacture_id = EON_ID,
+- .model_id = EN_29F010,
++ .model_id = EON_EN29F010,
+ .total_size = 128,
+ .page_size = 128,
+ .feature_bits = FEATURE_ADDR_2AA | FEATURE_EITHER_RESET,
+@@ -2122,11 +2862,11 @@ struct flashchip flashchips[] = {
},
{
@@ -6632,8 +7228,13 @@ index 10c0989..c9cae79 100644
.name = "EN29F002(A)(N)B",
.bustype = CHIP_BUSTYPE_PARALLEL,
.manufacture_id = EON_ID,
-@@ -2153,7 +2898,7 @@ struct flashchip flashchips[] = {
- },
+- .model_id = EN_29F002B,
++ .model_id = EON_EN29F002B,
+ .total_size = 256,
+ .page_size = 256,
+ .feature_bits = FEATURE_ADDR_AAA | FEATURE_EITHER_RESET,
+@@ -2153,11 +2893,11 @@ struct flashchip flashchips[] = {
+ },
{
- .vendor = "EON",
@@ -6641,7 +7242,35 @@ index 10c0989..c9cae79 100644
.name = "EN29F002(A)(N)T",
.bustype = CHIP_BUSTYPE_PARALLEL,
.manufacture_id = EON_ID,
-@@ -2255,7 +3000,7 @@ struct flashchip flashchips[] = {
+- .model_id = EN_29F002T,
++ .model_id = EON_EN29F002T,
+ .total_size = 256,
+ .page_size = 256,
+ .feature_bits = FEATURE_ADDR_AAA | FEATURE_EITHER_RESET,
+@@ -2188,7 +2928,7 @@ struct flashchip flashchips[] = {
+ .name = "MBM29F004BC",
+ .bustype = CHIP_BUSTYPE_PARALLEL,
+ .manufacture_id = FUJITSU_ID,
+- .model_id = MBM29F004BC,
++ .model_id = FUJITSU_MBM29F004BC,
+ .total_size = 512,
+ .page_size = 64 * 1024,
+ .feature_bits = FEATURE_ADDR_2AA | FEATURE_EITHER_RESET,
+@@ -2219,7 +2959,7 @@ struct flashchip flashchips[] = {
+ .name = "MBM29F004TC",
+ .bustype = CHIP_BUSTYPE_PARALLEL,
+ .manufacture_id = FUJITSU_ID,
+- .model_id = MBM29F004TC,
++ .model_id = FUJITSU_MBM29F004TC,
+ .total_size = 512,
+ .page_size = 64 * 1024,
+ .feature_bits = FEATURE_ADDR_2AA | FEATURE_EITHER_RESET,
+@@ -2251,11 +2991,11 @@ struct flashchip flashchips[] = {
+ .name = "MBM29F400BC",
+ .bustype = CHIP_BUSTYPE_PARALLEL,
+ .manufacture_id = FUJITSU_ID,
+- .model_id = MBM29F400BC,
++ .model_id = FUJITSU_MBM29F400BC,
.total_size = 512,
.page_size = 64 * 1024,
.feature_bits = FEATURE_ADDR_SHIFTED | FEATURE_EITHER_RESET,
@@ -6650,7 +7279,7 @@ index 10c0989..c9cae79 100644
.probe = probe_m29f400bt,
.probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (m29f400bt.c) */
.block_erasers =
-@@ -2273,7 +3018,7 @@ struct flashchip flashchips[] = {
+@@ -2273,7 +3013,7 @@ struct flashchip flashchips[] = {
.block_erase = block_erase_chip_m29f400bt,
},
},
@@ -6659,17 +7288,20 @@ index 10c0989..c9cae79 100644
.read = read_memmapped,
},
-@@ -2298,13 +3043,75 @@ struct flashchip flashchips[] = {
- {8 * 1024, 2},
- {16 * 1024, 1},
- },
-- .block_erase = block_erase_m29f400bt,
-+ .block_erase = block_erase_m29f400bt,
-+ }, {
-+ .eraseblocks = { {512 * 1024, 1} },
-+ .block_erase = block_erase_chip_m29f400bt,
-+ },
-+ },
+@@ -2282,7 +3022,7 @@ struct flashchip flashchips[] = {
+ .name = "MBM29F400TC",
+ .bustype = CHIP_BUSTYPE_PARALLEL,
+ .manufacture_id = FUJITSU_ID,
+- .model_id = MBM29F400TC,
++ .model_id = FUJITSU_MBM29F400TC,
+ .total_size = 512,
+ .page_size = 64 * 1024,
+ .feature_bits = FEATURE_ADDR_SHIFTED | FEATURE_EITHER_RESET,
+@@ -2304,7 +3044,95 @@ struct flashchip flashchips[] = {
+ .block_erase = block_erase_chip_m29f400bt,
+ },
+ },
+- .write = write_coreboot_m29f400bt,
+ .write = write_m29f400bt,
+ .read = read_memmapped,
+ },
@@ -6679,7 +7311,7 @@ index 10c0989..c9cae79 100644
+ .name = "HY29F002T",
+ .bustype = CHIP_BUSTYPE_PARALLEL,
+ .manufacture_id = HYUNDAI_ID,
-+ .model_id = HY_29F002T,
++ .model_id = HYUNDAI_HY29F002T,
+ .total_size = 256,
+ .page_size = 256 * 1024,
+ .feature_bits = FEATURE_EITHER_RESET, /* Some revisions may need FEATURE_ADDR_2AA */
@@ -6710,7 +7342,7 @@ index 10c0989..c9cae79 100644
+ .name = "HY29F002B",
+ .bustype = CHIP_BUSTYPE_PARALLEL,
+ .manufacture_id = HYUNDAI_ID,
-+ .model_id = HY_29F002B,
++ .model_id = HYUNDAI_HY29F002B,
+ .total_size = 256,
+ .page_size = 256 * 1024,
+ .feature_bits = FEATURE_EITHER_RESET, /* Some revisions may need FEATURE_ADDR_2AA */
@@ -6727,39 +7359,50 @@ index 10c0989..c9cae79 100644
+ {64 * 1024, 3},
+ },
+ .block_erase = erase_sector_jedec,
- }, {
-- .eraseblocks = { {512 * 1024, 1} },
-- .block_erase = block_erase_chip_m29f400bt,
++ }, {
+ .eraseblocks = { {256 * 1024, 1} },
+ .block_erase = erase_chip_block_jedec,
- },
- },
-- .write = write_coreboot_m29f400bt,
++ },
++ },
+ .write = write_jedec_1,
- .read = read_memmapped,
- },
-
-@@ -2362,6 +3169,33 @@ struct flashchip flashchips[] = {
-
- {
- .vendor = "Intel",
-+ .name = "28F002BC-T",
++ .read = read_memmapped,
++ },
++
++ {
++ .vendor = "Hyundai",
++ .name = "HY29F040A",
+ .bustype = CHIP_BUSTYPE_PARALLEL,
-+ .manufacture_id = INTEL_ID,
-+ .model_id = P28F002BC,
-+ .total_size = 256,
-+ .page_size = 256 * 1024,
++ .manufacture_id = HYUNDAI_ID,
++ .model_id = HYUNDAI_HY29F040A,
++ .total_size = 512,
++ .page_size = 64 * 1024,
++ .feature_bits = FEATURE_ADDR_2AA | FEATURE_EITHER_RESET,
+ .tested = TEST_UNTESTED,
-+ .probe = probe_82802ab,
-+ .probe_timing = TIMING_ZERO, /* Datasheet has no timing info specified */
++ .probe = probe_jedec,
++ .probe_timing = TIMING_ZERO,
+ .block_erasers =
+ {
+ {
-+ .eraseblocks = {
-+ {128 * 1024, 1},
-+ {96 * 1024, 1},
-+ {8 * 1024, 2},
-+ {16 * 1024, 1},
++ .eraseblocks = { {64 * 1024, 8} },
++ .block_erase = erase_sector_jedec,
++ }, {
++ .eraseblocks = { {512 * 1024, 1} },
++ .block_erase = erase_chip_block_jedec,
++ },
++ },
++ .write = write_jedec_1,
+ .read = read_memmapped,
+ },
+
+@@ -2323,9 +3151,35 @@ struct flashchip flashchips[] = {
+ {
+ {
+ .eraseblocks = {
+- {8 * 1024, 1},
+- {4 * 1024, 2},
++ {8 * 1024, 1},
++ {4 * 1024, 2},
++ {112 * 1024, 1},
+ },
+ .block_erase = erase_block_82802ab,
+ },
@@ -6770,18 +7413,74 @@ index 10c0989..c9cae79 100644
+
+ {
+ .vendor = "Intel",
- .name = "28F004S5",
++ .name = "28F001BX-T",
++ .bustype = CHIP_BUSTYPE_PARALLEL,
++ .manufacture_id = INTEL_ID,
++ .model_id = P28F001BXT,
++ .total_size = 128,
++ .page_size = 128 * 1024, /* 112k + 2x4k + 8k */
++ .tested = TEST_UNTESTED,
++ .probe = probe_jedec,
++ .probe_timing = TIMING_ZERO, /* Datasheet has no timing info specified */
++ .block_erasers =
++ {
++ {
++ .eraseblocks = {
+ {112 * 1024, 1},
++ {4 * 1024, 2},
++ {8 * 1024, 1},
+ },
+ .block_erase = erase_block_82802ab,
+ },
+@@ -2336,22 +3190,23 @@ struct flashchip flashchips[] = {
+
+ {
+ .vendor = "Intel",
+- .name = "28F001BX-T",
++ .name = "28F002BC-T",
.bustype = CHIP_BUSTYPE_PARALLEL,
.manufacture_id = INTEL_ID,
-@@ -2549,6 +3383,7 @@ struct flashchip flashchips[] = {
- .model_id = MX_25L512,
+- .model_id = P28F001BXT,
+- .total_size = 128,
+- .page_size = 128 * 1024, /* 112k + 2x4k + 8k */
++ .model_id = P28F002BC,
++ .total_size = 256,
++ .page_size = 256 * 1024,
+ .tested = TEST_UNTESTED,
+- .probe = probe_jedec,
+- .probe_timing = TIMING_ZERO, /* Datasheet has no timing info specified */
++ .probe = probe_82802ab,
++ .probe_timing = TIMING_ZERO, /* Datasheet has no timing info specified */
+ .block_erasers =
+ {
+ {
+- .eraseblocks = {
+- {112 * 1024, 1},
+- {4 * 1024, 2},
+- {8 * 1024, 1},
++ .eraseblocks = {
++ {128 * 1024, 1},
++ {96 * 1024, 1},
++ {8 * 1024, 2},
++ {16 * 1024, 1},
+ },
+ .block_erase = erase_block_82802ab,
+ },
+@@ -2545,10 +3400,11 @@ struct flashchip flashchips[] = {
+ .vendor = "Macronix",
+ .name = "MX25L512",
+ .bustype = CHIP_BUSTYPE_SPI,
+- .manufacture_id = MX_ID,
+- .model_id = MX_25L512,
++ .manufacture_id = MACRONIX_ID,
++ .model_id = MACRONIX_MX25L512,
.total_size = 64,
.page_size = 256,
+ .feature_bits = FEATURE_WRSR_WREN,
.tested = TEST_UNTESTED,
.probe = probe_spi_rdid,
.probe_timing = TIMING_ZERO,
-@@ -2571,6 +3406,7 @@ struct flashchip flashchips[] = {
+@@ -2571,6 +3427,7 @@ struct flashchip flashchips[] = {
.block_erase = spi_block_erase_c7,
},
},
@@ -6789,15 +7488,21 @@ index 10c0989..c9cae79 100644
.write = spi_chip_write_256,
.read = spi_chip_read,
},
-@@ -2583,6 +3419,7 @@ struct flashchip flashchips[] = {
- .model_id = MX_25L1005,
+@@ -2579,10 +3436,11 @@ struct flashchip flashchips[] = {
+ .vendor = "Macronix",
+ .name = "MX25L1005",
+ .bustype = CHIP_BUSTYPE_SPI,
+- .manufacture_id = MX_ID,
+- .model_id = MX_25L1005,
++ .manufacture_id = MACRONIX_ID,
++ .model_id = MACRONIX_MX25L1005,
.total_size = 128,
.page_size = 256,
+ .feature_bits = FEATURE_WRSR_WREN,
.tested = TEST_UNTESTED,
.probe = probe_spi_rdid,
.probe_timing = TIMING_ZERO,
-@@ -2602,6 +3439,7 @@ struct flashchip flashchips[] = {
+@@ -2602,6 +3460,7 @@ struct flashchip flashchips[] = {
.block_erase = spi_block_erase_c7,
},
},
@@ -6805,15 +7510,21 @@ index 10c0989..c9cae79 100644
.write = spi_chip_write_256,
.read = spi_chip_read,
},
-@@ -2614,6 +3452,7 @@ struct flashchip flashchips[] = {
- .model_id = MX_25L2005,
+@@ -2610,10 +3469,11 @@ struct flashchip flashchips[] = {
+ .vendor = "Macronix",
+ .name = "MX25L2005",
+ .bustype = CHIP_BUSTYPE_SPI,
+- .manufacture_id = MX_ID,
+- .model_id = MX_25L2005,
++ .manufacture_id = MACRONIX_ID,
++ .model_id = MACRONIX_MX25L2005,
.total_size = 256,
.page_size = 256,
+ .feature_bits = FEATURE_WRSR_WREN,
.tested = TEST_UNTESTED,
.probe = probe_spi_rdid,
.probe_timing = TIMING_ZERO,
-@@ -2636,6 +3475,7 @@ struct flashchip flashchips[] = {
+@@ -2636,6 +3496,7 @@ struct flashchip flashchips[] = {
.block_erase = spi_block_erase_c7,
},
},
@@ -6821,15 +7532,21 @@ index 10c0989..c9cae79 100644
.write = spi_chip_write_256,
.read = spi_chip_read,
},
-@@ -2648,6 +3488,7 @@ struct flashchip flashchips[] = {
- .model_id = MX_25L4005,
+@@ -2644,10 +3505,11 @@ struct flashchip flashchips[] = {
+ .vendor = "Macronix",
+ .name = "MX25L4005",
+ .bustype = CHIP_BUSTYPE_SPI,
+- .manufacture_id = MX_ID,
+- .model_id = MX_25L4005,
++ .manufacture_id = MACRONIX_ID,
++ .model_id = MACRONIX_MX25L4005,
.total_size = 512,
.page_size = 256,
+ .feature_bits = FEATURE_WRSR_WREN,
.tested = TEST_OK_PRW,
.probe = probe_spi_rdid,
.probe_timing = TIMING_ZERO,
-@@ -2670,6 +3511,7 @@ struct flashchip flashchips[] = {
+@@ -2670,6 +3532,7 @@ struct flashchip flashchips[] = {
.block_erase = spi_block_erase_c7,
},
},
@@ -6837,8 +7554,14 @@ index 10c0989..c9cae79 100644
.write = spi_chip_write_256,
.read = spi_chip_read,
},
-@@ -2682,7 +3524,8 @@ struct flashchip flashchips[] = {
- .model_id = MX_25L8005,
+@@ -2678,11 +3541,12 @@ struct flashchip flashchips[] = {
+ .vendor = "Macronix",
+ .name = "MX25L8005",
+ .bustype = CHIP_BUSTYPE_SPI,
+- .manufacture_id = MX_ID,
+- .model_id = MX_25L8005,
++ .manufacture_id = MACRONIX_ID,
++ .model_id = MACRONIX_MX25L8005,
.total_size = 1024,
.page_size = 256,
- .tested = TEST_OK_PRW,
@@ -6847,7 +7570,7 @@ index 10c0989..c9cae79 100644
.probe = probe_spi_rdid,
.probe_timing = TIMING_ZERO,
.block_erasers =
-@@ -2704,6 +3547,7 @@ struct flashchip flashchips[] = {
+@@ -2704,6 +3568,7 @@ struct flashchip flashchips[] = {
.block_erase = spi_block_erase_c7,
},
},
@@ -6855,15 +7578,21 @@ index 10c0989..c9cae79 100644
.write = spi_chip_write_256,
.read = spi_chip_read,
},
-@@ -2716,6 +3560,7 @@ struct flashchip flashchips[] = {
- .model_id = MX_25L1605,
+@@ -2712,10 +3577,11 @@ struct flashchip flashchips[] = {
+ .vendor = "Macronix",
+ .name = "MX25L1605",
+ .bustype = CHIP_BUSTYPE_SPI,
+- .manufacture_id = MX_ID,
+- .model_id = MX_25L1605,
++ .manufacture_id = MACRONIX_ID,
++ .model_id = MACRONIX_MX25L1605,
.total_size = 2048,
.page_size = 256,
+ .feature_bits = FEATURE_WRSR_WREN,
.tested = TEST_OK_PRW,
.probe = probe_spi_rdid,
.probe_timing = TIMING_ZERO,
-@@ -2738,6 +3583,7 @@ struct flashchip flashchips[] = {
+@@ -2738,6 +3604,7 @@ struct flashchip flashchips[] = {
.block_erase = spi_block_erase_c7,
},
},
@@ -6871,15 +7600,54 @@ index 10c0989..c9cae79 100644
.write = spi_chip_write_256,
.read = spi_chip_read,
},
-@@ -2750,6 +3596,7 @@ struct flashchip flashchips[] = {
- .model_id = MX_25L1635D,
+@@ -2746,10 +3613,44 @@ struct flashchip flashchips[] = {
+ .vendor = "Macronix",
+ .name = "MX25L1635D",
+ .bustype = CHIP_BUSTYPE_SPI,
+- .manufacture_id = MX_ID,
+- .model_id = MX_25L1635D,
++ .manufacture_id = MACRONIX_ID,
++ .model_id = MACRONIX_MX25L1635D,
++ .total_size = 2048,
++ .page_size = 256,
++ .feature_bits = FEATURE_WRSR_WREN,
++ .tested = TEST_UNTESTED,
++ .probe = probe_spi_rdid,
++ .probe_timing = TIMING_ZERO,
++ .block_erasers =
++ {
++ {
++ .eraseblocks = { {4 * 1024, 512} },
++ .block_erase = spi_block_erase_20,
++ }, {
++ .eraseblocks = { {64 * 1024, 32} },
++ .block_erase = spi_block_erase_d8,
++ }, {
++ .eraseblocks = { {2 * 1024 * 1024, 1} },
++ .block_erase = spi_block_erase_60,
++ }, {
++ .eraseblocks = { {2 * 1024 * 1024, 1} },
++ .block_erase = spi_block_erase_c7,
++ }
++ },
++ .unlock = spi_disable_blockprotect,
++ .write = spi_chip_write_256,
++ .read = spi_chip_read,
++ },
++
++ {
++ .vendor = "Macronix",
++ .name = "MX25L1635E",
++ .bustype = CHIP_BUSTYPE_SPI,
++ .manufacture_id = MACRONIX_ID,
++ .model_id = MACRONIX_MX25L1635E,
.total_size = 2048,
.page_size = 256,
+ .feature_bits = FEATURE_WRSR_WREN,
.tested = TEST_UNTESTED,
.probe = probe_spi_rdid,
.probe_timing = TIMING_ZERO,
-@@ -2769,6 +3616,7 @@ struct flashchip flashchips[] = {
+@@ -2769,6 +3670,7 @@ struct flashchip flashchips[] = {
.block_erase = spi_block_erase_c7,
}
},
@@ -6887,15 +7655,21 @@ index 10c0989..c9cae79 100644
.write = spi_chip_write_256,
.read = spi_chip_read,
},
-@@ -2781,6 +3629,7 @@ struct flashchip flashchips[] = {
- .model_id = MX_25L3205,
+@@ -2777,10 +3679,11 @@ struct flashchip flashchips[] = {
+ .vendor = "Macronix",
+ .name = "MX25L3205",
+ .bustype = CHIP_BUSTYPE_SPI,
+- .manufacture_id = MX_ID,
+- .model_id = MX_25L3205,
++ .manufacture_id = MACRONIX_ID,
++ .model_id = MACRONIX_MX25L3205,
.total_size = 4096,
.page_size = 256,
+ .feature_bits = FEATURE_WRSR_WREN,
.tested = TEST_OK_PRW,
.probe = probe_spi_rdid,
.probe_timing = TIMING_ZERO,
-@@ -2800,6 +3649,7 @@ struct flashchip flashchips[] = {
+@@ -2800,6 +3703,7 @@ struct flashchip flashchips[] = {
.block_erase = spi_block_erase_c7,
},
},
@@ -6903,15 +7677,21 @@ index 10c0989..c9cae79 100644
.write = spi_chip_write_256,
.read = spi_chip_read,
},
-@@ -2812,6 +3662,7 @@ struct flashchip flashchips[] = {
- .model_id = MX_25L3235D,
+@@ -2808,10 +3712,11 @@ struct flashchip flashchips[] = {
+ .vendor = "Macronix",
+ .name = "MX25L3235D",
+ .bustype = CHIP_BUSTYPE_SPI,
+- .manufacture_id = MX_ID,
+- .model_id = MX_25L3235D,
++ .manufacture_id = MACRONIX_ID,
++ .model_id = MACRONIX_MX25L3235D,
.total_size = 4096,
.page_size = 256,
+ .feature_bits = FEATURE_WRSR_WREN,
.tested = TEST_UNTESTED,
.probe = probe_spi_rdid,
.probe_timing = TIMING_ZERO,
-@@ -2831,6 +3682,7 @@ struct flashchip flashchips[] = {
+@@ -2831,6 +3736,7 @@ struct flashchip flashchips[] = {
.block_erase = spi_block_erase_c7,
}
},
@@ -6919,15 +7699,21 @@ index 10c0989..c9cae79 100644
.write = spi_chip_write_256,
.read = spi_chip_read,
},
-@@ -2843,6 +3695,7 @@ struct flashchip flashchips[] = {
- .model_id = MX_25L6405,
+@@ -2839,10 +3745,11 @@ struct flashchip flashchips[] = {
+ .vendor = "Macronix",
+ .name = "MX25L6405",
+ .bustype = CHIP_BUSTYPE_SPI,
+- .manufacture_id = MX_ID,
+- .model_id = MX_25L6405,
++ .manufacture_id = MACRONIX_ID,
++ .model_id = MACRONIX_MX25L6405,
.total_size = 8192,
.page_size = 256,
+ .feature_bits = FEATURE_WRSR_WREN,
.tested = TEST_OK_PROBE,
.probe = probe_spi_rdid,
.probe_timing = TIMING_ZERO,
-@@ -2862,6 +3715,7 @@ struct flashchip flashchips[] = {
+@@ -2862,6 +3769,7 @@ struct flashchip flashchips[] = {
.block_erase = spi_block_erase_c7,
}
},
@@ -6935,26 +7721,210 @@ index 10c0989..c9cae79 100644
.write = spi_chip_write_256,
.read = spi_chip_read,
},
-@@ -2874,6 +3728,7 @@ struct flashchip flashchips[] = {
- .model_id = MX_25L12805,
+@@ -2870,10 +3778,11 @@ struct flashchip flashchips[] = {
+ .vendor = "Macronix",
+ .name = "MX25L12805",
+ .bustype = CHIP_BUSTYPE_SPI,
+- .manufacture_id = MX_ID,
+- .model_id = MX_25L12805,
++ .manufacture_id = MACRONIX_ID,
++ .model_id = MACRONIX_MX25L12805,
.total_size = 16384,
.page_size = 256,
+ .feature_bits = FEATURE_WRSR_WREN,
.tested = TEST_UNTESTED,
.probe = probe_spi_rdid,
.probe_timing = TIMING_ZERO,
-@@ -2893,6 +3748,7 @@ struct flashchip flashchips[] = {
+@@ -2893,98 +3802,312 @@ struct flashchip flashchips[] = {
.block_erase = spi_block_erase_c7,
}
},
+- .write = spi_chip_write_256,
+- .read = spi_chip_read,
+ .unlock = spi_disable_blockprotect,
- .write = spi_chip_write_256,
- .read = spi_chip_read,
- },
-@@ -3050,6 +3906,188 @@ struct flashchip flashchips[] = {
- },
-
- {
++ .write = spi_chip_write_256,
++ .read = spi_chip_read,
++ },
++
++ {
++ .vendor = "Macronix",
++ .name = "MX29F001B",
++ .bustype = CHIP_BUSTYPE_PARALLEL,
++ .manufacture_id = MACRONIX_ID,
++ .model_id = MACRONIX_MX29F001B,
++ .total_size = 128,
++ .page_size = 32 * 1024,
++ .feature_bits = FEATURE_ADDR_2AA | FEATURE_SHORT_RESET,
++ .tested = TEST_UNTESTED,
++ .probe = probe_jedec,
++ .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (mx29f002.c) */
++ .block_erasers =
++ {
++ {
++ .eraseblocks = {
++ {8 * 1024, 1},
++ {4 * 1024, 2},
++ {8 * 1024, 2},
++ {32 * 1024, 1},
++ {64 * 1024, 1},
++ },
++ .block_erase = erase_sector_jedec,
++ }, {
++ .eraseblocks = { {128 * 1024, 1} },
++ .block_erase = erase_chip_block_jedec,
++ }
++ },
++ .write = write_jedec_1,
++ .read = read_memmapped,
++ },
++
++ {
++ .vendor = "Macronix",
++ .name = "MX29F001T",
++ .bustype = CHIP_BUSTYPE_PARALLEL,
++ .manufacture_id = MACRONIX_ID,
++ .model_id = MACRONIX_MX29F001T,
++ .total_size = 128,
++ .page_size = 32 * 1024,
++ .feature_bits = FEATURE_ADDR_2AA | FEATURE_SHORT_RESET,
++ .tested = TEST_UNTESTED,
++ .probe = probe_jedec,
++ .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (mx29f002.c) */
++ .block_erasers =
++ {
++ {
++ .eraseblocks = {
++ {64 * 1024, 1},
++ {32 * 1024, 1},
++ {8 * 1024, 2},
++ {4 * 1024, 2},
++ {8 * 1024, 1},
++ },
++ .block_erase = erase_sector_jedec,
++ }, {
++ .eraseblocks = { {128 * 1024, 1} },
++ .block_erase = erase_chip_block_jedec,
++ }
++ },
++ .write = write_jedec_1,
++ .read = read_memmapped,
++ },
++
++ {
++ .vendor = "Macronix",
++ .name = "MX29F002B",
++ .bustype = CHIP_BUSTYPE_PARALLEL,
++ .manufacture_id = MACRONIX_ID,
++ .model_id = MACRONIX_MX29F002B,
++ .total_size = 256,
++ .page_size = 64 * 1024,
++ .feature_bits = FEATURE_ADDR_2AA | FEATURE_SHORT_RESET,
++ .tested = TEST_UNTESTED,
++ .probe = probe_jedec,
++ .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (mx29f002.c) */
++ .block_erasers =
++ {
++ {
++ .eraseblocks = {
++ {16 * 1024, 1},
++ {8 * 1024, 2},
++ {32 * 1024, 1},
++ {64 * 1024, 3},
++ },
++ .block_erase = erase_sector_jedec,
++ }, {
++ .eraseblocks = { {256 * 1024, 1} },
++ .block_erase = erase_chip_block_jedec,
++ },
++ },
++ .write = write_jedec_1,
++ .read = read_memmapped,
++ },
++
++ {
++ .vendor = "Macronix",
++ .name = "MX29F002T",
++ .bustype = CHIP_BUSTYPE_PARALLEL,
++ .manufacture_id = MACRONIX_ID,
++ .model_id = MACRONIX_MX29F002T,
++ .total_size = 256,
++ .page_size = 64 * 1024,
++ .feature_bits = FEATURE_ADDR_2AA | FEATURE_SHORT_RESET,
++ .tested = TEST_OK_PRW,
++ .probe = probe_jedec,
++ .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (mx29f002.c) */
++ .block_erasers =
++ {
++ {
++ .eraseblocks = {
++ {64 * 1024, 3},
++ {32 * 1024, 1},
++ {8 * 1024, 2},
++ {16 * 1024, 1},
++ },
++ .block_erase = erase_sector_jedec,
++ }, {
++ .eraseblocks = { {256 * 1024, 1} },
++ .block_erase = erase_chip_block_jedec,
++ },
++ },
++ .write = write_jedec_1,
++ .read = read_memmapped,
++ },
++
++ {
++ .vendor = "Macronix",
++ .name = "MX29F040",
++ .bustype = CHIP_BUSTYPE_PARALLEL,
++ .manufacture_id = MACRONIX_ID,
++ .model_id = MACRONIX_MX29F040,
++ .total_size = 512,
++ .page_size = 64 * 1024,
++ .feature_bits = FEATURE_ADDR_2AA | FEATURE_SHORT_RESET,
++ .tested = TEST_UNTESTED,
++ .probe = probe_jedec,
++ .probe_timing = TIMING_ZERO,
++ .block_erasers =
++ {
++ {
++ .eraseblocks = { {64 * 1024, 8} },
++ .block_erase = erase_sector_jedec,
++ }, {
++ .eraseblocks = { {512 * 1024, 1} },
++ .block_erase = erase_chip_block_jedec,
++ },
++ },
++ .write = write_jedec_1,
++ .read = read_memmapped,
++ },
++
++ {
++ .vendor = "Macronix",
++ .name = "MX29LV040",
++ .bustype = CHIP_BUSTYPE_PARALLEL,
++ .manufacture_id = MACRONIX_ID,
++ .model_id = MACRONIX_MX29LV040,
++ .total_size = 512,
++ .page_size = 64 * 1024,
++ .feature_bits = FEATURE_ADDR_2AA | FEATURE_SHORT_RESET,
++ .tested = TEST_UNTESTED,
++ .probe = probe_jedec,
++ .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (mx29f002.c) */
++ .block_erasers =
++ {
++ {
++ .eraseblocks = { {64 * 1024, 8}, },
++ .block_erase = erase_sector_jedec,
++ }, {
++ .eraseblocks = { {512 * 1024, 1} },
++ .block_erase = erase_chip_block_jedec,
++ },
++ },
++ .write = write_jedec_1,
++ .read = read_memmapped,
++ },
++
++ {
+ .vendor = "MoselVitelic",
+ .name = "V29C51000B",
+ .bustype = CHIP_BUSTYPE_PARALLEL,
@@ -7004,143 +7974,208 @@ index 10c0989..c9cae79 100644
+ },
+ .write = write_jedec_1,
+ .read = read_memmapped,
-+ },
-+
-+ {
+ },
+
+ {
+- .vendor = "Macronix",
+- .name = "MX29F001B",
+ .vendor = "MoselVitelic",
+ .name = "V29C51400B",
-+ .bustype = CHIP_BUSTYPE_PARALLEL,
+ .bustype = CHIP_BUSTYPE_PARALLEL,
+- .manufacture_id = MX_ID,
+- .model_id = MX_29F001B,
+- .total_size = 128,
+- .page_size = 32 * 1024,
+- .feature_bits = FEATURE_ADDR_2AA | FEATURE_SHORT_RESET,
+ .manufacture_id = SYNCMOS_MVC_ID,
+ .model_id = MVC_V29C51400B,
+ .total_size = 512,
+ .page_size = 1024,
+ .feature_bits = FEATURE_EITHER_RESET,
-+ .tested = TEST_UNTESTED,
-+ .probe = probe_jedec,
+ .tested = TEST_UNTESTED,
+ .probe = probe_jedec,
+- .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (mx29f002.c) */
+ .probe_timing = TIMING_ZERO,
-+ .block_erasers =
-+ {
-+ {
+ .block_erasers =
+ {
+ {
+- .eraseblocks = {
+- {8 * 1024, 1},
+- {4 * 1024, 2},
+- {8 * 1024, 2},
+- {32 * 1024, 1},
+- {64 * 1024, 1},
+- },
+ .eraseblocks = { {1024, 512} },
-+ .block_erase = erase_sector_jedec,
-+ }, {
+ .block_erase = erase_sector_jedec,
+ }, {
+- .eraseblocks = { {128 * 1024, 1} },
+ .eraseblocks = { {512 * 1024, 1} },
-+ .block_erase = erase_chip_block_jedec,
+ .block_erase = erase_chip_block_jedec,
+- }
+ },
-+ },
-+ .write = write_jedec_1,
-+ .read = read_memmapped,
-+ },
-+
-+ {
+ },
+ .write = write_jedec_1,
+ .read = read_memmapped,
+ },
+
+ {
+- .vendor = "Macronix",
+- .name = "MX29F001T",
+ .vendor = "MoselVitelic",
+ .name = "V29C51400T",
-+ .bustype = CHIP_BUSTYPE_PARALLEL,
+ .bustype = CHIP_BUSTYPE_PARALLEL,
+- .manufacture_id = MX_ID,
+- .model_id = MX_29F001T,
+- .total_size = 128,
+- .page_size = 32 * 1024,
+- .feature_bits = FEATURE_ADDR_2AA | FEATURE_SHORT_RESET,
+ .manufacture_id = SYNCMOS_MVC_ID,
+ .model_id = MVC_V29C51400T,
+ .total_size = 512,
+ .page_size = 1024,
+ .feature_bits = FEATURE_EITHER_RESET,
-+ .tested = TEST_UNTESTED,
-+ .probe = probe_jedec,
+ .tested = TEST_UNTESTED,
+ .probe = probe_jedec,
+- .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (mx29f002.c) */
+ .probe_timing = TIMING_ZERO,
-+ .block_erasers =
-+ {
-+ {
+ .block_erasers =
+ {
+ {
+- .eraseblocks = {
+- {64 * 1024, 1},
+- {32 * 1024, 1},
+- {8 * 1024, 2},
+- {4 * 1024, 2},
+- {8 * 1024, 1},
+- },
+ .eraseblocks = { {1024, 512} },
-+ .block_erase = erase_sector_jedec,
-+ }, {
+ .block_erase = erase_sector_jedec,
+ }, {
+- .eraseblocks = { {128 * 1024, 1} },
+ .eraseblocks = { {512 * 1024, 1} },
-+ .block_erase = erase_chip_block_jedec,
+ .block_erase = erase_chip_block_jedec,
+- }
+ },
-+ },
-+ .write = write_jedec_1,
-+ .read = read_memmapped,
-+ },
-+
-+ {
+ },
+ .write = write_jedec_1,
+ .read = read_memmapped,
+ },
+
+ {
+- .vendor = "Macronix",
+- .name = "MX29F002B",
+ .vendor = "MoselVitelic",
+ .name = "V29LC51000",
-+ .bustype = CHIP_BUSTYPE_PARALLEL,
+ .bustype = CHIP_BUSTYPE_PARALLEL,
+- .manufacture_id = MX_ID,
+- .model_id = MX_29F002B,
+- .total_size = 256,
+- .page_size = 64 * 1024,
+- .feature_bits = FEATURE_ADDR_2AA | FEATURE_SHORT_RESET,
+ .manufacture_id = SYNCMOS_MVC_ID,
+ .model_id = MVC_V29LC51000,
+ .total_size = 64,
+ .page_size = 512,
+ .feature_bits = FEATURE_EITHER_RESET,
-+ .tested = TEST_UNTESTED,
-+ .probe = probe_jedec,
+ .tested = TEST_UNTESTED,
+ .probe = probe_jedec,
+- .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (mx29f002.c) */
+ .probe_timing = TIMING_ZERO,
-+ .block_erasers =
-+ {
-+ {
+ .block_erasers =
+ {
+ {
+- .eraseblocks = {
+- {16 * 1024, 1},
+- {8 * 1024, 2},
+- {32 * 1024, 1},
+- {64 * 1024, 3},
+- },
+ .eraseblocks = { {512, 128} },
-+ .block_erase = erase_sector_jedec,
-+ }, {
+ .block_erase = erase_sector_jedec,
+ }, {
+- .eraseblocks = { {256 * 1024, 1} },
+ .eraseblocks = { {64 * 1024, 1} },
-+ .block_erase = erase_chip_block_jedec,
-+ },
-+ },
-+ .write = write_jedec_1,
-+ .read = read_memmapped,
-+ },
-+
-+ {
+ .block_erase = erase_chip_block_jedec,
+ },
+ },
+@@ -2993,29 +4116,24 @@ struct flashchip flashchips[] = {
+ },
+
+ {
+- .vendor = "Macronix",
+- .name = "MX29F002T",
+ .vendor = "MoselVitelic",
+ .name = "V29LC51001",
-+ .bustype = CHIP_BUSTYPE_PARALLEL,
+ .bustype = CHIP_BUSTYPE_PARALLEL,
+- .manufacture_id = MX_ID,
+- .model_id = MX_29F002T,
+- .total_size = 256,
+- .page_size = 64 * 1024,
+- .feature_bits = FEATURE_ADDR_2AA | FEATURE_SHORT_RESET,
+- .tested = TEST_OK_PRW,
+ .manufacture_id = SYNCMOS_MVC_ID,
+ .model_id = MVC_V29LC51001,
+ .total_size = 128,
+ .page_size = 512,
+ .feature_bits = FEATURE_EITHER_RESET,
+ .tested = TEST_UNTESTED,
-+ .probe = probe_jedec,
+ .probe = probe_jedec,
+- .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (mx29f002.c) */
+ .probe_timing = TIMING_ZERO,
-+ .block_erasers =
-+ {
-+ {
+ .block_erasers =
+ {
+ {
+- .eraseblocks = {
+- {64 * 1024, 3},
+- {32 * 1024, 1},
+- {8 * 1024, 2},
+- {16 * 1024, 1},
+- },
+ .eraseblocks = { {512, 256} },
-+ .block_erase = erase_sector_jedec,
-+ }, {
+ .block_erase = erase_sector_jedec,
+ }, {
+- .eraseblocks = { {256 * 1024, 1} },
+ .eraseblocks = { {128 * 1024, 1} },
-+ .block_erase = erase_chip_block_jedec,
-+ },
-+ },
-+ .write = write_jedec_1,
-+ .read = read_memmapped,
-+ },
-+
-+ {
+ .block_erase = erase_chip_block_jedec,
+ },
+ },
+@@ -3024,24 +4142,24 @@ struct flashchip flashchips[] = {
+ },
+
+ {
+- .vendor = "Macronix",
+- .name = "MX29LV040",
+ .vendor = "MoselVitelic",
+ .name = "V29LC51002",
-+ .bustype = CHIP_BUSTYPE_PARALLEL,
+ .bustype = CHIP_BUSTYPE_PARALLEL,
+- .manufacture_id = MX_ID,
+- .model_id = MX_29LV040,
+- .total_size = 512,
+- .page_size = 64 * 1024,
+- .feature_bits = FEATURE_ADDR_2AA | FEATURE_SHORT_RESET,
+ .manufacture_id = SYNCMOS_MVC_ID,
+ .model_id = MVC_V29LC51002,
+ .total_size = 256,
+ .page_size = 512,
+ .feature_bits = FEATURE_EITHER_RESET,
-+ .tested = TEST_UNTESTED,
-+ .probe = probe_jedec,
+ .tested = TEST_UNTESTED,
+ .probe = probe_jedec,
+- .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (mx29f002.c) */
+ .probe_timing = TIMING_ZERO,
-+ .block_erasers =
-+ {
-+ {
+ .block_erasers =
+ {
+ {
+- .eraseblocks = { {64 * 1024, 8}, },
+ .eraseblocks = { {512, 512} },
-+ .block_erase = erase_sector_jedec,
-+ }, {
+ .block_erase = erase_sector_jedec,
+ }, {
+- .eraseblocks = { {512 * 1024, 1} },
+ .eraseblocks = { {256 * 1024, 1} },
-+ .block_erase = erase_chip_block_jedec,
-+ },
-+ },
-+ .write = write_jedec_1,
-+ .read = read_memmapped,
-+ },
-+
-+ {
- .vendor = "Numonyx",
- .name = "M25PE10",
- .bustype = CHIP_BUSTYPE_SPI,
-@@ -3073,6 +4111,7 @@ struct flashchip flashchips[] = {
+ .block_erase = erase_chip_block_jedec,
+ },
+ },
+@@ -3073,6 +4191,7 @@ struct flashchip flashchips[] = {
.block_erase = spi_block_erase_c7,
}
},
@@ -7148,7 +8183,7 @@ index 10c0989..c9cae79 100644
.write = spi_chip_write_256,
.read = spi_chip_read,
},
-@@ -3101,6 +4140,7 @@ struct flashchip flashchips[] = {
+@@ -3101,6 +4220,7 @@ struct flashchip flashchips[] = {
.block_erase = spi_block_erase_c7,
}
},
@@ -7156,7 +8191,7 @@ index 10c0989..c9cae79 100644
.write = spi_chip_write_256,
.read = spi_chip_read,
},
-@@ -3129,6 +4169,7 @@ struct flashchip flashchips[] = {
+@@ -3129,6 +4249,7 @@ struct flashchip flashchips[] = {
.block_erase = spi_block_erase_c7,
}
},
@@ -7164,7 +8199,7 @@ index 10c0989..c9cae79 100644
.write = spi_chip_write_256,
.read = spi_chip_read,
},
-@@ -3157,6 +4198,7 @@ struct flashchip flashchips[] = {
+@@ -3157,6 +4278,7 @@ struct flashchip flashchips[] = {
.block_erase = spi_block_erase_c7,
}
},
@@ -7172,7 +8207,7 @@ index 10c0989..c9cae79 100644
.write = spi_chip_write_256,
.read = spi_chip_read,
},
-@@ -3185,6 +4227,7 @@ struct flashchip flashchips[] = {
+@@ -3185,6 +4307,7 @@ struct flashchip flashchips[] = {
.block_erase = spi_block_erase_c7,
}
},
@@ -7180,7 +8215,16 @@ index 10c0989..c9cae79 100644
.write = spi_chip_write_256,
.read = spi_chip_read,
},
-@@ -3213,6 +4256,7 @@ struct flashchip flashchips[] = {
+@@ -3194,7 +4317,7 @@ struct flashchip flashchips[] = {
+ .name = "Pm25LV010",
+ .bustype = CHIP_BUSTYPE_SPI,
+ .manufacture_id = PMC_ID,
+- .model_id = PMC_25LV010,
++ .model_id = PMC_PM25LV010,
+ .total_size = 128,
+ .page_size = 256,
+ .tested = TEST_UNTESTED,
+@@ -3213,6 +4336,7 @@ struct flashchip flashchips[] = {
.block_erase = spi_block_erase_c7,
}
},
@@ -7188,7 +8232,16 @@ index 10c0989..c9cae79 100644
.write = spi_chip_write_256,
.read = spi_chip_read,
},
-@@ -3247,6 +4291,7 @@ struct flashchip flashchips[] = {
+@@ -3222,7 +4346,7 @@ struct flashchip flashchips[] = {
+ .name = "Pm25LV016B",
+ .bustype = CHIP_BUSTYPE_SPI,
+ .manufacture_id = PMC_ID,
+- .model_id = PMC_25LV016B,
++ .model_id = PMC_PM25LV016B,
+ .total_size = 2048,
+ .page_size = 256,
+ .tested = TEST_UNTESTED,
+@@ -3247,6 +4371,7 @@ struct flashchip flashchips[] = {
.block_erase = spi_block_erase_c7,
}
},
@@ -7196,7 +8249,16 @@ index 10c0989..c9cae79 100644
.write = spi_chip_write_256,
.read = spi_chip_read,
},
-@@ -3275,6 +4320,7 @@ struct flashchip flashchips[] = {
+@@ -3256,7 +4381,7 @@ struct flashchip flashchips[] = {
+ .name = "Pm25LV020",
+ .bustype = CHIP_BUSTYPE_SPI,
+ .manufacture_id = PMC_ID,
+- .model_id = PMC_25LV020,
++ .model_id = PMC_PM25LV020,
+ .total_size = 256,
+ .page_size = 256,
+ .tested = TEST_UNTESTED,
+@@ -3275,6 +4400,7 @@ struct flashchip flashchips[] = {
.block_erase = spi_block_erase_c7,
}
},
@@ -7204,7 +8266,16 @@ index 10c0989..c9cae79 100644
.write = spi_chip_write_256,
.read = spi_chip_read,
},
-@@ -3303,6 +4349,7 @@ struct flashchip flashchips[] = {
+@@ -3284,7 +4410,7 @@ struct flashchip flashchips[] = {
+ .name = "Pm25LV040",
+ .bustype = CHIP_BUSTYPE_SPI,
+ .manufacture_id = PMC_ID,
+- .model_id = PMC_25LV040,
++ .model_id = PMC_PM25LV040,
+ .total_size = 512,
+ .page_size = 256,
+ .tested = TEST_UNTESTED,
+@@ -3303,6 +4429,7 @@ struct flashchip flashchips[] = {
.block_erase = spi_block_erase_c7,
}
},
@@ -7212,7 +8283,16 @@ index 10c0989..c9cae79 100644
.write = spi_chip_write_256,
.read = spi_chip_read,
},
-@@ -3337,6 +4384,7 @@ struct flashchip flashchips[] = {
+@@ -3312,7 +4439,7 @@ struct flashchip flashchips[] = {
+ .name = "Pm25LV080B",
+ .bustype = CHIP_BUSTYPE_SPI,
+ .manufacture_id = PMC_ID,
+- .model_id = PMC_25LV080B,
++ .model_id = PMC_PM25LV080B,
+ .total_size = 1024,
+ .page_size = 256,
+ .tested = TEST_UNTESTED,
+@@ -3337,6 +4464,7 @@ struct flashchip flashchips[] = {
.block_erase = spi_block_erase_c7,
}
},
@@ -7220,7 +8300,16 @@ index 10c0989..c9cae79 100644
.write = spi_chip_write_256,
.read = spi_chip_read,
},
-@@ -3365,6 +4413,7 @@ struct flashchip flashchips[] = {
+@@ -3346,7 +4474,7 @@ struct flashchip flashchips[] = {
+ .name = "Pm25LV512",
+ .bustype = CHIP_BUSTYPE_SPI,
+ .manufacture_id = PMC_ID,
+- .model_id = PMC_25LV512,
++ .model_id = PMC_PM25LV512,
+ .total_size = 64,
+ .page_size = 256,
+ .tested = TEST_UNTESTED,
+@@ -3365,6 +4493,7 @@ struct flashchip flashchips[] = {
.block_erase = spi_block_erase_c7,
}
},
@@ -7228,7 +8317,12 @@ index 10c0989..c9cae79 100644
.write = spi_chip_write_256,
.read = spi_chip_read,
},
-@@ -3378,7 +4427,7 @@ struct flashchip flashchips[] = {
+@@ -3374,11 +4503,11 @@ struct flashchip flashchips[] = {
+ .name = "Pm29F002T",
+ .bustype = CHIP_BUSTYPE_PARALLEL,
+ .manufacture_id = PMC_ID_NOPREFIX,
+- .model_id = PMC_29F002T,
++ .model_id = PMC_PM29F002T,
.total_size = 256,
.page_size = 8 * 1024,
.feature_bits = FEATURE_ADDR_2AA | FEATURE_EITHER_RESET,
@@ -7237,7 +8331,21 @@ index 10c0989..c9cae79 100644
.probe = probe_jedec,
.probe_timing = TIMING_FIXME,
.block_erasers =
-@@ -3440,7 +4489,7 @@ struct flashchip flashchips[] = {
+@@ -3405,7 +4534,7 @@ struct flashchip flashchips[] = {
+ .name = "Pm29F002B",
+ .bustype = CHIP_BUSTYPE_PARALLEL,
+ .manufacture_id = PMC_ID_NOPREFIX,
+- .model_id = PMC_29F002B,
++ .model_id = PMC_PM29F002B,
+ .total_size = 256,
+ .page_size = 8 * 1024,
+ .feature_bits = FEATURE_ADDR_2AA | FEATURE_EITHER_RESET,
+@@ -3436,11 +4565,11 @@ struct flashchip flashchips[] = {
+ .name = "Pm39LV010",
+ .bustype = CHIP_BUSTYPE_PARALLEL,
+ .manufacture_id = PMC_ID_NOPREFIX,
+- .model_id = PMC_39F010, /* Pm39LV010 and Pm39F010 have identical IDs but different voltage */
++ .model_id = PMC_PM39F010, /* Pm39LV010 and Pm39F010 have identical IDs but different voltage */
.total_size = 128,
.page_size = 4096,
.feature_bits = FEATURE_ADDR_2AA | FEATURE_EITHER_RESET,
@@ -7246,23 +8354,45 @@ index 10c0989..c9cae79 100644
.probe = probe_jedec,
.probe_timing = TIMING_ZERO, /* Datasheet has no timing info specified */
.block_erasers =
-@@ -3521,7 +4570,7 @@ struct flashchip flashchips[] = {
+@@ -3465,7 +4594,7 @@ struct flashchip flashchips[] = {
+ .name = "Pm39LV020",
+ .bustype = CHIP_BUSTYPE_PARALLEL,
+ .manufacture_id = PMC_ID_NOPREFIX,
+- .model_id = PMC_39LV020,
++ .model_id = PMC_PM39LV020,
+ .total_size = 256,
+ .page_size = 4096,
+ .feature_bits = FEATURE_ADDR_2AA | FEATURE_EITHER_RESET,
+@@ -3494,7 +4623,7 @@ struct flashchip flashchips[] = {
+ .name = "Pm39LV040",
+ .bustype = CHIP_BUSTYPE_PARALLEL,
+ .manufacture_id = PMC_ID_NOPREFIX,
+- .model_id = PMC_39LV040,
++ .model_id = PMC_PM39LV040,
+ .total_size = 512,
+ .page_size = 4096,
+ .feature_bits = FEATURE_ADDR_2AA | FEATURE_EITHER_RESET,
+@@ -3521,9 +4650,9 @@ struct flashchip flashchips[] = {
{
.vendor = "PMC",
.name = "Pm49FL002",
- .bustype = CHIP_BUSTYPE_LPC | CHIP_BUSTYPE_FWH, /* A/A Mux*/
+ .bustype = CHIP_BUSTYPE_LPC | CHIP_BUSTYPE_FWH, /* A/A Mux */
.manufacture_id = PMC_ID_NOPREFIX,
- .model_id = PMC_49FL002,
+- .model_id = PMC_49FL002,
++ .model_id = PMC_PM49FL002,
.total_size = 256,
-@@ -3551,13 +4600,13 @@ struct flashchip flashchips[] = {
+ .page_size = 16 * 1024,
+ .feature_bits = FEATURE_REGISTERMAP | FEATURE_EITHER_RESET,
+@@ -3551,13 +4680,13 @@ struct flashchip flashchips[] = {
{
.vendor = "PMC",
.name = "Pm49FL004",
- .bustype = CHIP_BUSTYPE_LPC | CHIP_BUSTYPE_FWH, /* A/A Mux*/
+ .bustype = CHIP_BUSTYPE_LPC | CHIP_BUSTYPE_FWH, /* A/A Mux */
.manufacture_id = PMC_ID_NOPREFIX,
- .model_id = PMC_49FL004,
+- .model_id = PMC_49FL004,
++ .model_id = PMC_PM49FL004,
.total_size = 512,
.page_size = 64 * 1024,
.feature_bits = FEATURE_REGISTERMAP | FEATURE_EITHER_RESET,
@@ -7271,7 +8401,7 @@ index 10c0989..c9cae79 100644
.probe = probe_jedec,
.probe_timing = TIMING_ZERO, /* routine is wrapper to probe_jedec (pm49fl00x.c) */
.block_erasers =
-@@ -3599,6 +4648,7 @@ struct flashchip flashchips[] = {
+@@ -3599,6 +4728,7 @@ struct flashchip flashchips[] = {
.block_erase = spi_block_erase_c7,
}
},
@@ -7279,7 +8409,7 @@ index 10c0989..c9cae79 100644
.write = spi_chip_write_256,
.read = spi_chip_read,
},
-@@ -3656,6 +4706,7 @@ struct flashchip flashchips[] = {
+@@ -3656,6 +4786,7 @@ struct flashchip flashchips[] = {
.block_erase = spi_block_erase_c7,
}
},
@@ -7287,7 +8417,7 @@ index 10c0989..c9cae79 100644
.write = spi_chip_write_256,
.read = spi_chip_read,
},
-@@ -3681,6 +4732,7 @@ struct flashchip flashchips[] = {
+@@ -3681,6 +4812,7 @@ struct flashchip flashchips[] = {
.block_erase = spi_block_erase_c7,
}
},
@@ -7295,7 +8425,20 @@ index 10c0989..c9cae79 100644
.write = spi_chip_write_256,
.read = spi_chip_read,
},
-@@ -3715,6 +4767,7 @@ struct flashchip flashchips[] = {
+@@ -3690,10 +4822,10 @@ struct flashchip flashchips[] = {
+ .name = "SST25VF016B",
+ .bustype = CHIP_BUSTYPE_SPI,
+ .manufacture_id = SST_ID,
+- .model_id = SST_25VF016B,
++ .model_id = SST_SST25VF016B,
+ .total_size = 2048,
+ .page_size = 256,
+- .tested = TEST_OK_PRW,
++ .tested = TEST_OK_PREW,
+ .probe = probe_spi_rdid,
+ .probe_timing = TIMING_ZERO,
+ .block_erasers =
+@@ -3715,6 +4847,7 @@ struct flashchip flashchips[] = {
.block_erase = spi_block_erase_c7,
},
},
@@ -7303,7 +8446,16 @@ index 10c0989..c9cae79 100644
.write = spi_chip_write_1,
.read = spi_chip_read,
},
-@@ -3749,6 +4802,42 @@ struct flashchip flashchips[] = {
+@@ -3724,7 +4857,7 @@ struct flashchip flashchips[] = {
+ .name = "SST25VF032B",
+ .bustype = CHIP_BUSTYPE_SPI,
+ .manufacture_id = SST_ID,
+- .model_id = SST_25VF032B,
++ .model_id = SST_SST25VF032B,
+ .total_size = 4096,
+ .page_size = 256,
+ .tested = TEST_OK_PRW,
+@@ -3749,6 +4882,42 @@ struct flashchip flashchips[] = {
.block_erase = spi_block_erase_c7,
},
},
@@ -7317,7 +8469,7 @@ index 10c0989..c9cae79 100644
+ .name = "SST25VF064C",
+ .bustype = CHIP_BUSTYPE_SPI,
+ .manufacture_id = SST_ID,
-+ .model_id = SST_25VF064C,
++ .model_id = SST_SST25VF064C,
+ .total_size = 8192,
+ .page_size = 256,
+ .tested = TEST_OK_PREW,
@@ -7346,7 +8498,16 @@ index 10c0989..c9cae79 100644
.write = spi_chip_write_1,
.read = spi_chip_read,
},
-@@ -3777,6 +4866,7 @@ struct flashchip flashchips[] = {
+@@ -3758,7 +4927,7 @@ struct flashchip flashchips[] = {
+ .name = "SST25VF040.REMS",
+ .bustype = CHIP_BUSTYPE_SPI,
+ .manufacture_id = SST_ID,
+- .model_id = SST_25VF040_REMS,
++ .model_id = SST_SST25VF040_REMS,
+ .total_size = 512,
+ .page_size = 256,
+ .tested = TEST_OK_PR,
+@@ -3777,6 +4946,7 @@ struct flashchip flashchips[] = {
.block_erase = spi_block_erase_60,
},
},
@@ -7354,7 +8515,16 @@ index 10c0989..c9cae79 100644
.write = spi_chip_write_1,
.read = spi_chip_read,
},
-@@ -3811,6 +4901,36 @@ struct flashchip flashchips[] = {
+@@ -3786,7 +4956,7 @@ struct flashchip flashchips[] = {
+ .name = "SST25VF040B",
+ .bustype = CHIP_BUSTYPE_SPI,
+ .manufacture_id = SST_ID,
+- .model_id = SST_25VF040B,
++ .model_id = SST_SST25VF040B,
+ .total_size = 512,
+ .page_size = 256,
+ .tested = TEST_UNTESTED,
+@@ -3811,6 +4981,36 @@ struct flashchip flashchips[] = {
.block_erase = spi_block_erase_c7,
},
},
@@ -7368,7 +8538,7 @@ index 10c0989..c9cae79 100644
+ .name = "SST25LF040A.RES",
+ .bustype = CHIP_BUSTYPE_SPI,
+ .manufacture_id = SST_ID,
-+ .model_id = SST_25VF040_REMS,
++ .model_id = SST_SST25VF040_REMS,
+ .total_size = 512,
+ .page_size = 256,
+ .tested = TEST_OK_PROBE,
@@ -7391,7 +8561,16 @@ index 10c0989..c9cae79 100644
.write = spi_chip_write_1,
.read = spi_chip_read,
},
-@@ -3845,6 +4965,7 @@ struct flashchip flashchips[] = {
+@@ -3820,7 +5020,7 @@ struct flashchip flashchips[] = {
+ .name = "SST25VF040B.REMS",
+ .bustype = CHIP_BUSTYPE_SPI,
+ .manufacture_id = SST_ID,
+- .model_id = SST_25VF040B_REMS,
++ .model_id = SST_SST25VF040B_REMS,
+ .total_size = 512,
+ .page_size = 256,
+ .tested = TEST_OK_PR,
+@@ -3845,6 +5045,7 @@ struct flashchip flashchips[] = {
.block_erase = spi_block_erase_c7,
},
},
@@ -7399,8 +8578,12 @@ index 10c0989..c9cae79 100644
.write = spi_chip_write_1,
.read = spi_chip_read,
},
-@@ -3857,7 +4978,7 @@ struct flashchip flashchips[] = {
- .model_id = SST_25VF080B,
+@@ -3854,10 +5055,10 @@ struct flashchip flashchips[] = {
+ .name = "SST25VF080B",
+ .bustype = CHIP_BUSTYPE_SPI,
+ .manufacture_id = SST_ID,
+- .model_id = SST_25VF080B,
++ .model_id = SST_SST25VF080B,
.total_size = 1024,
.page_size = 256,
- .tested = TEST_OK_PRW,
@@ -7408,7 +8591,7 @@ index 10c0989..c9cae79 100644
.probe = probe_spi_rdid,
.probe_timing = TIMING_ZERO,
.block_erasers =
-@@ -3879,6 +5000,7 @@ struct flashchip flashchips[] = {
+@@ -3879,6 +5080,7 @@ struct flashchip flashchips[] = {
.block_erase = spi_block_erase_c7,
},
},
@@ -7416,7 +8599,39 @@ index 10c0989..c9cae79 100644
.write = spi_chip_write_1,
.read = spi_chip_read,
},
-@@ -3964,7 +5086,7 @@ struct flashchip flashchips[] = {
+@@ -3888,7 +5090,7 @@ struct flashchip flashchips[] = {
+ .name = "SST28SF040A",
+ .bustype = CHIP_BUSTYPE_PARALLEL,
+ .manufacture_id = SST_ID,
+- .model_id = SST_28SF040,
++ .model_id = SST_SST28SF040,
+ .total_size = 512,
+ .page_size = 256,
+ .feature_bits = 0,
+@@ -3914,7 +5116,7 @@ struct flashchip flashchips[] = {
+ .name = "SST29EE010",
+ .bustype = CHIP_BUSTYPE_PARALLEL,
+ .manufacture_id = SST_ID,
+- .model_id = SST_29EE010,
++ .model_id = SST_SST29EE010,
+ .total_size = 128,
+ .page_size = 128,
+ .feature_bits = FEATURE_LONG_RESET,
+@@ -3937,7 +5139,7 @@ struct flashchip flashchips[] = {
+ .name = "SST29LE010",
+ .bustype = CHIP_BUSTYPE_PARALLEL,
+ .manufacture_id = SST_ID,
+- .model_id = SST_29LE010,
++ .model_id = SST_SST29LE010,
+ .total_size = 128,
+ .page_size = 128,
+ .feature_bits = FEATURE_LONG_RESET,
+@@ -3960,11 +5162,11 @@ struct flashchip flashchips[] = {
+ .name = "SST29EE020A",
+ .bustype = CHIP_BUSTYPE_PARALLEL,
+ .manufacture_id = SST_ID,
+- .model_id = SST_29EE020A,
++ .model_id = SST_SST29EE020A,
.total_size = 256,
.page_size = 128,
.feature_bits = FEATURE_LONG_RESET,
@@ -7425,7 +8640,39 @@ index 10c0989..c9cae79 100644
.probe = probe_jedec,
.probe_timing = 10,
.block_erasers =
-@@ -4062,9 +5184,9 @@ struct flashchip flashchips[] = {
+@@ -3983,7 +5185,7 @@ struct flashchip flashchips[] = {
+ .name = "SST29LE020",
+ .bustype = CHIP_BUSTYPE_PARALLEL,
+ .manufacture_id = SST_ID,
+- .model_id = SST_29LE020,
++ .model_id = SST_SST29LE020,
+ .total_size = 256,
+ .page_size = 128,
+ .feature_bits = FEATURE_LONG_RESET,
+@@ -4006,7 +5208,7 @@ struct flashchip flashchips[] = {
+ .name = "SST39SF512",
+ .bustype = CHIP_BUSTYPE_PARALLEL,
+ .manufacture_id = SST_ID,
+- .model_id = SST_39SF512,
++ .model_id = SST_SST39SF512,
+ .total_size = 64,
+ .page_size = 4096,
+ .feature_bits = FEATURE_EITHER_RESET,
+@@ -4032,7 +5234,7 @@ struct flashchip flashchips[] = {
+ .name = "SST39SF010A",
+ .bustype = CHIP_BUSTYPE_PARALLEL,
+ .manufacture_id = SST_ID,
+- .model_id = SST_39SF010,
++ .model_id = SST_SST39SF010,
+ .total_size = 128,
+ .page_size = 4096,
+ .feature_bits = FEATURE_EITHER_RESET,
+@@ -4058,13 +5260,13 @@ struct flashchip flashchips[] = {
+ .name = "SST39SF020A",
+ .bustype = CHIP_BUSTYPE_PARALLEL,
+ .manufacture_id = SST_ID,
+- .model_id = SST_39SF020,
++ .model_id = SST_SST39SF020,
.total_size = 256,
.page_size = 4096,
.feature_bits = FEATURE_EITHER_RESET,
@@ -7437,7 +8684,12 @@ index 10c0989..c9cae79 100644
.block_erasers =
{
{
-@@ -4088,9 +5210,9 @@ struct flashchip flashchips[] = {
+@@ -4084,13 +5286,13 @@ struct flashchip flashchips[] = {
+ .name = "SST39SF040",
+ .bustype = CHIP_BUSTYPE_PARALLEL,
+ .manufacture_id = SST_ID,
+- .model_id = SST_39SF040,
++ .model_id = SST_SST39SF040,
.total_size = 512,
.page_size = 4096,
.feature_bits = FEATURE_EITHER_RESET,
@@ -7449,7 +8701,12 @@ index 10c0989..c9cae79 100644
.block_erasers =
{
{
-@@ -4114,9 +5236,9 @@ struct flashchip flashchips[] = {
+@@ -4110,13 +5312,13 @@ struct flashchip flashchips[] = {
+ .name = "SST39VF512",
+ .bustype = CHIP_BUSTYPE_PARALLEL,
+ .manufacture_id = SST_ID,
+- .model_id = SST_39VF512,
++ .model_id = SST_SST39VF512,
.total_size = 64,
.page_size = 4096,
.feature_bits = FEATURE_EITHER_RESET,
@@ -7461,7 +8718,12 @@ index 10c0989..c9cae79 100644
.block_erasers =
{
{
-@@ -4140,9 +5262,9 @@ struct flashchip flashchips[] = {
+@@ -4136,13 +5338,13 @@ struct flashchip flashchips[] = {
+ .name = "SST39VF010",
+ .bustype = CHIP_BUSTYPE_PARALLEL,
+ .manufacture_id = SST_ID,
+- .model_id = SST_39VF010,
++ .model_id = SST_SST39VF010,
.total_size = 128,
.page_size = 4096,
.feature_bits = FEATURE_EITHER_RESET,
@@ -7473,7 +8735,14 @@ index 10c0989..c9cae79 100644
.block_erasers =
{
{
-@@ -4168,7 +5290,7 @@ struct flashchip flashchips[] = {
+@@ -4162,13 +5364,13 @@ struct flashchip flashchips[] = {
+ .name = "SST39VF020",
+ .bustype = CHIP_BUSTYPE_PARALLEL,
+ .manufacture_id = SST_ID,
+- .model_id = SST_39VF020,
++ .model_id = SST_SST39VF020,
+ .total_size = 256,
+ .page_size = 4096,
.feature_bits = FEATURE_EITHER_RESET,
.tested = TEST_UNTESTED,
.probe = probe_jedec,
@@ -7482,7 +8751,14 @@ index 10c0989..c9cae79 100644
.block_erasers =
{
{
-@@ -4194,7 +5316,7 @@ struct flashchip flashchips[] = {
+@@ -4188,13 +5390,13 @@ struct flashchip flashchips[] = {
+ .name = "SST39VF040",
+ .bustype = CHIP_BUSTYPE_PARALLEL,
+ .manufacture_id = SST_ID,
+- .model_id = SST_39VF040,
++ .model_id = SST_SST39VF040,
+ .total_size = 512,
+ .page_size = 4096,
.feature_bits = FEATURE_EITHER_RESET,
.tested = TEST_UNTESTED,
.probe = probe_jedec,
@@ -7491,7 +8767,14 @@ index 10c0989..c9cae79 100644
.block_erasers =
{
{
-@@ -4220,7 +5342,7 @@ struct flashchip flashchips[] = {
+@@ -4214,13 +5416,13 @@ struct flashchip flashchips[] = {
+ .name = "SST39VF080",
+ .bustype = CHIP_BUSTYPE_PARALLEL,
+ .manufacture_id = SST_ID,
+- .model_id = SST_39VF080,
++ .model_id = SST_SST39VF080,
+ .total_size = 1024,
+ .page_size = 4096,
.feature_bits = FEATURE_EITHER_RESET,
.tested = TEST_UNTESTED,
.probe = probe_jedec,
@@ -7500,7 +8783,12 @@ index 10c0989..c9cae79 100644
.block_erasers =
{
{
-@@ -4247,7 +5369,7 @@ struct flashchip flashchips[] = {
+@@ -4243,11 +5445,11 @@ struct flashchip flashchips[] = {
+ .name = "SST49LF002A/B",
+ .bustype = CHIP_BUSTYPE_FWH, /* A/A Mux */
+ .manufacture_id = SST_ID,
+- .model_id = SST_49LF002A,
++ .model_id = SST_SST49LF002A,
.total_size = 256,
.page_size = 16 * 1024,
.feature_bits = FEATURE_REGISTERMAP | FEATURE_EITHER_RESET,
@@ -7509,7 +8797,39 @@ index 10c0989..c9cae79 100644
.probe = probe_jedec,
.probe_timing = 1, /* 150 ns */
.block_erasers =
-@@ -4375,7 +5497,7 @@ struct flashchip flashchips[] = {
+@@ -4274,7 +5476,7 @@ struct flashchip flashchips[] = {
+ .name = "SST49LF003A/B",
+ .bustype = CHIP_BUSTYPE_FWH, /* A/A Mux */
+ .manufacture_id = SST_ID,
+- .model_id = SST_49LF003A,
++ .model_id = SST_SST49LF003A,
+ .total_size = 384,
+ .page_size = 64 * 1024,
+ .feature_bits = FEATURE_REGISTERMAP | FEATURE_EITHER_RESET,
+@@ -4308,7 +5510,7 @@ struct flashchip flashchips[] = {
+ .name = "SST49LF004A/B",
+ .bustype = CHIP_BUSTYPE_FWH, /* A/A Mux */
+ .manufacture_id = SST_ID,
+- .model_id = SST_49LF004A,
++ .model_id = SST_SST49LF004A,
+ .total_size = 512,
+ .page_size = 64 * 1024,
+ .feature_bits = FEATURE_REGISTERMAP | FEATURE_EITHER_RESET,
+@@ -4339,7 +5541,7 @@ struct flashchip flashchips[] = {
+ .name = "SST49LF004C",
+ .bustype = CHIP_BUSTYPE_FWH,
+ .manufacture_id = SST_ID,
+- .model_id = SST_49LF004C,
++ .model_id = SST_SST49LF004C,
+ .total_size = 512,
+ .page_size = 4 * 1024,
+ .feature_bits = FEATURE_REGISTERMAP,
+@@ -4371,11 +5573,11 @@ struct flashchip flashchips[] = {
+ .name = "SST49LF008A",
+ .bustype = CHIP_BUSTYPE_FWH, /* A/A Mux */
+ .manufacture_id = SST_ID,
+- .model_id = SST_49LF008A,
++ .model_id = SST_SST49LF008A,
.total_size = 1024,
.page_size = 64 * 1024,
.feature_bits = FEATURE_REGISTERMAP | FEATURE_EITHER_RESET,
@@ -7518,7 +8838,30 @@ index 10c0989..c9cae79 100644
.probe = probe_jedec,
.probe_timing = 1, /* 150 ns */
.block_erasers =
-@@ -4470,9 +5592,9 @@ struct flashchip flashchips[] = {
+@@ -4402,7 +5604,7 @@ struct flashchip flashchips[] = {
+ .name = "SST49LF008C",
+ .bustype = CHIP_BUSTYPE_FWH,
+ .manufacture_id = SST_ID,
+- .model_id = SST_49LF008C,
++ .model_id = SST_SST49LF008C,
+ .total_size = 1024,
+ .page_size = 4 * 1024,
+ .feature_bits = FEATURE_REGISTERMAP,
+@@ -4434,7 +5636,7 @@ struct flashchip flashchips[] = {
+ .name = "SST49LF016C",
+ .bustype = CHIP_BUSTYPE_FWH,
+ .manufacture_id = SST_ID,
+- .model_id = SST_49LF016C,
++ .model_id = SST_SST49LF016C,
+ .total_size = 2048,
+ .page_size = 4 * 1024,
+ .feature_bits = FEATURE_REGISTERMAP,
+@@ -4466,13 +5668,13 @@ struct flashchip flashchips[] = {
+ .name = "SST49LF020",
+ .bustype = CHIP_BUSTYPE_LPC,
+ .manufacture_id = SST_ID,
+- .model_id = SST_49LF020,
++ .model_id = SST_SST49LF020,
.total_size = 256,
.page_size = 16 * 1024,
.feature_bits = FEATURE_EITHER_RESET,
@@ -7530,7 +8873,12 @@ index 10c0989..c9cae79 100644
.block_erasers =
{
{
-@@ -4499,9 +5621,9 @@ struct flashchip flashchips[] = {
+@@ -4495,13 +5697,13 @@ struct flashchip flashchips[] = {
+ .name = "SST49LF020A",
+ .bustype = CHIP_BUSTYPE_LPC,
+ .manufacture_id = SST_ID,
+- .model_id = SST_49LF020A,
++ .model_id = SST_SST49LF020A,
.total_size = 256,
.page_size = 4 * 1024,
.feature_bits = FEATURE_EITHER_RESET,
@@ -7542,7 +8890,12 @@ index 10c0989..c9cae79 100644
.block_erasers =
{
{
-@@ -4528,9 +5650,9 @@ struct flashchip flashchips[] = {
+@@ -4524,13 +5726,13 @@ struct flashchip flashchips[] = {
+ .name = "SST49LF040",
+ .bustype = CHIP_BUSTYPE_LPC,
+ .manufacture_id = SST_ID,
+- .model_id = SST_49LF040,
++ .model_id = SST_SST49LF040,
.total_size = 512,
.page_size = 4096,
.feature_bits = FEATURE_EITHER_RESET,
@@ -7554,8 +8907,12 @@ index 10c0989..c9cae79 100644
.block_erasers =
{
{
-@@ -4556,8 +5678,8 @@ struct flashchip flashchips[] = {
- .model_id = SST_49LF040B,
+@@ -4553,11 +5755,11 @@ struct flashchip flashchips[] = {
+ .name = "SST49LF040B",
+ .bustype = CHIP_BUSTYPE_LPC, /* A/A Mux */
+ .manufacture_id = SST_ID,
+- .model_id = SST_49LF040B,
++ .model_id = SST_SST49LF040B,
.total_size = 512,
.page_size = 64 * 1024,
- .feature_bits = FEATURE_EITHER_RESET,
@@ -7565,7 +8922,7 @@ index 10c0989..c9cae79 100644
.probe = probe_jedec,
.probe_timing = 1, /* 150ns */
.block_erasers =
-@@ -4573,6 +5695,7 @@ struct flashchip flashchips[] = {
+@@ -4573,6 +5775,7 @@ struct flashchip flashchips[] = {
.block_erase = NULL,
}
},
@@ -7573,7 +8930,12 @@ index 10c0989..c9cae79 100644
.write = write_jedec_1,
.read = read_memmapped,
},
-@@ -4586,7 +5709,7 @@ struct flashchip flashchips[] = {
+@@ -4582,11 +5785,11 @@ struct flashchip flashchips[] = {
+ .name = "SST49LF080A",
+ .bustype = CHIP_BUSTYPE_LPC, /* A/A Mux */
+ .manufacture_id = SST_ID,
+- .model_id = SST_49LF080A,
++ .model_id = SST_SST49LF080A,
.total_size = 1024,
.page_size = 4096,
.feature_bits = FEATURE_EITHER_RESET,
@@ -7582,7 +8944,12 @@ index 10c0989..c9cae79 100644
.probe = probe_jedec,
.probe_timing = TIMING_FIXME,
.block_erasers =
-@@ -4615,7 +5738,7 @@ struct flashchip flashchips[] = {
+@@ -4611,11 +5814,11 @@ struct flashchip flashchips[] = {
+ .name = "SST49LF160C",
+ .bustype = CHIP_BUSTYPE_LPC,
+ .manufacture_id = SST_ID,
+- .model_id = SST_49LF160C,
++ .model_id = SST_SST49LF160C,
.total_size = 2048,
.page_size = 4 * 1024,
.feature_bits = FEATURE_REGISTERMAP,
@@ -7591,7 +8958,7 @@ index 10c0989..c9cae79 100644
.probe = probe_82802ab,
.probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (sst49lfxxxc.c) */
.block_erasers =
-@@ -4659,25 +5782,26 @@ struct flashchip flashchips[] = {
+@@ -4659,25 +5862,26 @@ struct flashchip flashchips[] = {
.block_erase = spi_block_erase_c7,
}
},
@@ -7621,7 +8988,7 @@ index 10c0989..c9cae79 100644
.probe_timing = TIMING_ZERO,
.block_erasers =
{
-@@ -4689,6 +5813,7 @@ struct flashchip flashchips[] = {
+@@ -4689,6 +5893,7 @@ struct flashchip flashchips[] = {
.block_erase = spi_block_erase_c7,
}
},
@@ -7629,7 +8996,7 @@ index 10c0989..c9cae79 100644
.write = spi_chip_write_1, /* 128 */
.read = spi_chip_read,
},
-@@ -4701,7 +5826,7 @@ struct flashchip flashchips[] = {
+@@ -4701,7 +5906,7 @@ struct flashchip flashchips[] = {
.model_id = ST_M25P10A,
.total_size = 128,
.page_size = 256,
@@ -7638,7 +9005,7 @@ index 10c0989..c9cae79 100644
.probe = probe_spi_rdid,
.probe_timing = TIMING_ZERO,
.block_erasers =
-@@ -4714,6 +5839,7 @@ struct flashchip flashchips[] = {
+@@ -4714,6 +5919,7 @@ struct flashchip flashchips[] = {
.block_erase = spi_block_erase_c7,
}
},
@@ -7646,7 +9013,7 @@ index 10c0989..c9cae79 100644
.write = spi_chip_write_256,
.read = spi_chip_read,
},
-@@ -4723,12 +5849,12 @@ struct flashchip flashchips[] = {
+@@ -4723,12 +5929,12 @@ struct flashchip flashchips[] = {
.vendor = "ST",
.name = "M25P10.RES",
.bustype = CHIP_BUSTYPE_SPI,
@@ -7661,7 +9028,7 @@ index 10c0989..c9cae79 100644
.probe_timing = TIMING_ZERO,
.block_erasers =
{
-@@ -4740,6 +5866,7 @@ struct flashchip flashchips[] = {
+@@ -4740,6 +5946,7 @@ struct flashchip flashchips[] = {
.block_erase = spi_block_erase_c7,
}
},
@@ -7669,7 +9036,7 @@ index 10c0989..c9cae79 100644
.write = spi_chip_write_1, /* 128 */
.read = spi_chip_read,
},
-@@ -4765,6 +5892,7 @@ struct flashchip flashchips[] = {
+@@ -4765,6 +5972,7 @@ struct flashchip flashchips[] = {
.block_erase = spi_block_erase_c7,
}
},
@@ -7677,7 +9044,7 @@ index 10c0989..c9cae79 100644
.write = spi_chip_write_256,
.read = spi_chip_read,
},
-@@ -4790,6 +5918,7 @@ struct flashchip flashchips[] = {
+@@ -4790,6 +5998,7 @@ struct flashchip flashchips[] = {
.block_erase = spi_block_erase_c7,
}
},
@@ -7685,7 +9052,7 @@ index 10c0989..c9cae79 100644
.write = spi_chip_write_256,
.read = spi_chip_read,
},
-@@ -4798,12 +5927,12 @@ struct flashchip flashchips[] = {
+@@ -4798,12 +6007,12 @@ struct flashchip flashchips[] = {
.vendor = "ST",
.name = "M25P40-old",
.bustype = CHIP_BUSTYPE_SPI,
@@ -7700,7 +9067,7 @@ index 10c0989..c9cae79 100644
.probe_timing = TIMING_ZERO,
.block_erasers =
{
-@@ -4815,6 +5944,7 @@ struct flashchip flashchips[] = {
+@@ -4815,6 +6024,7 @@ struct flashchip flashchips[] = {
.block_erase = spi_block_erase_c7,
}
},
@@ -7708,7 +9075,7 @@ index 10c0989..c9cae79 100644
.write = spi_chip_write_256,
.read = spi_chip_read,
},
-@@ -4840,6 +5970,7 @@ struct flashchip flashchips[] = {
+@@ -4840,6 +6050,7 @@ struct flashchip flashchips[] = {
.block_erase = spi_block_erase_c7,
}
},
@@ -7716,7 +9083,7 @@ index 10c0989..c9cae79 100644
.write = spi_chip_write_256,
.read = spi_chip_read,
},
-@@ -4865,6 +5996,7 @@ struct flashchip flashchips[] = {
+@@ -4865,6 +6076,7 @@ struct flashchip flashchips[] = {
.block_erase = spi_block_erase_c7,
}
},
@@ -7724,7 +9091,80 @@ index 10c0989..c9cae79 100644
.write = spi_chip_write_256,
.read = spi_chip_read,
},
-@@ -4890,6 +6022,7 @@ struct flashchip flashchips[] = {
+@@ -4874,72 +6086,133 @@ struct flashchip flashchips[] = {
+ .name = "M25P32",
+ .bustype = CHIP_BUSTYPE_SPI,
+ .manufacture_id = ST_ID,
+- .model_id = ST_M25P32,
+- .total_size = 4096,
++ .model_id = ST_M25P32,
++ .total_size = 4096,
++ .page_size = 256,
++ .tested = TEST_OK_PRW,
++ .probe = probe_spi_rdid,
++ .probe_timing = TIMING_ZERO,
++ .block_erasers =
++ {
++ {
++ .eraseblocks = { {64 * 1024, 64} },
++ .block_erase = spi_block_erase_d8,
++ }, {
++ .eraseblocks = { {4 * 1024 * 1024, 1} },
++ .block_erase = spi_block_erase_c7,
++ }
++ },
++ .unlock = spi_disable_blockprotect,
++ .write = spi_chip_write_256,
++ .read = spi_chip_read,
++ },
++
++ {
++ .vendor = "ST",
++ .name = "M25P64",
++ .bustype = CHIP_BUSTYPE_SPI,
++ .manufacture_id = ST_ID,
++ .model_id = ST_M25P64,
++ .total_size = 8192,
++ .page_size = 256,
++ .tested = TEST_UNTESTED,
++ .probe = probe_spi_rdid,
++ .probe_timing = TIMING_ZERO,
++ .block_erasers =
++ {
++ {
++ .eraseblocks = { {64 * 1024, 128} },
++ .block_erase = spi_block_erase_d8,
++ }, {
++ .eraseblocks = { {8 * 1024 * 1024, 1} },
++ .block_erase = spi_block_erase_c7,
++ }
++ },
++ .unlock = spi_disable_blockprotect,
++ .write = spi_chip_write_256,
++ .read = spi_chip_read,
++ },
++
++ {
++ .vendor = "ST",
++ .name = "M25P128",
++ .bustype = CHIP_BUSTYPE_SPI,
++ .manufacture_id = ST_ID,
++ .model_id = ST_M25P128,
++ .total_size = 16384,
+ .page_size = 256,
+- .tested = TEST_OK_PRW,
++ .tested = TEST_UNTESTED,
+ .probe = probe_spi_rdid,
+ .probe_timing = TIMING_ZERO,
+ .block_erasers =
+ {
+ {
+- .eraseblocks = { {64 * 1024, 64} },
++ .eraseblocks = { {256 * 1024, 64} },
+ .block_erase = spi_block_erase_d8,
+ }, {
+- .eraseblocks = { {4 * 1024 * 1024, 1} },
++ .eraseblocks = { {16 * 1024 * 1024, 1} },
.block_erase = spi_block_erase_c7,
}
},
@@ -7732,7 +9172,34 @@ index 10c0989..c9cae79 100644
.write = spi_chip_write_256,
.read = spi_chip_read,
},
-@@ -4915,6 +6048,7 @@ struct flashchip flashchips[] = {
+
+ {
+ .vendor = "ST",
+- .name = "M25P64",
++ .name = "M25PX32",
+ .bustype = CHIP_BUSTYPE_SPI,
+ .manufacture_id = ST_ID,
+- .model_id = ST_M25P64,
+- .total_size = 8192,
++ .model_id = ST_M25PX32,
++ .total_size = 4096,
+ .page_size = 256,
+- .tested = TEST_UNTESTED,
++ .tested = TEST_OK_PREW,
+ .probe = probe_spi_rdid,
+ .probe_timing = TIMING_ZERO,
+ .block_erasers =
+ {
+ {
+- .eraseblocks = { {64 * 1024, 128} },
++ .eraseblocks = { { 4 * 1024, 1024 } },
++ .block_erase = spi_block_erase_20,
++ }, {
++ .eraseblocks = { {64 * 1024, 64} },
+ .block_erase = spi_block_erase_d8,
+ }, {
+- .eraseblocks = { {8 * 1024 * 1024, 1} },
++ .eraseblocks = { {4 * 1024 * 1024, 1} },
.block_erase = spi_block_erase_c7,
}
},
@@ -7740,7 +9207,34 @@ index 10c0989..c9cae79 100644
.write = spi_chip_write_256,
.read = spi_chip_read,
},
-@@ -4940,6 +6074,7 @@ struct flashchip flashchips[] = {
+
+ {
+ .vendor = "ST",
+- .name = "M25P128",
++ .name = "M25PX64",
+ .bustype = CHIP_BUSTYPE_SPI,
+ .manufacture_id = ST_ID,
+- .model_id = ST_M25P128,
+- .total_size = 16384,
++ .model_id = ST_M25PX64,
++ .total_size = 8192,
+ .page_size = 256,
+- .tested = TEST_UNTESTED,
++ .tested = TEST_OK_PREW,
+ .probe = probe_spi_rdid,
+ .probe_timing = TIMING_ZERO,
+ .block_erasers =
+ {
+ {
+- .eraseblocks = { {256 * 1024, 64} },
++ .eraseblocks = { { 4 * 1024, 2048 } },
++ .block_erase = spi_block_erase_20,
++ }, {
++ .eraseblocks = { {64 * 1024, 128} },
+ .block_erase = spi_block_erase_d8,
+ }, {
+- .eraseblocks = { {16 * 1024 * 1024, 1} },
++ .eraseblocks = { {8 * 1024 * 1024, 1} },
.block_erase = spi_block_erase_c7,
}
},
@@ -7748,7 +9242,7 @@ index 10c0989..c9cae79 100644
.write = spi_chip_write_256,
.read = spi_chip_read,
},
-@@ -5017,7 +6152,7 @@ struct flashchip flashchips[] = {
+@@ -5017,7 +6290,7 @@ struct flashchip flashchips[] = {
.feature_bits = FEATURE_ADDR_2AA | FEATURE_EITHER_RESET,
.tested = TEST_UNTESTED,
.probe = probe_jedec,
@@ -7757,7 +9251,7 @@ index 10c0989..c9cae79 100644
.block_erasers =
{
{
-@@ -5035,6 +6170,37 @@ struct flashchip flashchips[] = {
+@@ -5035,6 +6308,37 @@ struct flashchip flashchips[] = {
{
/* FIXME: this has WORD/BYTE sequences; 2AA for word, 555 for byte */
.vendor = "ST",
@@ -7795,7 +9289,7 @@ index 10c0989..c9cae79 100644
.name = "M29F400BT",
.bustype = CHIP_BUSTYPE_PARALLEL,
.manufacture_id = ST_ID,
-@@ -5060,7 +6226,7 @@ struct flashchip flashchips[] = {
+@@ -5060,7 +6364,7 @@ struct flashchip flashchips[] = {
.block_erase = block_erase_chip_m29f400bt,
}
},
@@ -7804,7 +9298,7 @@ index 10c0989..c9cae79 100644
.read = read_memmapped,
},
-@@ -5155,7 +6321,7 @@ struct flashchip flashchips[] = {
+@@ -5155,7 +6459,7 @@ struct flashchip flashchips[] = {
{
{
.eraseblocks = {
@@ -7813,7 +9307,7 @@ index 10c0989..c9cae79 100644
{64 * 1024, 5}, /* block */
{4 * 1024, 16}, /* sector */
{4 * 1024, 16}, /* sector */
-@@ -5190,7 +6356,7 @@ struct flashchip flashchips[] = {
+@@ -5190,7 +6494,7 @@ struct flashchip flashchips[] = {
{
{
.eraseblocks = {
@@ -7822,7 +9316,7 @@ index 10c0989..c9cae79 100644
{4 * 1024, 16}, /* sector */
{64 * 1024, 5}, /* block */
{4 * 1024, 16}, /* sector */
-@@ -5218,14 +6384,14 @@ struct flashchip flashchips[] = {
+@@ -5218,14 +6522,14 @@ struct flashchip flashchips[] = {
.total_size = 1024,
.page_size = 64 * 1024,
.feature_bits = FEATURE_REGISTERMAP,
@@ -7839,7 +9333,7 @@ index 10c0989..c9cae79 100644
{64 * 1024, 13}, /* block */
{4 * 1024, 16}, /* sector */
{4 * 1024, 16}, /* sector */
-@@ -5260,7 +6426,7 @@ struct flashchip flashchips[] = {
+@@ -5260,7 +6564,7 @@ struct flashchip flashchips[] = {
{
{
.eraseblocks = {
@@ -7848,7 +9342,7 @@ index 10c0989..c9cae79 100644
{4 * 1024, 16}, /* sector */
{64 * 1024, 13}, /* block */
{4 * 1024, 16}, /* sector */
-@@ -5426,13 +6592,13 @@ struct flashchip flashchips[] = {
+@@ -5426,13 +6730,13 @@ struct flashchip flashchips[] = {
},
{
@@ -7868,7 +9362,7 @@ index 10c0989..c9cae79 100644
.feature_bits = FEATURE_EITHER_RESET,
.tested = TEST_UNTESTED,
.probe = probe_jedec,
-@@ -5440,10 +6606,10 @@ struct flashchip flashchips[] = {
+@@ -5440,10 +6744,10 @@ struct flashchip flashchips[] = {
.block_erasers =
{
{
@@ -7881,7 +9375,7 @@ index 10c0989..c9cae79 100644
.block_erase = erase_chip_block_jedec,
},
},
-@@ -5452,13 +6618,13 @@ struct flashchip flashchips[] = {
+@@ -5452,13 +6756,13 @@ struct flashchip flashchips[] = {
},
{
@@ -7900,7 +9394,7 @@ index 10c0989..c9cae79 100644
.feature_bits = FEATURE_EITHER_RESET,
.tested = TEST_UNTESTED,
.probe = probe_jedec,
-@@ -5478,15 +6644,41 @@ struct flashchip flashchips[] = {
+@@ -5478,15 +6782,41 @@ struct flashchip flashchips[] = {
},
{
@@ -7948,7 +9442,7 @@ index 10c0989..c9cae79 100644
.probe = probe_jedec,
.probe_timing = TIMING_ZERO, /* Datasheet has no timing info specified */
.block_erasers =
-@@ -5504,13 +6696,39 @@ struct flashchip flashchips[] = {
+@@ -5504,13 +6834,39 @@ struct flashchip flashchips[] = {
},
{
@@ -7993,7 +9487,7 @@ index 10c0989..c9cae79 100644
.feature_bits = FEATURE_EITHER_RESET,
.tested = TEST_UNTESTED,
.probe = probe_jedec,
-@@ -5518,7 +6736,59 @@ struct flashchip flashchips[] = {
+@@ -5518,7 +6874,59 @@ struct flashchip flashchips[] = {
.block_erasers =
{
{
@@ -8054,8 +9548,12 @@ index 10c0989..c9cae79 100644
.block_erase = erase_sector_jedec,
}, {
.eraseblocks = { {512 * 1024, 1} },
-@@ -5599,7 +6869,8 @@ struct flashchip flashchips[] = {
- .model_id = W_25Q80,
+@@ -5596,10 +7004,11 @@ struct flashchip flashchips[] = {
+ .name = "W25Q80",
+ .bustype = CHIP_BUSTYPE_SPI,
+ .manufacture_id = WINBOND_NEX_ID,
+- .model_id = W_25Q80,
++ .model_id = WINBOND_NEX_W25Q80,
.total_size = 1024,
.page_size = 256,
- .tested = TEST_UNTESTED,
@@ -8064,7 +9562,7 @@ index 10c0989..c9cae79 100644
.probe = probe_spi_rdid,
.probe_timing = TIMING_ZERO,
.block_erasers =
-@@ -5621,6 +6892,7 @@ struct flashchip flashchips[] = {
+@@ -5621,6 +7030,7 @@ struct flashchip flashchips[] = {
.block_erase = spi_block_erase_c7,
}
},
@@ -8072,15 +9570,19 @@ index 10c0989..c9cae79 100644
.write = spi_chip_write_256,
.read = spi_chip_read,
},
-@@ -5633,6 +6905,7 @@ struct flashchip flashchips[] = {
- .model_id = W_25Q16,
+@@ -5630,9 +7040,10 @@ struct flashchip flashchips[] = {
+ .name = "W25Q16",
+ .bustype = CHIP_BUSTYPE_SPI,
+ .manufacture_id = WINBOND_NEX_ID,
+- .model_id = W_25Q16,
++ .model_id = WINBOND_NEX_W25Q16,
.total_size = 2048,
.page_size = 256,
+ .feature_bits = FEATURE_WRSR_WREN,
.tested = TEST_UNTESTED,
.probe = probe_spi_rdid,
.probe_timing = TIMING_ZERO,
-@@ -5655,6 +6928,7 @@ struct flashchip flashchips[] = {
+@@ -5655,6 +7066,7 @@ struct flashchip flashchips[] = {
.block_erase = spi_block_erase_c7,
}
},
@@ -8088,8 +9590,12 @@ index 10c0989..c9cae79 100644
.write = spi_chip_write_256,
.read = spi_chip_read,
},
-@@ -5667,7 +6941,8 @@ struct flashchip flashchips[] = {
- .model_id = W_25Q32,
+@@ -5664,10 +7076,11 @@ struct flashchip flashchips[] = {
+ .name = "W25Q32",
+ .bustype = CHIP_BUSTYPE_SPI,
+ .manufacture_id = WINBOND_NEX_ID,
+- .model_id = W_25Q32,
++ .model_id = WINBOND_NEX_W25Q32,
.total_size = 4096,
.page_size = 256,
- .tested = TEST_UNTESTED,
@@ -8098,7 +9604,7 @@ index 10c0989..c9cae79 100644
.probe = probe_spi_rdid,
.probe_timing = TIMING_ZERO,
.block_erasers =
-@@ -5689,6 +6964,43 @@ struct flashchip flashchips[] = {
+@@ -5689,6 +7102,43 @@ struct flashchip flashchips[] = {
.block_erase = spi_block_erase_c7,
}
},
@@ -8112,7 +9618,7 @@ index 10c0989..c9cae79 100644
+ .name = "W25Q64",
+ .bustype = CHIP_BUSTYPE_SPI,
+ .manufacture_id = WINBOND_NEX_ID,
-+ .model_id = W_25Q64,
++ .model_id = WINBOND_NEX_W25Q64,
+ .total_size = 8192,
+ .page_size = 256,
+ .feature_bits = FEATURE_WRSR_WREN,
@@ -8142,15 +9648,19 @@ index 10c0989..c9cae79 100644
.write = spi_chip_write_256,
.read = spi_chip_read,
},
-@@ -5701,6 +7013,7 @@ struct flashchip flashchips[] = {
- .model_id = W_25X10,
+@@ -5698,9 +7148,10 @@ struct flashchip flashchips[] = {
+ .name = "W25x10",
+ .bustype = CHIP_BUSTYPE_SPI,
+ .manufacture_id = WINBOND_NEX_ID,
+- .model_id = W_25X10,
++ .model_id = WINBOND_NEX_W25X10,
.total_size = 128,
.page_size = 256,
+ .feature_bits = FEATURE_WRSR_WREN,
.tested = TEST_UNTESTED,
.probe = probe_spi_rdid,
.probe_timing = TIMING_ZERO,
-@@ -5717,6 +7030,7 @@ struct flashchip flashchips[] = {
+@@ -5717,6 +7168,7 @@ struct flashchip flashchips[] = {
.block_erase = spi_block_erase_c7,
}
},
@@ -8158,15 +9668,19 @@ index 10c0989..c9cae79 100644
.write = spi_chip_write_256,
.read = spi_chip_read,
},
-@@ -5729,6 +7043,7 @@ struct flashchip flashchips[] = {
- .model_id = W_25X20,
+@@ -5726,9 +7178,10 @@ struct flashchip flashchips[] = {
+ .name = "W25x20",
+ .bustype = CHIP_BUSTYPE_SPI,
+ .manufacture_id = WINBOND_NEX_ID,
+- .model_id = W_25X20,
++ .model_id = WINBOND_NEX_W25X20,
.total_size = 256,
.page_size = 256,
+ .feature_bits = FEATURE_WRSR_WREN,
.tested = TEST_UNTESTED,
.probe = probe_spi_rdid,
.probe_timing = TIMING_ZERO,
-@@ -5745,6 +7060,7 @@ struct flashchip flashchips[] = {
+@@ -5745,6 +7198,7 @@ struct flashchip flashchips[] = {
.block_erase = spi_block_erase_c7,
}
},
@@ -8174,8 +9688,12 @@ index 10c0989..c9cae79 100644
.write = spi_chip_write_256,
.read = spi_chip_read,
},
-@@ -5757,7 +7073,8 @@ struct flashchip flashchips[] = {
- .model_id = W_25X40,
+@@ -5754,10 +7208,11 @@ struct flashchip flashchips[] = {
+ .name = "W25x40",
+ .bustype = CHIP_BUSTYPE_SPI,
+ .manufacture_id = WINBOND_NEX_ID,
+- .model_id = W_25X40,
++ .model_id = WINBOND_NEX_W25X40,
.total_size = 512,
.page_size = 256,
- .tested = TEST_OK_PRW,
@@ -8184,7 +9702,7 @@ index 10c0989..c9cae79 100644
.probe = probe_spi_rdid,
.probe_timing = TIMING_ZERO,
.block_erasers =
-@@ -5773,6 +7090,7 @@ struct flashchip flashchips[] = {
+@@ -5773,6 +7228,7 @@ struct flashchip flashchips[] = {
.block_erase = spi_block_erase_c7,
}
},
@@ -8192,8 +9710,12 @@ index 10c0989..c9cae79 100644
.write = spi_chip_write_256,
.read = spi_chip_read,
},
-@@ -5785,7 +7103,8 @@ struct flashchip flashchips[] = {
- .model_id = W_25X80,
+@@ -5782,10 +7238,11 @@ struct flashchip flashchips[] = {
+ .name = "W25x80",
+ .bustype = CHIP_BUSTYPE_SPI,
+ .manufacture_id = WINBOND_NEX_ID,
+- .model_id = W_25X80,
++ .model_id = WINBOND_NEX_W25X80,
.total_size = 1024,
.page_size = 256,
- .tested = TEST_OK_PRW,
@@ -8202,7 +9724,7 @@ index 10c0989..c9cae79 100644
.probe = probe_spi_rdid,
.probe_timing = TIMING_ZERO,
.block_erasers =
-@@ -5801,6 +7120,7 @@ struct flashchip flashchips[] = {
+@@ -5801,6 +7258,7 @@ struct flashchip flashchips[] = {
.block_erase = spi_block_erase_c7,
}
},
@@ -8210,8 +9732,12 @@ index 10c0989..c9cae79 100644
.write = spi_chip_write_256,
.read = spi_chip_read,
},
-@@ -5813,7 +7133,8 @@ struct flashchip flashchips[] = {
- .model_id = W_25X16,
+@@ -5810,10 +7268,11 @@ struct flashchip flashchips[] = {
+ .name = "W25x16",
+ .bustype = CHIP_BUSTYPE_SPI,
+ .manufacture_id = WINBOND_NEX_ID,
+- .model_id = W_25X16,
++ .model_id = WINBOND_NEX_W25X16,
.total_size = 2048,
.page_size = 256,
- .tested = TEST_OK_PR,
@@ -8220,7 +9746,7 @@ index 10c0989..c9cae79 100644
.probe = probe_spi_rdid,
.probe_timing = TIMING_ZERO,
.block_erasers =
-@@ -5835,6 +7156,7 @@ struct flashchip flashchips[] = {
+@@ -5835,6 +7294,7 @@ struct flashchip flashchips[] = {
.block_erase = spi_block_erase_c7,
}
},
@@ -8228,15 +9754,19 @@ index 10c0989..c9cae79 100644
.write = spi_chip_write_256,
.read = spi_chip_read,
},
-@@ -5847,6 +7169,7 @@ struct flashchip flashchips[] = {
- .model_id = W_25X32,
+@@ -5844,9 +7304,10 @@ struct flashchip flashchips[] = {
+ .name = "W25x32",
+ .bustype = CHIP_BUSTYPE_SPI,
+ .manufacture_id = WINBOND_NEX_ID,
+- .model_id = W_25X32,
++ .model_id = WINBOND_NEX_W25X32,
.total_size = 4096,
.page_size = 256,
+ .feature_bits = FEATURE_WRSR_WREN,
.tested = TEST_OK_PROBE,
.probe = probe_spi_rdid,
.probe_timing = TIMING_ZERO,
-@@ -5869,6 +7192,7 @@ struct flashchip flashchips[] = {
+@@ -5869,6 +7330,7 @@ struct flashchip flashchips[] = {
.block_erase = spi_block_erase_c7,
}
},
@@ -8244,15 +9774,19 @@ index 10c0989..c9cae79 100644
.write = spi_chip_write_256,
.read = spi_chip_read,
},
-@@ -5881,6 +7205,7 @@ struct flashchip flashchips[] = {
- .model_id = W_25X64,
+@@ -5878,9 +7340,10 @@ struct flashchip flashchips[] = {
+ .name = "W25x64",
+ .bustype = CHIP_BUSTYPE_SPI,
+ .manufacture_id = WINBOND_NEX_ID,
+- .model_id = W_25X64,
++ .model_id = WINBOND_NEX_W25X64,
.total_size = 8192,
.page_size = 256,
+ .feature_bits = FEATURE_WRSR_WREN,
.tested = TEST_UNTESTED,
.probe = probe_spi_rdid,
.probe_timing = TIMING_ZERO,
-@@ -5903,6 +7228,7 @@ struct flashchip flashchips[] = {
+@@ -5903,16 +7366,17 @@ struct flashchip flashchips[] = {
.block_erase = spi_block_erase_c7,
}
},
@@ -8260,7 +9794,28 @@ index 10c0989..c9cae79 100644
.write = spi_chip_write_256,
.read = spi_chip_read,
},
-@@ -5939,7 +7265,7 @@ struct flashchip flashchips[] = {
+
+ {
+ .vendor = "Winbond",
+- .name = "W29C011",
++ .name = "W29C010(M)/W29C011A/W29EE011/W29EE012",
+ .bustype = CHIP_BUSTYPE_PARALLEL,
+ .manufacture_id = WINBOND_ID,
+- .model_id = W_29C011,
++ .model_id = WINBOND_W29C010,
+ .total_size = 128,
+ .page_size = 128,
+ .feature_bits = FEATURE_LONG_RESET,
+@@ -5932,14 +7396,14 @@ struct flashchip flashchips[] = {
+
+ {
+ .vendor = "Winbond",
+- .name = "W29C020C",
++ .name = "W29C020(C)/W29C022",
+ .bustype = CHIP_BUSTYPE_PARALLEL,
+ .manufacture_id = WINBOND_ID,
+- .model_id = W_29C020C,
++ .model_id = WINBOND_W29C020,
.total_size = 256,
.page_size = 128,
.feature_bits = FEATURE_LONG_RESET,
@@ -8269,7 +9824,29 @@ index 10c0989..c9cae79 100644
.probe = probe_jedec,
.probe_timing = 10,
.block_erasers =
-@@ -5985,7 +7311,7 @@ struct flashchip flashchips[] = {
+@@ -5955,10 +7419,10 @@ struct flashchip flashchips[] = {
+
+ {
+ .vendor = "Winbond",
+- .name = "W29C040P",
++ .name = "W29C040/P",
+ .bustype = CHIP_BUSTYPE_PARALLEL,
+ .manufacture_id = WINBOND_ID,
+- .model_id = W_29C040P,
++ .model_id = WINBOND_W29C040,
+ .total_size = 512,
+ .page_size = 256,
+ .feature_bits = FEATURE_LONG_RESET,
+@@ -5978,14 +7442,14 @@ struct flashchip flashchips[] = {
+
+ {
+ .vendor = "Winbond",
+- .name = "W29EE011",
++ .name = "W29C010(M)/W29C011A/W29EE011/W29EE012",
+ .bustype = CHIP_BUSTYPE_PARALLEL,
+ .manufacture_id = WINBOND_ID,
+- .model_id = W_29C011,
++ .model_id = WINBOND_W29C010,
.total_size = 128,
.page_size = 128,
.feature_bits = FEATURE_LONG_RESET,
@@ -8278,7 +9855,25 @@ index 10c0989..c9cae79 100644
.probe = probe_w29ee011,
.probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (w29ee011.c) */
.block_erasers =
-@@ -6034,7 +7360,7 @@ struct flashchip flashchips[] = {
+@@ -6004,7 +7468,7 @@ struct flashchip flashchips[] = {
+ .name = "W39V040A",
+ .bustype = CHIP_BUSTYPE_LPC,
+ .manufacture_id = WINBOND_ID,
+- .model_id = W_39V040A,
++ .model_id = WINBOND_W39V040A,
+ .total_size = 512,
+ .page_size = 64 * 1024,
+ .feature_bits = FEATURE_EITHER_RESET,
+@@ -6027,14 +7491,14 @@ struct flashchip flashchips[] = {
+
+ {
+ .vendor = "Winbond",
+- .name = "W39V040B",
++ .name = "W39V040(F)B",
+ .bustype = CHIP_BUSTYPE_LPC,
+ .manufacture_id = WINBOND_ID,
+- .model_id = W_39V040B,
++ .model_id = WINBOND_W39V040B,
.total_size = 512,
.page_size = 64 * 1024,
.feature_bits = FEATURE_EITHER_RESET,
@@ -8287,8 +9882,25 @@ index 10c0989..c9cae79 100644
.probe = probe_jedec,
.probe_timing = 10,
.block_erasers =
-@@ -6086,8 +7412,8 @@ struct flashchip flashchips[] = {
- .model_id = W_39V040FA,
+@@ -6053,10 +7517,10 @@ struct flashchip flashchips[] = {
+
+ {
+ .vendor = "Winbond",
+- .name = "W39V040C",
++ .name = "W39V040(F)C",
+ .bustype = CHIP_BUSTYPE_LPC,
+ .manufacture_id = WINBOND_ID,
+- .model_id = W_39V040C,
++ .model_id = WINBOND_W39V040C,
+ .total_size = 512,
+ .page_size = 64 * 1024,
+ .feature_bits = FEATURE_EITHER_RESET,
+@@ -6083,11 +7547,11 @@ struct flashchip flashchips[] = {
+ .name = "W39V040FA",
+ .bustype = CHIP_BUSTYPE_FWH,
+ .manufacture_id = WINBOND_ID,
+- .model_id = W_39V040FA,
++ .model_id = WINBOND_W39V040FA,
.total_size = 512,
.page_size = 64 * 1024,
- .feature_bits = FEATURE_EITHER_RESET,
@@ -8298,7 +9910,7 @@ index 10c0989..c9cae79 100644
.probe = probe_jedec,
.probe_timing = 10,
.block_erasers =
-@@ -6103,6 +7429,8 @@ struct flashchip flashchips[] = {
+@@ -6103,6 +7567,8 @@ struct flashchip flashchips[] = {
.block_erase = erase_chip_block_jedec,
}
},
@@ -8307,7 +9919,25 @@ index 10c0989..c9cae79 100644
.write = write_jedec_1,
.read = read_memmapped,
},
-@@ -6142,7 +7470,7 @@ struct flashchip flashchips[] = {
+@@ -6112,7 +7578,7 @@ struct flashchip flashchips[] = {
+ .name = "W39V080A",
+ .bustype = CHIP_BUSTYPE_LPC,
+ .manufacture_id = WINBOND_ID,
+- .model_id = W_39V080A,
++ .model_id = WINBOND_W39V080A,
+ .total_size = 1024,
+ .page_size = 64 * 1024,
+ .feature_bits = FEATURE_EITHER_RESET,
+@@ -6135,14 +7601,14 @@ struct flashchip flashchips[] = {
+
+ {
+ .vendor = "Winbond",
+- .name = "W49F002U",
++ .name = "W49F002U/N",
+ .bustype = CHIP_BUSTYPE_PARALLEL,
+ .manufacture_id = WINBOND_ID,
+- .model_id = W_49F002U,
++ .model_id = WINBOND_W49F002U,
.total_size = 256,
.page_size = 128,
.feature_bits = FEATURE_EITHER_RESET,
@@ -8316,14 +9946,14 @@ index 10c0989..c9cae79 100644
.probe = probe_jedec,
.probe_timing = 10,
.block_erasers =
-@@ -6166,6 +7494,29 @@ struct flashchip flashchips[] = {
+@@ -6166,14 +7632,37 @@ struct flashchip flashchips[] = {
{
.vendor = "Winbond",
+ .name = "W49F020",
+ .bustype = CHIP_BUSTYPE_PARALLEL,
+ .manufacture_id = WINBOND_ID,
-+ .model_id = W_49F020,
++ .model_id = WINBOND_W49F020,
+ .total_size = 256,
+ .page_size = 128,
+ .feature_bits = FEATURE_EITHER_RESET,
@@ -8346,7 +9976,8 @@ index 10c0989..c9cae79 100644
.name = "W49V002A",
.bustype = CHIP_BUSTYPE_LPC,
.manufacture_id = WINBOND_ID,
-@@ -6173,7 +7524,7 @@ struct flashchip flashchips[] = {
+- .model_id = W_49V002A,
++ .model_id = WINBOND_W49V002A,
.total_size = 256,
.page_size = 128,
.feature_bits = FEATURE_EITHER_RESET,
@@ -8355,7 +9986,21 @@ index 10c0989..c9cae79 100644
.probe = probe_jedec,
.probe_timing = 10,
.block_erasers =
-@@ -6235,7 +7586,7 @@ struct flashchip flashchips[] = {
+@@ -6200,7 +7689,7 @@ struct flashchip flashchips[] = {
+ .name = "W49V002FA",
+ .bustype = CHIP_BUSTYPE_FWH,
+ .manufacture_id = WINBOND_ID,
+- .model_id = W_49V002FA,
++ .model_id = WINBOND_W49V002FA,
+ .total_size = 256,
+ .page_size = 128,
+ .feature_bits = FEATURE_EITHER_RESET,
+@@ -6231,11 +7720,11 @@ struct flashchip flashchips[] = {
+ .name = "W39V080FA",
+ .bustype = CHIP_BUSTYPE_FWH,
+ .manufacture_id = WINBOND_ID,
+- .model_id = W_39V080FA,
++ .model_id = WINBOND_W39V080FA,
.total_size = 1024,
.page_size = 64 * 1024,
.feature_bits = FEATURE_REGISTERMAP | FEATURE_EITHER_RESET,
@@ -8364,7 +10009,16 @@ index 10c0989..c9cae79 100644
.probe = probe_jedec,
.probe_timing = TIMING_FIXME,
.block_erasers =
-@@ -6281,6 +7632,21 @@ struct flashchip flashchips[] = {
+@@ -6258,7 +7747,7 @@ struct flashchip flashchips[] = {
+ .name = "W39V080FA (dual mode)",
+ .bustype = CHIP_BUSTYPE_FWH,
+ .manufacture_id = WINBOND_ID,
+- .model_id = W_39V080FA_DM,
++ .model_id = WINBOND_W39V080FA_DM,
+ .total_size = 512,
+ .page_size = 64 * 1024,
+ .feature_bits = FEATURE_REGISTERMAP | FEATURE_EITHER_RESET,
+@@ -6281,6 +7770,21 @@ struct flashchip flashchips[] = {
},
{
@@ -8386,7 +10040,7 @@ index 10c0989..c9cae79 100644
.vendor = "Atmel",
.name = "unknown Atmel SPI chip",
.bustype = CHIP_BUSTYPE_SPI,
-@@ -6296,8 +7662,8 @@ struct flashchip flashchips[] = {
+@@ -6296,8 +7800,8 @@ struct flashchip flashchips[] = {
},
{
@@ -8397,11 +10051,101 @@ index 10c0989..c9cae79 100644
.bustype = CHIP_BUSTYPE_SPI,
.manufacture_id = EON_ID_NOPREFIX,
.model_id = GENERIC_DEVICE_ID,
+@@ -6314,7 +7818,7 @@ struct flashchip flashchips[] = {
+ .vendor = "Macronix",
+ .name = "unknown Macronix SPI chip",
+ .bustype = CHIP_BUSTYPE_SPI,
+- .manufacture_id = MX_ID,
++ .manufacture_id = MACRONIX_ID,
+ .model_id = GENERIC_DEVICE_ID,
+ .total_size = 0,
+ .page_size = 256,
diff --git a/flashchips.h b/flashchips.h
-index bfd8145..8a7e89b 100644
+index bfd8145..dbe6d93 100644
--- a/flashchips.h
+++ b/flashchips.h
-@@ -75,7 +75,27 @@
+@@ -38,44 +38,76 @@
+ #define GENERIC_DEVICE_ID 0xffff /* Only match the vendor ID */
+
+ #define ALLIANCE_ID 0x52 /* Alliance Semiconductor */
++#define ALLIANCE_AS29F002B 0x34
++#define ALLIANCE_AS29F002T 0xB0
++#define ALLIANCE_AS29F010 0x04
++#define ALLIANCE_AS29F040 0xA4
++#define ALLIANCE_AS29F200B 0x57
++#define ALLIANCE_AS29F200T 0x51
++#define ALLIANCE_AS29LV160B 0x49
++#define ALLIANCE_AS29LV160T 0xCA
++#define ALLIANCE_AS29LV400B 0xBA
++#define ALLIANCE_AS29LV400T 0xB9
++#define ALLIANCE_AS29LV800B 0x5B
++#define ALLIANCE_AS29LV800T 0xDA
+
+ #define AMD_ID 0x01 /* AMD */
+-#define AM_29DL400BT 0x0C
+-#define AM_29DL400BB 0x0F
+-#define AM_29DL800BT 0x4A
+-#define AM_29DL800BB 0xCB
+-#define AM_29F002BB 0x34 /* Same as Am29F002NBB */
+-#define AM_29F002BT 0xB0 /* Same as Am29F002NBT */
+-#define AM_29F004BB 0x7B
+-#define AM_29F004BT 0x77
+-#define AM_29F016D 0xAD
+-#define AM_29F010B 0x20 /* Same as Am29F010A */
+-#define AM_29F040B 0xA4
+-#define AM_29F080B 0xD5
+-#define AM_29F200BB 0x57
+-#define AM_29F200BT 0x51
+-#define AM_29F400BB 0xAB
+-#define AM_29F400BT 0x23
+-#define AM_29F800BB 0x58
+-#define AM_29F800BT 0xD6
+-#define AM_29LV002BB 0xC2
+-#define AM_29LV002BT 0x40
+-#define AM_29LV004BB 0xB6
+-#define AM_29LV004BT 0xB5
+-#define AM_29LV008BB 0x37
+-#define AM_29LV008BT 0x3E
+-#define AM_29LV040B 0x4F
+-#define AM_29LV080B 0x38 /* Same as Am29LV081B */
+-#define AM_29LV200BB 0xBF
+-#define AM_29LV200BT 0x3B
+-#define AM_29LV800BB 0x5B /* Same as Am29LV800DB */
+-#define AM_29LV400BT 0xB9
+-#define AM_29LV400BB 0xBA
+-#define AM_29LV800BT 0xDA /* Same as Am29LV800DT */
++#define AMD_AM29DL400BT 0x0C
++#define AMD_AM29DL400BB 0x0F
++#define AMD_AM29DL800BT 0x4A
++#define AMD_AM29DL800BB 0xCB
++#define AMD_AM29F002BB 0x34 /* Same as Am29F002NBB */
++#define AMD_AM29F002BT 0xB0 /* Same as Am29F002NBT */
++#define AMD_AM29F004BB 0x7B
++#define AMD_AM29F004BT 0x77
++#define AMD_AM29F016D 0xAD
++#define AMD_AM29F010B 0x20 /* Same as Am29F010A */
++#define AMD_AM29F040B 0xA4
++#define AMD_AM29F080B 0xD5
++#define AMD_AM29F200BB 0x57
++#define AMD_AM29F200BT 0x51
++#define AMD_AM29F400BB 0xAB
++#define AMD_AM29F400BT 0x23
++#define AMD_AM29F800BB 0x58
++#define AMD_AM29F800BT 0xD6
++#define AMD_AM29LV002BB 0xC2
++#define AMD_AM29LV002BT 0x40
++#define AMD_AM29LV004BB 0xB6
++#define AMD_AM29LV004BT 0xB5
++#define AMD_AM29LV008BB 0x37
++#define AMD_AM29LV008BT 0x3E
++#define AMD_AM29LV040B 0x4F
++#define AMD_AM29LV080B 0x38 /* Same as Am29LV081B */
++#define AMD_AM29LV200BB 0xBF
++#define AMD_AM29LV200BT 0x3B
++#define AMD_AM29LV800BB 0x5B /* Same as Am29LV800DB */
++#define AMD_AM29LV400BT 0xB9
++#define AMD_AM29LV400BB 0xBA
++#define AMD_AM29LV800BT 0xDA /* Same as Am29LV800DT */
#define AMIC_ID 0x7F37 /* AMIC */
#define AMIC_ID_NOPREFIX 0x37 /* AMIC */
@@ -8430,34 +10174,131 @@ index bfd8145..8a7e89b 100644
#define AMIC_A29002B 0x0d
#define AMIC_A29002T 0x8C /* Same as A290021T */
#define AMIC_A29040B 0x86
-@@ -98,12 +118,19 @@
- #define AT_25DF021 0x4300
- #define AT_25DF041A 0x4401
- #define AT_25DF081 0x4502
-+#define AT_25DF081A 0x4501 /* Yes, 81A has a lower number than 81 */
- #define AT_25DF161 0x4602
- #define AT_25DF321 0x4700 /* Same as 26DF321 */
- #define AT_25DF321A 0x4701
- #define AT_25DF641 0x4800
+@@ -90,66 +122,77 @@
+ #define AMIC_A29L040 0x92
+ #define AMIC_A49LF040A 0x9d
+
+-/* This chip vendor/device ID is probably a misinterpreted LHA header. */
+-#define ASD_ID 0x25 /* ASD, not listed in JEP106W */
+-#define ASD_AE49F2008 0x52
+-
+ #define ATMEL_ID 0x1F /* Atmel */
+-#define AT_25DF021 0x4300
+-#define AT_25DF041A 0x4401
+-#define AT_25DF081 0x4502
+-#define AT_25DF161 0x4602
+-#define AT_25DF321 0x4700 /* Same as 26DF321 */
+-#define AT_25DF321A 0x4701
+-#define AT_25DF641 0x4800
-#define AT_25F512A 0x65 /* Needs special RDID. AT25F512A_RDID 15 1d */
-+#define AT_25DQ161 0x8600
-+#define AT25F512 /* No device ID found in datasheet. Vendor ID
+-#define AT_25F512B 0x6500
+-#define AT_25FS010 0x6601
+-#define AT_25FS040 0x6604
+-#define AT_26DF041 0x4400
+-#define AT_26DF081 0x4500 /* guessed, no datasheet available */
+-#define AT_26DF081A 0x4501
+-#define AT_26DF161 0x4600
+-#define AT_26DF161A 0x4601
+-#define AT_26DF321 0x4700 /* Same as 25DF321 */
+-#define AT_26F004 0x0400
+-#define AT_29C040A 0xA4
+-#define AT_29C010A 0xD5
+-#define AT_29C020 0xDA
+-#define AT_29C512 0x5D
+-#define AT_45BR3214B /* No ID available */
+-#define AT_45CS1282 0x2920
+-#define AT_45D011 /* No ID available */
+-#define AT_45D021A /* No ID available */
+-#define AT_45D041A /* No ID available */
+-#define AT_45D081A /* No ID available */
+-#define AT_45D161 /* No ID available */
+-#define AT_45DB011 /* No ID available */
+-#define AT_45DB011B /* No ID available */
+-#define AT_45DB011D 0x2200
+-#define AT_45DB021A /* No ID available */
+-#define AT_45DB021B /* No ID available */
+-#define AT_45DB021D 0x2300
+-#define AT_45DB041A /* No ID available */
+-#define AT_45DB041D 0x2400
+-#define AT_45DB081A /* No ID available */
+-#define AT_45DB081D 0x2500
+-#define AT_45DB161 /* No ID available */
+-#define AT_45DB161B /* No ID available */
+-#define AT_45DB161D 0x2600
+-#define AT_45DB321 /* No ID available */
+-#define AT_45DB321B /* No ID available */
+-#define AT_45DB321C 0x2700
+-#define AT_45DB321D 0x2701 /* Buggy data sheet */
+-#define AT_45DB642 /* No ID available */
+-#define AT_45DB642D 0x2800
+-#define AT_49BV512 0x03
+-#define AT_49F002N 0x07 /* for AT49F002(N) */
+-#define AT_49F002NT 0x08 /* for AT49F002(N)T */
++#define ATMEL_AT25DF021 0x4300
++#define ATMEL_AT25DF041A 0x4401
++#define ATMEL_AT25DF081 0x4502
++#define ATMEL_AT25DF081A 0x4501 /* Yes, 81A has a lower number than 81 */
++#define ATMEL_AT25DF161 0x4602
++#define ATMEL_AT25DF321 0x4700 /* Same as 26DF321 */
++#define ATMEL_AT25DF321A 0x4701
++#define ATMEL_AT25DF641 0x4800
++#define ATMEL_AT25DQ161 0x8600
++#define ATMEL_AT25F512 /* No device ID found in datasheet. Vendor ID
+ * can be read with AT25F512A_RDID */
-+#define AT_25F512A 0x65 /* Needs AT25F512A_RDID */
- #define AT_25F512B 0x6500
-+#define AT25F1024 /* No device ID found in datasheet. Vendor ID
++#define ATMEL_AT25F512A 0x65 /* Needs AT25F512A_RDID */
++#define ATMEL_AT25F512B 0x6500
++#define ATMEL_AT25F1024 /* No device ID found in datasheet. Vendor ID
+ * can be read with AT25F512A_RDID */
-+#define AT_25F1024A 0x60 /* Needs AT25F512A_RDID */
- #define AT_25FS010 0x6601
- #define AT_25FS040 0x6604
- #define AT_26DF041 0x4400
-@@ -144,12 +171,14 @@
- #define AT_45DB642 /* No ID available */
- #define AT_45DB642D 0x2800
- #define AT_49BV512 0x03
-+#define AT_49F020 0x0B
- #define AT_49F002N 0x07 /* for AT49F002(N) */
- #define AT_49F002NT 0x08 /* for AT49F002(N)T */
++#define ATMEL_AT25F1024A 0x60 /* Needs AT25F512A_RDID */
++#define ATMEL_AT25FS010 0x6601
++#define ATMEL_AT25FS040 0x6604
++#define ATMEL_AT26DF041 0x4400
++#define ATMEL_AT26DF081 0x4500 /* guessed, no datasheet available */
++#define ATMEL_AT26DF081A 0x4501
++#define ATMEL_AT26DF161 0x4600
++#define ATMEL_AT26DF161A 0x4601
++#define ATMEL_AT26DF321 0x4700 /* Same as 25DF321 */
++#define ATMEL_AT26F004 0x0400
++#define ATMEL_AT29C040A 0xA4
++#define ATMEL_AT29C010A 0xD5
++#define ATMEL_AT29C020 0xDA
++#define ATMEL_AT29C512 0x5D
++#define ATMEL_AT45BR3214B /* No ID available */
++#define ATMEL_AT45CS1282 0x2920
++#define ATMEL_AT45D011 /* No ID available */
++#define ATMEL_AT45D021A /* No ID available */
++#define ATMEL_AT45D041A /* No ID available */
++#define ATMEL_AT45D081A /* No ID available */
++#define ATMEL_AT45D161 /* No ID available */
++#define ATMEL_AT45DB011 /* No ID available */
++#define ATMEL_AT45DB011B /* No ID available */
++#define ATMEL_AT45DB011D 0x2200
++#define ATMEL_AT45DB021A /* No ID available */
++#define ATMEL_AT45DB021B /* No ID available */
++#define ATMEL_AT45DB021D 0x2300
++#define ATMEL_AT45DB041A /* No ID available */
++#define ATMEL_AT45DB041D 0x2400
++#define ATMEL_AT45DB081A /* No ID available */
++#define ATMEL_AT45DB081D 0x2500
++#define ATMEL_AT45DB161 /* No ID available */
++#define ATMEL_AT45DB161B /* No ID available */
++#define ATMEL_AT45DB161D 0x2600
++#define ATMEL_AT45DB321 /* No ID available */
++#define ATMEL_AT45DB321B /* No ID available */
++#define ATMEL_AT45DB321C 0x2700
++#define ATMEL_AT45DB321D 0x2701 /* Buggy data sheet */
++#define ATMEL_AT45DB642 /* No ID available */
++#define ATMEL_AT45DB642D 0x2800
++#define ATMEL_AT49BV512 0x03
++#define ATMEL_AT49F020 0x0B
++#define ATMEL_AT49F002N 0x07 /* for AT49F002(N) */
++#define ATMEL_AT49F002NT 0x08 /* for AT49F002(N)T */
++
++/* Bright Microelectronics has the same manufacturer ID as Hyundai... */
++#define BRIGHT_ID 0xAD /* Bright Microelectronics */
++#define BRIGHT_BM29F040 0x40
++#define BRIGHT_BM29F400B 0xAB
++#define BRIGHT_BM29F400T 0xAD
#define CATALYST_ID 0x31 /* Catalyst */
@@ -8466,17 +10307,183 @@ index bfd8145..8a7e89b 100644
#define EMST_F49B002UA 0x00
/*
-@@ -240,7 +269,8 @@
- #define HY_29LV800B 0x5B
- #define HY_29F040A 0xA4
- #define HY_29F400B 0xAB /* Same as HY_29F400AB */
+@@ -163,93 +206,94 @@
+ */
+ #define EON_ID 0x7F1C /* EON Silicon Devices */
+ #define EON_ID_NOPREFIX 0x1C /* EON, missing 0x7F prefix */
+-#define EN_25B05 0x2010 /* Same as P05, 2^19 kbit or 2^16 kByte */
+-#define EN_25B05T 0x25
+-#define EN_25B05B 0x95
+-#define EN_25B10 0x2011 /* Same as P10 */
+-#define EN_25B10T 0x40
+-#define EN_25B10B 0x30
+-#define EN_25B20 0x2012 /* Same as P20 */
+-#define EN_25B20T 0x41
+-#define EN_25B20B 0x31
+-#define EN_25B40 0x2013 /* Same as P40 */
+-#define EN_25B40T 0x42
+-#define EN_25B40B 0x32
+-#define EN_25B80 0x2014 /* Same as P80 */
+-#define EN_25B80T 0x43
+-#define EN_25B80B 0x33
+-#define EN_25B16 0x2015 /* Same as P16 */
+-#define EN_25B16T 0x44
+-#define EN_25B16B 0x34
+-#define EN_25B32 0x2016 /* Same as P32 */
+-#define EN_25B32T 0x45
+-#define EN_25B32B 0x35
+-#define EN_25B64 0x2017 /* Same as P64 */
+-#define EN_25B64T 0x46
+-#define EN_25B64B 0x36
+-#define EN_25D16 0x3015
+-#define EN_25F05 0x3110
+-#define EN_25F10 0x3111
+-#define EN_25F20 0x3112
+-#define EN_25F40 0x3113
+-#define EN_25F80 0x3114
+-#define EN_25F16 0x3115
+-#define EN_25F32 0x3116
+-#define EN_29F512 0x7F21
+-#define EN_29F010 0x20
+-#define EN_29F040A 0x7F04
+-#define EN_29LV010 0x7F6E
+-#define EN_29LV040A 0x7F4F /* EN_29LV040(A) */
+-#define EN_29F002T 0x7F92 /* Same as EN29F002A */
+-#define EN_29F002B 0x7F97 /* Same as EN29F002AN */
++#define EON_EN25B05 0x2010 /* Same as P05, 2^19 kbit or 2^16 kByte */
++#define EON_EN25B05T 0x25
++#define EON_EN25B05B 0x95
++#define EON_EN25B10 0x2011 /* Same as P10 */
++#define EON_EN25B10T 0x40
++#define EON_EN25B10B 0x30
++#define EON_EN25B20 0x2012 /* Same as P20 */
++#define EON_EN25B20T 0x41
++#define EON_EN25B20B 0x31
++#define EON_EN25B40 0x2013 /* Same as P40 */
++#define EON_EN25B40T 0x42
++#define EON_EN25B40B 0x32
++#define EON_EN25B80 0x2014 /* Same as P80 */
++#define EON_EN25B80T 0x43
++#define EON_EN25B80B 0x33
++#define EON_EN25B16 0x2015 /* Same as P16 */
++#define EON_EN25B16T 0x44
++#define EON_EN25B16B 0x34
++#define EON_EN25B32 0x2016 /* Same as P32 */
++#define EON_EN25B32T 0x45
++#define EON_EN25B32B 0x35
++#define EON_EN25B64 0x2017 /* Same as P64 */
++#define EON_EN25B64T 0x46
++#define EON_EN25B64B 0x36
++#define EON_EN25D16 0x3015
++#define EON_EN25F05 0x3110
++#define EON_EN25F10 0x3111
++#define EON_EN25F20 0x3112
++#define EON_EN25F40 0x3113
++#define EON_EN25F80 0x3114
++#define EON_EN25F16 0x3115
++#define EON_EN25F32 0x3116
++#define EON_EN29F512 0x7F21
++#define EON_EN29F010 0x20
++#define EON_EN29F040A 0x7F04
++#define EON_EN29LV010 0x7F6E
++#define EON_EN29LV040A 0x7F4F /* EN29LV040(A) */
++#define EON_EN29F002T 0x7F92 /* Same as EN29F002A */
++#define EON_EN29F002B 0x7F97 /* Same as EN29F002AN */
+
+ #define FUJITSU_ID 0x04 /* Fujitsu */
+-#define MBM29DL400BC 0x0F
+-#define MBM29DL400TC 0x0C
+-#define MBM29DL800BA 0xCB
+-#define MBM29DL800TA 0x4A
+-#define MBM29F002BC 0x34
+-#define MBM29F002TC 0xB0
+-#define MBM29F004BC 0x7B
+-#define MBM29F004TC 0x77
+-#define MBM29F040C 0xA4
+-#define MBM29F080A 0xD5
+-#define MBM29F200BC 0x57
+-#define MBM29F200TC 0x51
+-#define MBM29F400BC 0xAB
+-#define MBM29F400TC 0x23
+-#define MBM29F800BA 0x58
+-#define MBM29F800TA 0xD6
+-#define MBM29LV002BC 0xC2
+-#define MBM29LV002TC 0x40
+-#define MBM29LV004BC 0xB6
+-#define MBM29LV004TC 0xB5
+-#define MBM29LV008BA 0x37
+-#define MBM29LV008TA 0x3E
+-#define MBM29LV080A 0x38
+-#define MBM29LV200BC 0xBF
+-#define MBM29LV200TC 0x3B
+-#define MBM29LV400BC 0xBA
+-#define MBM29LV400TC 0xB9
+-#define MBM29LV800BA 0x5B /* Same as MBM29LV800BE */
+-#define MBM29LV800TA 0xDA /* Same as MBM29LV800TE */
++#define FUJITSU_MBM29DL400BC 0x0F
++#define FUJITSU_MBM29DL400TC 0x0C
++#define FUJITSU_MBM29DL800BA 0xCB
++#define FUJITSU_MBM29DL800TA 0x4A
++#define FUJITSU_MBM29F002BC 0x34
++#define FUJITSU_MBM29F002TC 0xB0
++#define FUJITSU_MBM29F004BC 0x7B
++#define FUJITSU_MBM29F004TC 0x77
++#define FUJITSU_MBM29F040C 0xA4
++#define FUJITSU_MBM29F080A 0xD5
++#define FUJITSU_MBM29F200BC 0x57
++#define FUJITSU_MBM29F200TC 0x51
++#define FUJITSU_MBM29F400BC 0xAB
++#define FUJITSU_MBM29F400TC 0x23
++#define FUJITSU_MBM29F800BA 0x58
++#define FUJITSU_MBM29F800TA 0xD6
++#define FUJITSU_MBM29LV002BC 0xC2
++#define FUJITSU_MBM29LV002TC 0x40
++#define FUJITSU_MBM29LV004BC 0xB6
++#define FUJITSU_MBM29LV004TC 0xB5
++#define FUJITSU_MBM29LV008BA 0x37
++#define FUJITSU_MBM29LV008TA 0x3E
++#define FUJITSU_MBM29LV080A 0x38
++#define FUJITSU_MBM29LV200BC 0xBF
++#define FUJITSU_MBM29LV200TC 0x3B
++#define FUJITSU_MBM29LV400BC 0xBA
++#define FUJITSU_MBM29LV400TC 0xB9
++#define FUJITSU_MBM29LV800BA 0x5B /* Same as MBM29LV800BE */
++#define FUJITSU_MBM29LV800TA 0xDA /* Same as MBM29LV800TE */
+
+ #define HYUNDAI_ID 0xAD /* Hyundai */
+-#define HY_29F400T 0x23 /* Same as HY_29F400AT */
+-#define HY_29F800B 0x58 /* Same as HY_29F800AB */
+-#define HY_29LV800B 0x5B
+-#define HY_29F040A 0xA4
+-#define HY_29F400B 0xAB /* Same as HY_29F400AB */
-#define HY_29F002 0xB0
-+#define HY_29F002B 0x34
-+#define HY_29F002T 0xB0
- #define HY_29LV400T 0xB9
- #define HY_29LV400B 0xBA
- #define HY_29F080 0xD5
-@@ -259,6 +289,7 @@
+-#define HY_29LV400T 0xB9
+-#define HY_29LV400B 0xBA
+-#define HY_29F080 0xD5
+-#define HY_29F800T 0xD6 /* Same as HY_29F800AT */
+-#define HY_29LV800T 0xDA
++#define HYUNDAI_HY29F400T 0x23 /* Same as HY29F400AT */
++#define HYUNDAI_HY29F800B 0x58 /* Same as HY29F800AB */
++#define HYUNDAI_HY29LV800B 0x5B
++#define HYUNDAI_HY29F040A 0xA4
++#define HYUNDAI_HY29F400B 0xAB /* Same as HY29F400AB */
++#define HYUNDAI_HY29F002B 0x34
++#define HYUNDAI_HY29F002T 0xB0
++#define HYUNDAI_HY29LV400T 0xB9
++#define HYUNDAI_HY29LV400B 0xBA
++#define HYUNDAI_HY29F080 0xD5
++#define HYUNDAI_HY29F800T 0xD6 /* Same as HY29F800AT */
++#define HYUNDAI_HY29LV800T 0xDA
+
+ #define IMT_ID 0x7F1F /* Integrated Memory Technologies */
+-#define IM_29F004B 0xAE
+-#define IM_29F004T 0xAF
++#define IMT_IM29F004B 0xAE
++#define IMT_IM29F004T 0xAF
+
+ #define INTEL_ID 0x89 /* Intel */
+ #define I_82802AB 0xAD
+@@ -259,6 +303,7 @@
#define E_28F016S5 0xAA
#define P28F001BXT 0x94 /* 28F001BX-T */
#define P28F001BXB 0x95 /* 28F001BX-B */
@@ -8484,24 +10491,285 @@ index bfd8145..8a7e89b 100644
#define P28F004BT 0x78 /* 28F004BV/BE-T */
#define P28F004BB 0x79 /* 28F004BV/BE-B */
#define P28F400BT 0x70 /* 28F400BV/CV/CE-T */
-@@ -387,7 +418,7 @@
- #define SST_25VF512A_REMS 0x48 /* REMS or RES opcode */
- #define SST_25VF010_REMS 0x49 /* REMS or RES opcode */
- #define SST_25VF020_REMS 0x43 /* REMS or RES opcode */
+@@ -274,57 +319,58 @@
+ * Generalplus SPI chips seem to be compatible with Macronix
+ * and use the same set of IDs.
+ */
+-#define MX_ID 0xC2 /* Macronix (MX) */
+-#define MX_25L512 0x2010 /* Same as MX25V512 */
+-#define MX_25L1005 0x2011
+-#define MX_25L2005 0x2012
+-#define MX_25L4005 0x2013 /* MX25L4005{,A} */
+-#define MX_25L8005 0x2014 /* Same as MX25V8005 */
+-#define MX_25L1605 0x2015 /* MX25L1605{,A,D} */
+-#define MX_25L3205 0x2016 /* MX25L3205{,A} */
+-#define MX_25L6405 0x2017 /* MX25L3205{,D} */
+-#define MX_25L12805 0x2018 /* MX25L12805 */
+-#define MX_25L1635D 0x2415
+-#define MX_25L3235D 0x5E16 /* MX25L3225D/MX25L3235D/MX25L3237D */
+-#define MX_29F001B 0x19
+-#define MX_29F001T 0x18
+-#define MX_29F002B 0x34 /* Same as MX29F002NB */
+-#define MX_29F002T 0xB0 /* Same as MX29F002NT */
+-#define MX_29F004B 0x46
+-#define MX_29F004T 0x45
+-#define MX_29F022T 0x36 /* Same as MX29F022NT */
+-#define MX_29F040 0xA4 /* Same as MX29F040C */
+-#define MX_29F080 0xD5
+-#define MX_29F200B 0x57 /* Same as MX29F200CB */
+-#define MX_29F200T 0x51 /* Same as MX29F200CT */
+-#define MX_29F400B 0xAB /* Same as MX29F400CB */
+-#define MX_29F400T 0x23 /* Same as MX29F400CT */
+-#define MX_29F800B 0x58
+-#define MX_29F800T 0xD6
+-#define MX_29LV002CB 0x5A
+-#define MX_29LV002CT 0x59
+-#define MX_29LV004B 0xB6 /* Same as MX29LV004CB */
+-#define MX_29LV004T 0xB5 /* Same as MX29LV004CT */
+-#define MX_29LV008B 0x37 /* Same as MX29LV008CB */
+-#define MX_29LV008T 0x3E /* Same as MX29LV008CT */
+-#define MX_29LV040 0x4F /* Same as MX29LV040C */
+-#define MX_29LV081 0x38
+-#define MX_29LV128DB 0x7A
+-#define MX_29LV128DT 0x7E
+-#define MX_29LV160DB 0x49 /* Same as MX29LV161DB/MX29LV160CB */
+-#define MX_29LV160DT 0xC4 /* Same as MX29LV161DT/MX29LV160CT */
+-#define MX_29LV320DB 0xA8 /* Same as MX29LV321DB */
+-#define MX_29LV320DT 0xA7 /* Same as MX29LV321DT */
+-#define MX_29LV400B 0xBA /* Same as MX29LV400CB */
+-#define MX_29LV400T 0xB9 /* Same as MX29LV400CT */
+-#define MX_29LV640DB 0xCB /* Same as MX29LV640EB */
+-#define MX_29LV640DT 0xC9 /* Same as MX29LV640ET */
+-#define MX_29LV800B 0x5B /* Same as MX29LV800CB */
+-#define MX_29LV800T 0xDA /* Same as MX29LV800CT */
+-#define MX_29SL402CB 0xF1
+-#define MX_29SL402CT 0x70
+-#define MX_29SL800CB 0x6B /* Same as MX29SL802CB */
+-#define MX_29SL800CT 0xEA /* Same as MX29SL802CT */
++#define MACRONIX_ID 0xC2 /* Macronix (MX) */
++#define MACRONIX_MX25L512 0x2010 /* Same as MX25V512 */
++#define MACRONIX_MX25L1005 0x2011
++#define MACRONIX_MX25L2005 0x2012
++#define MACRONIX_MX25L4005 0x2013 /* MX25L4005{,A} */
++#define MACRONIX_MX25L8005 0x2014 /* Same as MX25V8005 */
++#define MACRONIX_MX25L1605 0x2015 /* MX25L1605{,A,D} */
++#define MACRONIX_MX25L3205 0x2016 /* MX25L3205{,A} */
++#define MACRONIX_MX25L6405 0x2017 /* MX25L3205{,D} */
++#define MACRONIX_MX25L12805 0x2018 /* MX25L12805 */
++#define MACRONIX_MX25L1635D 0x2415
++#define MACRONIX_MX25L1635E 0x2515 /* MX25L1635{E} */
++#define MACRONIX_MX25L3235D 0x5E16 /* MX25L3225D/MX25L3235D/MX25L3237D */
++#define MACRONIX_MX29F001B 0x19
++#define MACRONIX_MX29F001T 0x18
++#define MACRONIX_MX29F002B 0x34 /* Same as MX29F002NB */
++#define MACRONIX_MX29F002T 0xB0 /* Same as MX29F002NT */
++#define MACRONIX_MX29F004B 0x46
++#define MACRONIX_MX29F004T 0x45
++#define MACRONIX_MX29F022T 0x36 /* Same as MX29F022NT */
++#define MACRONIX_MX29F040 0xA4 /* Same as MX29F040C */
++#define MACRONIX_MX29F080 0xD5
++#define MACRONIX_MX29F200B 0x57 /* Same as MX29F200CB */
++#define MACRONIX_MX29F200T 0x51 /* Same as MX29F200CT */
++#define MACRONIX_MX29F400B 0xAB /* Same as MX29F400CB */
++#define MACRONIX_MX29F400T 0x23 /* Same as MX29F400CT */
++#define MACRONIX_MX29F800B 0x58
++#define MACRONIX_MX29F800T 0xD6
++#define MACRONIX_MX29LV002CB 0x5A
++#define MACRONIX_MX29LV002CT 0x59
++#define MACRONIX_MX29LV004B 0xB6 /* Same as MX29LV004CB */
++#define MACRONIX_MX29LV004T 0xB5 /* Same as MX29LV004CT */
++#define MACRONIX_MX29LV008B 0x37 /* Same as MX29LV008CB */
++#define MACRONIX_MX29LV008T 0x3E /* Same as MX29LV008CT */
++#define MACRONIX_MX29LV040 0x4F /* Same as MX29LV040C */
++#define MACRONIX_MX29LV081 0x38
++#define MACRONIX_MX29LV128DB 0x7A
++#define MACRONIX_MX29LV128DT 0x7E
++#define MACRONIX_MX29LV160DB 0x49 /* Same as MX29LV161DB/MX29LV160CB */
++#define MACRONIX_MX29LV160DT 0xC4 /* Same as MX29LV161DT/MX29LV160CT */
++#define MACRONIX_MX29LV320DB 0xA8 /* Same as MX29LV321DB */
++#define MACRONIX_MX29LV320DT 0xA7 /* Same as MX29LV321DT */
++#define MACRONIX_MX29LV400B 0xBA /* Same as MX29LV400CB */
++#define MACRONIX_MX29LV400T 0xB9 /* Same as MX29LV400CT */
++#define MACRONIX_MX29LV640DB 0xCB /* Same as MX29LV640EB */
++#define MACRONIX_MX29LV640DT 0xC9 /* Same as MX29LV640ET */
++#define MACRONIX_MX29LV800B 0x5B /* Same as MX29LV800CB */
++#define MACRONIX_MX29LV800T 0xDA /* Same as MX29LV800CT */
++#define MACRONIX_MX29SL402CB 0xF1
++#define MACRONIX_MX29SL402CT 0x70
++#define MACRONIX_MX29SL800CB 0x6B /* Same as MX29SL802CB */
++#define MACRONIX_MX29SL800CT 0xEA /* Same as MX29SL802CT */
+
+ /*
+ * Programmable Micro Corp is listed in JEP106W in bank 2, so it should
+@@ -332,22 +378,22 @@
+ */
+ #define PMC_ID 0x7F9D /* PMC */
+ #define PMC_ID_NOPREFIX 0x9D /* PMC, missing 0x7F prefix */
+-#define PMC_25LV512 0x7B
+-#define PMC_25LV010 0x7C
+-#define PMC_25LV020 0x7D
+-#define PMC_25LV040 0x7E
+-#define PMC_25LV080B 0x13
+-#define PMC_25LV016B 0x14
+-#define PMC_29F002T 0x1D
+-#define PMC_29F002B 0x2D
+-#define PMC_39LV512 0x1B
+-#define PMC_39F010 0x1C /* Same as Pm39LV010 */
+-#define PMC_39LV020 0x3D
+-#define PMC_39LV040 0x3E
+-#define PMC_39F020 0x4D
+-#define PMC_39F040 0x4E
+-#define PMC_49FL002 0x6D
+-#define PMC_49FL004 0x6E
++#define PMC_PM25LV512 0x7B
++#define PMC_PM25LV010 0x7C
++#define PMC_PM25LV020 0x7D
++#define PMC_PM25LV040 0x7E
++#define PMC_PM25LV080B 0x13
++#define PMC_PM25LV016B 0x14
++#define PMC_PM29F002T 0x1D
++#define PMC_PM29F002B 0x2D
++#define PMC_PM39LV512 0x1B
++#define PMC_PM39F010 0x1C /* Same as Pm39LV010 */
++#define PMC_PM39LV020 0x3D
++#define PMC_PM39LV040 0x3E
++#define PMC_PM39F020 0x4D
++#define PMC_PM39F040 0x4E
++#define PMC_PM49FL002 0x6D
++#define PMC_PM49FL004 0x6E
+
+ /*
+ * The Sanyo chip found so far uses SPI, first byte is manufacture code,
+@@ -380,62 +426,63 @@
+ * byte of device ID is related to log(bitsize) at least for some chips.
+ */
+ #define SST_ID 0xBF /* SST */
+-#define SST_25WF512 0x2501
+-#define SST_25WF010 0x2502
+-#define SST_25WF020 0x2503
+-#define SST_25WF040 0x2504
+-#define SST_25VF512A_REMS 0x48 /* REMS or RES opcode */
+-#define SST_25VF010_REMS 0x49 /* REMS or RES opcode */
+-#define SST_25VF020_REMS 0x43 /* REMS or RES opcode */
-#define SST_25VF040_REMS 0x44 /* REMS or RES opcode */
-+#define SST_25VF040_REMS 0x44 /* REMS or RES opcode, same as SST25LF040A */
- #define SST_25VF040B 0x258D
- #define SST_25VF040B_REMS 0x8D /* REMS or RES opcode */
- #define SST_25VF080_REMS 0x80 /* REMS or RES opcode */
-@@ -396,6 +427,7 @@
- #define SST_25VF016B 0x2541
- #define SST_25VF032B 0x254A
- #define SST_25VF032B_REMS 0x4A /* REMS or RES opcode */
-+#define SST_25VF064C 0x254B
- #define SST_26VF016 0x2601
- #define SST_26VF032 0x2602
- #define SST_27SF512 0xA4
-@@ -482,11 +514,22 @@
+-#define SST_25VF040B 0x258D
+-#define SST_25VF040B_REMS 0x8D /* REMS or RES opcode */
+-#define SST_25VF080_REMS 0x80 /* REMS or RES opcode */
+-#define SST_25VF080B 0x258E
+-#define SST_25VF080B_REMS 0x8E /* REMS or RES opcode */
+-#define SST_25VF016B 0x2541
+-#define SST_25VF032B 0x254A
+-#define SST_25VF032B_REMS 0x4A /* REMS or RES opcode */
+-#define SST_26VF016 0x2601
+-#define SST_26VF032 0x2602
+-#define SST_27SF512 0xA4
+-#define SST_27SF010 0xA5
+-#define SST_27SF020 0xA6
+-#define SST_27VF010 0xA9
+-#define SST_27VF020 0xAA
+-#define SST_28SF040 0x04
+-#define SST_29EE512 0x5D
+-#define SST_29EE010 0x07
+-#define SST_29LE010 0x08 /* Same as SST29VE010 */
+-#define SST_29EE020A 0x10 /* Same as SST29EE020 */
+-#define SST_29LE020 0x12 /* Same as SST29VE020 */
+-#define SST_29SF020 0x24
+-#define SST_29VF020 0x25
+-#define SST_29SF040 0x13
+-#define SST_29VF040 0x14
+-#define SST_39SF512 0xB4
+-#define SST_39SF010 0xB5
+-#define SST_39SF020 0xB6 /* Same as 39SF020A */
+-#define SST_39SF040 0xB7
+-#define SST_39VF512 0xD4
+-#define SST_39VF010 0xD5
+-#define SST_39VF020 0xD6 /* Same as 39LF020 */
+-#define SST_39VF040 0xD7 /* Same as 39LF040 */
+-#define SST_39VF080 0xD8 /* Same as 39LF080/39VF080/39VF088 */
+-#define SST_49LF040B 0x50
+-#define SST_49LF040 0x51
+-#define SST_49LF020 0x61
+-#define SST_49LF020A 0x52
+-#define SST_49LF030A 0x1C
+-#define SST_49LF080A 0x5B
+-#define SST_49LF002A 0x57
+-#define SST_49LF003A 0x1B
+-#define SST_49LF004A 0x60 /* Same as 49LF004B */
+-#define SST_49LF008A 0x5A
+-#define SST_49LF004C 0x54
+-#define SST_49LF008C 0x59
+-#define SST_49LF016C 0x5C
+-#define SST_49LF160C 0x4C
++#define SST_SST25WF512 0x2501
++#define SST_SST25WF010 0x2502
++#define SST_SST25WF020 0x2503
++#define SST_SST25WF040 0x2504
++#define SST_SST25VF512A_REMS 0x48 /* REMS or RES opcode */
++#define SST_SST25VF010_REMS 0x49 /* REMS or RES opcode */
++#define SST_SST25VF020_REMS 0x43 /* REMS or RES opcode */
++#define SST_SST25VF040_REMS 0x44 /* REMS or RES opcode, same as SST25LF040A */
++#define SST_SST25VF040B 0x258D
++#define SST_SST25VF040B_REMS 0x8D /* REMS or RES opcode */
++#define SST_SST25VF080_REMS 0x80 /* REMS or RES opcode */
++#define SST_SST25VF080B 0x258E
++#define SST_SST25VF080B_REMS 0x8E /* REMS or RES opcode */
++#define SST_SST25VF016B 0x2541
++#define SST_SST25VF032B 0x254A
++#define SST_SST25VF032B_REMS 0x4A /* REMS or RES opcode */
++#define SST_SST25VF064C 0x254B
++#define SST_SST26VF016 0x2601
++#define SST_SST26VF032 0x2602
++#define SST_SST27SF512 0xA4
++#define SST_SST27SF010 0xA5
++#define SST_SST27SF020 0xA6
++#define SST_SST27VF010 0xA9
++#define SST_SST27VF020 0xAA
++#define SST_SST28SF040 0x04
++#define SST_SST29EE512 0x5D
++#define SST_SST29EE010 0x07
++#define SST_SST29LE010 0x08 /* Same as SST29VE010 */
++#define SST_SST29EE020A 0x10 /* Same as SST29EE020 */
++#define SST_SST29LE020 0x12 /* Same as SST29VE020 */
++#define SST_SST29SF020 0x24
++#define SST_SST29VF020 0x25
++#define SST_SST29SF040 0x13
++#define SST_SST29VF040 0x14
++#define SST_SST39SF512 0xB4
++#define SST_SST39SF010 0xB5
++#define SST_SST39SF020 0xB6 /* Same as 39SF020A */
++#define SST_SST39SF040 0xB7
++#define SST_SST39VF512 0xD4
++#define SST_SST39VF010 0xD5
++#define SST_SST39VF020 0xD6 /* Same as 39LF020 */
++#define SST_SST39VF040 0xD7 /* Same as 39LF040 */
++#define SST_SST39VF080 0xD8 /* Same as 39LF080/39VF080/39VF088 */
++#define SST_SST49LF040B 0x50
++#define SST_SST49LF040 0x51
++#define SST_SST49LF020 0x61
++#define SST_SST49LF020A 0x52
++#define SST_SST49LF030A 0x1C
++#define SST_SST49LF080A 0x5B
++#define SST_SST49LF002A 0x57
++#define SST_SST49LF003A 0x1B
++#define SST_SST49LF004A 0x60 /* Same as 49LF004B */
++#define SST_SST49LF008A 0x5A
++#define SST_SST49LF004C 0x54
++#define SST_SST49LF008C 0x59
++#define SST_SST49LF016C 0x5C
++#define SST_SST49LF160C 0x4C
+
+ /*
+ * ST25P chips are SPI, first byte of device ID is memory type, second
+@@ -454,6 +501,8 @@
+ #define ST_M25P32 0x2016
+ #define ST_M25P64 0x2017
+ #define ST_M25P128 0x2018
++#define ST_M25PX32 0x7116
++#define ST_M25PX64 0x7117
+ #define ST_M25PE10 0x8011
+ #define ST_M25PE20 0x8012
+ #define ST_M25PE40 0x8013
+@@ -482,11 +531,22 @@
#define ST_M29W040B 0xE3
#define ST_M29W512B 0x27
@@ -8529,14 +10797,87 @@ index bfd8145..8a7e89b 100644
#define TI_ID 0x97 /* Texas Instruments */
#define TI_OLD_ID 0x01 /* TI chips from last century */
-@@ -509,6 +552,7 @@
- #define W_25Q80 0x4014
- #define W_25Q16 0x4015
- #define W_25Q32 0x4016
-+#define W_25Q64 0x4017
- #define W_29C011 0xC1
- #define W_29C020C 0x45 /* Same as W29C020 and ASD AE29F2008 */
- #define W_29C040P 0x46 /* Same as W29C040 */
+@@ -497,34 +557,52 @@
+ * W25X chips are SPI, first byte of device ID is memory type, second
+ * byte of device ID is related to log(bitsize).
+ */
+-#define WINBOND_ID 0xDA /* Winbond */
+ #define WINBOND_NEX_ID 0xEF /* Winbond (ex Nexcom) serial flashes */
+-#define W_25X10 0x3011
+-#define W_25X20 0x3012
+-#define W_25X40 0x3013
+-#define W_25X80 0x3014
+-#define W_25X16 0x3015
+-#define W_25X32 0x3016
+-#define W_25X64 0x3017
+-#define W_25Q80 0x4014
+-#define W_25Q16 0x4015
+-#define W_25Q32 0x4016
+-#define W_29C011 0xC1
+-#define W_29C020C 0x45 /* Same as W29C020 and ASD AE29F2008 */
+-#define W_29C040P 0x46 /* Same as W29C040 */
+-#define W_29EE011 0xC1
+-#define W_39L020 0xB5
+-#define W_39L040 0xB6
+-#define W_39V040FA 0x34
+-#define W_39V040A 0x3D
+-#define W_39V040B 0x54
+-#define W_39V040C 0x50
+-#define W_39V080A 0xD0
+-#define W_39V080FA 0xD3
+-#define W_39V080FA_DM 0x93
+-#define W_49F002U 0x0B
+-#define W_49F020 0x8C
+-#define W_49V002A 0xB0
+-#define W_49V002FA 0x32
++#define WINBOND_NEX_W25X10 0x3011
++#define WINBOND_NEX_W25X20 0x3012
++#define WINBOND_NEX_W25X40 0x3013
++#define WINBOND_NEX_W25X80 0x3014
++#define WINBOND_NEX_W25X16 0x3015
++#define WINBOND_NEX_W25X32 0x3016
++#define WINBOND_NEX_W25X64 0x3017
++#define WINBOND_NEX_W25Q40 0x4013
++#define WINBOND_NEX_W25Q80 0x4014
++#define WINBOND_NEX_W25Q16 0x4015
++#define WINBOND_NEX_W25Q32 0x4016
++#define WINBOND_NEX_W25Q64 0x4017
++#define WINBOND_NEX_W25Q128 0x4018
++
++#define WINBOND_ID 0xDA /* Winbond */
++#define WINBOND_W19B160BB 0x49
++#define WINBOND_W19B160BT 0xC4
++#define WINBOND_W19B320SB 0x2A /* Same as W19L320SB */
++#define WINBOND_W19B320ST 0xBA /* Same as W19L320ST */
++#define WINBOND_W19B322MB 0x92
++#define WINBOND_W19B322MT 0x10
++#define WINBOND_W19B323MB 0x94
++#define WINBOND_W19B323MT 0x13
++#define WINBOND_W19B324MB 0x97
++#define WINBOND_W19B324MT 0x16
++#define WINBOND_W29C010 0xC1 /* Same as W29C010M, W29C011A, W29EE011, W29EE012, and ASD AE29F1008 */
++#define WINBOND_W29C020 0x45 /* Same as W29C020C, W29C022 and ASD AE29F2008 */
++#define WINBOND_W29C040 0x46 /* Same as W29C040P */
++#define WINBOND_W29C512A 0xC8 /* Same as W29EE512 */
++#define WINBOND_W39L010 0x31
++#define WINBOND_W39L020 0xB5
++#define WINBOND_W39L040 0xB6
++#define WINBOND_W39L040A 0xD6
++#define WINBOND_W39L512 0x38
++#define WINBOND_W39V040A 0x3D
++#define WINBOND_W39V040FA 0x34
++#define WINBOND_W39V040B 0x54 /* Same as W39V040FB */
++#define WINBOND_W39V040C 0x50 /* Same as W39V040FC */
++#define WINBOND_W39V080A 0xD0
++#define WINBOND_W39V080FA 0xD3
++#define WINBOND_W39V080FA_DM 0x93 /* W39V080FA dual mode */
++#define WINBOND_W49F002 0x25 /* Same as W49F002B */
++#define WINBOND_W49F002U 0x0B /* Same as W49F002N and ASD AE49F2008 */
++#define WINBOND_W49F020 0x8C
++#define WINBOND_W49V002A 0xB0
++#define WINBOND_W49V002FA 0x32
+
+ #endif /* !FLASHCHIPS_H */
diff --git a/flashrom.8 b/flashrom.8
index 5ca14fc..47312a0 100644
--- a/flashrom.8
@@ -11015,7 +13356,7 @@ index fbe9092..bb6007e 100644
+
+#endif
diff --git a/internal.c b/internal.c
-index 174370c..8b19692 100644
+index 174370c..497ce6c 100644
--- a/internal.c
+++ b/internal.c
@@ -21,11 +21,9 @@
@@ -11047,7 +13388,7 @@ index 174370c..8b19692 100644
void probe_superio(void)
{
superio = probe_superio_ite();
-@@ -112,8 +112,9 @@ void probe_superio(void)
+@@ -112,45 +112,57 @@ void probe_superio(void)
superio = probe_superio_winbond();
#endif
}
@@ -11058,7 +13399,9 @@ index 174370c..8b19692 100644
int internal_init(void)
{
-@@ -121,36 +122,45 @@ int internal_init(void)
++#if __FLASHROM_LITTLE_ENDIAN__
+ int ret = 0;
++#endif
int force_laptop = 0;
char *arg;
@@ -11110,7 +13453,7 @@ index 174370c..8b19692 100644
}
free(arg);
-@@ -162,14 +172,29 @@ int internal_init(void)
+@@ -162,14 +174,29 @@ int internal_init(void)
pci_init(pacc); /* Initialize the PCI library */
pci_scan_bus(pacc); /* We want to get the list of devices */
@@ -11141,7 +13484,7 @@ index 174370c..8b19692 100644
/* Warn if a laptop is detected. */
if (is_laptop) {
-@@ -194,6 +219,7 @@ int internal_init(void)
+@@ -194,6 +221,7 @@ int internal_init(void)
}
}
@@ -11149,7 +13492,7 @@ index 174370c..8b19692 100644
/* try to enable it. Failure IS an option, since not all motherboards
* really need this to be done, etc., etc.
*/
-@@ -203,8 +229,12 @@ int internal_init(void)
+@@ -203,8 +231,12 @@ int internal_init(void)
"will most likely fail.\n");
}
@@ -11164,7 +13507,7 @@ index 174370c..8b19692 100644
board_flash_enable(lb_vendor, lb_part);
-@@ -212,7 +242,26 @@ int internal_init(void)
+@@ -212,7 +244,26 @@ int internal_init(void)
* The error code might have been a warning only.
* Besides that, we don't check the board enable return code either.
*/
@@ -11809,10 +14152,10 @@ index c8ed5d8..2a770ba 100644
-}
diff --git a/mcp6x_spi.c b/mcp6x_spi.c
new file mode 100644
-index 0000000..bfdef2d
+index 0000000..97c0a1c
--- /dev/null
+++ b/mcp6x_spi.c
-@@ -0,0 +1,193 @@
+@@ -0,0 +1,176 @@
+/*
+ * This file is part of the flashrom project.
+ *
@@ -11857,73 +14200,53 @@ index 0000000..bfdef2d
+
+void *mcp6x_spibar = NULL;
+
++/* Cached value of last GPIO state. */
++static uint8_t mcp_gpiostate;
++
+static void mcp6x_request_spibus(void)
+{
-+ uint8_t tmp;
-+
-+ tmp = mmio_readb(mcp6x_spibar + 0x530);
-+ tmp |= 1 << MCP6X_SPI_REQUEST;
-+ mmio_writeb(tmp, mcp6x_spibar + 0x530);
++ mcp_gpiostate = mmio_readb(mcp6x_spibar + 0x530);
++ mcp_gpiostate |= 1 << MCP6X_SPI_REQUEST;
++ mmio_writeb(mcp_gpiostate, mcp6x_spibar + 0x530);
+
+ /* Wait until we are allowed to use the SPI bus. */
+ while (!(mmio_readw(mcp6x_spibar + 0x530) & (1 << MCP6X_SPI_GRANT))) ;
++
++ /* Update the cache. */
++ mcp_gpiostate = mmio_readb(mcp6x_spibar + 0x530);
+}
+
+static void mcp6x_release_spibus(void)
+{
-+ uint8_t tmp;
-+
-+ tmp = mmio_readb(mcp6x_spibar + 0x530);
-+ tmp &= ~(1 << MCP6X_SPI_REQUEST);
-+ mmio_writeb(tmp, mcp6x_spibar + 0x530);
++ mcp_gpiostate &= ~(1 << MCP6X_SPI_REQUEST);
++ mmio_writeb(mcp_gpiostate, mcp6x_spibar + 0x530);
+}
+
+static void mcp6x_bitbang_set_cs(int val)
+{
-+ uint8_t tmp;
-+
-+ /* Requesting and releasing the SPI bus is handled in here to allow the
-+ * chipset to use its own SPI engine for native reads.
-+ */
-+ if (val == 0)
-+ mcp6x_request_spibus();
-+
-+ tmp = mmio_readb(mcp6x_spibar + 0x530);
-+ tmp &= ~(1 << MCP6X_SPI_CS);
-+ tmp |= (val << MCP6X_SPI_CS);
-+ mmio_writeb(tmp, mcp6x_spibar + 0x530);
-+
-+ if (val == 1)
-+ mcp6x_release_spibus();
++ mcp_gpiostate &= ~(1 << MCP6X_SPI_CS);
++ mcp_gpiostate |= (val << MCP6X_SPI_CS);
++ mmio_writeb(mcp_gpiostate, mcp6x_spibar + 0x530);
+}
+
+static void mcp6x_bitbang_set_sck(int val)
+{
-+ uint8_t tmp;
-+
-+ tmp = mmio_readb(mcp6x_spibar + 0x530);
-+ tmp &= ~(1 << MCP6X_SPI_SCK);
-+ tmp |= (val << MCP6X_SPI_SCK);
-+ mmio_writeb(tmp, mcp6x_spibar + 0x530);
++ mcp_gpiostate &= ~(1 << MCP6X_SPI_SCK);
++ mcp_gpiostate |= (val << MCP6X_SPI_SCK);
++ mmio_writeb(mcp_gpiostate, mcp6x_spibar + 0x530);
+}
+
+static void mcp6x_bitbang_set_mosi(int val)
+{
-+ uint8_t tmp;
-+
-+ tmp = mmio_readb(mcp6x_spibar + 0x530);
-+ tmp &= ~(1 << MCP6X_SPI_MOSI);
-+ tmp |= (val << MCP6X_SPI_MOSI);
-+ mmio_writeb(tmp, mcp6x_spibar + 0x530);
++ mcp_gpiostate &= ~(1 << MCP6X_SPI_MOSI);
++ mcp_gpiostate |= (val << MCP6X_SPI_MOSI);
++ mmio_writeb(mcp_gpiostate, mcp6x_spibar + 0x530);
+}
+
+static int mcp6x_bitbang_get_miso(void)
+{
-+ uint8_t tmp;
-+
-+ tmp = mmio_readb(mcp6x_spibar + 0x530);
-+ tmp = (tmp >> MCP6X_SPI_MISO) & 0x1;
-+ return tmp;
++ mcp_gpiostate = mmio_readb(mcp6x_spibar + 0x530);
++ return (mcp_gpiostate >> MCP6X_SPI_MISO) & 0x1;
+}
+
+static const struct bitbang_spi_master bitbang_spi_master_mcp6x = {
@@ -11932,6 +14255,8 @@ index 0000000..bfdef2d
+ .set_sck = mcp6x_bitbang_set_sck,
+ .set_mosi = mcp6x_bitbang_set_mosi,
+ .get_miso = mcp6x_bitbang_get_miso,
++ .request_bus = mcp6x_request_spibus,
++ .release_bus = mcp6x_release_spibus,
+};
+
+int mcp6x_spi_init(int want_spi)
@@ -11991,9 +14316,10 @@ index 0000000..bfdef2d
+ msg_pdbg("SPI control is 0x%04x, req=%i, gnt=%i\n",
+ status, (status >> MCP6X_SPI_REQUEST) & 0x1,
+ (status >> MCP6X_SPI_GRANT) & 0x1);
++ mcp_gpiostate = status & 0xff;
+
-+ /* 1 usec halfperiod delay for now. */
-+ if (bitbang_spi_init(&bitbang_spi_master_mcp6x, 1)) {
++ /* Zero halfperiod delay. */
++ if (bitbang_spi_init(&bitbang_spi_master_mcp6x, 0)) {
+ /* This should never happen. */
+ msg_perr("MCP6X bitbang SPI master init failed!\n");
+ return 1;
@@ -12074,10 +14400,10 @@ index d3dcce5..0eb781a 100644
+#endif
diff --git a/nicintel_spi.c b/nicintel_spi.c
new file mode 100644
-index 0000000..d09facc
+index 0000000..75dc423
--- /dev/null
+++ b/nicintel_spi.c
-@@ -0,0 +1,187 @@
+@@ -0,0 +1,179 @@
+/*
+ * This file is part of the flashrom project.
+ *
@@ -12171,20 +14497,10 @@ index 0000000..d09facc
+{
+ uint32_t tmp;
+
-+ /*
-+ * Requesting and releasing the SPI bus is handled in here to allow
-+ * the chipset to use its own SPI engine for native reads.
-+ */
-+ if (val == 0)
-+ nicintel_request_spibus();
-+
+ tmp = pci_mmio_readl(nicintel_spibar + FLA);
+ tmp &= ~(1 << FL_CS);
+ tmp |= (val << FL_CS);
+ pci_mmio_writel(tmp, nicintel_spibar + FLA);
-+
-+ if (val == 1)
-+ nicintel_release_spibus();
+}
+
+static void nicintel_bitbang_set_sck(int val)
@@ -12222,6 +14538,8 @@ index 0000000..d09facc
+ .set_sck = nicintel_bitbang_set_sck,
+ .set_mosi = nicintel_bitbang_set_mosi,
+ .get_miso = nicintel_bitbang_get_miso,
++ .request_bus = nicintel_request_spibus,
++ .release_bus = nicintel_release_spibus,
+};
+
+int nicintel_spi_init(void)
@@ -12682,7 +15000,7 @@ index fd93ef6..4136b17 100644
{
int i, left = size;
diff --git a/print.c b/print.c
-index abc1209..52b8a9f 100644
+index abc1209..e51d8ee 100644
--- a/print.c
+++ b/print.c
@@ -19,10 +19,12 @@
@@ -12812,7 +15130,7 @@ index abc1209..52b8a9f 100644
{
int i, j, chipsetcount = 0;
const struct penable *c = chipset_enables;
-@@ -168,263 +179,388 @@ void print_supported_chipsets(void)
+@@ -168,263 +179,400 @@ void print_supported_chipsets(void)
}
}
@@ -13127,6 +15445,7 @@ index abc1209..52b8a9f 100644
+ B("A-Trend", "ATC-6220", 1, "http://www.motherboard.cz/mb/atrend/atc6220.htm", NULL),
+ B("abit", "AN-M2", 1, "http://www.abit.com.tw/page/de/motherboard/motherboard_detail.php?DEFTITLE=Y&fMTYPE=Socket%20AM2&pMODEL_NAME=AN-M2", NULL),
+ B("abit", "AX8", 1, "http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?DEFTITLE=Y&fMTYPE=Socket%20939&pMODEL_NAME=AX8", NULL),
++ B("abit", "BM6", 1, "http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?pMODEL_NAME=BM6&fMTYPE=Socket%20370", NULL),
+ B("abit", "Fatal1ty F-I90HD", 1, "http://www.abit.com.tw/page/de/motherboard/motherboard_detail.php?pMODEL_NAME=Fatal1ty+F-I90HD&fMTYPE=LGA775", NULL),
+ B("abit", "IC7", 1, "http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?pMODEL_NAME=IC7&fMTYPE=Socket%20478", NULL),
+ B("abit", "IP35", 1, "http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?fMTYPE=LGA775&pMODEL_NAME=IP35", NULL),
@@ -13157,6 +15476,7 @@ index abc1209..52b8a9f 100644
+ B("ASUS", "A7N8X Deluxe", 1, "http://www.asus.com/product.aspx?P_ID=wAsRYm41KTp78MFC", NULL),
+ B("ASUS", "A7N8X-E Deluxe", 1, "http://www.asus.com/product.aspx?P_ID=TmQtPJv4jIxmL9C2", NULL),
+ B("ASUS", "A7V133", 1, "ftp://ftp.asus.com.tw/pub/ASUS/mb/socka/kt133a/a7v133/", NULL),
++ B("ASUS", "A7V333", 1, "ftp://ftp.asus.com.tw/pub/asus/mb/socka/kt333/a7v333/", NULL),
+ B("ASUS", "A7V400-MX", 1, "http://www.asus.com/product.aspx?P_ID=hORgEHRBDLMfwAwx", NULL),
+ B("ASUS", "A7V600-X", 1, "http://www.asus.com/product.aspx?P_ID=L2XYS0rmtCjeOr4k", NULL),
+ B("ASUS", "A7V8X", 1, "http://www.asus.com/product.aspx?P_ID=qfpaGrAy2kLVo0f2", NULL),
@@ -13207,6 +15527,7 @@ index abc1209..52b8a9f 100644
+ B("ASUS", "P4C800-E Deluxe", 1, "http://www.asus.com/product.aspx?P_ID=cFuVCr9bXXCckmcK", NULL),
+ B("ASUS", "P4P800", 1, "http://www.asus.com/product.aspx?P_ID=DYt1Et9MlBChqzLb", NULL),
+ B("ASUS", "P4P800-E Deluxe", 1, "http://www.asus.com/product.aspx?P_ID=INIJUvLlif7LHp3g", NULL),
++ B("ASUS", "P4SC-E", 1, "ftp://ftp.asus.com.tw/pub/ASUS/mb/sock478/p4sc-e/", "Part of ASUS Terminator P4 533 barebone system"),
+ B("ASUS", "P4SD-LA", 1, "http://h10025.www1.hp.com/ewfrf/wc/document?docname=c00022505", NULL),
+ B("ASUS", "P4S800-MX", 1, "http://www.asus.com/product.aspx?P_ID=Bb57zoJhmO1Qkcrh", NULL),
+ B("ASUS", "P5A", 1, "ftp://ftp.asus.com.tw/pub/ASUS/mb/sock7/ali/p5a/", NULL),
@@ -13214,6 +15535,7 @@ index abc1209..52b8a9f 100644
+ B("ASUS", "P5B-Deluxe", 1, "http://www.asus.com/product.aspx?P_ID=bswT66IBSb2rEWNa", NULL),
+ B("ASUS", "P5BV-M", 0, "ftp://ftp.asus.com.tw/pub/ASUS/mb/socket775/P5B-VM/", "Reported by Bernhard M. Wiedemann <bernhard at uml12d.zq1.de> to flashrom at coreboot.org, no public archive. Missing board enable and/or SST49LF008A unlocking. May work now."),
+ B("ASUS", "P5GC-MX/1333", 1, "http://www.asus.com/product.aspx?P_ID=PYvbfOokwxUzJky3", NULL),
++ B("ASUS", "P5GDC Deluxe", 1, "http://www.asus.com/product.aspx?P_ID=AbeoopyNpI2TZixg", NULL),
+ B("ASUS", "P5KC", 1, "http://www.asus.com/product.aspx?P_ID=fFZ8oUIGmLpwNMjj", NULL),
+ B("ASUS", "P5L-MX", 1, "http://www.asus.com/product.aspx?P_ID=X70d3NCzH2DE9vWH", NULL),
+ B("ASUS", "P5GD1 Pro", 1, "http://www.asus.com/product.aspx?P_ID=50M49xQh71EZOeM1", NULL),
@@ -13222,6 +15544,7 @@ index abc1209..52b8a9f 100644
+ B("ASUS", "P6T SE", 1, "http://www.asus.com/product.aspx?P_ID=t4yhK6y9W9o7iQ9E", NULL),
+ B("ASUS", "P6T Deluxe", 1, "http://www.asus.com/product.aspx?P_ID=vXixf82co6Q5v0BZ", NULL),
+ B("ASUS", "P6T Deluxe V2", 1, "http://www.asus.com/product.aspx?P_ID=iRlP8RG9han6saZx", NULL),
++ B("ASUS", "Z8NA-D6C", 1, "http://www.asus.com/product.aspx?P_ID=k81cpN8uEB01BpQ6", NULL),
+ B("BCOM", "WinNET100", 1, "http://www.coreboot.org/BCOM_WINNET100", "Used in the IGEL-316 thin client."),
+ B("Biostar", "M6TBA", 0, "ftp://ftp.biostar-usa.com/manuals/M6TBA/", "No public report found. Owned by Uwe Hermann <uwe at hermann-uwe.de>. May work now."),
+ B("Biostar", "M7NCD Pro", 1, "http://www.biostar.com.tw/app/en/mb/content.php?S_ID=260", NULL),
@@ -13232,6 +15555,7 @@ index abc1209..52b8a9f 100644
+ B("Dell", "PowerEdge 1850", 1, "http://support.dell.com/support/edocs/systems/pe1850/en/index.htm", NULL),
+ B("DFI", "855GME-MGF", 0, "http://www.dfi.com.tw/portal/CM/cmproduct/XX_cmproddetail/XX_WbProdsWindow?action=e&downloadType=&windowstate=normal&mode=view&downloadFlag=false&itemId=433", "Probably needs a board enable. http://www.coreboot.org/pipermail/coreboot/2009-May/048549.html"),
+ B("DFI", "Blood-Iron P35 T2RL", 1, "http://lp.lanparty.com.tw/portal/CM/cmproduct/XX_cmproddetail/XX_WbProdsWindow?itemId=516&downloadFlag=false&action=1", NULL),
++ B("Elitegroup", "GeForce6100SM-M ", 1, "http://www.ecs.com.tw/ECSWebSite/Product/Product_Detail.aspx?DetailID=685&MenuID=24", NULL),
+ B("Elitegroup", "K7S5A", 1, "http://www.ecs.com.tw/ECSWebSite/Products/ProductsDetail.aspx?detailid=279&CategoryID=1&DetailName=Specification&MenuID=1&LanID=0", NULL),
+ B("Elitegroup", "K7S6A", 1, "http://www.ecs.com.tw/ECSWebSite/Products/ProductsDetail.aspx?detailid=77&CategoryID=1&DetailName=Specification&MenuID=52&LanID=0", NULL),
+ B("Elitegroup", "K7VTA3", 1, "http://www.ecs.com.tw/ECSWebSite/Products/ProductsDetail.aspx?detailid=264&CategoryID=1&DetailName=Specification&MenuID=52&LanID=0", NULL),
@@ -13251,6 +15575,7 @@ index abc1209..52b8a9f 100644
+ B("GIGABYTE", "GA-6ZMA", 1, "http://www.gigabyte.com/products/product-page.aspx?pid=1541", NULL),
+ B("GIGABYTE", "GA-MA785GMT-UD2H", 1, "http://www.gigabyte.de/Products/Motherboard/Products_Overview.aspx?ProductID=4525", NULL),
+ B("GIGABYTE", "GA-770TA-UD3", 1, "http://www.gigabyte.com/products/product-page.aspx?pid=3272#ov", NULL),
++ B("GIGABYTE", "GA-7DXR", 1, "http://www.gigabyte.de/Products/Motherboard/Products_Spec.aspx?ProductID=1302", NULL),
+ B("GIGABYTE", "GA-7VT600", 1, "http://www.gigabyte.com/products/product-page.aspx?pid=1666", NULL),
+ B("GIGABYTE", "GA-7ZM", 1, "http://www.gigabyte.com/products/product-page.aspx?pid=1366", "Works fine if you remove jumper JP9 on the board and disable the flash protection BIOS option."),
+ B("GIGABYTE", "GA-8IRML", 1, "http://www.gigabyte.com/products/product-page.aspx?pid=1343", NULL),
@@ -13281,6 +15606,8 @@ index abc1209..52b8a9f 100644
+ B("IEI", "PICOe-9452", 1, "http://www.ieiworld.com/product_groups/industrial/content.aspx?keyword=WSB&gid=00001000010000000001&cid=08125380291060861658&id=08142308605814597144", NULL),
+ B("Intel", "D201GLY", 1, "http://www.intel.com/support/motherboards/desktop/d201gly/index.htm", NULL),
+ B("Intel", "EP80759", 1, NULL, NULL),
++ B("Intel", "Foxhollow", 1, NULL, "Intel reference board."),
++ B("Intel", "Greencity", 1, NULL, "Intel reference board."),
+ B("Intel", "SE440BX-2", 0, "http://downloadcenter.intel.com/SearchResult.aspx?lang=eng&ProductFamily=Desktop+Boards&ProductLine=Discontinued+Motherboards&ProductProduct=Intel%C2%AE+SE440BX-2+Motherboard", "Probably won't work, see http://www.coreboot.org/pipermail/flashrom/2010-July/003952.html"),
+ B("IWILL", "DK8-HTX", 1, "http://web.archive.org/web/20060507170150/http://www.iwill.net/product_2.asp?p_id=98", NULL),
+ B("Jetway", "J7F4K1G5D-PB", 1, "http://www.jetway.com.tw/jetway/system/productshow2.asp?id=389&proname=J7F4K1G5D-P", NULL),
@@ -13289,6 +15616,7 @@ index abc1209..52b8a9f 100644
+ B("Mitac", "6513WU", 1, "http://web.archive.org/web/20050313054828/http://www.mitac.com/micweb/products/tyan/6513wu/6513wu.htm", NULL),
+ B("MSI", "MS-6153", 1, "http://www.msi.com/index.php?func=proddesc&maincat_no=1&prod_no=336", NULL),
+ B("MSI", "MS-6156", 1, "http://uk.ts.fujitsu.com/rl/servicesupport/techsupport/boards/Motherboards/MicroStar/Ms6156/MS6156.htm", NULL),
++ B("MSI", "MS-6163 (MS-6163 Pro)",1, "http://www.msi.com/index.php?func=proddesc&prod_no=340", NULL),
+ B("MSI", "MS-6178", 0, "http://www.msi.com/index.php?func=proddesc&maincat_no=1&prod_no=343", "Immediately powers off if you try to hot-plug the chip. However, this does '''not''' happen if you use coreboot. Owned by Uwe Hermann <uwe at hermann-uwe.de>."),
+ B("MSI", "MS-6330 (K7T Turbo)", 1, "http://www.msi.com/index.php?func=proddesc&maincat_no=1&prod_no=327", NULL),
+ B("MSI", "MS-6561 (745 Ultra)", 1, "http://www.msi.com/index.php?func=proddesc&maincat_no=1&prod_no=274", NULL),
@@ -13306,6 +15634,7 @@ index abc1209..52b8a9f 100644
+ B("MSI", "MS-7135 (K8N Neo3)", 1, "http://www.msi.com/index.php?func=proddesc&maincat_no=1&prod_no=170", NULL),
+ B("MSI", "MS-7168 (Orion)", 1, "http://support.packardbell.co.uk/uk/item/index.php?i=spec_orion&pi=platform_honeymoon_istart", NULL),
+ B("MSI", "MS-7207 (K8NGM2-L)", 1, "http://www.msi.com/index.php?func=proddesc&maincat_no=1&prod_no=224", NULL),
++ B("MSI", "MS-7211 (PM8M3-V)", 1, "http://www.msi.com/index.php?func=proddesc&maincat_no=1&prod_no=234", NULL),
+ B("MSI", "MS-7236 (945PL Neo3)", 1, "http://www.msi.com/index.php?func=proddesc&maincat_no=1&prod_no=1173", NULL),
+ B("MSI", "MS-7253 (K9VGM-V)", 1, "http://www.msi.com/index.php?func=proddesc&maincat_no=1&prod_no=260", NULL),
+ B("MSI", "MS-7255 (P4M890M)", 1, "http://www.msi.com/index.php?func=proddesc&maincat_no=1&prod_no=1082", NULL),
@@ -13358,6 +15687,7 @@ index abc1209..52b8a9f 100644
+ B("Tyan", "S2892 (Thunder K8SE)", 1, "http://www.tyan.com/product_board_detail.aspx?pid=145", NULL),
+ B("Tyan", "S2895 (Thunder K8WE)", 1, "http://www.tyan.com/archive/products/html/thunderk8we.html", NULL),
+ B("Tyan", "S2915 (Thunder n6650W)", 1, "http://tyan.com/product_board_detail.aspx?pid=163", NULL),
++ B("Tyan", "S2915-E (Thunder n6650W)", 1, "http://tyan.com/product_SKU_spec.aspx?ProductType=MB&pid=541&SKU=600000041", NULL),
+ B("Tyan", "S2933 (Thunder n3600S)", 1, "http://tyan.com/product_SKU_spec.aspx?ProductType=MB&pid=478&SKU=600000063", NULL),
+ B("Tyan", "S3095 (Tomcat i945GM)", 1, "http://www.tyan.com/product_board_detail.aspx?pid=181", NULL),
+ B("Tyan", "S3992 (Thunder h2000M)", 1, "http://tyan.com/product_board_detail.aspx?pid=235", NULL),
@@ -14122,10 +16452,10 @@ index ca641e1..0160867 100644
/* No-op shutdown() for programmers which don't need special handling */
diff --git a/programmer.h b/programmer.h
new file mode 100644
-index 0000000..0d8e161
+index 0000000..6407695
--- /dev/null
+++ b/programmer.h
-@@ -0,0 +1,599 @@
+@@ -0,0 +1,602 @@
+/*
+ * This file is part of the flashrom project.
+ *
@@ -14259,6 +16589,8 @@ index 0000000..0d8e161
+ void (*set_sck) (int val);
+ void (*set_mosi) (int val);
+ int (*get_miso) (void);
++ void (*request_bus) (void);
++ void (*release_bus) (void);
+};
+
+#if CONFIG_INTERNAL == 1
@@ -14571,6 +16903,7 @@ index 0000000..0d8e161
+
+/* bitbang_spi.c */
+int bitbang_spi_init(const struct bitbang_spi_master *master, int halfperiod);
++int bitbang_spi_shutdown(const struct bitbang_spi_master *master);
+int bitbang_spi_send_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr);
+int bitbang_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len);
+int bitbang_spi_write_256(struct flashchip *flash, uint8_t *buf, int start, int len);
@@ -14956,7 +17289,7 @@ index 90d38bd..89f45b9 100644
+ return (pci_mmio_readl(sii_bar + 4)) & 0xff;
}
diff --git a/sb600spi.c b/sb600spi.c
-index 0cf797c..c20d5e6 100644
+index 0cf797c..4e3e079 100644
--- a/sb600spi.c
+++ b/sb600spi.c
@@ -4,6 +4,7 @@
@@ -15110,7 +17443,7 @@ index 0cf797c..c20d5e6 100644
execute_command();
/*
-@@ -160,21 +169,137 @@ int sb600_spi_send_command(unsigned int writecnt, unsigned int readcnt,
+@@ -160,21 +169,155 @@ int sb600_spi_send_command(unsigned int writecnt, unsigned int readcnt,
* the opcode, the FIFO already stores the response from the chip.
* Usually, the chip will respond with 0x00 or 0xff.
*/
@@ -15243,6 +17576,24 @@ index 0cf797c..c20d5e6 100644
+ return 0;
+ }
+
++ reg = pci_read_byte(dev, 0x40);
++ msg_pdbg("SB700 IMC is %sactive.\n", (reg & (1 << 7)) ? "" : "not ");
++ if (reg & (1 << 7)) {
++ /* If we touch any region used by the IMC, the IMC and the SPI
++ * interface will lock up, and the only way to recover is a
++ * hard reset, but that is a bad choice for a half-erased or
++ * half-written flash chip.
++ * There appears to be an undocumented register which can freeze
++ * or disable the IMC, but for now we want to play it safe.
++ */
++ msg_perr("The SB700 IMC is active and may interfere with SPI "
++ "commands. Disabling write.\n");
++ /* FIXME: Should we only disable SPI writes, or will the lockup
++ * affect LPC/FWH chips as well?
++ */
++ programmer_may_write = 0;
++ }
++
+ /* Bring the FIFO to a clean state. */
+ reset_internal_fifo_pointer();
+
@@ -15253,7 +17604,7 @@ index 0cf797c..c20d5e6 100644
+
+#endif
diff --git a/serial.c b/serial.c
-index 37f2549..caf9389 100644
+index 37f2549..9957fb4 100644
--- a/serial.c
+++ b/serial.c
@@ -22,7 +22,6 @@
@@ -15273,6 +17624,30 @@ index 37f2549..caf9389 100644
fdtype sp_fd;
+@@ -199,8 +200,10 @@ int serialport_write(unsigned char *buf, unsigned int writecnt)
+ #else
+ tmp = write(sp_fd, buf, writecnt);
+ #endif
+- if (tmp == -1)
++ if (tmp == -1) {
++ msg_perr("Serial port write error!\n");
+ return 1;
++ }
+ if (!tmp)
+ msg_pdbg("Empty write\n");
+ writecnt -= tmp;
+@@ -220,8 +223,10 @@ int serialport_read(unsigned char *buf, unsigned int readcnt)
+ #else
+ tmp = read(sp_fd, buf, readcnt);
+ #endif
+- if (tmp == -1)
++ if (tmp == -1) {
++ msg_perr("Serial port read error!\n");
+ return 1;
++ }
+ if (!tmp)
+ msg_pdbg("Empty read\n");
+ readcnt -= tmp;
diff --git a/serprog.c b/serprog.c
index efcf9d8..8354f54 100644
--- a/serprog.c
@@ -15420,14 +17795,10 @@ index 70b8135..a891e2c 100644
#include "chipdrivers.h"
diff --git a/spi.c b/spi.c
-index 9bb4687..e892e74 100644
+index 9bb4687..e52ea7a 100644
--- a/spi.c
+++ b/spi.c
-@@ -22,16 +22,13 @@
- * Contains the generic SPI framework
- */
-
--#include <string.h>
+@@ -26,12 +26,10 @@
#include "flash.h"
#include "flashchips.h"
#include "chipdrivers.h"
@@ -15441,7 +17812,7 @@ index 9bb4687..e892e74 100644
const struct spi_programmer spi_programmer[] = {
{ /* SPI_CONTROLLER_NONE */
-@@ -41,7 +38,8 @@ const struct spi_programmer spi_programmer[] = {
+@@ -41,7 +39,8 @@ const struct spi_programmer spi_programmer[] = {
.write_256 = NULL,
},
@@ -15451,7 +17822,7 @@ index 9bb4687..e892e74 100644
{ /* SPI_CONTROLLER_ICH7 */
.command = ich_spi_send_command,
.multicommand = ich_spi_send_multicommand,
-@@ -67,7 +65,7 @@ const struct spi_programmer spi_programmer[] = {
+@@ -67,7 +66,7 @@ const struct spi_programmer spi_programmer[] = {
.command = sb600_spi_send_command,
.multicommand = default_spi_send_multicommand,
.read = sb600_spi_read,
@@ -15460,7 +17831,7 @@ index 9bb4687..e892e74 100644
},
{ /* SPI_CONTROLLER_VIA */
-@@ -81,11 +79,19 @@ const struct spi_programmer spi_programmer[] = {
+@@ -81,11 +80,19 @@ const struct spi_programmer spi_programmer[] = {
.command = wbsio_spi_send_command,
.multicommand = default_spi_send_multicommand,
.read = wbsio_spi_read,
@@ -15482,7 +17853,7 @@ index 9bb4687..e892e74 100644
{ /* SPI_CONTROLLER_FT2232 */
.command = ft2232_spi_send_command,
.multicommand = default_spi_send_multicommand,
-@@ -94,16 +100,16 @@ const struct spi_programmer spi_programmer[] = {
+@@ -94,16 +101,16 @@ const struct spi_programmer spi_programmer[] = {
},
#endif
@@ -15503,7 +17874,7 @@ index 9bb4687..e892e74 100644
{ /* SPI_CONTROLLER_BUSPIRATE */
.command = buspirate_spi_send_command,
.multicommand = default_spi_send_multicommand,
-@@ -112,12 +118,30 @@ const struct spi_programmer spi_programmer[] = {
+@@ -112,12 +119,30 @@ const struct spi_programmer spi_programmer[] = {
},
#endif
@@ -15536,7 +17907,7 @@ index 9bb4687..e892e74 100644
},
#endif
-@@ -131,7 +155,8 @@ int spi_send_command(unsigned int writecnt, unsigned int readcnt,
+@@ -131,7 +156,8 @@ int spi_send_command(unsigned int writecnt, unsigned int readcnt,
{
if (!spi_programmer[spi_controller].command) {
msg_perr("%s called, but SPI is unsupported on this "
@@ -15546,7 +17917,7 @@ index 9bb4687..e892e74 100644
return 1;
}
-@@ -143,7 +168,8 @@ int spi_send_multicommand(struct spi_command *cmds)
+@@ -143,7 +169,8 @@ int spi_send_multicommand(struct spi_command *cmds)
{
if (!spi_programmer[spi_controller].multicommand) {
msg_perr("%s called, but SPI is unsupported on this "
@@ -15556,9 +17927,11 @@ index 9bb4687..e892e74 100644
return 1;
}
-@@ -182,8 +208,9 @@ int default_spi_send_multicommand(struct spi_command *cmds)
+@@ -181,32 +208,91 @@ int default_spi_send_multicommand(struct spi_command *cmds)
+
int spi_chip_read(struct flashchip *flash, uint8_t *buf, int start, int len)
{
++ int addrbase = 0;
if (!spi_programmer[spi_controller].read) {
- msg_perr("%s called, but SPI read is unsupported on this"
- " hardware. Please report a bug.\n", __func__);
@@ -15568,7 +17941,29 @@ index 9bb4687..e892e74 100644
return 1;
}
-@@ -193,20 +220,58 @@ int spi_chip_read(struct flashchip *flash, uint8_t *buf, int start, int len)
+- return spi_programmer[spi_controller].read(flash, buf, start, len);
++ /* Check if the chip fits between lowest valid and highest possible
++ * address. Highest possible address with the current SPI implementation
++ * means 0xffffff, the highest unsigned 24bit number.
++ */
++ addrbase = spi_get_valid_read_addr();
++ if (addrbase + flash->total_size * 1024 > (1 << 24)) {
++ msg_perr("Flash chip size exceeds the allowed access window. ");
++ msg_perr("Read will probably fail.\n");
++ /* Try to get the best alignment subject to constraints. */
++ addrbase = (1 << 24) - flash->total_size * 1024;
++ }
++ /* Check if alignment is native (at least the largest power of two which
++ * is a factor of the mapped size of the chip).
++ */
++ if (ffs(flash->total_size * 1024) > (ffs(addrbase) ? : 33)) {
++ msg_perr("Flash chip is not aligned natively in the allowed "
++ "access window.\n");
++ msg_perr("Read will probably return garbage.\n");
++ }
++ return spi_programmer[spi_controller].read(flash, buf, addrbase + start, len);
+ }
+
/*
* Program chip using page (256 bytes) programming.
* Some SPI masters can't do this, they use single byte programming instead.
@@ -15590,8 +17985,8 @@ index 9bb4687..e892e74 100644
- return spi_programmer[spi_controller].write_256(flash, buf);
+ return spi_programmer[spi_controller].write_256(flash, buf, start, len);
- }
-
++}
++
+/* Wrapper function until the generic code is converted to partial writes. */
+int spi_chip_write_256(struct flashchip *flash, uint8_t *buf)
+{
@@ -15610,8 +18005,8 @@ index 9bb4687..e892e74 100644
+ else
+ msg_pinfo("\n");
+ return ret;
-+}
-+
+ }
+
+/*
+ * Get the lowest allowed address for read accesses. This often happens to
+ * be the lowest allowed address for all commands which take an address.
@@ -15683,7 +18078,7 @@ index 1b49d59..b908603 100644
#endif /* !__SPI_H__ */
diff --git a/spi25.c b/spi25.c
-index c6d1b65..16d162a 100644
+index c6d1b65..9cab10a 100644
--- a/spi25.c
+++ b/spi25.c
@@ -1,7 +1,7 @@
@@ -16009,7 +18404,7 @@ index c6d1b65..16d162a 100644
}
/* Prettyprint the status register. Works for
-@@ -367,6 +521,10 @@ void spi_prettyprint_status_register(struct flashchip *flash)
+@@ -367,12 +521,16 @@ void spi_prettyprint_status_register(struct flashchip *flash)
status = spi_read_status_register();
msg_cdbg("Chip status register is %02x\n", status);
switch (flash->manufacture_id) {
@@ -16020,6 +18415,13 @@ index c6d1b65..16d162a 100644
case ST_ID:
if (((flash->model_id & 0xff00) == 0x2000) ||
((flash->model_id & 0xff00) == 0x2500))
+ spi_prettyprint_status_register_st_m25p(status);
+ break;
+- case MX_ID:
++ case MACRONIX_ID:
+ if ((flash->model_id & 0xff00) == 0x2000)
+ spi_prettyprint_status_register_st_m25p(status);
+ break;
@@ -414,12 +572,6 @@ int spi_chip_erase_60(struct flashchip *flash)
.readarr = NULL,
}};
diff --git a/flashrom-svn_ver.diff b/flashrom-svn_ver.diff
index 705db6c..6e0e392 100644
--- a/flashrom-svn_ver.diff
+++ b/flashrom-svn_ver.diff
@@ -5,7 +5,7 @@
# Note to packagers: Any tree exported with "make export" or "make tarball"
# will not require subversion. The downloadable snapshots are already exported.
-SVNVERSION := 1001
-+SVNVERSION := 1158
++SVNVERSION := 1180
RELEASE := 0.9.2
VERSION := $(RELEASE)-r$(SVNVERSION)
diff --git a/flashrom.spec b/flashrom.spec
index b048c08..e710664 100644
--- a/flashrom.spec
+++ b/flashrom.spec
@@ -1,9 +1,9 @@
-%global svnrev 1158
+%global svnrev 1180
Summary: Simple program for reading/writing BIOS chips content
Name: flashrom
Version: 0.9.2
-Release: 3.svn1158%{?dist}
+Release: 5.svn1180%{?dist}
License: GPLv2
Group: Applications/System
URL: http://flashrom.org
@@ -14,12 +14,14 @@ Patch1: flashrom-svn_ver.diff
Patch2: flashrom-0001-Define-dmidecode-path-at-a-build-stage.patch
BuildRequires: pciutils-devel
BuildRequires: zlib-devel
+%ifnarch ppc ppc64
BuildRequires: dmidecode
Requires: dmidecode
+%endif
BuildRoot: %{_tmppath}/%{name}-%{version}-%{release}-root-%(%{__id_u} -n)
-# see BZ# 283491, 450273, 495226
-ExclusiveArch: %{ix86} x86_64
+# see rhbz #450273, #495226
+ExclusiveArch: %{ix86} x86_64 ppc ppc64
%description
Utility which can be used to detect BIOS chips (DIP, PLCC), read their contents
@@ -32,11 +34,19 @@ and write new contents on the chips ("flash the chip").
%patch2 -p1
%build
+%ifarch ppc ppc64
+CFLAGS="%{optflags}" make %{?_smp_mflags} CONFIG_RAYER_SPI=no CONFIG_NIC3COM=no CONFIG_NICREALTEK=no
+%else
CFLAGS="%{optflags}" make %{?_smp_mflags}
+%endif
%install
rm -rf $RPM_BUILD_ROOT
+%ifarch ppc ppc64
+make install DESTDIR=$RPM_BUILD_ROOT PREFIX=%{_prefix} CONFIG_RAYER_SPI=no CONFIG_NIC3COM=no CONFIG_NICREALTEK=no
+%else
make install DESTDIR=$RPM_BUILD_ROOT PREFIX=%{_prefix}
+%endif
%clean
rm -rf $RPM_BUILD_ROOT
@@ -48,6 +58,13 @@ rm -rf $RPM_BUILD_ROOT
%{_mandir}/man8/%{name}.*
%changelog
+* Tue Sep 21 2010 Peter Lemenkov <lemenkov at gmail.com> 0.9.2-5.svn1180
+- Patch no.3 merged upstream
+
+* Fri Sep 17 2010 Peter Lemenkov <lemenkov at gmail.com> 0.9.2-4.svn1158
+- Enable building on PowerPC (only external flashers enabled so far).
+ See rhbz #283491.
+
* Sun Sep 12 2010 Peter Lemenkov <lemenkov at gmail.com> 0.9.2-3.svn1158
- Clean up spec-file
- Updated to latest svn ver. 1158
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