[xorg-x11-drv-intel] Add upstream fix for crasher (fdo #45235)
Bill Nottingham
notting at fedoraproject.org
Wed Jan 25 21:31:26 UTC 2012
commit 7328fa0fbbeef3bb3f87384e568851e85392e76e
Author: Bill Nottingham <notting at redhat.com>
Date: Wed Jan 25 16:30:36 2012 -0500
Add upstream fix for crasher (fdo #45235)
735219cd59e6184a6622d3d429a704ca3f58b9cd.patch | 35 +++++++
85d3dc5910a2eea3a10b822e01443e11eaae9291.patch | 121 ++++++++++++++++++++++++
f6c82c73b673ec3c9cce432fe38d5e0076234efd.patch | 36 +++++++
xorg-x11-drv-intel.spec | 12 ++-
4 files changed, 203 insertions(+), 1 deletions(-)
---
diff --git a/735219cd59e6184a6622d3d429a704ca3f58b9cd.patch b/735219cd59e6184a6622d3d429a704ca3f58b9cd.patch
new file mode 100644
index 0000000..dc28d9a
--- /dev/null
+++ b/735219cd59e6184a6622d3d429a704ca3f58b9cd.patch
@@ -0,0 +1,35 @@
+commit 735219cd59e6184a6622d3d429a704ca3f58b9cd
+Author: Chris Wilson <chris at chris-wilson.co.uk>
+Date: Fri Dec 2 10:42:00 2011 +0000
+
+ uxa: Ensure that we can fallback with all of (src, mask, dst) as GTT mappings
+
+ Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
+
+diff --git a/src/intel_memory.c b/src/intel_memory.c
+index 7e0a6dd..bfc0e8c 100644
+--- a/src/intel_memory.c
++++ b/src/intel_memory.c
+@@ -182,13 +182,17 @@ static void intel_set_gem_max_sizes(ScrnInfoPtr scrn)
+ size_t agp_size = agp_aperture_size(intel->PciInfo,
+ INTEL_INFO(intel)->gen);
+
+- /* The chances of being able to mmap an object larger than this
+- * are slim, so don't try. */
+- intel->max_gtt_map_size = agp_size / 2;
++ /* The chances of being able to mmap an object larger than
++ * agp_size/2 are slim. Moreover, we may be forced to fallback
++ * using a gtt mapping as both the source and a mask, as well
++ * as a destination and all need to fit into the aperture.
++ */
++ intel->max_gtt_map_size = agp_size / 4;
+
+ /* Let objects be tiled up to the size where only 4 would fit in
+- * the aperture, presuming best case alignment. */
+- intel->max_tiling_size = agp_size / 4;
++ * the aperture, presuming best case alignment. Also if we
++ * cannot mmap it using the GTT we will be stuck. */
++ intel->max_tiling_size = intel->max_gtt_map_size;
+
+ /* Large BOs will tend to hit SW fallbacks frequently, and also will
+ * tend to fail to successfully map when doing SW fallbacks because we
diff --git a/85d3dc5910a2eea3a10b822e01443e11eaae9291.patch b/85d3dc5910a2eea3a10b822e01443e11eaae9291.patch
new file mode 100644
index 0000000..4cabed7
--- /dev/null
+++ b/85d3dc5910a2eea3a10b822e01443e11eaae9291.patch
@@ -0,0 +1,121 @@
+commit 85d3dc5910a2eea3a10b822e01443e11eaae9291
+Author: Chris Wilson <chris at chris-wilson.co.uk>
+Date: Fri Dec 2 10:22:51 2011 +0000
+
+ uxa: Reset size limits based on AGP size
+
+ The basis for the constraints are what we can map into the aperture for
+ direct writing with the CPU, so use the size of the mappable region as
+ opposed to the size of the total GTT.
+
+ Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
+
+diff --git a/src/intel.h b/src/intel.h
+index 1f004a8..28f049e 100644
+--- a/src/intel.h
++++ b/src/intel.h
+@@ -542,7 +542,6 @@ int intel_crtc_to_pipe(xf86CrtcPtr crtc);
+ unsigned long intel_get_fence_size(intel_screen_private *intel, unsigned long size);
+ unsigned long intel_get_fence_pitch(intel_screen_private *intel, unsigned long pitch,
+ uint32_t tiling_mode);
+-void intel_set_gem_max_sizes(ScrnInfoPtr scrn);
+
+ drm_intel_bo *intel_allocate_framebuffer(ScrnInfoPtr scrn,
+ int w, int h, int cpp,
+diff --git a/src/intel_memory.c b/src/intel_memory.c
+index 763a6ad..7e0a6dd 100644
+--- a/src/intel_memory.c
++++ b/src/intel_memory.c
+@@ -169,6 +169,35 @@ static inline int intel_pad_drawable_width(int width)
+ return ALIGN(width, 64);
+ }
+
++
++static size_t
++agp_aperture_size(struct pci_device *dev, int gen)
++{
++ return dev->regions[gen < 30 ? 0 : 2].size;
++}
++
++static void intel_set_gem_max_sizes(ScrnInfoPtr scrn)
++{
++ intel_screen_private *intel = intel_get_screen_private(scrn);
++ size_t agp_size = agp_aperture_size(intel->PciInfo,
++ INTEL_INFO(intel)->gen);
++
++ /* The chances of being able to mmap an object larger than this
++ * are slim, so don't try. */
++ intel->max_gtt_map_size = agp_size / 2;
++
++ /* Let objects be tiled up to the size where only 4 would fit in
++ * the aperture, presuming best case alignment. */
++ intel->max_tiling_size = agp_size / 4;
++
++ /* Large BOs will tend to hit SW fallbacks frequently, and also will
++ * tend to fail to successfully map when doing SW fallbacks because we
++ * overcommit address space for BO access, or worse cause aperture
++ * thrashing.
++ */
++ intel->max_bo_size = intel->max_gtt_map_size;
++}
++
+ /**
+ * Allocates a framebuffer for a screen.
+ *
+@@ -249,56 +278,3 @@ retry:
+
+ return front_buffer;
+ }
+-
+-static void intel_set_max_bo_size(intel_screen_private *intel,
+- const struct drm_i915_gem_get_aperture *aperture)
+-{
+- if (aperture->aper_available_size)
+- /* Large BOs will tend to hit SW fallbacks frequently, and also will
+- * tend to fail to successfully map when doing SW fallbacks because we
+- * overcommit address space for BO access, or worse cause aperture
+- * thrashing.
+- */
+- intel->max_bo_size = aperture->aper_available_size / 2;
+- else
+- intel->max_bo_size = 64 * 1024 * 1024;
+-}
+-
+-static void intel_set_max_gtt_map_size(intel_screen_private *intel,
+- const struct drm_i915_gem_get_aperture *aperture)
+-{
+- if (aperture->aper_available_size)
+- /* Let objects up get bound up to the size where only 2 would fit in
+- * the aperture, but then leave slop to account for alignment like
+- * libdrm does.
+- */
+- intel->max_gtt_map_size =
+- aperture->aper_available_size * 3 / 4 / 2;
+- else
+- intel->max_gtt_map_size = 16 * 1024 * 1024;
+-}
+-
+-static void intel_set_max_tiling_size(intel_screen_private *intel,
+- const struct drm_i915_gem_get_aperture *aperture)
+-{
+- if (aperture->aper_available_size)
+- /* Let objects be tiled up to the size where only 4 would fit in
+- * the aperture, presuming worst case alignment.
+- */
+- intel->max_tiling_size = aperture->aper_available_size / 4;
+- else
+- intel->max_tiling_size = 4 * 1024 * 1024;
+-}
+-
+-void intel_set_gem_max_sizes(ScrnInfoPtr scrn)
+-{
+- intel_screen_private *intel = intel_get_screen_private(scrn);
+- struct drm_i915_gem_get_aperture aperture;
+-
+- aperture.aper_available_size = 0;
+- drmIoctl(intel->drmSubFD, DRM_IOCTL_I915_GEM_GET_APERTURE, &aperture);
+-
+- intel_set_max_bo_size(intel, &aperture);
+- intel_set_max_gtt_map_size(intel, &aperture);
+- intel_set_max_tiling_size(intel, &aperture);
+-}
diff --git a/f6c82c73b673ec3c9cce432fe38d5e0076234efd.patch b/f6c82c73b673ec3c9cce432fe38d5e0076234efd.patch
new file mode 100644
index 0000000..16f38c4
--- /dev/null
+++ b/f6c82c73b673ec3c9cce432fe38d5e0076234efd.patch
@@ -0,0 +1,36 @@
+commit f6c82c73b673ec3c9cce432fe38d5e0076234efd
+Author: Chris Wilson <chris at chris-wilson.co.uk>
+Date: Fri Dec 2 10:34:10 2011 +0000
+
+ uxa: Fix runtime linking of previous commit
+
+ So much for relying on compiler warnings.
+
+ Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
+
+diff --git a/src/intel_display.c b/src/intel_display.c
+index 95a9488..2183f4d 100644
+--- a/src/intel_display.c
++++ b/src/intel_display.c
+@@ -409,8 +409,6 @@ intel_crtc_apply(xf86CrtcPtr crtc)
+ }
+ }
+
+- intel_set_gem_max_sizes(scrn);
+-
+ if (scrn->pScreen)
+ xf86_reload_cursors(scrn->pScreen);
+
+diff --git a/src/intel_driver.c b/src/intel_driver.c
+index 451bebd..2828ed6 100644
+--- a/src/intel_driver.c
++++ b/src/intel_driver.c
+@@ -1170,8 +1170,6 @@ static Bool I830EnterVT(int scrnIndex, int flags)
+ strerror(errno));
+ }
+
+- intel_set_gem_max_sizes(scrn);
+-
+ if (!xf86SetDesiredModes(scrn))
+ return FALSE;
+
diff --git a/xorg-x11-drv-intel.spec b/xorg-x11-drv-intel.spec
index dd42810..7f46ac5 100644
--- a/xorg-x11-drv-intel.spec
+++ b/xorg-x11-drv-intel.spec
@@ -6,7 +6,7 @@
Summary: Xorg X11 Intel video driver
Name: xorg-x11-drv-intel
Version: 2.17.0
-Release: 7%{?dist}
+Release: 8%{?dist}
URL: http://www.x.org
License: MIT
Group: User Interface/X Hardware Support
@@ -26,6 +26,10 @@ Patch22: intel-2.11.0-vga-clock-max.patch
Patch23: intel-2.17.0-legacy-dri1.patch
Patch24: 0001-uxa-Fix-clip-processing-for-uxa_fill_spans.patch
+Patch100: 85d3dc5910a2eea3a10b822e01443e11eaae9291.patch
+Patch101: 735219cd59e6184a6622d3d429a704ca3f58b9cd.patch
+Patch102: f6c82c73b673ec3c9cce432fe38d5e0076234efd.patch
+
ExclusiveArch: %{ix86} x86_64 ia64
BuildRequires: autoconf automake libtool
@@ -76,6 +80,9 @@ Debugging tools for Intel graphics chips
%patch22 -p1 -b .vga-clock
#patch23 -p1 -b .legacy
%patch24 -p1 -b .clip
+%patch100 -p1 -b .kablooie
+%patch101 -p1 -b .kablooie2
+%patch102 -p1 -b .kablooie3
%build
@@ -127,6 +134,9 @@ rm -rf $RPM_BUILD_ROOT
%{_mandir}/man1/intel_*.1*
%changelog
+* Wed Jan 25 2012 Bill Nottingham <notting at redhat.com> - 2.17.0-8
+- fix crash (fdo #45325)
+
* Tue Jan 24 2012 Peter Hutterer <peter.hutterer at redhat.com> - 2.17.0-7
- ABI rebuild
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