[mingw-binutils] Update to 2.23.52.0.1

Erik van Pienbroek epienbro at fedoraproject.org
Wed Apr 3 19:46:30 UTC 2013


commit 8ce795d81dcaac71998a10cf292728de746871c9
Author: Erik van Pienbroek <epienbro at fedoraproject.org>
Date:   Wed Apr 3 21:45:58 2013 +0200

    Update to 2.23.52.0.1
    
    - Fixes FTBFS against latest texinfo
    - Resolve build failure on PPC
    - Resolved rpmlint warning about invalid date in %changelog

 .gitignore                                         |    1 +
 bfd_doc.txt                                        |   36 +++
 binutils-2.23.52.0.1-as-doc-texinfo-fixes.patch    |  279 ++++++++++++++++++++
 ...-260cd95271cdf002ed8e419898fd29c42e257841.patch |   69 -----
 mingw-binutils.spec                                |   23 ++-
 sources                                            |    2 +-
 6 files changed, 333 insertions(+), 77 deletions(-)
---
diff --git a/.gitignore b/.gitignore
index ef9d2bf..e25db5d 100644
--- a/.gitignore
+++ b/.gitignore
@@ -6,3 +6,4 @@ binutils-2.20.1.tar.bz2
 /binutils-2.22.52.0.3.tar.bz2
 /binutils-2.22.52.0.4.tar.bz2
 /binutils-2.23.51.0.5.tar.bz2
+/binutils-2.23.52.0.1.tar.bz2
diff --git a/bfd_doc.txt b/bfd_doc.txt
new file mode 100644
index 0000000..1e385fe
--- /dev/null
+++ b/bfd_doc.txt
@@ -0,0 +1,36 @@
+Index: bfd/doc/chew.c
+===================================================================
+RCS file: /cvs/src/src/bfd/doc/chew.c,v
+retrieving revision 1.25
+diff -p -u -r1.25 chew.c
+--- bfd/doc/chew.c	27 Feb 2012 07:03:00 -0000	1.25
++++ bfd/doc/chew.c	26 Mar 2013 12:20:18 -0000
+@@ -476,8 +476,8 @@ remove_noncomments (src, dst)
+ static void
+ print_stack_level ()
+ {
+-  fprintf (stderr, "current string stack depth = %ld, ", tos - stack);
+-  fprintf (stderr, "current integer stack depth = %ld\n", isp - istack);
++  fprintf (stderr, "current string stack depth = %ld, ", (long) (tos - stack));
++  fprintf (stderr, "current integer stack depth = %ld\n", (long) (isp - istack));
+   pc++;
+ }
+ 
+@@ -1429,7 +1429,7 @@ print ()
+   else if (*isp == 2)
+     write_buffer (tos, stderr);
+   else
+-    fprintf (stderr, "print: illegal print destination `%ld'\n", *isp);
++    fprintf (stderr, "print: illegal print destination `%ld'\n", (long) *isp);
+   isp--;
+   tos--;
+   icheck_range ();
+@@ -1564,7 +1564,7 @@ main (ac, av)
+   if (tos != stack)
+     {
+       fprintf (stderr, "finishing with current stack level %ld\n",
+-	       tos - stack);
++	       (long) (tos - stack));
+       return 1;
+     }
+   return 0;
diff --git a/binutils-2.23.52.0.1-as-doc-texinfo-fixes.patch b/binutils-2.23.52.0.1-as-doc-texinfo-fixes.patch
new file mode 100644
index 0000000..d0b657f
--- /dev/null
+++ b/binutils-2.23.52.0.1-as-doc-texinfo-fixes.patch
@@ -0,0 +1,279 @@
+diff -cp ../binutils-2.23.52.0.1.orig/gas/doc/c-arc.texi gas/doc/c-arc.texi
+*** ../binutils-2.23.52.0.1.orig/gas/doc/c-arc.texi	2013-03-04 08:25:32.051931944 +0000
+--- gas/doc/c-arc.texi	2013-03-04 08:26:19.234930452 +0000
+*************** The extension instructions are not macro
+*** 220,226 ****
+  encodings for use of these instructions according to the specification
+  by the user.  The parameters are:
+  
+! @table @bullet
+  @item @var{name}
+  Name of the extension instruction
+  
+--- 220,226 ----
+  encodings for use of these instructions according to the specification
+  by the user.  The parameters are:
+  
+! @table @code
+  @item @var{name}
+  Name of the extension instruction
+  
+diff -cp ../binutils-2.23.52.0.1.orig/gas/doc/c-arm.texi gas/doc/c-arm.texi
+*** ../binutils-2.23.52.0.1.orig/gas/doc/c-arm.texi	2013-03-04 08:25:32.039931945 +0000
+--- gas/doc/c-arm.texi	2013-03-04 08:27:37.462927978 +0000
+*************** ARM and THUMB instructions had their own
+*** 390,418 ****
+  @code{unified} syntax, which can be selected via the @code{.syntax}
+  directive, and has the following main features:
+  
+! @table @bullet
+! @item
+  Immediate operands do not require a @code{#} prefix.
+  
+! @item
+  The @code{IT} instruction may appear, and if it does it is validated
+  against subsequent conditional affixes.  In ARM mode it does not
+  generate machine code, in THUMB mode it does.
+  
+! @item
+  For ARM instructions the conditional affixes always appear at the end
+  of the instruction.  For THUMB instructions conditional affixes can be
+  used, but only inside the scope of an @code{IT} instruction.
+  
+! @item
+  All of the instructions new to the V6T2 architecture (and later) are
+  available.  (Only a few such instructions can be written in the
+  @code{divided} syntax).
+  
+! @item
+  The @code{.N} and @code{.W} suffixes are recognized and honored.
+  
+! @item
+  All instructions set the flags if and only if they have an @code{s}
+  affix.
+  @end table
+--- 390,418 ----
+  @code{unified} syntax, which can be selected via the @code{.syntax}
+  directive, and has the following main features:
+  
+! @table @code
+! @item 1
+  Immediate operands do not require a @code{#} prefix.
+  
+! @item 2
+  The @code{IT} instruction may appear, and if it does it is validated
+  against subsequent conditional affixes.  In ARM mode it does not
+  generate machine code, in THUMB mode it does.
+  
+! @item 3
+  For ARM instructions the conditional affixes always appear at the end
+  of the instruction.  For THUMB instructions conditional affixes can be
+  used, but only inside the scope of an @code{IT} instruction.
+  
+! @item 4
+  All of the instructions new to the V6T2 architecture (and later) are
+  available.  (Only a few such instructions can be written in the
+  @code{divided} syntax).
+  
+! @item 5
+  The @code{.N} and @code{.W} suffixes are recognized and honored.
+  
+! @item 6
+  All instructions set the flags if and only if they have an @code{s}
+  affix.
+  @end table
+*************** Either @samp{#} or @samp{$} can be used
+*** 451,478 ****
+  @cindex register names, ARM
+  *TODO* Explain about ARM register naming, and the predefined names.
+  
+- @node ARM-Neon-Alignment
+- @subsection NEON Alignment Specifiers
+- 
+- @cindex alignment for NEON instructions
+- Some NEON load/store instructions allow an optional address
+- alignment qualifier.
+- The ARM documentation specifies that this is indicated by
+- @samp{@@ @var{align}}. However GAS already interprets
+- the @samp{@@} character as a "line comment" start,
+- so @samp{: @var{align}} is used instead.  For example:
+- 
+- @smallexample
+-         vld1.8 @{q0@}, [r0, :128]
+- @end smallexample
+- 
+- @node ARM Floating Point
+- @section Floating Point
+- 
+- @cindex floating point, ARM (@sc{ieee})
+- @cindex ARM floating point (@sc{ieee})
+- The ARM family uses @sc{ieee} floating-point numbers.
+- 
+  @node ARM-Relocations
+  @subsection ARM relocation generation
+  
+--- 451,456 ----
+*************** respectively.  For example to load the 3
+*** 519,524 ****
+--- 497,524 ----
+          MOVT r0, #:upper16:foo
+  @end smallexample
+  
++ @node ARM-Neon-Alignment
++ @subsection NEON Alignment Specifiers
++ 
++ @cindex alignment for NEON instructions
++ Some NEON load/store instructions allow an optional address
++ alignment qualifier.
++ The ARM documentation specifies that this is indicated by
++ @samp{@@ @var{align}}. However GAS already interprets
++ the @samp{@@} character as a "line comment" start,
++ so @samp{: @var{align}} is used instead.  For example:
++ 
++ @smallexample
++         vld1.8 @{q0@}, [r0, :128]
++ @end smallexample
++ 
++ @node ARM Floating Point
++ @section Floating Point
++ 
++ @cindex floating point, ARM (@sc{ieee})
++ @cindex ARM floating point (@sc{ieee})
++ The ARM family uses @sc{ieee} floating-point numbers.
++ 
+  @node ARM Directives
+  @section ARM Machine Directives
+  
+diff -cp ../binutils-2.23.52.0.1.orig/gas/doc/c-cr16.texi gas/doc/c-cr16.texi
+*** ../binutils-2.23.52.0.1.orig/gas/doc/c-cr16.texi	2013-03-04 08:25:32.086931943 +0000
+--- gas/doc/c-cr16.texi	2013-03-04 08:28:09.304926971 +0000
+*************** Operand expression type qualifier is an
+*** 44,69 ****
+  CR16 target operand qualifiers and its size (in bits):
+  
+  @table @samp
+! @item Immediate Operand
+! - s ---- 4 bits
+! @item
+! - m ---- 16 bits, for movb and movw instructions.
+! @item
+! - m ---- 20 bits, movd instructions.
+! @item
+! - l ---- 32 bits
+! 
+! @item Absolute Operand
+! - s ---- Illegal specifier for this operand.
+! @item
+! - m ---- 20 bits, movd instructions.
+! 
+! @item Displacement Operand
+! - s ---- 8 bits
+! @item
+! - m ---- 16 bits
+! @item
+! - l ---- 24 bits
+  @end table
+  
+  For example:
+--- 44,76 ----
+  CR16 target operand qualifiers and its size (in bits):
+  
+  @table @samp
+! @item Immediate Operand: s
+! 4 bits.
+! 
+! @item Immediate Operand: m
+! 16 bits, for movb and movw instructions.
+! 
+! @item Immediate Operand: m
+! 20 bits, movd instructions.
+! 
+! @item Immediate Operand: l
+! 32 bits.
+! 
+! @item Absolute Operand: s
+! Illegal specifier for this operand.
+! 
+! @item Absolute Operand: m
+! 20 bits, movd instructions.
+! 
+! @item Displacement Operand: s
+! 8 bits.
+! 
+! @item Displacement Operand: m
+! 16 bits.
+! 
+! @item Displacement Operand: l
+! 24 bits.
+! 
+  @end table
+  
+  For example:
+diff -cp ../binutils-2.23.52.0.1.orig/gas/doc/c-tic54x.texi gas/doc/c-tic54x.texi
+*** ../binutils-2.23.52.0.1.orig/gas/doc/c-tic54x.texi	2013-03-04 08:25:32.035931945 +0000
+--- gas/doc/c-tic54x.texi	2013-03-04 08:28:38.186926057 +0000
+*************** In this example, x is replaced with SYM2
+*** 109,115 ****
+  is replaced with x.  At this point, x has already been encountered
+  and the substitution stops.
+  
+! @smallexample @code
+   .asg   "x",SYM1
+   .asg   "SYM1",SYM2
+   .asg   "SYM2",x
+--- 109,115 ----
+  is replaced with x.  At this point, x has already been encountered
+  and the substitution stops.
+  
+! @smallexample
+   .asg   "x",SYM1
+   .asg   "SYM1",SYM2
+   .asg   "SYM2",x
+*************** Substitution may be forced in situations
+*** 126,139 ****
+  ambiguous by placing colons on either side of the subsym.  The following
+  code:
+  
+! @smallexample @code
+   .eval  "10",x
+  LAB:X:  add     #x, a
+  @end smallexample
+  
+  When assembled becomes:
+  
+! @smallexample @code
+  LAB10  add     #10, a
+  @end smallexample
+  
+--- 126,139 ----
+  ambiguous by placing colons on either side of the subsym.  The following
+  code:
+  
+! @smallexample
+   .eval  "10",x
+  LAB:X:  add     #x, a
+  @end smallexample
+  
+  When assembled becomes:
+  
+! @smallexample
+  LAB10  add     #10, a
+  @end smallexample
+  
+*************** The @code{LDX} pseudo-op is provided for
+*** 309,315 ****
+  of a label or address.  For example, if an address @code{_label} resides
+  in extended program memory, the value of @code{_label} may be loaded as
+  follows:
+! @smallexample @code
+   ldx     #_label,16,a    ; loads extended bits of _label
+   or      #_label,a       ; loads lower 16 bits of _label
+   bacc    a               ; full address is in accumulator A
+--- 309,315 ----
+  of a label or address.  For example, if an address @code{_label} resides
+  in extended program memory, the value of @code{_label} may be loaded as
+  follows:
+! @smallexample
+   ldx     #_label,16,a    ; loads extended bits of _label
+   or      #_label,a       ; loads lower 16 bits of _label
+   bacc    a               ; full address is in accumulator A
diff --git a/mingw-binutils.spec b/mingw-binutils.spec
index b9511d2..4792ed2 100644
--- a/mingw-binutils.spec
+++ b/mingw-binutils.spec
@@ -1,8 +1,8 @@
 %global run_testsuite 1
 
 Name:           mingw-binutils
-Version:        2.23.51.0.5
-Release:        4%{?dist}
+Version:        2.23.52.0.1
+Release:        1%{?dist}
 Summary:        Cross-compiled version of binutils for Win32 and Win64 environments
 
 License:        GPLv2+ and LGPLv2+ and GPLv3+ and LGPLv3+
@@ -24,10 +24,13 @@ BuildRequires:  sharutils
 %endif
 Provides:       bundled(libiberty)
 
-# Resolves: *-mingw32-windres: unexpected version string length 68 != 32 + 8
-# https://bugzilla.redhat.com/show_bug.cgi?id=902960
-Patch0:         binutils.git-260cd95271cdf002ed8e419898fd29c42e257841.patch
+# Resolve build failure on PPC
+# Contributed by Kai Tietz
+Patch0:         bfd_doc.txt
 
+# Fix compatibility with latest texinfo
+# Patch taken from the Fedora binutils package
+Patch1:         binutils-2.23.52.0.1-as-doc-texinfo-fixes.patch
 
 %description
 Cross compiled binutils (utilities like 'strip', 'as', 'ld') which
@@ -65,7 +68,8 @@ understand Windows executables and DLLs.
 
 %prep
 %setup -q -n binutils-%{version}
-%patch0 -p1
+%patch0 -p0
+%patch1 -p0
 
 
 %build
@@ -252,6 +256,11 @@ rm -rf $RPM_BUILD_ROOT/multilib
 
 
 %changelog
+* Wed Apr  3 2013 Erik van Pienbroek <epienbro at fedoraproject.org> - 2.23.52.0.1-1
+- Update to 2.23.52.0.1
+- Fixes FTBFS against latest texinfo
+- Resolve build failure on PPC
+
 * Thu Feb 14 2013 Fedora Release Engineering <rel-eng at lists.fedoraproject.org> - 2.23.51.0.5-4
 - Rebuilt for https://fedoraproject.org/wiki/Fedora_19_Mass_Rebuild
 
@@ -273,7 +282,7 @@ rm -rf $RPM_BUILD_ROOT/multilib
 * Sat Jun  2 2012 Erik van Pienbroek <epienbro at fedoraproject.org> - 2.22.52.0.3-1
 - Update to 2.22.52.0.3 release
 
-* Sun Apr  9 2012 Erik van Pienbroek <epienbro at fedoraproject.org> - 2.22.52-4
+* Sun Apr  8 2012 Erik van Pienbroek <epienbro at fedoraproject.org> - 2.22.52-4
 - Cleaned up unneeded %%global tags
 
 * Tue Mar  6 2012 Erik van Pienbroek <epienbro at fedoraproject.org> - 2.22.52-3
diff --git a/sources b/sources
index c6c1ab0..c01daaf 100644
--- a/sources
+++ b/sources
@@ -1 +1 @@
-a08000d6c18b4667095e416816550a33  binutils-2.23.51.0.5.tar.bz2
+8f4d08f202fdba774c5b875a4e7912f3  binutils-2.23.52.0.1.tar.bz2


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