[kernel/f20] Update am33xx (BeagleBone) patch for 3.13, Minor ARM updates

Peter Robinson pbrobinson at fedoraproject.org
Tue Feb 11 08:31:14 UTC 2014


commit ee4f84c14fe2fa286b654b030f22d8e45b60e5b4
Author: Peter Robinson <pbrobinson at gmail.com>
Date:   Tue Feb 11 08:31:33 2014 +0000

    Update am33xx (BeagleBone) patch for 3.13, Minor ARM updates

 arm-am33xx-bblack.patch | 1654 +++++++++++++++++++++++++++++++++--------------
 config-armv7            |    1 +
 config-armv7-generic    |    9 +-
 kernel.spec             |    7 +-
 4 files changed, 1180 insertions(+), 491 deletions(-)
---
diff --git a/arm-am33xx-bblack.patch b/arm-am33xx-bblack.patch
index 4f62c9d..78b5f3d 100644
--- a/arm-am33xx-bblack.patch
+++ b/arm-am33xx-bblack.patch
@@ -1,610 +1,1292 @@
 Bugzilla: 1012025
 Upstream-status: In beagle github repository https://github.com/beagleboard/kernel
 
-From 82fe302f565e00cfde3e96c6132df93b39525e7b Mon Sep 17 00:00:00 2001
-From: Philipp Zabel <p.zabel at pengutronix.de>
-Date: Tue, 28 May 2013 17:06:15 +0200
-Subject: [PATCH] reset: Add driver for gpio-controlled reset pins
+From 72567452d5d6007010597158f6afd00e2bf07579 Mon Sep 17 00:00:00 2001
+From: Pantelis Antoniou <panto at antoniou-consulting.com>
+Date: Sat, 15 Sep 2012 12:00:41 +0300
+Subject: [PATCH] pinctrl: pinctrl-single must be initialized early.
 
-This driver implements a reset controller device that toggle a gpio
-connected to a reset pin of a peripheral IC. The delay between assertion
-and de-assertion of the reset signal can be configured via device tree.
+When using pinctrl-single to handle i2c initialization, it has
+to be done early. Whether this is the best way to do so, is an
+exercise left to the reader.
+---
+ drivers/pinctrl/pinctrl-single.c | 12 +++++++++++-
+ 1 file changed, 11 insertions(+), 1 deletion(-)
 
-Signed-off-by: Philipp Zabel <p.zabel at pengutronix.de>
-Reviewed-by: Stephen Warren <swarren at nvidia.com>
+diff --git a/drivers/pinctrl/pinctrl-single.c b/drivers/pinctrl/pinctrl-single.c
+index 829b98c..5107dcf 100644
+--- a/drivers/pinctrl/pinctrl-single.c
++++ b/drivers/pinctrl/pinctrl-single.c
+@@ -2039,7 +2039,17 @@ static struct platform_driver pcs_driver = {
+ #endif
+ };
+ 
+-module_platform_driver(pcs_driver);
++static int __init pcs_init(void)
++{
++	return platform_driver_register(&pcs_driver);
++}
++postcore_initcall(pcs_init);
++
++static void __exit pcs_exit(void)
++{
++	platform_driver_unregister(&pcs_driver);
++}
++module_exit(pcs_exit);
+ 
+ MODULE_AUTHOR("Tony Lindgren <tony at atomide.com>");
+ MODULE_DESCRIPTION("One-register-per-pin type device tree based pinctrl driver");
+-- 
+1.8.5.2
+
+From b5a2528c89fc8049b2a6a750634c14983e33d00f Mon Sep 17 00:00:00 2001
+From: Robert Nelson <robertcnelson at gmail.com>
+Date: Fri, 27 Dec 2013 13:05:09 -0600
+Subject: [PATCH] arm: dts: am335x-boneblack: lcdc add panel-info
+
+Signed-off-by: Robert Nelson <robertcnelson at gmail.com>
 ---
- .../devicetree/bindings/reset/gpio-reset.txt       |  35 +++++
- drivers/reset/Kconfig                              |  11 ++
- drivers/reset/Makefile                             |   1 +
- drivers/reset/gpio-reset.c                         | 169 +++++++++++++++++++++
- 4 files changed, 216 insertions(+)
- create mode 100644 Documentation/devicetree/bindings/reset/gpio-reset.txt
- create mode 100644 drivers/reset/gpio-reset.c
-
-diff --git a/Documentation/devicetree/bindings/reset/gpio-reset.txt b/Documentation/devicetree/bindings/reset/gpio-reset.txt
-new file mode 100644
-index 0000000..bca5348
---- /dev/null
-+++ b/Documentation/devicetree/bindings/reset/gpio-reset.txt
-@@ -0,0 +1,35 @@
-+GPIO reset controller
-+=====================
+ arch/arm/boot/dts/am335x-boneblack.dts | 13 +++++++++++++
+ 1 file changed, 13 insertions(+)
+
+diff --git a/arch/arm/boot/dts/am335x-boneblack.dts b/arch/arm/boot/dts/am335x-boneblack.dts
+index 6b71ad9..09ffbd8 100644
+--- a/arch/arm/boot/dts/am335x-boneblack.dts
++++ b/arch/arm/boot/dts/am335x-boneblack.dts
+@@ -74,5 +74,18 @@
+ 		pinctrl-0 = <&nxp_hdmi_bonelt_pins>;
+ 		pinctrl-1 = <&nxp_hdmi_bonelt_off_pins>;
+ 		status = "okay";
 +
-+A GPIO reset controller controls a single GPIO that is connected to the reset
-+pin of a peripheral IC. Please also refer to reset.txt in this directory for
-+common reset controller binding usage.
++		panel-info {
++			bpp = <16>;
++			ac-bias = <255>;
++			ac-bias-intrpt = <0>;
++			dma-burst-sz = <16>;
++			fdd = <16>;
++			sync-edge = <1>;
++			sync-ctrl = <1>;
++			raster-order = <0>;
++			fifo-th = <0>;
++			invert-pxl-clk;
++		};
+ 	};
+ };
+-- 
+1.8.5.1
+
+From 1da083a002581520dd358b8b8e097078000d12b9 Mon Sep 17 00:00:00 2001
+From: Robert Nelson <robertcnelson at gmail.com>
+Date: Fri, 27 Dec 2013 13:14:19 -0600
+Subject: [PATCH 2/2] arm: dts: am335x-boneblack: add cpu0 opp points
+
+Signed-off-by: Robert Nelson <robertcnelson at gmail.com>
+---
+ arch/arm/boot/dts/am335x-boneblack.dts | 18 ++++++++++++++++++
+ 1 file changed, 18 insertions(+)
+
+diff --git a/arch/arm/boot/dts/am335x-boneblack.dts b/arch/arm/boot/dts/am335x-boneblack.dts
+index 09ffbd8..f213ccd 100644
+--- a/arch/arm/boot/dts/am335x-boneblack.dts
++++ b/arch/arm/boot/dts/am335x-boneblack.dts
+@@ -67,6 +67,24 @@
+ };
+ 
+ / {
++	cpus {
++		cpu at 0 {
++			cpu0-supply = <&dcdc2_reg>;
++			/*
++			 * To consider voltage drop between PMIC and SoC,
++			 * tolerance value is reduced to 2% from 4% and
++			 * voltage value is increased as a precaution.
++			 */
++			operating-points = <
++				/* kHz    uV */
++				1000000	1325000
++				800000	1300000
++				600000  1112000
++				300000   969000
++			>;
++		};
++	};
 +
-+Required properties:
-+- compatible: Should be "gpio-reset"
-+- reset-gpios: A gpio used as reset line. The gpio specifier for this property
-+               depends on the gpio controller that provides the gpio.
-+- #reset-cells: 0, see below
+ 	hdmi {
+ 		compatible = "ti,tilcdc,slave";
+ 		i2c = <&i2c0>;
+-- 
+1.8.5.1
+
+From 8551d8aa7d3e002da2097e7e902fb96fceb8694e Mon Sep 17 00:00:00 2001
+From: Robert Nelson <robertcnelson at gmail.com>
+Date: Tue, 31 Dec 2013 11:17:45 -0600
+Subject: [PATCH 3/3] arm: dts: am335x-bone-common: enable and use i2c2
+
+Signed-off-by: Robert Nelson <robertcnelson at gmail.com>
+---
+ arch/arm/boot/dts/am335x-bone-common.dtsi | 39 +++++++++++++++++++++++++++++++
+ 1 file changed, 39 insertions(+)
+
+diff --git a/arch/arm/boot/dts/am335x-bone-common.dtsi b/arch/arm/boot/dts/am335x-bone-common.dtsi
+index e3f27ec..54366b6 100644
+--- a/arch/arm/boot/dts/am335x-bone-common.dtsi
++++ b/arch/arm/boot/dts/am335x-bone-common.dtsi
+@@ -84,6 +84,13 @@
+ 		>;
+ 	};
+ 
++	i2c2_pins: pinmux_i2c2_pins {
++		pinctrl-single,pins = <
++			0x178 0x73 /* (SLEWCTRL_SLOW | PIN_INPUT_PULLUP | MUX_MODE3) uart1_ctsn.i2c2_sda */
++			0x17c 0x73 /* (SLEWCTRL_SLOW | PIN_INPUT_PULLUP | MUX_MODE3) uart1_rtsn.i2c2_scl */
++		>;
++	};
 +
-+Optional properties:
-+- reset-delay-us: delay in microseconds. The gpio reset line will be asserted for
-+                  this duration to reset.
-+- initially-in-reset: boolean. If not set, the initial state should be a
-+                      deasserted reset line. If this property exists, the
-+                      reset line should be kept in reset.
-+
-+example:
-+
-+sii902x_reset: gpio-reset {
-+	compatible = "gpio-reset";
-+	reset-gpios = <&gpio5 0 GPIO_ACTIVE_LOW>;
-+	reset-delay-us = <10000>;
-+	initially-in-reset;
-+	#reset-cells = <0>;
+ 	uart0_pins: pinmux_uart0_pins {
+ 		pinctrl-single,pins = <
+ 			0x170 (PIN_INPUT_PULLUP | MUX_MODE0)	/* uart0_rxd.uart0_rxd */
+@@ -220,6 +227,38 @@
+ 		reg = <0x24>;
+ 	};
+ 
++	baseboard_eeprom: baseboard_eeprom at 50 {
++		compatible = "at,24c256";
++		reg = <0x50>;
++	};
 +};
 +
-+/* Device with nRESET pin connected to GPIO5_0 */
-+sii902x at 39 {
-+	/* ... */
-+	resets = <&sii902x_reset>; /* active-low GPIO5_0, 10 ms delay */
++&i2c2 {
++	status = "okay";
++	pinctrl-names = "default";
++	pinctrl-0 = <&i2c2_pins>;
++
++	clock-frequency = <100000>;
++
++	cape_eeprom0: cape_eeprom0 at 54 {
++		compatible = "at,24c256";
++		reg = <0x54>;
++	};
++
++	cape_eeprom1: cape_eeprom1 at 55 {
++		compatible = "at,24c256";
++		reg = <0x55>;
++	};
++
++	cape_eeprom2: cape_eeprom2 at 56 {
++		compatible = "at,24c256";
++		reg = <0x56>;
++	};
++
++	cape_eeprom3: cape_eeprom3 at 57 {
++		compatible = "at,24c256";
++		reg = <0x57>;
++	};
+ };
+ 
+ /include/ "tps65217.dtsi"
+-- 
+1.8.5.2
+
+From a3099dc53a47d1694a5b575580ec3406dc429bf8 Mon Sep 17 00:00:00 2001
+From: Robert Nelson <robertcnelson at gmail.com>
+Date: Tue, 31 Dec 2013 14:18:00 -0600
+Subject: [PATCH 4/4] arm: dts: am335x-bone-common: setup default pinmux
+ http://elinux.org/Basic_Proto_Cape
+
+Signed-off-by: Robert Nelson <robertcnelson at gmail.com>
+---
+ arch/arm/boot/dts/am335x-bone-common.dtsi | 130 ++++++++++++++++++++++++++++++
+ 1 file changed, 130 insertions(+)
+
+diff --git a/arch/arm/boot/dts/am335x-bone-common.dtsi b/arch/arm/boot/dts/am335x-bone-common.dtsi
+index e4571af..f85cabc 100644
+--- a/arch/arm/boot/dts/am335x-bone-common.dtsi
++++ b/arch/arm/boot/dts/am335x-bone-common.dtsi
+@@ -98,6 +98,13 @@
+ 		>;
+ 	};
+ 
++	uart1_pins: pinmux_uart1_pins {
++		pinctrl-single,pins = <
++			0x180 (PIN_INPUT_PULLUP | MUX_MODE0)	/* uart1_rxd.uart1_rxd */
++			0x184 (PIN_OUTPUT_PULLDOWN | MUX_MODE0)	/* uart1_txd.uart1_txd */
++		>;
++	};
++
+ 	clkout2_pin: pinmux_clkout2_pin {
+ 		pinctrl-single,pins = <
+ 			0x1b4 (PIN_OUTPUT_PULLDOWN | MUX_MODE3)	/* xdma_event_intr1.clkout2 */
+@@ -178,6 +185,33 @@
+ 			0x1c (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad7.mmc1_dat7 */
+ 		>;
+ 	};
++
++	spi0_pins: pinmux_spi0_pins {
++		pinctrl-single,pins = <
++			0x150 (PIN_INPUT_PULLUP | MUX_MODE0)	/* spi0_sclk.spi0_sclk */
++			0x154 (PIN_INPUT_PULLUP | MUX_MODE0)	/* spi0_d0.spi0_d0 */
++			0x158 (PIN_OUTPUT_PULLUP | MUX_MODE0)	/* spi0_d1.spi0_d1 */
++			0x15c (PIN_OUTPUT_PULLUP | MUX_MODE0)	/* spi0_cs0.spi0_cs0 */
++		>;
++	};
++
++	ehrpwm1_pin_p9_14: pinmux_ehrpwm1_pin_p9_14 {
++		pinctrl-single,pins = <
++			0x048 0x6	/* P9_14 (ZCZ ball U14) | MODE 6 */
++		>;
++	};
++
++	ehrpwm1_pin_p9_16: pinmux_ehrpwm1_pin_p9_16 {
++		pinctrl-single,pins = <
++			0x04c 0x6	/* P9_16 (ZCZ ball T14) | MODE 6 */
++		>;
++	};
++
++	ecap0_pin_p9_42: pinmux_ecap0_pin_p9_42 {
++		pinctrl-single,pins = <
++			0x164 0x0	/* P9_42 (ZCZ ball C18) | MODE 0 */
++		>;
++	};
+ };
+ 
+ &uart0 {
+@@ -187,6 +221,13 @@
+ 	status = "okay";
+ };
+ 
++&uart1 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&uart1_pins>;
++
++	status = "okay";
 +};
-diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig
-index c9d04f7..1a862df 100644
---- a/drivers/reset/Kconfig
-+++ b/drivers/reset/Kconfig
-@@ -11,3 +11,14 @@ menuconfig RESET_CONTROLLER
- 	  via GPIOs or SoC-internal reset controller modules.
++
+ &usb {
+ 	status = "okay";
  
- 	  If unsure, say no.
+@@ -261,6 +302,56 @@
+ 	};
+ };
+ 
++&epwmss0 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&ecap0_pin_p9_42>;
++	status = "okay";
 +
-+if RESET_CONTROLLER
++	ecap at 48300100 {
++		status = "okay";
++	};
++};
 +
-+config RESET_GPIO
-+	tristate "GPIO reset controller support"
-+	depends on GPIOLIB && OF
-+	help
-+	  This driver provides support for reset lines that are controlled
-+	  directly by GPIOs.
-+
-+endif
-diff --git a/drivers/reset/Makefile b/drivers/reset/Makefile
-index 1e2d83f..b854f20 100644
---- a/drivers/reset/Makefile
-+++ b/drivers/reset/Makefile
-@@ -1 +1,2 @@
- obj-$(CONFIG_RESET_CONTROLLER) += core.o
-+obj-$(CONFIG_RESET_GPIO) += gpio-reset.o
-diff --git a/drivers/reset/gpio-reset.c b/drivers/reset/gpio-reset.c
++&epwmss1 {
++	pinctrl-names = "default";
++	pinctrl-0 = <
++		&ehrpwm1_pin_p9_14
++		&ehrpwm1_pin_p9_16
++	>;
++
++	status = "okay";
++
++	ehrpwm at 48302200 {
++		status = "okay";
++	};
++};
++
++&spi0 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&spi0_pins>;
++	status = "okay";
++
++	spidev0: spi at 0 {
++		compatible = "spidev";
++		reg = <0>;
++		spi-max-frequency = <16000000>;
++		spi-cpha;
++	};
++
++	spidev1: spi at 1 {
++		compatible = "spidev";
++		reg = <1>;
++		spi-max-frequency = <16000000>;
++	};
++};
++
++&tscadc {
++	status = "okay";
++	adc {
++		ti,adc-channels = <4 5 6>;
++	};
++};
++
+ /include/ "tps65217.dtsi"
+ 
+ &tps {
+@@ -336,3 +427,42 @@
+ 	cd-gpios = <&gpio0 6 GPIO_ACTIVE_HIGH>;
+ 	cd-inverted;
+ };
++
++/ {
++	ocp {
++		//FIXME: these pwm's still need work, this guild isn't working..
++		//http://elinux.org/EBC_Exercise_13_Pulse_Width_Modulation
++		pwm_test_P9_14 at 0 {
++			compatible = "pwm_test";
++			pwms = <&ehrpwm1 0 500000 1>;
++			pwm-names = "PWM_P9_14";
++			pinctrl-names = "default";
++			pinctrl-0 = <&ehrpwm1_pin_p9_14>;
++			enabled = <1>;
++			duty = <0>;
++			status = "okay";
++		};
++
++		pwm_test_P9_16 at 0 {
++			compatible = "pwm_test";
++			pwms = <&ehrpwm1 0 500000 1>;
++			pwm-names = "PWM_P9_16";
++			pinctrl-names = "default";
++			pinctrl-0 = <&ehrpwm1_pin_p9_16>;
++			enabled = <1>;
++			duty = <0>;
++			status = "okay";
++		};
++
++		pwm_test_P9_42 {
++			compatible = "pwm_test";
++			pwms = <&ecap0 0 500000 1>;
++			pwm-names = "PWM_P9_42";
++			pinctrl-names = "default";
++			pinctrl-0 = <&ecap0_pin_p9_42>;
++			enabled = <1>;
++			duty = <0>;
++			status = "okay";
++		};
++	};
++};
+-- 
+1.8.5.2
+
+From d13ca825c40b180549f5ae4b9733e3c896d07167 Mon Sep 17 00:00:00 2001
+From: Jyri Sarha <jsarha at ti.com>
+Date: Fri, 20 Dec 2013 12:37:30 +0200
+Subject: [PATCH 1/6] clk: add gpio controlled clock
+
+The added clk-gpio is a basic clock that can be enabled and disabled
+trough a gpio output. The DT binding document for the clock is also
+added. For EPROBE_DEFER handling the registering of the clock has to
+be delayed until of_clk_get() call time.
+
+Signed-off-by: Jyri Sarha <jsarha at ti.com>
+cc: mturquette at linaro.org
+cc: bcousson at baylibre.com
+---
+ .../devicetree/bindings/clock/gpio-clock.txt       |  21 +++
+ drivers/clk/Makefile                               |   1 +
+ drivers/clk/clk-gpio.c                             | 210 +++++++++++++++++++++
+ include/linux/clk-provider.h                       |  25 +++
+ 4 files changed, 257 insertions(+)
+ create mode 100644 Documentation/devicetree/bindings/clock/gpio-clock.txt
+ create mode 100644 drivers/clk/clk-gpio.c
+
+diff --git a/Documentation/devicetree/bindings/clock/gpio-clock.txt b/Documentation/devicetree/bindings/clock/gpio-clock.txt
 new file mode 100644
-index 0000000..acc1076
+index 0000000..54fea39
 --- /dev/null
-+++ b/drivers/reset/gpio-reset.c
-@@ -0,0 +1,169 @@
++++ b/Documentation/devicetree/bindings/clock/gpio-clock.txt
+@@ -0,0 +1,21 @@
++Binding for simple gpio controlled clock.
++
++This binding uses the common clock binding[1].
++
++[1] Documentation/devicetree/bindings/clock/clock-bindings.txt
++
++Required properties:
++- compatible : shall be "gpio-clock".
++- #clock-cells : from common clock binding; shall be set to 0.
++- enable-gpios : GPIO reference for enabling and disabling the clock.
++
++Optional properties:
++- clocks: Maximum of one parent clock is supported.
++
++Example:
++	clock {
++		compatible = "gpio-clock";
++		clocks = <&parentclk>;
++		#clock-cells = <0>;
++		enable-gpios = <&gpio 1 GPIO_ACTIVE_HIGH>;
++	};
+diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile
+index 7a10bc9..9616e3a 100644
+--- a/drivers/clk/Makefile
++++ b/drivers/clk/Makefile
+@@ -8,6 +8,7 @@ obj-$(CONFIG_COMMON_CLK)	+= clk-fixed-rate.o
+ obj-$(CONFIG_COMMON_CLK)	+= clk-gate.o
+ obj-$(CONFIG_COMMON_CLK)	+= clk-mux.o
+ obj-$(CONFIG_COMMON_CLK)	+= clk-composite.o
++obj-$(CONFIG_COMMON_CLK)	+= clk-gpio.o
+ 
+ # SoCs specific
+ obj-$(CONFIG_ARCH_BCM2835)	+= clk-bcm2835.o
+diff --git a/drivers/clk/clk-gpio.c b/drivers/clk/clk-gpio.c
+new file mode 100644
+index 0000000..e04b0e1
+--- /dev/null
++++ b/drivers/clk/clk-gpio.c
+@@ -0,0 +1,210 @@
 +/*
-+ * GPIO Reset Controller driver
-+ *
-+ * Copyright 2013 Philipp Zabel, Pengutronix
++ * Copyright (C) 2013 Texas Instruments
++ * Author: Jyri Sarha <jsarha at ti.com>
 + *
 + * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation; either version 2 of the License, or
-+ * (at your option) any later version.
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ *
++ * Gpio controlled clock implementation
 + */
-+#include <linux/delay.h>
-+#include <linux/err.h>
-+#include <linux/gpio.h>
++
++#include <linux/clk-provider.h>
 +#include <linux/module.h>
++#include <linux/slab.h>
++#include <linux/gpio.h>
 +#include <linux/of_gpio.h>
-+#include <linux/platform_device.h>
-+#include <linux/reset-controller.h>
-+
-+struct gpio_reset_data {
-+	struct reset_controller_dev rcdev;
-+	unsigned int gpio;
-+	bool active_low;
-+	u32 delay_us;
-+};
-+
-+static void __gpio_reset_set(struct reset_controller_dev *rcdev, int asserted)
-+{
-+	struct gpio_reset_data *drvdata = container_of(rcdev,
-+			struct gpio_reset_data, rcdev);
-+	int value = asserted;
++#include <linux/err.h>
++#include <linux/device.h>
 +
-+	if (drvdata->active_low)
-+		value = !value;
++/**
++ * DOC: basic gpio controlled clock which can be enabled and disabled
++ *      with gpio output
++ * Traits of this clock:
++ * prepare - clk_(un)prepare only ensures parent is (un)prepared
++ * enable - clk_enable and clk_disable are functional & control gpio
++ * rate - inherits rate from parent.  No clk_set_rate support
++ * parent - fixed parent.  No clk_set_parent support
++ */
 +
-+	gpio_set_value(drvdata->gpio, value);
-+}
++#define to_clk_gpio(_hw) container_of(_hw, struct clk_gpio, hw)
 +
-+static int gpio_reset(struct reset_controller_dev *rcdev, unsigned long id)
++static int clk_gpio_enable(struct clk_hw *hw)
 +{
-+	struct gpio_reset_data *drvdata = container_of(rcdev,
-+			struct gpio_reset_data, rcdev);
++	struct clk_gpio *gpio = to_clk_gpio(hw);
++	int value = gpio->active_low ? 0 : 1;
 +
-+	if (drvdata->delay_us < 0)
-+		return -ENOSYS;
-+
-+	__gpio_reset_set(rcdev, 1);
-+	udelay(drvdata->delay_us);
-+	__gpio_reset_set(rcdev, 0);
++	gpio_set_value(gpio->gpio, value);
 +
 +	return 0;
 +}
 +
-+static int gpio_reset_assert(struct reset_controller_dev *rcdev,
-+		unsigned long id)
++static void clk_gpio_disable(struct clk_hw *hw)
 +{
-+	__gpio_reset_set(rcdev, 1);
++	struct clk_gpio *gpio = to_clk_gpio(hw);
++	int value = gpio->active_low ? 1 : 0;
 +
-+	return 0;
++	gpio_set_value(gpio->gpio, value);
 +}
 +
-+static int gpio_reset_deassert(struct reset_controller_dev *rcdev,
-+		unsigned long id)
++static int clk_gpio_is_enabled(struct clk_hw *hw)
 +{
-+	__gpio_reset_set(rcdev, 0);
++	struct clk_gpio *gpio = to_clk_gpio(hw);
++	int value = gpio_get_value(gpio->gpio);
 +
-+	return 0;
++	return gpio->active_low ? !value : value;
 +}
 +
-+static struct reset_control_ops gpio_reset_ops = {
-+	.reset = gpio_reset,
-+	.assert = gpio_reset_assert,
-+	.deassert = gpio_reset_deassert,
++const struct clk_ops clk_gpio_ops = {
++	.enable = clk_gpio_enable,
++	.disable = clk_gpio_disable,
++	.is_enabled = clk_gpio_is_enabled,
 +};
++EXPORT_SYMBOL_GPL(clk_gpio_ops);
 +
-+static int of_gpio_reset_xlate(struct reset_controller_dev *rcdev,
-+			       const struct of_phandle_args *reset_spec)
++/**
++ * clk_register_gpio - register a gpip clock with the clock framework
++ * @dev: device that is registering this clock
++ * @name: name of this clock
++ * @parent_name: name of this clock's parent
++ * @flags: framework-specific flags for this clock
++ * @gpio: gpio to control this clock
++ * @active_low: gpio polarity
++ */
++struct clk *clk_register_gpio(struct device *dev, const char *name,
++		const char *parent_name, unsigned long flags,
++		unsigned int gpio, bool active_low)
 +{
-+	if (WARN_ON(reset_spec->args_count != 0))
-+		return -EINVAL;
++	struct clk_gpio *clk_gpio;
++	struct clk *clk = ERR_PTR(-EINVAL);
++	struct clk_init_data init = { NULL };
++	unsigned long gpio_flags;
++	int err;
 +
-+	return 0;
-+}
++	if (active_low)
++		gpio_flags = GPIOF_OUT_INIT_LOW;
++	else
++		gpio_flags = GPIOF_OUT_INIT_HIGH;
 +
-+static int gpio_reset_probe(struct platform_device *pdev)
-+{
-+	struct device_node *np = pdev->dev.of_node;
-+	struct gpio_reset_data *drvdata;
-+	enum of_gpio_flags flags;
-+	unsigned long gpio_flags;
-+	bool initially_in_reset;
-+	int ret;
++	err = gpio_request_one(gpio, gpio_flags, name);
 +
-+	drvdata = devm_kzalloc(&pdev->dev, sizeof(*drvdata), GFP_KERNEL);
-+	if (drvdata == NULL)
-+		return -ENOMEM;
++	if (err) {
++		pr_err("%s: %s: Error requesting clock control gpio %u\n",
++		       __func__, name, gpio);
++		clk = ERR_PTR(err);
++		goto clk_register_gpio_err;
++	}
 +
-+	if (of_gpio_named_count(np, "reset-gpios") != 1)
-+		return -EINVAL;
++	clk_gpio = kzalloc(sizeof(*clk_gpio), GFP_KERNEL);
 +
-+	drvdata->gpio = of_get_named_gpio_flags(np, "reset-gpios", 0, &flags);
-+	if (drvdata->gpio == -EPROBE_DEFER) {
-+		return drvdata->gpio;
-+	} else if (!gpio_is_valid(drvdata->gpio)) {
-+		dev_err(&pdev->dev, "invalid reset gpio: %d\n", drvdata->gpio);
-+		return drvdata->gpio;
++	if (!clk_gpio) {
++		pr_err("%s: %s: could not allocate gpio clk\n", __func__, name);
++		clk = ERR_PTR(-ENOMEM);
++		goto clk_register_gpio_err;
 +	}
 +
-+	drvdata->active_low = flags & OF_GPIO_ACTIVE_LOW;
++	init.name = name;
++	init.ops = &clk_gpio_ops;
++	init.flags = flags | CLK_IS_BASIC;
++	init.parent_names = (parent_name ? &parent_name : NULL);
++	init.num_parents = (parent_name ? 1 : 0);
 +
-+	ret = of_property_read_u32(np, "reset-delay-us", &drvdata->delay_us);
-+	if (ret < 0)
-+		return ret;
++	clk_gpio->gpio = gpio;
++	clk_gpio->active_low = active_low;
++	clk_gpio->hw.init = &init;
 +
-+	initially_in_reset = of_property_read_bool(np, "initially-in-reset");
-+	if (drvdata->active_low ^ initially_in_reset)
-+		gpio_flags = GPIOF_OUT_INIT_HIGH;
-+	else
-+		gpio_flags = GPIOF_OUT_INIT_LOW;
++	clk = clk_register(dev, &clk_gpio->hw);
 +
-+	ret = devm_gpio_request_one(&pdev->dev, drvdata->gpio, gpio_flags, NULL);
-+	if (ret < 0) {
-+		dev_err(&pdev->dev, "failed to request gpio %d: %d\n",
-+			drvdata->gpio, ret);
-+		return ret;
++	if (!IS_ERR(clk))
++		return clk;
++
++	kfree(clk_gpio);
++
++clk_register_gpio_err:
++	gpio_free(gpio);
++
++	return clk;
++}
++EXPORT_SYMBOL_GPL(clk_register_gpio);
++
++#ifdef CONFIG_OF
++/**
++ * The clk_register_gpio has to be delayed, because the EPROBE_DEFER
++ * can not be handled properly at of_clk_init() call time.
++ */
++
++struct clk_gpio_delayed_register_data {
++	struct device_node *node;
++	struct mutex lock; /* Protect delayed clk registering */
++	struct clk *clk;
++};
++
++static
++struct clk *of_clk_gpio_delayed_register_get(struct of_phandle_args *clkspec,
++					     void *_data)
++{
++	struct clk_gpio_delayed_register_data *data =
++		(struct clk_gpio_delayed_register_data *)_data;
++	struct clk *clk;
++	const char *clk_name = data->node->name;
++	const char *parent_name;
++	enum of_gpio_flags gpio_flags;
++	int gpio;
++	bool active_low;
++
++	mutex_lock(&data->lock);
++
++	if (data->clk) {
++		mutex_unlock(&data->lock);
++		return data->clk;
 +	}
 +
-+	drvdata->rcdev.of_node = np;
-+	drvdata->rcdev.owner = THIS_MODULE;
-+	drvdata->rcdev.nr_resets = 1;
-+	drvdata->rcdev.ops = &gpio_reset_ops;
-+	drvdata->rcdev.of_xlate = of_gpio_reset_xlate;
-+	reset_controller_register(&drvdata->rcdev);
++	gpio = of_get_named_gpio_flags(data->node, "enable-gpios", 0,
++				       &gpio_flags);
 +
-+	platform_set_drvdata(pdev, drvdata);
++	if (gpio < 0) {
++		mutex_unlock(&data->lock);
++		if (gpio != -EPROBE_DEFER)
++			pr_err("%s: %s: Can't get 'enable-gpios' DT property\n",
++			       __func__, clk_name);
++		return ERR_PTR(gpio);
++	}
 +
-+	return 0;
++	active_low = gpio_flags & OF_GPIO_ACTIVE_LOW;
++
++	parent_name = of_clk_get_parent_name(data->node, 0);
++
++	clk = clk_register_gpio(NULL, clk_name, parent_name, 0,
++				gpio, active_low);
++	if (IS_ERR(clk)) {
++		mutex_unlock(&data->lock);
++		return clk;
++	}
++
++	data->clk = clk;
++	mutex_unlock(&data->lock);
++
++	return clk;
 +}
 +
-+static int gpio_reset_remove(struct platform_device *pdev)
++/**
++ * of_gpio_clk_setup() - Setup function for gpio controlled clock
++ */
++void __init of_gpio_clk_setup(struct device_node *node)
 +{
-+	struct gpio_reset_data *drvdata = platform_get_drvdata(pdev);
++	struct clk_gpio_delayed_register_data *data;
 +
-+	reset_controller_unregister(&drvdata->rcdev);
++	data = kzalloc(sizeof(*data), GFP_KERNEL);
++	if (!data) {
++		pr_err("%s: could not allocate gpio clk\n", __func__);
++		return;
++	}
 +
-+	return 0;
++	data->node = node;
++	mutex_init(&data->lock);
++
++	of_clk_add_provider(node, of_clk_gpio_delayed_register_get, data);
 +}
++EXPORT_SYMBOL_GPL(of_gpio_clk_setup);
++CLK_OF_DECLARE(gpio_clk, "gpio-clock", of_gpio_clk_setup);
++#endif
+diff --git a/include/linux/clk-provider.h b/include/linux/clk-provider.h
+index 7e59253..21082b2 100644
+--- a/include/linux/clk-provider.h
++++ b/include/linux/clk-provider.h
+@@ -407,6 +407,31 @@ struct clk *clk_register_composite(struct device *dev, const char *name,
+ 		struct clk_hw *gate_hw, const struct clk_ops *gate_ops,
+ 		unsigned long flags);
+ 
++/***
++ * struct clk_gpio - gpio controlled clock
++ *
++ * @hw:		handle between common and hardware-specific interfaces
++ * @gpio:	gpio
++ * @active_low:	gpio polarity
++ *
++ * Clock with a gpio control for enabling and disabling the parent clock.
++ * Implements .enable, .disable and .is_enabled
++ */
 +
-+static struct of_device_id gpio_reset_dt_ids[] = {
-+	{ .compatible = "gpio-reset" },
-+	{ }
++struct clk_gpio {
++	struct clk_hw	hw;
++	unsigned int	gpio;
++	bool		active_low;
 +};
 +
-+static struct platform_driver gpio_reset_driver = {
-+	.probe = gpio_reset_probe,
-+	.remove = gpio_reset_remove,
-+	.driver = {
-+		.name = "gpio-reset",
-+		.owner = THIS_MODULE,
-+		.of_match_table = of_match_ptr(gpio_reset_dt_ids),
-+	},
-+};
++extern const struct clk_ops clk_gpio_ops;
++
++struct clk *clk_register_gpio(struct device *dev, const char *name,
++		const char *parent_name, unsigned long flags,
++		unsigned int gpio, bool active_low);
 +
-+module_platform_driver(gpio_reset_driver);
++void of_gpio_clk_setup(struct device_node *node);
 +
-+MODULE_AUTHOR("Philipp Zabel <p.zabel at pengutronix.de>");
-+MODULE_DESCRIPTION("gpio reset controller");
-+MODULE_LICENSE("GPL");
-+MODULE_ALIAS("platform:gpio-reset");
-+MODULE_DEVICE_TABLE(of, gpio_reset_dt_ids);
+ /**
+  * clk_register - allocate a new clock, register it and return an opaque cookie
+  * @dev: device that is registering this clock
 -- 
-1.8.2.1
+1.8.5.2
 
-From 03664ac63b20b55af9522449bbad048476d259d5 Mon Sep 17 00:00:00 2001
-From: Joel Fernandes <joelf at ti.com>
-Date: Wed, 3 Jul 2013 17:29:44 -0500
-Subject: [PATCH 2/2] sound: soc: soc-dmaengine-pcm: Add support for new
- DMAEngine request API
+From e21100edd1fbbbe41e93388b88f8548bd3360172 Mon Sep 17 00:00:00 2001
+From: Jyri Sarha <jsarha at ti.com>
+Date: Fri, 20 Dec 2013 12:38:27 +0200
+Subject: [PATCH 2/6] ASoC: davinci-evm: Add named clock reference to DT
+ bindings
 
-Formerly these resources were coming HWMOD on OMAP-like SoCs. With the
-impending removal of HWMOD data, drivers are being converted to use the
-"of-dma" method of requesting DMA channels which from DT and can be obtained
-using the dma_request_slave_channel API. Add support to the soc-dmaengine-pcm
-helpers so that we can fetch and open channels using this method.
+The referenced clock is used to get codec clock rate and the clock is
+disabled and enabled in startup and shutdown snd_soc_ops call
+backs. The change is also documented in DT bindigs document.
 
-Signed-off-by: Joel Fernandes <joelf at ti.com>
+Signed-off-by: Jyri Sarha <jsarha at ti.com>
+cc: bcousson at baylibre.com
 ---
- sound/core/pcm_dmaengine.c | 22 ++++++++++++++++++++++
- 1 file changed, 22 insertions(+)
-
-diff --git a/sound/core/pcm_dmaengine.c b/sound/core/pcm_dmaengine.c
-index aa924d9..461fe4f 100644
---- a/sound/core/pcm_dmaengine.c
-+++ b/sound/core/pcm_dmaengine.c
-@@ -276,6 +276,16 @@ struct dma_chan *snd_dmaengine_pcm_request_channel(dma_filter_fn filter_fn,
- }
- EXPORT_SYMBOL_GPL(snd_dmaengine_pcm_request_channel);
+ .../bindings/sound/davinci-evm-audio.txt           |  9 +++-
+ sound/soc/davinci/davinci-evm.c                    | 60 +++++++++++++++++++++-
+ 2 files changed, 66 insertions(+), 3 deletions(-)
+
+diff --git a/Documentation/devicetree/bindings/sound/davinci-evm-audio.txt b/Documentation/devicetree/bindings/sound/davinci-evm-audio.txt
+index 865178d..4aa00f6 100644
+--- a/Documentation/devicetree/bindings/sound/davinci-evm-audio.txt
++++ b/Documentation/devicetree/bindings/sound/davinci-evm-audio.txt
+@@ -5,12 +5,19 @@ Required properties:
+ - ti,model : The user-visible name of this sound complex.
+ - ti,audio-codec : The phandle of the TLV320AIC3x audio codec
+ - ti,mcasp-controller : The phandle of the McASP controller
+-- ti,codec-clock-rate : The Codec Clock rate (in Hz) applied to the Codec
+ - ti,audio-routing : A list of the connections between audio components.
+   Each entry is a pair of strings, the first being the connection's sink,
+   the second being the connection's source. Valid names for sources and
+   sinks are the codec's pins, and the jacks on the board:
+ 
++Optional properties:
++- ti,codec-clock-rate : The Codec Clock rate (in Hz) applied to the Codec.
++- clocks : Reference to the clock used as codec clock
++- clock-names : The codec clock should be named "ti,codec-clock"
++- Either codec-clock-rate or the codec-clock reference has to be defined. If
++  the both are defined the driver attempts to set referenced clock to the
++  defined rate and takes the rate from the clock reference.
++
+   Board connectors:
  
-+struct dma_chan *snd_dmaengine_pcm_request_slave_channel(
-+	struct snd_pcm_substream *substream, char *name)
+   * Headphone Jack
+diff --git a/sound/soc/davinci/davinci-evm.c b/sound/soc/davinci/davinci-evm.c
+index 623eb5e..daaa3a7 100644
+--- a/sound/soc/davinci/davinci-evm.c
++++ b/sound/soc/davinci/davinci-evm.c
+@@ -17,6 +17,7 @@
+ #include <linux/platform_data/edma.h>
+ #include <linux/i2c.h>
+ #include <linux/of_platform.h>
++#include <linux/clk.h>
+ #include <sound/core.h>
+ #include <sound/pcm.h>
+ #include <sound/soc.h>
+@@ -31,9 +32,30 @@
+ #include "davinci-mcasp.h"
+ 
+ struct snd_soc_card_drvdata_davinci {
++	struct clk *mclk;
+ 	unsigned sysclk;
+ };
+ 
++static int evm_startup(struct snd_pcm_substream *substream)
 +{
 +	struct snd_soc_pcm_runtime *rtd = substream->private_data;
-+	struct device *dev = snd_soc_dai_get_drvdata(rtd->cpu_dai);
++	struct snd_soc_card *soc_card = rtd->codec->card;
++	struct clk *mclk = ((struct snd_soc_card_drvdata_davinci *)
++			    snd_soc_card_get_drvdata(soc_card))->mclk;
 +
-+	return dma_request_slave_channel(dev, name);
++	return clk_prepare_enable(mclk);
 +}
-+EXPORT_SYMBOL_GPL(snd_dmaengine_pcm_request_slave_channel);
 +
- /**
-  * snd_dmaengine_pcm_open - Open a dmaengine based PCM substream
-  * @substream: PCM substream
-@@ -334,6 +344,18 @@ int snd_dmaengine_pcm_open_request_chan(struct snd_pcm_substream *substream,
++static void evm_shutdown(struct snd_pcm_substream *substream)
++{
++	struct snd_soc_pcm_runtime *rtd = substream->private_data;
++	struct snd_soc_card *soc_card = rtd->codec->card;
++	struct clk *mclk = ((struct snd_soc_card_drvdata_davinci *)
++			    snd_soc_card_get_drvdata(soc_card))->mclk;
++
++	clk_disable_unprepare(mclk);
++}
++
+ #define AUDIO_FORMAT (SND_SOC_DAIFMT_DSP_B | \
+ 		SND_SOC_DAIFMT_CBM_CFM | SND_SOC_DAIFMT_IB_NF)
+ static int evm_hw_params(struct snd_pcm_substream *substream,
+@@ -82,6 +104,8 @@ static int evm_spdif_hw_params(struct snd_pcm_substream *substream,
  }
- EXPORT_SYMBOL_GPL(snd_dmaengine_pcm_open_request_chan);
  
-+int snd_dmaengine_pcm_open_request_slave_chan(struct snd_pcm_substream *substream, char *name)
-+{
-+	if(substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
-+		return snd_dmaengine_pcm_open(substream,
-+			    snd_dmaengine_pcm_request_slave_channel(substream, "tx"));
-+	} else {
-+		return snd_dmaengine_pcm_open(substream,
-+			    snd_dmaengine_pcm_request_slave_channel(substream, "rx"));
+ static struct snd_soc_ops evm_ops = {
++	.startup = evm_startup,
++	.shutdown = evm_shutdown,
+ 	.hw_params = evm_hw_params,
+ };
+ 
+@@ -360,6 +384,7 @@ static int davinci_evm_probe(struct platform_device *pdev)
+ 		of_match_device(of_match_ptr(davinci_evm_dt_ids), &pdev->dev);
+ 	struct snd_soc_dai_link *dai = (struct snd_soc_dai_link *) match->data;
+ 	struct snd_soc_card_drvdata_davinci *drvdata = NULL;
++	struct clk *mclk;
+ 	int ret = 0;
+ 
+ 	evm_soc_card.dai_link = dai;
+@@ -379,13 +404,38 @@ static int davinci_evm_probe(struct platform_device *pdev)
+ 	if (ret)
+ 		return ret;
+ 
++	mclk = of_clk_get_by_name(np, "ti,codec-clock");
++	if (PTR_ERR(mclk) == -EPROBE_DEFER) {
++		return -EPROBE_DEFER;
++	} else if (IS_ERR(mclk)) {
++		dev_dbg(&pdev->dev, "Codec clock not found.\n");
++		mclk = NULL;
 +	}
-+}
-+EXPORT_SYMBOL_GPL(snd_dmaengine_pcm_open_request_slave_chan);
 +
- /**
-  * snd_dmaengine_pcm_close - Close a dmaengine based PCM substream
-  * @substream: PCM substream
--- 
-1.8.4.rc3
-
-From ae38683badc8c80b29ccc8aa4e059f900b603551 Mon Sep 17 00:00:00 2001
-From: Pantelis Antoniou <panto at antoniou-consulting.com>
-Date: Fri, 26 Oct 2012 15:48:00 +0300
-Subject: [PATCH 1/2] omap-hsmmc: Correct usage of of_find_node_by_name
-
-of_find_node_by_name expect to have the parent node reference taken.
----
- drivers/mmc/host/omap_hsmmc.c | 10 ++++++++++
- 1 file changed, 10 insertions(+)
-
-diff --git a/drivers/mmc/host/omap_hsmmc.c b/drivers/mmc/host/omap_hsmmc.c
-index 6ac63df..f5b660c 100644
---- a/drivers/mmc/host/omap_hsmmc.c
-+++ b/drivers/mmc/host/omap_hsmmc.c
-@@ -1893,6 +1893,16 @@ static int omap_hsmmc_probe(struct platform_device *pdev)
- 	 * as we want. */
- 	mmc->max_segs = 1024;
- 
-+	/* Eventually we should get our max_segs limitation for EDMA by
-+	 * querying the dmaengine API */
-+	if (pdev->dev.of_node) {
-+		struct device_node *parent = of_node_get(pdev->dev.of_node->parent);
-+		struct device_node *node;
-+		node = of_find_node_by_name(parent, "edma");
-+		if (node)
-+			mmc->max_segs = 16;
+ 	drvdata = devm_kzalloc(&pdev->dev, sizeof(*drvdata), GFP_KERNEL);
+ 	if (!drvdata)
+ 		return -ENOMEM;
+ 
++	drvdata->mclk = mclk;
++
+ 	ret = of_property_read_u32(np, "ti,codec-clock-rate", &drvdata->sysclk);
+-	if (ret < 0)
+-		return -EINVAL;
++
++	if (ret < 0) {
++		if (!drvdata->mclk) {
++			dev_err(&pdev->dev,
++				"No clock or clock rate defined.\n");
++			return -EINVAL;
++		}
++		drvdata->sysclk = clk_get_rate(drvdata->mclk);
++	} else if (drvdata->mclk) {
++		unsigned int requestd_rate = drvdata->sysclk;
++		clk_set_rate(drvdata->mclk, drvdata->sysclk);
++		drvdata->sysclk = clk_get_rate(drvdata->mclk);
++		if (drvdata->sysclk != requestd_rate)
++			dev_warn(&pdev->dev,
++				 "Could not get requested rate %u using %u.\n",
++				 requestd_rate, drvdata->sysclk);
 +	}
+ 
+ 	snd_soc_card_set_drvdata(&evm_soc_card, drvdata);
+ 	ret = devm_snd_soc_register_card(&pdev->dev, &evm_soc_card);
+@@ -399,6 +449,12 @@ static int davinci_evm_probe(struct platform_device *pdev)
+ static int davinci_evm_remove(struct platform_device *pdev)
+ {
+ 	struct snd_soc_card *card = platform_get_drvdata(pdev);
++	struct snd_soc_card_drvdata_davinci *drvdata =
++		(struct snd_soc_card_drvdata_davinci *)
++		snd_soc_card_get_drvdata(card);
 +
- 	mmc->max_blk_size = 512;       /* Block Length at max can be 1024 */
- 	mmc->max_blk_count = 0xFFFF;    /* No. of Blocks is 16 bits */
- 	mmc->max_req_size = mmc->max_blk_size * mmc->max_blk_count;
++	if (drvdata->mclk)
++		clk_put(drvdata->mclk);
+ 
+ 	snd_soc_unregister_card(card);
+ 
 -- 
-1.8.2.1
+1.8.5.2
 
-From 5d93a65cfc4ff6aaf78ab49f71daa2a644ea2ace Mon Sep 17 00:00:00 2001
-From: Pantelis Antoniou <panto at antoniou-consulting.com>
-Date: Fri, 30 Nov 2012 12:18:16 +0200
-Subject: [PATCH 2/2] omap_hsmmc: Add reset gpio
+From bdc80bd25c9ee2e0b71b958c11a76f4e3182fab2 Mon Sep 17 00:00:00 2001
+From: Jyri Sarha <jsarha at ti.com>
+Date: Fri, 20 Dec 2013 12:39:38 +0200
+Subject: [PATCH 3/6] ASoC: davinci-evm: HDMI audio support for TDA998x trough
+ McASP I2S bus
 
-Add a gpio property for controlling reset of the mmc device.
-eMMC on the beaglebone black requires it.
+Add machine driver support for BeagleBone-Black and other boards with
+tilcdc support and NXP TDA998X HDMI transmitter connected to McASP
+port in I2S mode. The 44100 Hz sample-rate and it's multiples can not
+be supported on Beaglebone-Black because of limited clock-rate
+support. The only supported sample format is SNDRV_PCM_FORMAT_S32_LE.
+The 8 least significant bits are ignored.
 
-Signed-off-by: Pantelis Antoniou <panto at antoniou-consulting.com>
+Signed-off-by: Jyri Sarha <jsarha at ti.com>
+cc: bcousson at baylibre.com
 ---
- drivers/mmc/host/omap_hsmmc.c          | 40 +++++++++++++++++++++++++++++++++-
- include/linux/platform_data/mmc-omap.h |  3 +++
- 2 files changed, 42 insertions(+), 1 deletion(-)
-
-diff --git a/drivers/mmc/host/omap_hsmmc.c b/drivers/mmc/host/omap_hsmmc.c
-index f5b660c..1bdb90f 100644
---- a/drivers/mmc/host/omap_hsmmc.c
-+++ b/drivers/mmc/host/omap_hsmmc.c
-@@ -41,6 +41,8 @@
- #include <linux/pinctrl/consumer.h>
- #include <linux/pm_runtime.h>
- #include <linux/platform_data/mmc-omap.h>
-+#include <linux/pinctrl/consumer.h>
-+#include <linux/err.h>
+ .../bindings/sound/davinci-evm-audio.txt           |   4 +-
+ sound/soc/davinci/davinci-evm.c                    | 167 ++++++++++++++++++++-
+ 2 files changed, 168 insertions(+), 3 deletions(-)
+
+diff --git a/Documentation/devicetree/bindings/sound/davinci-evm-audio.txt b/Documentation/devicetree/bindings/sound/davinci-evm-audio.txt
+index 4aa00f6..f1e1031 100644
+--- a/Documentation/devicetree/bindings/sound/davinci-evm-audio.txt
++++ b/Documentation/devicetree/bindings/sound/davinci-evm-audio.txt
+@@ -1,7 +1,9 @@
+ * Texas Instruments SoC audio setups with TLV320AIC3X Codec
  
- /* OMAP HSMMC Host Controller Registers */
- #define OMAP_HSMMC_SYSSTATUS	0x0014
-@@ -392,6 +394,7 @@ static inline int omap_hsmmc_have_reg(void)
- static int omap_hsmmc_gpio_init(struct omap_mmc_platform_data *pdata)
- {
- 	int ret;
-+	unsigned long flags;
+ Required properties:
+-- compatible : "ti,da830-evm-audio" : forDM365/DA8xx/OMAPL1x/AM33xx
++- compatible :
++  "ti,da830-evm-audio" : for DM365/DA8xx/OMAPL1x/AM33xx
++  "ti,am33xx-beaglebone-black-audio" : for Beaglebone-black HDMI audio
+ - ti,model : The user-visible name of this sound complex.
+ - ti,audio-codec : The phandle of the TLV320AIC3x audio codec
+ - ti,mcasp-controller : The phandle of the McASP controller
+diff --git a/sound/soc/davinci/davinci-evm.c b/sound/soc/davinci/davinci-evm.c
+index daaa3a7..f212975 100644
+--- a/sound/soc/davinci/davinci-evm.c
++++ b/sound/soc/davinci/davinci-evm.c
+@@ -21,6 +21,7 @@
+ #include <sound/core.h>
+ #include <sound/pcm.h>
+ #include <sound/soc.h>
++#include <sound/pcm_params.h>
+ 
+ #include <asm/dma.h>
+ #include <asm/mach-types.h>
+@@ -34,8 +35,13 @@
+ struct snd_soc_card_drvdata_davinci {
+ 	struct clk *mclk;
+ 	unsigned sysclk;
++	struct snd_pcm_hw_constraint_list *rate_constraint;
+ };
  
- 	if (gpio_is_valid(pdata->slots[0].switch_pin)) {
- 		if (pdata->slots[0].cover)
-@@ -421,6 +424,24 @@ static int omap_hsmmc_gpio_init(struct omap_mmc_platform_data *pdata)
- 	} else
- 		pdata->slots[0].gpio_wp = -EINVAL;
++/* If changing sample format the tda998x configuration (REG_CTS_N) needs
++   to be changed. */
++#define TDA998X_SAMPLE_FORMAT SNDRV_PCM_FORMAT_S32_LE
++
+ static int evm_startup(struct snd_pcm_substream *substream)
+ {
+ 	struct snd_soc_pcm_runtime *rtd = substream->private_data;
+@@ -103,12 +109,80 @@ static int evm_spdif_hw_params(struct snd_pcm_substream *substream,
+ 	return snd_soc_dai_set_fmt(cpu_dai, AUDIO_FORMAT);
+ }
  
-+	if (gpio_is_valid(pdata->slots[0].gpio_reset)) {
-+		flags = pdata->slots[0].gpio_reset_active_low ?
-+				GPIOF_OUT_INIT_LOW : GPIOF_OUT_INIT_HIGH;
-+		ret = gpio_request_one(pdata->slots[0].gpio_reset, flags,
-+				"mmc_reset");
-+		if (ret)
-+			goto err_free_wp;
++static int evm_tda998x_startup(struct snd_pcm_substream *substream)
++{
++	struct snd_pcm_runtime *runtime = substream->runtime;
++	struct snd_soc_pcm_runtime *rtd = substream->private_data;
++	struct snd_soc_card *soc_card = rtd->codec->card;
++	struct snd_soc_card_drvdata_davinci *drvdata =
++		(struct snd_soc_card_drvdata_davinci *)
++		snd_soc_card_get_drvdata(soc_card);
++	struct snd_mask *fmt = constrs_mask(&runtime->hw_constraints,
++					    SNDRV_PCM_HW_PARAM_FORMAT);
++	snd_mask_none(fmt);
++	snd_mask_set(fmt, TDA998X_SAMPLE_FORMAT);
 +
-+		/* hold reset */
-+		udelay(pdata->slots[0].gpio_reset_hold_us);
++	runtime->hw.rate_min = drvdata->rate_constraint->list[0];
++	runtime->hw.rate_max = drvdata->rate_constraint->list[
++		drvdata->rate_constraint->count - 1];
++	runtime->hw.rates = SNDRV_PCM_RATE_KNOT;
 +
-+		gpio_set_value(pdata->slots[0].gpio_reset,
-+				!pdata->slots[0].gpio_reset_active_low);
++	snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
++				   drvdata->rate_constraint);
++	snd_pcm_hw_constraint_minmax(runtime, SNDRV_PCM_HW_PARAM_CHANNELS,
++				     2, 2);
 +
-+	} else
-+		pdata->slots[0].gpio_reset = -EINVAL;
++	return evm_startup(substream);
++}
 +
++static unsigned int evm_get_bclk(struct snd_pcm_hw_params *params)
++{
++	int sample_size = snd_pcm_format_width(params_format(params));
++	int rate = params_rate(params);
++	int channels = params_channels(params);
 +
++	return sample_size * channels * rate;
++}
++
++static int evm_tda998x_hw_params(struct snd_pcm_substream *substream,
++				 struct snd_pcm_hw_params *params)
++{
++	struct snd_soc_pcm_runtime *rtd = substream->private_data;
++	struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
++	struct snd_soc_codec *codec = rtd->codec;
++	struct snd_soc_card *soc_card = codec->card;
++	struct platform_device *pdev = to_platform_device(soc_card->dev);
++	unsigned int bclk_freq = evm_get_bclk(params);
++	unsigned sysclk = ((struct snd_soc_card_drvdata_davinci *)
++			   snd_soc_card_get_drvdata(soc_card))->sysclk;
++	int ret;
++
++	ret = snd_soc_dai_set_clkdiv(cpu_dai, 1, sysclk / bclk_freq);
++	if (ret < 0) {
++		dev_err(&pdev->dev, "can't set CPU DAI clock divider %d\n",
++			ret);
++		return ret;
++	}
++
++	ret = snd_soc_dai_set_sysclk(cpu_dai, 0, sysclk, SND_SOC_CLOCK_IN);
++	if (ret < 0)
++		return ret;
++
++	return ret;
++}
++
+ static struct snd_soc_ops evm_ops = {
+ 	.startup = evm_startup,
+ 	.shutdown = evm_shutdown,
+ 	.hw_params = evm_hw_params,
+ };
+ 
++static struct snd_soc_ops evm_tda998x_ops = {
++	.startup = evm_tda998x_startup,
++	.shutdown = evm_shutdown,
++	.hw_params = evm_tda998x_hw_params,
++};
++
+ static struct snd_soc_ops evm_spdif_ops = {
+ 	.hw_params = evm_spdif_hw_params,
+ };
+@@ -179,6 +253,81 @@ static int evm_aic3x_init(struct snd_soc_pcm_runtime *rtd)
  	return 0;
+ }
  
- err_free_wp:
-@@ -434,6 +455,8 @@ err_free_sp:
++static unsigned int tda998x_hdmi_rates[] = {
++	32000,
++	44100,
++	48000,
++	88200,
++	96000,
++};
++
++static struct snd_pcm_hw_constraint_list *evm_tda998x_rate_constraint(
++	struct snd_soc_card *soc_card)
++{
++	struct platform_device *pdev = to_platform_device(soc_card->dev);
++	unsigned sysclk = ((struct snd_soc_card_drvdata_davinci *)
++			   snd_soc_card_get_drvdata(soc_card))->sysclk;
++	struct snd_pcm_hw_constraint_list *ret;
++	unsigned int *rates;
++	int i = 0, j = 0;
++
++	ret = devm_kzalloc(soc_card->dev, sizeof(*ret) +
++			   sizeof(tda998x_hdmi_rates), GFP_KERNEL);
++	if (!ret) {
++		dev_err(&pdev->dev, "Unable to allocate rate constraint!\n");
++		return NULL;
++	}
++
++	rates = (unsigned int *)&ret[1];
++	ret->list = rates;
++	ret->mask = 0;
++	for (; i < ARRAY_SIZE(tda998x_hdmi_rates); i++) {
++		unsigned int bclk_freq = tda998x_hdmi_rates[i] * 2 *
++			snd_pcm_format_width(TDA998X_SAMPLE_FORMAT);
++		if (sysclk % bclk_freq == 0) {
++			rates[j++] = tda998x_hdmi_rates[i];
++			dev_dbg(soc_card->dev, "Allowing rate %u\n",
++				tda998x_hdmi_rates[i]);
++		}
++	}
++	ret->count = j;
++	return ret;
++}
++
++static const struct snd_soc_dapm_widget tda998x_dapm_widgets[] = {
++	SND_SOC_DAPM_OUTPUT("HDMI Out"),
++};
++
++static int evm_tda998x_init(struct snd_soc_pcm_runtime *rtd)
++{
++	struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
++	struct snd_soc_dapm_context *dapm = &rtd->codec->dapm;
++	struct snd_soc_card *soc_card = rtd->codec->card;
++	struct snd_soc_card_drvdata_davinci *drvdata =
++		(struct snd_soc_card_drvdata_davinci *)
++		snd_soc_card_get_drvdata(soc_card);
++	int ret;
++
++	ret = snd_soc_dai_set_clkdiv(cpu_dai, 0, 1);
++	if (ret < 0)
++		return ret;
++
++	drvdata->rate_constraint = evm_tda998x_rate_constraint(soc_card);
++
++	snd_soc_dapm_new_controls(dapm, tda998x_dapm_widgets,
++				  ARRAY_SIZE(tda998x_dapm_widgets));
++
++	ret = snd_soc_of_parse_audio_routing(soc_card, "ti,audio-routing");
++
++	/* not connected */
++	snd_soc_dapm_disable_pin(dapm, "RX");
++
++	/* always connected */
++	snd_soc_dapm_enable_pin(dapm, "HDMI Out");
++
++	return 0;
++}
++
+ /* davinci-evm digital audio interface glue - connects codec <--> CPU */
+ static struct snd_soc_dai_link dm6446_evm_dai = {
+ 	.name = "TLV320AIC3X",
+@@ -351,7 +500,7 @@ static struct snd_soc_card da850_snd_soc_card = {
+ #if defined(CONFIG_OF)
  
- static void omap_hsmmc_gpio_free(struct omap_mmc_platform_data *pdata)
- {
-+	if (gpio_is_valid(pdata->slots[0].gpio_reset))
-+		gpio_free(pdata->slots[0].gpio_reset);
- 	if (gpio_is_valid(pdata->slots[0].gpio_wp))
- 		gpio_free(pdata->slots[0].gpio_wp);
- 	if (gpio_is_valid(pdata->slots[0].switch_pin))
-@@ -788,7 +811,7 @@ omap_hsmmc_start_command(struct omap_hsmmc_host *host, struct mmc_command *cmd,
- 	 * ac, bc, adtc, bcr. Only commands ending an open ended transfer need
- 	 * a val of 0x3, rest 0x0.
- 	 */
--	if (cmd == host->mrq->stop)
-+	if (host->mrq && cmd == host->mrq->stop)
- 		cmdtype = 0x3;
- 
- 	cmdreg = (cmd->opcode << 24) | (resptype << 16) | (cmdtype << 22);
-@@ -830,6 +853,8 @@ static void omap_hsmmc_request_done(struct omap_hsmmc_host *host, struct mmc_req
- 	int dma_ch;
- 	unsigned long flags;
- 
-+	BUG_ON(mrq == NULL);
-+
- 	spin_lock_irqsave(&host->irq_lock, flags);
- 	host->req_in_progress = 0;
- 	dma_ch = host->dma_ch;
-@@ -1720,6 +1745,7 @@ static struct omap_mmc_platform_data *of_get_hsmmc_pdata(struct device *dev)
- 	struct device_node *np = dev->of_node;
- 	u32 bus_width, max_freq;
- 	int cd_gpio, wp_gpio;
-+	enum of_gpio_flags reset_flags;
- 
- 	cd_gpio = of_get_named_gpio(np, "cd-gpios", 0);
- 	wp_gpio = of_get_named_gpio(np, "wp-gpios", 0);
-@@ -1737,6 +1763,14 @@ static struct omap_mmc_platform_data *of_get_hsmmc_pdata(struct device *dev)
- 	pdata->nr_slots = 1;
- 	pdata->slots[0].switch_pin = cd_gpio;
- 	pdata->slots[0].gpio_wp = wp_gpio;
-+	reset_flags = 0;
-+	pdata->slots[0].gpio_reset = of_get_named_gpio_flags(np,
-+			"reset-gpios", 0, &reset_flags);
-+	pdata->slots[0].gpio_reset_active_low =
-+		(reset_flags & OF_GPIO_ACTIVE_LOW) != 0;
-+	pdata->slots[0].gpio_reset_hold_us = 100;	/* default */
-+	of_property_read_u32(np, "reset-gpio-hold-us",
-+			&pdata->slots[0].gpio_reset_hold_us);
- 
- 	if (of_find_property(np, "ti,non-removable", NULL)) {
- 		pdata->slots[0].nonremovable = true;
-@@ -1802,6 +1836,10 @@ static int omap_hsmmc_probe(struct platform_device *pdev)
- 		return -ENXIO;
- 	}
- 
-+	pinctrl = devm_pinctrl_get_select_default(&pdev->dev);
-+	if (IS_ERR(pinctrl))
-+		dev_warn(&pdev->dev, "unable to select pin group\n");
-+
- 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
- 	irq = platform_get_irq(pdev, 0);
- 	if (res == NULL || irq < 0)
-diff --git a/include/linux/platform_data/mmc-omap.h b/include/linux/platform_data/mmc-omap.h
-index 2bf1b30..d548994 100644
---- a/include/linux/platform_data/mmc-omap.h
-+++ b/include/linux/platform_data/mmc-omap.h
-@@ -115,6 +115,9 @@ struct omap_mmc_platform_data {
- 
- 		int switch_pin;			/* gpio (card detect) */
- 		int gpio_wp;			/* gpio (write protect) */
-+		int gpio_reset;			/* gpio (reset) */
-+		int gpio_reset_active_low;	/* 1 if reset is active low */
-+		u32 gpio_reset_hold_us;		/* time to hold in us */
- 
- 		int (*set_bus_mode)(struct device *dev, int slot, int bus_mode);
- 		int (*set_power)(struct device *dev, int slot,
+ /*
+- * The struct is used as place holder. It will be completely
++ * The structs are used as place holders. They will be completely
+  * filled with data from dt node.
+  */
+ static struct snd_soc_dai_link evm_dai_tlv320aic3x = {
+@@ -362,10 +511,24 @@ static struct snd_soc_dai_link evm_dai_tlv320aic3x = {
+ 	.init           = evm_aic3x_init,
+ };
+ 
++static struct snd_soc_dai_link evm_dai_tda998x_hdmi = {
++	.name		= "NXP TDA998x HDMI Chip",
++	.stream_name	= "HDMI",
++	.codec_dai_name	= "hdmi-hifi",
++	.ops		= &evm_tda998x_ops,
++	.init           = evm_tda998x_init,
++	.dai_fmt	= (SND_SOC_DAIFMT_CBS_CFS | SND_SOC_DAIFMT_I2S |
++			   SND_SOC_DAIFMT_IB_NF),
++};
++
+ static const struct of_device_id davinci_evm_dt_ids[] = {
+ 	{
+ 		.compatible = "ti,da830-evm-audio",
+-		.data = (void *) &evm_dai_tlv320aic3x,
++		.data = &evm_dai_tlv320aic3x,
++	},
++	{
++		.compatible = "ti,am33xx-beaglebone-black-audio",
++		.data = &evm_dai_tda998x_hdmi,
+ 	},
+ 	{ /* sentinel */ }
+ };
 -- 
-1.8.2.1
+1.8.5.2
 
-From b45e4df71f07f2178db133db540e3f15e0b4ec05 Mon Sep 17 00:00:00 2001
-From: Pantelis Antoniou <panto at antoniou-consulting.com>
-Date: Sat, 15 Sep 2012 12:00:41 +0300
-Subject: [PATCH] pinctrl: pinctrl-single must be initialized early.
+From 422e231e0893a542bee0b89f5074ed6f31ec894d Mon Sep 17 00:00:00 2001
+From: Jyri Sarha <jsarha at ti.com>
+Date: Fri, 20 Dec 2013 12:40:16 +0200
+Subject: [PATCH 4/6] ASoC: hdmi-codec: Add devicetree binding with
+ documentation
 
-When using pinctrl-single to handle i2c initialization, it has
-to be done early. Whether this is the best way to do so, is an
-exercise left to the reader.
+Signed-off-by: Jyri Sarha <jsarha at ti.com>
+cc: bcousson at baylibre.com
 ---
- drivers/pinctrl/pinctrl-single.c | 12 +++++++++++-
- 1 file changed, 11 insertions(+), 1 deletion(-)
+ Documentation/devicetree/bindings/sound/hdmi.txt | 17 +++++++++++++++++
+ sound/soc/codecs/hdmi.c                          | 10 ++++++++++
+ 2 files changed, 27 insertions(+)
+ create mode 100644 Documentation/devicetree/bindings/sound/hdmi.txt
 
-diff --git a/drivers/pinctrl/pinctrl-single.c b/drivers/pinctrl/pinctrl-single.c
-index a82ace4..aeef35d 100644
---- a/drivers/pinctrl/pinctrl-single.c
-+++ b/drivers/pinctrl/pinctrl-single.c
-@@ -1673,7 +1673,17 @@ static struct platform_driver pcs_driver = {
- #endif
+diff --git a/Documentation/devicetree/bindings/sound/hdmi.txt b/Documentation/devicetree/bindings/sound/hdmi.txt
+new file mode 100644
+index 0000000..31af7bc
+--- /dev/null
++++ b/Documentation/devicetree/bindings/sound/hdmi.txt
+@@ -0,0 +1,17 @@
++Device-Tree bindings for dummy HDMI codec
++
++Required properties:
++	- compatible: should be "linux,hdmi-audio".
++
++CODEC output pins:
++  * TX
++
++CODEC input pins:
++  * RX
++
++Example node:
++
++	hdmi_audio: hdmi_audio at 0 {
++		compatible = "linux,hdmi-audio";
++		status = "okay";
++	};
+diff --git a/sound/soc/codecs/hdmi.c b/sound/soc/codecs/hdmi.c
+index 68342b1..6d2fcf1 100644
+--- a/sound/soc/codecs/hdmi.c
++++ b/sound/soc/codecs/hdmi.c
+@@ -20,6 +20,7 @@
+  */
+ #include <linux/module.h>
+ #include <sound/soc.h>
++#include <linux/of_device.h>
+ 
+ #define DRV_NAME "hdmi-audio-codec"
+ 
+@@ -60,6 +61,14 @@ static struct snd_soc_dai_driver hdmi_codec_dai = {
+ 
  };
  
--module_platform_driver(pcs_driver);
-+static int __init pcs_init(void)
-+{
-+	return platform_driver_register(&pcs_driver);
-+}
-+postcore_initcall(pcs_init);
++#ifdef CONFIG_OF
++static const struct of_device_id hdmi_audio_codec_ids[] = {
++	{ .compatible = "linux,hdmi-audio", },
++	{ }
++};
++MODULE_DEVICE_TABLE(of, hdmi_audio_codec_ids);
++#endif
 +
-+static void __exit pcs_exit(void)
-+{
-+	platform_driver_unregister(&pcs_driver);
-+}
-+module_exit(pcs_exit);
+ static struct snd_soc_codec_driver hdmi_codec = {
+ 	.dapm_widgets = hdmi_widgets,
+ 	.num_dapm_widgets = ARRAY_SIZE(hdmi_widgets),
+@@ -83,6 +92,7 @@ static struct platform_driver hdmi_codec_driver = {
+ 	.driver		= {
+ 		.name	= DRV_NAME,
+ 		.owner	= THIS_MODULE,
++		.of_match_table = of_match_ptr(hdmi_audio_codec_ids),
+ 	},
  
- MODULE_AUTHOR("Tony Lindgren <tony at atomide.com>");
- MODULE_DESCRIPTION("One-register-per-pin type device tree based pinctrl driver");
+ 	.probe		= hdmi_codec_probe,
 -- 
-1.8.2.1
+1.8.5.2
 
-From e5e7abd2de7d8d4c74b5a1ccc6d47988250bd17d Mon Sep 17 00:00:00 2001
-From: Pantelis Antoniou <panto at antoniou-consulting.com>
-Date: Fri, 28 Jun 2013 18:39:55 +0300
-Subject: [PATCH 1/4] dts: beaglebone: Add I2C definitions for EEPROMs & capes
+From 73fd20e4b35cd01e12c4a0f5fef41b4836307d13 Mon Sep 17 00:00:00 2001
+From: Jyri Sarha <jsarha at ti.com>
+Date: Fri, 20 Dec 2013 12:40:54 +0200
+Subject: [PATCH 5/6] ASoC: davinci: HDMI audio build for AM33XX and TDA998x
 
-Add the I2C definitions for the EEPROM devices on the baseboard
-and on the possibly connected capes.
+Adds configuration option for HDMI audio support for AM33XX based
+boards with NXP TDA998x HDMI transmitter. The audio is connected to
+NXP TDA998x trough McASP running in i2s mode.
 
-Signed-off-by: Pantelis Antoniou <panto at antoniou-consulting.com>
+Signed-off-by: Jyri Sarha <jsarha at ti.com>
 ---
- arch/arm/boot/dts/am335x-bone-common.dtsi | 39 +++++++++++++++++++++++++++++++
- 1 file changed, 39 insertions(+)
+ sound/soc/davinci/Kconfig  | 12 ++++++++++++
+ sound/soc/davinci/Makefile |  1 +
+ 2 files changed, 13 insertions(+)
 
-diff --git a/arch/arm/boot/dts/am335x-bone-common.dtsi b/arch/arm/boot/dts/am335x-bone-common.dtsi
-index e3f27ec..2d12775 100644
---- a/arch/arm/boot/dts/am335x-bone-common.dtsi
-+++ b/arch/arm/boot/dts/am335x-bone-common.dtsi
-@@ -84,6 +84,13 @@
- 		>;
- 	};
+diff --git a/sound/soc/davinci/Kconfig b/sound/soc/davinci/Kconfig
+index 95970f5..b257413 100644
+--- a/sound/soc/davinci/Kconfig
++++ b/sound/soc/davinci/Kconfig
+@@ -27,6 +27,18 @@ config SND_AM33XX_SOC_EVM
+ 	  AM335X-EVMSK, and BeagelBone with AudioCape boards have this
+ 	  setup.
  
-+	i2c2_pins: pinmux_i2c2_pins {
-+		pinctrl-single,pins = <
-+			0x178 0x73 	/* uart1_ctsn.i2c2_sda, SLEWCTRL_SLOW | INPUT_PULLUP | MODE3 */
-+			0x17c 0x73	/* uart1_rtsn.i2c2_scl, SLEWCTRL_SLOW | INPUT_PULLUP | MODE3 */
-+		>;
-+	};
++config SND_AM335X_SOC_NXPTDA_EVM
++	tristate "HDMI Audio for the AM33XX chip based boards with TDA998x"
++	depends on SND_DAVINCI_SOC && SOC_AM33XX
++	depends on DRM_TILCDC && DRM_I2C_NXP_TDA998X
++	select SND_SOC_HDMI_CODEC
++	select SND_DAVINCI_SOC_MCASP
++	help
++	  Say Y or M if you want to add support for HDMI SoC audio on
++	  AM33XX boards with NXP TDA998x HDMI transmitter. For example
++	  BeagleBoneBack. The audio is connected to NXP TDA998x trough
++	  McASP running in i2s mode.
 +
- 	uart0_pins: pinmux_uart0_pins {
- 		pinctrl-single,pins = <
- 			0x170 (PIN_INPUT_PULLUP | MUX_MODE0)	/* uart0_rxd.uart0_rxd */
-@@ -220,6 +227,38 @@
- 		reg = <0x24>;
- 	};
+ config SND_DAVINCI_SOC_EVM
+ 	tristate "SoC Audio support for DaVinci DM6446, DM355 or DM365 EVM"
+ 	depends on SND_DAVINCI_SOC
+diff --git a/sound/soc/davinci/Makefile b/sound/soc/davinci/Makefile
+index bc81e79..b26ec69 100644
+--- a/sound/soc/davinci/Makefile
++++ b/sound/soc/davinci/Makefile
+@@ -17,3 +17,4 @@ obj-$(CONFIG_SND_AM33XX_SOC_EVM) += snd-soc-evm.o
+ obj-$(CONFIG_SND_DM6467_SOC_EVM) += snd-soc-evm.o
+ obj-$(CONFIG_SND_DA830_SOC_EVM) += snd-soc-evm.o
+ obj-$(CONFIG_SND_DA850_SOC_EVM) += snd-soc-evm.o
++obj-$(CONFIG_SND_AM335X_SOC_NXPTDA_EVM) += snd-soc-evm.o
+-- 
+1.8.5.2
+
+From 58fcbb33b2e7f5bffa85ac9e7da96a791c68460b Mon Sep 17 00:00:00 2001
+From: Jyri Sarha <jsarha at ti.com>
+Date: Fri, 20 Dec 2013 12:41:44 +0200
+Subject: [PATCH 6/6] drm/tilcdc: Add I2C HDMI audio config for tda998x
+
+The configuration is needed for HDMI audio. The "swap" and "mirr"
+parameters have to be correctly set in the configuration in order to
+have proper colors in the HDMI picture.
+
+Signed-off-by: Jyri Sarha <jsarha at ti.com>
+cc: airlied at linux.ie
+---
+ drivers/gpu/drm/tilcdc/tilcdc_slave.c | 24 +++++++++++++++++++++++-
+ 1 file changed, 23 insertions(+), 1 deletion(-)
+
+diff --git a/drivers/gpu/drm/tilcdc/tilcdc_slave.c b/drivers/gpu/drm/tilcdc/tilcdc_slave.c
+index 595068b..e43240a 100644
+--- a/drivers/gpu/drm/tilcdc/tilcdc_slave.c
++++ b/drivers/gpu/drm/tilcdc/tilcdc_slave.c
+@@ -19,6 +19,7 @@
+ #include <linux/pinctrl/pinmux.h>
+ #include <linux/pinctrl/consumer.h>
+ #include <drm/drm_encoder_slave.h>
++#include <drm/i2c/tda998x.h>
  
-+	baseboard_eeprom: baseboard_eeprom at 50 {
-+		compatible = "at,24c256";
-+		reg = <0x50>;
-+	};
+ #include "tilcdc_drv.h"
+ 
+@@ -111,8 +112,29 @@ static const struct drm_encoder_helper_funcs slave_encoder_helper_funcs = {
+ 		.restore        = drm_i2c_encoder_restore,
+ };
+ 
++static struct tda998x_encoder_params tda998x_pdata = {
++	.swap_b = 0x3,
++	.mirr_b = 0x0,
++	.swap_a = 0x2,
++	.mirr_a = 0x0,
++	.swap_d = 0x1,
++	.mirr_d = 0x0,
++	.swap_c = 0x0,
++	.mirr_c = 0x0,
++	.swap_f = 0x5,
++	.mirr_f = 0x0,
++	.swap_e = 0x4,
++	.mirr_e = 0x0,
++	.audio_cfg = 0x3,	/* I2S mode */
++	.audio_clk_cfg = 1,	/* select clock pin */
++	.audio_frame[1] = 1,	/* channels - 1 */
++	.audio_format = AFMT_I2S,
++	.audio_sample_rate = 48000,
 +};
 +
-+&i2c2 {
-+	pinctrl-names = "default";
-+	pinctrl-0 = <&i2c2_pins>;
-+
-+	status = "okay";
-+	clock-frequency = <100000>;
-+
-+	cape_eeprom0: cape_eeprom0 at 54 {
-+		compatible = "at,24c256";
-+		reg = <0x54>;
-+	};
-+
-+	cape_eeprom1: cape_eeprom1 at 55 {
-+		compatible = "at,24c256";
-+		reg = <0x55>;
-+	};
-+
-+	cape_eeprom2: cape_eeprom2 at 56 {
-+		compatible = "at,24c256";
-+		reg = <0x56>;
-+	};
-+
-+	cape_eeprom3: cape_eeprom3 at 57 {
-+		compatible = "at,24c256";
-+		reg = <0x57>;
-+	};
+ static const struct i2c_board_info info = {
+-		I2C_BOARD_INFO("tda998x", 0x70)
++		I2C_BOARD_INFO("tda998x", 0x70),
++		.platform_data = &tda998x_pdata,
  };
  
- /include/ "tps65217.dtsi"
+ static struct drm_encoder *slave_encoder_create(struct drm_device *dev,
 -- 
-1.8.4.rc3
+1.8.5.2
+
diff --git a/config-armv7 b/config-armv7
index 5855b05..95cdcd1 100644
--- a/config-armv7
+++ b/config-armv7
@@ -317,6 +317,7 @@ CONFIG_TI_ADC081C=m
 CONFIG_TI_AM335X_ADC=m
 CONFIG_PWM_TIPWMSS=y
 CONFIG_SND_AM33XX_SOC_EVM=m
+CONFIG_SND_AM335X_SOC_NXPTDA_EVM=m
 
 # Allwinner a1x
 CONFIG_PINCTRL_SUNXI=y
diff --git a/config-armv7-generic b/config-armv7-generic
index f1d7bf0..8215e60 100644
--- a/config-armv7-generic
+++ b/config-armv7-generic
@@ -66,7 +66,7 @@ CONFIG_EDAC_HIGHBANK_MC=m
 CONFIG_EDAC_HIGHBANK_L2=m
 CONFIG_SATA_HIGHBANK=m
 CONFIG_ARM_HIGHBANK_CPUFREQ=m
-CONFIG_ARM_HIGHBANK_CPUIDLE=y
+# CONFIG_ARM_HIGHBANK_CPUIDLE is not set
 
 # errata
 # v5/v6
@@ -524,8 +524,11 @@ CONFIG_UBIFS_FS_LZO=y
 CONFIG_UBIFS_FS_ZLIB=y
 # CONFIG_UBIFS_FS_DEBUG is not set
 
-# Sensors
-CONFIG_SENSORS_HTU21=m
+# Chromebook
+CONFIG_MFD_CROS_EC=m
+CONFIG_MFD_CROS_EC_I2C=m
+CONFIG_MFD_CROS_EC_SPI=m
+CONFIG_KEYBOARD_CROS_EC=m
 
 # Should be in generic
 CONFIG_BPF_JIT=y
diff --git a/kernel.spec b/kernel.spec
index bb856d5..3a08bcd 100644
--- a/kernel.spec
+++ b/kernel.spec
@@ -693,8 +693,7 @@ Patch21025: arm-imx6-utilite.patch
 
 # am33xx (BeagleBone)
 # https://github.com/beagleboard/kernel
-# Pulled primarily from the above git repo. First patch is all in arm-soc
-# scheduled for 3.13. The others should be landing via other trees
+# Pulled primarily from the above git repo and should be landing upstream
 Patch21031: arm-am33xx-bblack.patch
 
 #rhbz 754518
@@ -2259,6 +2258,10 @@ fi
 #                 ||----w |
 #                 ||     ||
 %changelog
+* Tue Feb 11 2014 Peter Robinson <pbrobinson at fedoraproject.org>
+- Update am33xx (BeagleBone) patch for 3.13
+- Minor ARM updates
+
 * Mon Feb 10 2014 Justin M. Forbes <jforbes at fedoraproject.org>
 - Linux v3.13.2
 - Fixes (rhbz 1062144)


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