[valgrind] 3.9.0-15.svn20140513r13961
Mark Wielaard
mjw at fedoraproject.org
Fri May 16 14:56:24 UTC 2014
commit dd1933892a4fa112c4c04830fab0538f5260966e
Author: Mark Wielaard <mjw at redhat.com>
Date: Fri May 16 16:56:06 2014 +0200
3.9.0-15.svn20140513r13961
Add SHL_d_d_#imm to valgrind-3.9.0-aarch64-glibc-2.19.90-gcc-4.9.patch
valgrind-3.9.0-aarch64-glibc-2.19.90-gcc-4.9.patch | 66 ++++++++++++++++++++
valgrind.spec | 7 ++-
2 files changed, 71 insertions(+), 2 deletions(-)
---
diff --git a/valgrind-3.9.0-aarch64-glibc-2.19.90-gcc-4.9.patch b/valgrind-3.9.0-aarch64-glibc-2.19.90-gcc-4.9.patch
index 74061cc..8a70a14 100644
--- a/valgrind-3.9.0-aarch64-glibc-2.19.90-gcc-4.9.patch
+++ b/valgrind-3.9.0-aarch64-glibc-2.19.90-gcc-4.9.patch
@@ -75,3 +75,69 @@ index 862eb20..85b2f2d 100644
vex_printf("ARM64 front end: simd_and_fp\n");
return False;
# undef INSN
+commit 5a75f1c5aad7e96a7f785fc05afecec96fab8166
+Author: sewardj <sewardj at 8f6e269a-dfd6-0310-a8e1-e2731360e62c>
+Date: Fri May 16 11:20:07 2014 +0000
+
+ Implement SHL_d_d_#imm.
+
+
+ git-svn-id: svn://svn.valgrind.org/vex/trunk@2863 8f6e269a-dfd6-0310-a8e1-e2731360e62c
+
+diff --git a/VEX/priv/guest_arm64_toIR.c b/VEX/priv/guest_arm64_toIR.c
+index 85b2f2d..25659b8 100644
+--- a/VEX/priv/guest_arm64_toIR.c
++++ b/VEX/priv/guest_arm64_toIR.c
+@@ -7106,7 +7106,7 @@ Bool dis_ARM64_simd_and_fp(/*MB_OUT*/DisResult* dres, UInt insn)
+
+ /* ---------------- CMEQ_d_d_#0 ---------------- */
+ /*
+- 010 11110 11 10000 0100 110 n d
++ 010 11110 11 10000 0100 110 n d CMEQ Dd, Dn, #0
+ */
+ if ((INSN(31,0) & 0xFFFFFC00) == 0x5EE09800) {
+ UInt nn = INSN(9,5);
+@@ -7118,6 +7118,22 @@ Bool dis_ARM64_simd_and_fp(/*MB_OUT*/DisResult* dres, UInt insn)
+ return True;
+ }
+
++ /* ---------------- SHL_d_d_#imm ---------------- */
++ /* 31 22 21 18 15 9 4
++ 010 111110 1 ih3 ib 010101 n d SHL Dd, Dn, #(ih3:ib)
++ */
++ if (INSN(31,22) == BITS10(0,1,0,1,1,1,1,1,0,1)
++ && INSN(15,10) == BITS6(0,1,0,1,0,1)) {
++ UInt nn = INSN(9,5);
++ UInt dd = INSN(4,0);
++ UInt sh = INSN(21,16);
++ vassert(sh < 64);
++ putQReg128(dd, unop(Iop_ZeroHI64ofV128,
++ binop(Iop_ShlN64x2, getQReg128(nn), mkU8(sh))));
++ DIP("shl d%u, d%u, #%u\n", dd, nn, sh);
++ return True;
++ }
++
+ vex_printf("ARM64 front end: simd_and_fp\n");
+ return False;
+ # undef INSN
+diff --git a/VEX/priv/host_arm64_isel.c b/VEX/priv/host_arm64_isel.c
+index eb06cdf..470df6b 100644
+--- a/VEX/priv/host_arm64_isel.c
++++ b/VEX/priv/host_arm64_isel.c
+@@ -5543,10 +5543,14 @@ static HReg iselV128Expr_wrk ( ISelEnv* env, IRExpr* e )
+ default:
+ vassert(0);
+ }
+- if (op != ARM64vecsh_INVALID && amt > 0 && amt <= limit) {
++ if (op != ARM64vecsh_INVALID && amt >= 0 && amt <= limit) {
+ HReg src = iselV128Expr(env, argL);
+ HReg dst = newVRegV(env);
+- addInstr(env, ARM64Instr_VShiftImmV(op, dst, src, amt));
++ if (amt > 0) {
++ addInstr(env, ARM64Instr_VShiftImmV(op, dst, src, amt));
++ } else {
++ dst = src;
++ }
+ return dst;
+ }
+ }
diff --git a/valgrind.spec b/valgrind.spec
index 8ebaea8..402e73a 100644
--- a/valgrind.spec
+++ b/valgrind.spec
@@ -6,7 +6,7 @@
Summary: Tool for finding memory management bugs in programs
Name: %{?scl_prefix}valgrind
Version: 3.9.0
-Release: 14.svn%{?svn_date}r%{?svn_rev}%{?dist}
+Release: 15.svn%{?svn_date}r%{?svn_rev}%{?dist}
Epoch: 1
License: GPLv2+
URL: http://www.valgrind.org/
@@ -331,7 +331,10 @@ echo ===============END TESTING===============
%endif
%changelog
-* Tue May 15 2014 Mark Wielaard <mjw at redhat.com> 3.9.0-14.svn20140513r13961
+* Fri May 16 2014 Mark Wielaard <mjw at redhat.com> 3.9.0-15.svn20140513r13961
+- Add SHL_d_d_#imm to valgrind-3.9.0-aarch64-glibc-2.19.90-gcc-4.9.patch
+
+* Thu May 15 2014 Mark Wielaard <mjw at redhat.com> 3.9.0-14.svn20140513r13961
- Add valgrind-3.9.0-aarch64-glibc-2.19.90-gcc-4.9.patch
* Tue May 13 2014 Mark Wielaard <mjw at redhat.com> 3.9.0-13.svn20140513r13961
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