[wine-mono] Update bundled valgrind headers (#1141584)
mooninite
mooninite at fedoraproject.org
Fri Feb 6 02:43:02 UTC 2015
commit 0a706866ef732d21c35634d7468bc9a4429eadd0
Author: Michael Cronenworth <mike at cchtml.com>
Date: Thu Feb 5 20:42:43 2015 -0600
Update bundled valgrind headers (#1141584)
wine-mono-valgrind.patch | 3505 ++++++++++++++++++++++++++++++++++++++++++++++
wine-mono.spec | 8 +-
2 files changed, 3512 insertions(+), 1 deletions(-)
---
diff --git a/wine-mono-valgrind.patch b/wine-mono-valgrind.patch
new file mode 100644
index 0000000..4c4ac90
--- /dev/null
+++ b/wine-mono-valgrind.patch
@@ -0,0 +1,3505 @@
+From 1445d4821c8091c395264542344dca9df22a2c82 Mon Sep 17 00:00:00 2001
+From: Zoltan Varga <vargaz at gmail.com>
+Date: Thu, 5 Feb 2015 20:53:21 -0500
+Subject: [PATCH] [runtime] Update valgrind headers to the ones from valgrind
+ 3.10.1. Fixes #26688.
+
+---
+ mono/utils/memcheck.h | 17 +-
+ mono/utils/valgrind.h | 2864 +++++++++++++++++++++++++++++++++++++++----------
+ 2 files changed, 2288 insertions(+), 593 deletions(-)
+
+diff --git a/mono/utils/memcheck.h b/mono/utils/memcheck.h
+index fcc7644..2740578 100644
+--- a/mono/utils/memcheck.h
++++ b/mono/utils/memcheck.h
+@@ -13,7 +13,7 @@
+ This file is part of MemCheck, a heavyweight Valgrind tool for
+ detecting memory errors.
+
+- Copyright (C) 2000-2012 Julian Seward. All rights reserved.
++ Copyright (C) 2000-2013 Julian Seward. All rights reserved.
+
+ Redistribution and use in source and binary forms, with or without
+ modification, are permitted provided that the following conditions
+@@ -96,6 +96,9 @@ typedef
+ /* Not next to VG_USERREQ__COUNT_LEAKS because it was added later. */
+ VG_USERREQ__COUNT_LEAK_BLOCKS,
+
++ VG_USERREQ__ENABLE_ADDR_ERROR_REPORTING_IN_RANGE,
++ VG_USERREQ__DISABLE_ADDR_ERROR_REPORTING_IN_RANGE,
++
+ /* This is just for memcheck's internal use - don't use it */
+ _VG_USERREQ__MEMCHECK_RECORD_OVERLAP_ERROR
+ = VG_USERREQ_TOOL_BASE('M','C') + 256
+@@ -283,5 +286,17 @@ typedef
+ (const char*)(zzvbits), \
+ (zznbytes), 0, 0 )
+
++/* Disable and re-enable reporting of addressing errors in the
++ specified address range. */
++#define VALGRIND_DISABLE_ADDR_ERROR_REPORTING_IN_RANGE(_qzz_addr,_qzz_len) \
++ VALGRIND_DO_CLIENT_REQUEST_EXPR(0 /* default return */, \
++ VG_USERREQ__DISABLE_ADDR_ERROR_REPORTING_IN_RANGE, \
++ (_qzz_addr), (_qzz_len), 0, 0, 0)
++
++#define VALGRIND_ENABLE_ADDR_ERROR_REPORTING_IN_RANGE(_qzz_addr,_qzz_len) \
++ VALGRIND_DO_CLIENT_REQUEST_EXPR(0 /* default return */, \
++ VG_USERREQ__ENABLE_ADDR_ERROR_REPORTING_IN_RANGE, \
++ (_qzz_addr), (_qzz_len), 0, 0, 0)
++
+ #endif
+
+diff --git a/mono/utils/valgrind.h b/mono/utils/valgrind.h
+index 315da5b..6954d75 100644
+--- a/mono/utils/valgrind.h
++++ b/mono/utils/valgrind.h
+@@ -12,7 +12,7 @@
+ This file is part of Valgrind, a dynamic binary instrumentation
+ framework.
+
+- Copyright (C) 2000-2012 Julian Seward. All rights reserved.
++ Copyright (C) 2000-2013 Julian Seward. All rights reserved.
+
+ Redistribution and use in source and binary forms, with or without
+ modification, are permitted provided that the following conditions
+@@ -89,7 +89,7 @@
+ || (__VALGRIND_MAJOR__ == 3 && __VALGRIND_MINOR__ >= 6))
+ */
+ #define __VALGRIND_MAJOR__ 3
+-#define __VALGRIND_MINOR__ 8
++#define __VALGRIND_MINOR__ 10
+
+
+ #include <stdarg.h>
+@@ -111,35 +111,51 @@
+ #undef PLAT_x86_darwin
+ #undef PLAT_amd64_darwin
+ #undef PLAT_x86_win32
++#undef PLAT_amd64_win64
+ #undef PLAT_x86_linux
+ #undef PLAT_amd64_linux
+ #undef PLAT_ppc32_linux
+-#undef PLAT_ppc64_linux
++#undef PLAT_ppc64be_linux
++#undef PLAT_ppc64le_linux
+ #undef PLAT_arm_linux
++#undef PLAT_arm64_linux
+ #undef PLAT_s390x_linux
+ #undef PLAT_mips32_linux
++#undef PLAT_mips64_linux
+
+
+ #if defined(__APPLE__) && defined(__i386__)
+ # define PLAT_x86_darwin 1
+ #elif defined(__APPLE__) && defined(__x86_64__)
+ # define PLAT_amd64_darwin 1
+-#elif defined(__MINGW32__) || defined(__CYGWIN32__) \
++#elif (defined(__MINGW32__) && !defined(__MINGW64__)) \
++ || defined(__CYGWIN32__) \
+ || (defined(_WIN32) && defined(_M_IX86))
+ # define PLAT_x86_win32 1
++#elif defined(__MINGW64__) \
++ || (defined(_WIN64) && defined(_M_X64))
++# define PLAT_amd64_win64 1
+ #elif defined(__linux__) && defined(__i386__)
+ # define PLAT_x86_linux 1
+ #elif defined(__linux__) && defined(__x86_64__)
+ # define PLAT_amd64_linux 1
+ #elif defined(__linux__) && defined(__powerpc__) && !defined(__powerpc64__)
+ # define PLAT_ppc32_linux 1
+-#elif defined(__linux__) && defined(__powerpc__) && defined(__powerpc64__)
+-# define PLAT_ppc64_linux 1
+-#elif defined(__linux__) && defined(__arm__)
++#elif defined(__linux__) && defined(__powerpc__) && defined(__powerpc64__) && _CALL_ELF != 2
++/* Big Endian uses ELF version 1 */
++# define PLAT_ppc64be_linux 1
++#elif defined(__linux__) && defined(__powerpc__) && defined(__powerpc64__) && _CALL_ELF == 2
++/* Little Endian uses ELF version 2 */
++# define PLAT_ppc64le_linux 1
++#elif defined(__linux__) && defined(__arm__) && !defined(__aarch64__)
+ # define PLAT_arm_linux 1
++#elif defined(__linux__) && defined(__aarch64__) && !defined(__arm__)
++# define PLAT_arm64_linux 1
+ #elif defined(__linux__) && defined(__s390__) && defined(__s390x__)
+ # define PLAT_s390x_linux 1
+-#elif defined(__linux__) && defined(__mips__)
++#elif defined(__linux__) && defined(__mips__) && (__mips==64)
++# define PLAT_mips64_linux 1
++#elif defined(__linux__) && defined(__mips__) && (__mips!=64)
+ # define PLAT_mips32_linux 1
+ #else
+ /* If we're not compiling for our target platform, don't generate
+@@ -368,7 +384,8 @@ valgrind_do_client_request_expr(uintptr_t _zzq_default, uintptr_t _zzq_request,
+
+ /* ------------------------ amd64-{linux,darwin} --------------- */
+
+-#if defined(PLAT_amd64_linux) || defined(PLAT_amd64_darwin)
++#if defined(PLAT_amd64_linux) || defined(PLAT_amd64_darwin) \
++ || (defined(PLAT_amd64_win64) && defined(__GNUC__))
+
+ typedef
+ struct {
+@@ -430,6 +447,14 @@ typedef
+
+ #endif /* PLAT_amd64_linux || PLAT_amd64_darwin */
+
++/* ------------------------- amd64-Win64 ------------------------- */
++
++#if defined(PLAT_amd64_win64) && !defined(__GNUC__)
++
++#error Unsupported compiler.
++
++#endif /* PLAT_amd64_win64 */
++
+ /* ------------------------ ppc32-linux ------------------------ */
+
+ #if defined(PLAT_ppc32_linux)
+@@ -441,8 +466,8 @@ typedef
+ OrigFn;
+
+ #define __SPECIAL_INSTRUCTION_PREAMBLE \
+- "rlwinm 0,0,3,0,0 ; rlwinm 0,0,13,0,0\n\t" \
+- "rlwinm 0,0,29,0,0 ; rlwinm 0,0,19,0,0\n\t"
++ "rlwinm 0,0,3,0,31 ; rlwinm 0,0,13,0,31\n\t" \
++ "rlwinm 0,0,29,0,31 ; rlwinm 0,0,19,0,31\n\t"
+
+ #define VALGRIND_DO_CLIENT_REQUEST_EXPR( \
+ _zzq_default, _zzq_request, \
+@@ -501,7 +526,7 @@ typedef
+
+ /* ------------------------ ppc64-linux ------------------------ */
+
+-#if defined(PLAT_ppc64_linux)
++#if defined(PLAT_ppc64be_linux)
+
+ typedef
+ struct {
+@@ -576,7 +601,84 @@ typedef
+ ); \
+ } while (0)
+
+-#endif /* PLAT_ppc64_linux */
++#endif /* PLAT_ppc64be_linux */
++
++#if defined(PLAT_ppc64le_linux)
++
++typedef
++ struct {
++ unsigned long long int nraddr; /* where's the code? */
++ unsigned long long int r2; /* what tocptr do we need? */
++ }
++ OrigFn;
++
++#define __SPECIAL_INSTRUCTION_PREAMBLE \
++ "rotldi 0,0,3 ; rotldi 0,0,13\n\t" \
++ "rotldi 0,0,61 ; rotldi 0,0,51\n\t"
++
++#define VALGRIND_DO_CLIENT_REQUEST_EXPR( \
++ _zzq_default, _zzq_request, \
++ _zzq_arg1, _zzq_arg2, _zzq_arg3, _zzq_arg4, _zzq_arg5) \
++ \
++ __extension__ \
++ ({ unsigned long long int _zzq_args[6]; \
++ unsigned long long int _zzq_result; \
++ unsigned long long int* _zzq_ptr; \
++ _zzq_args[0] = (unsigned long long int)(_zzq_request); \
++ _zzq_args[1] = (unsigned long long int)(_zzq_arg1); \
++ _zzq_args[2] = (unsigned long long int)(_zzq_arg2); \
++ _zzq_args[3] = (unsigned long long int)(_zzq_arg3); \
++ _zzq_args[4] = (unsigned long long int)(_zzq_arg4); \
++ _zzq_args[5] = (unsigned long long int)(_zzq_arg5); \
++ _zzq_ptr = _zzq_args; \
++ __asm__ volatile("mr 3,%1\n\t" /*default*/ \
++ "mr 4,%2\n\t" /*ptr*/ \
++ __SPECIAL_INSTRUCTION_PREAMBLE \
++ /* %R3 = client_request ( %R4 ) */ \
++ "or 1,1,1\n\t" \
++ "mr %0,3" /*result*/ \
++ : "=b" (_zzq_result) \
++ : "b" (_zzq_default), "b" (_zzq_ptr) \
++ : "cc", "memory", "r3", "r4"); \
++ _zzq_result; \
++ })
++
++#define VALGRIND_GET_NR_CONTEXT(_zzq_rlval) \
++ { volatile OrigFn* _zzq_orig = &(_zzq_rlval); \
++ unsigned long long int __addr; \
++ __asm__ volatile(__SPECIAL_INSTRUCTION_PREAMBLE \
++ /* %R3 = guest_NRADDR */ \
++ "or 2,2,2\n\t" \
++ "mr %0,3" \
++ : "=b" (__addr) \
++ : \
++ : "cc", "memory", "r3" \
++ ); \
++ _zzq_orig->nraddr = __addr; \
++ __asm__ volatile(__SPECIAL_INSTRUCTION_PREAMBLE \
++ /* %R3 = guest_NRADDR_GPR2 */ \
++ "or 4,4,4\n\t" \
++ "mr %0,3" \
++ : "=b" (__addr) \
++ : \
++ : "cc", "memory", "r3" \
++ ); \
++ _zzq_orig->r2 = __addr; \
++ }
++
++#define VALGRIND_BRANCH_AND_LINK_TO_NOREDIR_R12 \
++ __SPECIAL_INSTRUCTION_PREAMBLE \
++ /* branch-and-link-to-noredir *%R12 */ \
++ "or 3,3,3\n\t"
++
++#define VALGRIND_VEX_INJECT_IR() \
++ do { \
++ __asm__ volatile(__SPECIAL_INSTRUCTION_PREAMBLE \
++ "or 5,5,5\n\t" \
++ ); \
++ } while (0)
++
++#endif /* PLAT_ppc64le_linux */
+
+ /* ------------------------- arm-linux ------------------------- */
+
+@@ -646,6 +748,74 @@ typedef
+
+ #endif /* PLAT_arm_linux */
+
++/* ------------------------ arm64-linux ------------------------- */
++
++#if defined(PLAT_arm64_linux)
++
++typedef
++ struct {
++ unsigned long long int nraddr; /* where's the code? */
++ }
++ OrigFn;
++
++#define __SPECIAL_INSTRUCTION_PREAMBLE \
++ "ror x12, x12, #3 ; ror x12, x12, #13 \n\t" \
++ "ror x12, x12, #51 ; ror x12, x12, #61 \n\t"
++
++#define VALGRIND_DO_CLIENT_REQUEST_EXPR( \
++ _zzq_default, _zzq_request, \
++ _zzq_arg1, _zzq_arg2, _zzq_arg3, _zzq_arg4, _zzq_arg5) \
++ \
++ __extension__ \
++ ({volatile unsigned long long int _zzq_args[6]; \
++ volatile unsigned long long int _zzq_result; \
++ _zzq_args[0] = (unsigned long long int)(_zzq_request); \
++ _zzq_args[1] = (unsigned long long int)(_zzq_arg1); \
++ _zzq_args[2] = (unsigned long long int)(_zzq_arg2); \
++ _zzq_args[3] = (unsigned long long int)(_zzq_arg3); \
++ _zzq_args[4] = (unsigned long long int)(_zzq_arg4); \
++ _zzq_args[5] = (unsigned long long int)(_zzq_arg5); \
++ __asm__ volatile("mov x3, %1\n\t" /*default*/ \
++ "mov x4, %2\n\t" /*ptr*/ \
++ __SPECIAL_INSTRUCTION_PREAMBLE \
++ /* X3 = client_request ( X4 ) */ \
++ "orr x10, x10, x10\n\t" \
++ "mov %0, x3" /*result*/ \
++ : "=r" (_zzq_result) \
++ : "r" (_zzq_default), "r" (&_zzq_args[0]) \
++ : "cc","memory", "x3", "x4"); \
++ _zzq_result; \
++ })
++
++#define VALGRIND_GET_NR_CONTEXT(_zzq_rlval) \
++ { volatile OrigFn* _zzq_orig = &(_zzq_rlval); \
++ unsigned long long int __addr; \
++ __asm__ volatile(__SPECIAL_INSTRUCTION_PREAMBLE \
++ /* X3 = guest_NRADDR */ \
++ "orr x11, x11, x11\n\t" \
++ "mov %0, x3" \
++ : "=r" (__addr) \
++ : \
++ : "cc", "memory", "x3" \
++ ); \
++ _zzq_orig->nraddr = __addr; \
++ }
++
++#define VALGRIND_BRANCH_AND_LINK_TO_NOREDIR_X8 \
++ __SPECIAL_INSTRUCTION_PREAMBLE \
++ /* branch-and-link-to-noredir X8 */ \
++ "orr x12, x12, x12\n\t"
++
++#define VALGRIND_VEX_INJECT_IR() \
++ do { \
++ __asm__ volatile(__SPECIAL_INSTRUCTION_PREAMBLE \
++ "orr x9, x9, x9\n\t" \
++ : : : "cc", "memory" \
++ ); \
++ } while (0)
++
++#endif /* PLAT_arm64_linux */
++
+ /* ------------------------ s390x-linux ------------------------ */
+
+ #if defined(PLAT_s390x_linux)
+@@ -763,7 +933,7 @@ typedef
+ "move %0, $11\n\t" /*result*/ \
+ : "=r" (_zzq_result) \
+ : "r" (_zzq_default), "r" (&_zzq_args[0]) \
+- : "cc","memory", "t3", "t4"); \
++ : "$11", "$12"); \
+ _zzq_result; \
+ })
+
+@@ -776,7 +946,7 @@ typedef
+ "move %0, $11" /*result*/ \
+ : "=r" (__addr) \
+ : \
+- : "cc", "memory" , "t3" \
++ : "$11" \
+ ); \
+ _zzq_orig->nraddr = __addr; \
+ }
+@@ -796,6 +966,75 @@ typedef
+
+ #endif /* PLAT_mips32_linux */
+
++/* ------------------------- mips64-linux ---------------- */
++
++#if defined(PLAT_mips64_linux)
++
++typedef
++ struct {
++ unsigned long long nraddr; /* where's the code? */
++ }
++ OrigFn;
++
++/* dsll $0,$0, 3
++ * dsll $0,$0, 13
++ * dsll $0,$0, 29
++ * dsll $0,$0, 19*/
++#define __SPECIAL_INSTRUCTION_PREAMBLE \
++ "dsll $0,$0, 3 ; dsll $0,$0,13\n\t" \
++ "dsll $0,$0,29 ; dsll $0,$0,19\n\t"
++
++#define VALGRIND_DO_CLIENT_REQUEST_EXPR( \
++ _zzq_default, _zzq_request, \
++ _zzq_arg1, _zzq_arg2, _zzq_arg3, _zzq_arg4, _zzq_arg5) \
++ __extension__ \
++ ({ volatile unsigned long long int _zzq_args[6]; \
++ volatile unsigned long long int _zzq_result; \
++ _zzq_args[0] = (unsigned long long int)(_zzq_request); \
++ _zzq_args[1] = (unsigned long long int)(_zzq_arg1); \
++ _zzq_args[2] = (unsigned long long int)(_zzq_arg2); \
++ _zzq_args[3] = (unsigned long long int)(_zzq_arg3); \
++ _zzq_args[4] = (unsigned long long int)(_zzq_arg4); \
++ _zzq_args[5] = (unsigned long long int)(_zzq_arg5); \
++ __asm__ volatile("move $11, %1\n\t" /*default*/ \
++ "move $12, %2\n\t" /*ptr*/ \
++ __SPECIAL_INSTRUCTION_PREAMBLE \
++ /* $11 = client_request ( $12 ) */ \
++ "or $13, $13, $13\n\t" \
++ "move %0, $11\n\t" /*result*/ \
++ : "=r" (_zzq_result) \
++ : "r" (_zzq_default), "r" (&_zzq_args[0]) \
++ : "$11", "$12"); \
++ _zzq_result; \
++ })
++
++#define VALGRIND_GET_NR_CONTEXT(_zzq_rlval) \
++ { volatile OrigFn* _zzq_orig = &(_zzq_rlval); \
++ volatile unsigned long long int __addr; \
++ __asm__ volatile(__SPECIAL_INSTRUCTION_PREAMBLE \
++ /* $11 = guest_NRADDR */ \
++ "or $14, $14, $14\n\t" \
++ "move %0, $11" /*result*/ \
++ : "=r" (__addr) \
++ : \
++ : "$11"); \
++ _zzq_orig->nraddr = __addr; \
++ }
++
++#define VALGRIND_CALL_NOREDIR_T9 \
++ __SPECIAL_INSTRUCTION_PREAMBLE \
++ /* call-noredir $25 */ \
++ "or $15, $15, $15\n\t"
++
++#define VALGRIND_VEX_INJECT_IR() \
++ do { \
++ __asm__ volatile(__SPECIAL_INSTRUCTION_PREAMBLE \
++ "or $11, $11, $11\n\t" \
++ ); \
++ } while (0)
++
++#endif /* PLAT_mips64_linux */
++
+ /* Insert assembly code for other platforms here... */
+
+ #endif /* NVALGRIND */
+@@ -2379,7 +2618,7 @@ typedef
+
+ /* ------------------------ ppc64-linux ------------------------ */
+
+-#if defined(PLAT_ppc64_linux)
++#if defined(PLAT_ppc64be_linux)
+
+ /* ARGREGS: r3 r4 r5 r6 r7 r8 r9 r10 (the rest on stack somewhere) */
+
+@@ -2932,54 +3171,56 @@ typedef
+ lval = (__typeof__(lval)) _res; \
+ } while (0)
+
+-#endif /* PLAT_ppc64_linux */
++#endif /* PLAT_ppc64be_linux */
+
+-/* ------------------------- arm-linux ------------------------- */
++/* ------------------------- ppc64le-linux ----------------------- */
++#if defined(PLAT_ppc64le_linux)
+
+-#if defined(PLAT_arm_linux)
++/* ARGREGS: r3 r4 r5 r6 r7 r8 r9 r10 (the rest on stack somewhere) */
+
+ /* These regs are trashed by the hidden call. */
+-#define __CALLER_SAVED_REGS "r0", "r1", "r2", "r3","r4","r14"
++#define __CALLER_SAVED_REGS \
++ "lr", "ctr", "xer", \
++ "cr0", "cr1", "cr2", "cr3", "cr4", "cr5", "cr6", "cr7", \
++ "r0", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", \
++ "r11", "r12", "r13"
+
+ /* Macros to save and align the stack before making a function
+ call and restore it afterwards as gcc may not keep the stack
+ pointer aligned if it doesn't realise calls are being made
+ to other functions. */
+
+-/* This is a bit tricky. We store the original stack pointer in r10
+- as it is callee-saves. gcc doesn't allow the use of r11 for some
+- reason. Also, we can't directly "bic" the stack pointer in thumb
+- mode since r13 isn't an allowed register number in that context.
+- So use r4 as a temporary, since that is about to get trashed
+- anyway, just after each use of this macro. Side effect is we need
+- to be very careful about any future changes, since
+- VALGRIND_ALIGN_STACK simply assumes r4 is usable. */
+ #define VALGRIND_ALIGN_STACK \
+- "mov r10, sp\n\t" \
+- "mov r4, sp\n\t" \
+- "bic r4, r4, #7\n\t" \
+- "mov sp, r4\n\t"
++ "mr 28,1\n\t" \
++ "rldicr 1,1,0,59\n\t"
+ #define VALGRIND_RESTORE_STACK \
+- "mov sp, r10\n\t"
++ "mr 1,28\n\t"
+
+-/* These CALL_FN_ macros assume that on arm-linux, sizeof(unsigned
+- long) == 4. */
++/* These CALL_FN_ macros assume that on ppc64-linux, sizeof(unsigned
++ long) == 8. */
+
+ #define CALL_FN_W_v(lval, orig) \
+ do { \
+ volatile OrigFn _orig = (orig); \
+- volatile unsigned long _argvec[1]; \
++ volatile unsigned long _argvec[3+0]; \
+ volatile unsigned long _res; \
+- _argvec[0] = (unsigned long)_orig.nraddr; \
++ /* _argvec[0] holds current r2 across the call */ \
++ _argvec[1] = (unsigned long)_orig.r2; \
++ _argvec[2] = (unsigned long)_orig.nraddr; \
+ __asm__ volatile( \
+ VALGRIND_ALIGN_STACK \
+- "ldr r4, [%1] \n\t" /* target->r4 */ \
+- VALGRIND_BRANCH_AND_LINK_TO_NOREDIR_R4 \
++ "mr 12,%1\n\t" \
++ "std 2,-16(12)\n\t" /* save tocptr */ \
++ "ld 2,-8(12)\n\t" /* use nraddr's tocptr */ \
++ "ld 12, 0(12)\n\t" /* target->r12 */ \
++ VALGRIND_BRANCH_AND_LINK_TO_NOREDIR_R12 \
++ "mr 12,%1\n\t" \
++ "mr %0,3\n\t" \
++ "ld 2,-16(12)\n\t" /* restore tocptr */ \
+ VALGRIND_RESTORE_STACK \
+- "mov %0, r0\n" \
+ : /*out*/ "=r" (_res) \
+- : /*in*/ "0" (&_argvec[0]) \
+- : /*trash*/ "cc", "memory", __CALLER_SAVED_REGS, "r10" \
++ : /*in*/ "r" (&_argvec[2]) \
++ : /*trash*/ "cc", "memory", __CALLER_SAVED_REGS, "r28" \
+ ); \
+ lval = (__typeof__(lval)) _res; \
+ } while (0)
+@@ -2987,20 +3228,27 @@ typedef
+ #define CALL_FN_W_W(lval, orig, arg1) \
+ do { \
+ volatile OrigFn _orig = (orig); \
+- volatile unsigned long _argvec[2]; \
++ volatile unsigned long _argvec[3+1]; \
+ volatile unsigned long _res; \
+- _argvec[0] = (unsigned long)_orig.nraddr; \
+- _argvec[1] = (unsigned long)(arg1); \
++ /* _argvec[0] holds current r2 across the call */ \
++ _argvec[1] = (unsigned long)_orig.r2; \
++ _argvec[2] = (unsigned long)_orig.nraddr; \
++ _argvec[2+1] = (unsigned long)arg1; \
+ __asm__ volatile( \
+ VALGRIND_ALIGN_STACK \
+- "ldr r0, [%1, #4] \n\t" \
+- "ldr r4, [%1] \n\t" /* target->r4 */ \
+- VALGRIND_BRANCH_AND_LINK_TO_NOREDIR_R4 \
++ "mr 12,%1\n\t" \
++ "std 2,-16(12)\n\t" /* save tocptr */ \
++ "ld 2,-8(12)\n\t" /* use nraddr's tocptr */ \
++ "ld 3, 8(12)\n\t" /* arg1->r3 */ \
++ "ld 12, 0(12)\n\t" /* target->r12 */ \
++ VALGRIND_BRANCH_AND_LINK_TO_NOREDIR_R12 \
++ "mr 12,%1\n\t" \
++ "mr %0,3\n\t" \
++ "ld 2,-16(12)\n\t" /* restore tocptr */ \
+ VALGRIND_RESTORE_STACK \
+- "mov %0, r0\n" \
+ : /*out*/ "=r" (_res) \
+- : /*in*/ "0" (&_argvec[0]) \
+- : /*trash*/ "cc", "memory", __CALLER_SAVED_REGS, "r10" \
++ : /*in*/ "r" (&_argvec[2]) \
++ : /*trash*/ "cc", "memory", __CALLER_SAVED_REGS, "r28" \
+ ); \
+ lval = (__typeof__(lval)) _res; \
+ } while (0)
+@@ -3008,22 +3256,29 @@ typedef
+ #define CALL_FN_W_WW(lval, orig, arg1,arg2) \
+ do { \
+ volatile OrigFn _orig = (orig); \
+- volatile unsigned long _argvec[3]; \
++ volatile unsigned long _argvec[3+2]; \
+ volatile unsigned long _res; \
+- _argvec[0] = (unsigned long)_orig.nraddr; \
+- _argvec[1] = (unsigned long)(arg1); \
+- _argvec[2] = (unsigned long)(arg2); \
++ /* _argvec[0] holds current r2 across the call */ \
++ _argvec[1] = (unsigned long)_orig.r2; \
++ _argvec[2] = (unsigned long)_orig.nraddr; \
++ _argvec[2+1] = (unsigned long)arg1; \
++ _argvec[2+2] = (unsigned long)arg2; \
+ __asm__ volatile( \
+ VALGRIND_ALIGN_STACK \
+- "ldr r0, [%1, #4] \n\t" \
+- "ldr r1, [%1, #8] \n\t" \
+- "ldr r4, [%1] \n\t" /* target->r4 */ \
+- VALGRIND_BRANCH_AND_LINK_TO_NOREDIR_R4 \
++ "mr 12,%1\n\t" \
++ "std 2,-16(12)\n\t" /* save tocptr */ \
++ "ld 2,-8(12)\n\t" /* use nraddr's tocptr */ \
++ "ld 3, 8(12)\n\t" /* arg1->r3 */ \
++ "ld 4, 16(12)\n\t" /* arg2->r4 */ \
++ "ld 12, 0(12)\n\t" /* target->r12 */ \
++ VALGRIND_BRANCH_AND_LINK_TO_NOREDIR_R12 \
++ "mr 12,%1\n\t" \
++ "mr %0,3\n\t" \
++ "ld 2,-16(12)\n\t" /* restore tocptr */ \
+ VALGRIND_RESTORE_STACK \
+- "mov %0, r0\n" \
+ : /*out*/ "=r" (_res) \
+- : /*in*/ "0" (&_argvec[0]) \
+- : /*trash*/ "cc", "memory", __CALLER_SAVED_REGS, "r10" \
++ : /*in*/ "r" (&_argvec[2]) \
++ : /*trash*/ "cc", "memory", __CALLER_SAVED_REGS, "r28" \
+ ); \
+ lval = (__typeof__(lval)) _res; \
+ } while (0)
+@@ -3031,24 +3286,31 @@ typedef
+ #define CALL_FN_W_WWW(lval, orig, arg1,arg2,arg3) \
+ do { \
+ volatile OrigFn _orig = (orig); \
+- volatile unsigned long _argvec[4]; \
++ volatile unsigned long _argvec[3+3]; \
+ volatile unsigned long _res; \
+- _argvec[0] = (unsigned long)_orig.nraddr; \
+- _argvec[1] = (unsigned long)(arg1); \
+- _argvec[2] = (unsigned long)(arg2); \
+- _argvec[3] = (unsigned long)(arg3); \
++ /* _argvec[0] holds current r2 across the call */ \
++ _argvec[1] = (unsigned long)_orig.r2; \
++ _argvec[2] = (unsigned long)_orig.nraddr; \
++ _argvec[2+1] = (unsigned long)arg1; \
++ _argvec[2+2] = (unsigned long)arg2; \
++ _argvec[2+3] = (unsigned long)arg3; \
+ __asm__ volatile( \
+ VALGRIND_ALIGN_STACK \
+- "ldr r0, [%1, #4] \n\t" \
+- "ldr r1, [%1, #8] \n\t" \
+- "ldr r2, [%1, #12] \n\t" \
+- "ldr r4, [%1] \n\t" /* target->r4 */ \
+- VALGRIND_BRANCH_AND_LINK_TO_NOREDIR_R4 \
++ "mr 12,%1\n\t" \
++ "std 2,-16(12)\n\t" /* save tocptr */ \
++ "ld 2,-8(12)\n\t" /* use nraddr's tocptr */ \
++ "ld 3, 8(12)\n\t" /* arg1->r3 */ \
++ "ld 4, 16(12)\n\t" /* arg2->r4 */ \
++ "ld 5, 24(12)\n\t" /* arg3->r5 */ \
++ "ld 12, 0(12)\n\t" /* target->r12 */ \
++ VALGRIND_BRANCH_AND_LINK_TO_NOREDIR_R12 \
++ "mr 12,%1\n\t" \
++ "mr %0,3\n\t" \
++ "ld 2,-16(12)\n\t" /* restore tocptr */ \
+ VALGRIND_RESTORE_STACK \
+- "mov %0, r0\n" \
+ : /*out*/ "=r" (_res) \
+- : /*in*/ "0" (&_argvec[0]) \
+- : /*trash*/ "cc", "memory", __CALLER_SAVED_REGS, "r10" \
++ : /*in*/ "r" (&_argvec[2]) \
++ : /*trash*/ "cc", "memory", __CALLER_SAVED_REGS, "r28" \
+ ); \
+ lval = (__typeof__(lval)) _res; \
+ } while (0)
+@@ -3056,15 +3318,647 @@ typedef
+ #define CALL_FN_W_WWWW(lval, orig, arg1,arg2,arg3,arg4) \
+ do { \
+ volatile OrigFn _orig = (orig); \
+- volatile unsigned long _argvec[5]; \
++ volatile unsigned long _argvec[3+4]; \
+ volatile unsigned long _res; \
+- _argvec[0] = (unsigned long)_orig.nraddr; \
+- _argvec[1] = (unsigned long)(arg1); \
+- _argvec[2] = (unsigned long)(arg2); \
+- _argvec[3] = (unsigned long)(arg3); \
+- _argvec[4] = (unsigned long)(arg4); \
++ /* _argvec[0] holds current r2 across the call */ \
++ _argvec[1] = (unsigned long)_orig.r2; \
++ _argvec[2] = (unsigned long)_orig.nraddr; \
++ _argvec[2+1] = (unsigned long)arg1; \
++ _argvec[2+2] = (unsigned long)arg2; \
++ _argvec[2+3] = (unsigned long)arg3; \
++ _argvec[2+4] = (unsigned long)arg4; \
+ __asm__ volatile( \
+ VALGRIND_ALIGN_STACK \
++ "mr 12,%1\n\t" \
++ "std 2,-16(12)\n\t" /* save tocptr */ \
++ "ld 2,-8(12)\n\t" /* use nraddr's tocptr */ \
++ "ld 3, 8(12)\n\t" /* arg1->r3 */ \
++ "ld 4, 16(12)\n\t" /* arg2->r4 */ \
++ "ld 5, 24(12)\n\t" /* arg3->r5 */ \
++ "ld 6, 32(12)\n\t" /* arg4->r6 */ \
++ "ld 12, 0(12)\n\t" /* target->r12 */ \
++ VALGRIND_BRANCH_AND_LINK_TO_NOREDIR_R12 \
++ "mr 12,%1\n\t" \
++ "mr %0,3\n\t" \
++ "ld 2,-16(12)\n\t" /* restore tocptr */ \
++ VALGRIND_RESTORE_STACK \
++ : /*out*/ "=r" (_res) \
++ : /*in*/ "r" (&_argvec[2]) \
++ : /*trash*/ "cc", "memory", __CALLER_SAVED_REGS, "r28" \
++ ); \
++ lval = (__typeof__(lval)) _res; \
++ } while (0)
++
++#define CALL_FN_W_5W(lval, orig, arg1,arg2,arg3,arg4,arg5) \
++ do { \
++ volatile OrigFn _orig = (orig); \
++ volatile unsigned long _argvec[3+5]; \
++ volatile unsigned long _res; \
++ /* _argvec[0] holds current r2 across the call */ \
++ _argvec[1] = (unsigned long)_orig.r2; \
++ _argvec[2] = (unsigned long)_orig.nraddr; \
++ _argvec[2+1] = (unsigned long)arg1; \
++ _argvec[2+2] = (unsigned long)arg2; \
++ _argvec[2+3] = (unsigned long)arg3; \
++ _argvec[2+4] = (unsigned long)arg4; \
++ _argvec[2+5] = (unsigned long)arg5; \
++ __asm__ volatile( \
++ VALGRIND_ALIGN_STACK \
++ "mr 12,%1\n\t" \
++ "std 2,-16(12)\n\t" /* save tocptr */ \
++ "ld 2,-8(12)\n\t" /* use nraddr's tocptr */ \
++ "ld 3, 8(12)\n\t" /* arg1->r3 */ \
++ "ld 4, 16(12)\n\t" /* arg2->r4 */ \
++ "ld 5, 24(12)\n\t" /* arg3->r5 */ \
++ "ld 6, 32(12)\n\t" /* arg4->r6 */ \
++ "ld 7, 40(12)\n\t" /* arg5->r7 */ \
++ "ld 12, 0(12)\n\t" /* target->r12 */ \
++ VALGRIND_BRANCH_AND_LINK_TO_NOREDIR_R12 \
++ "mr 12,%1\n\t" \
++ "mr %0,3\n\t" \
++ "ld 2,-16(12)\n\t" /* restore tocptr */ \
++ VALGRIND_RESTORE_STACK \
++ : /*out*/ "=r" (_res) \
++ : /*in*/ "r" (&_argvec[2]) \
++ : /*trash*/ "cc", "memory", __CALLER_SAVED_REGS, "r28" \
++ ); \
++ lval = (__typeof__(lval)) _res; \
++ } while (0)
++
++#define CALL_FN_W_6W(lval, orig, arg1,arg2,arg3,arg4,arg5,arg6) \
++ do { \
++ volatile OrigFn _orig = (orig); \
++ volatile unsigned long _argvec[3+6]; \
++ volatile unsigned long _res; \
++ /* _argvec[0] holds current r2 across the call */ \
++ _argvec[1] = (unsigned long)_orig.r2; \
++ _argvec[2] = (unsigned long)_orig.nraddr; \
++ _argvec[2+1] = (unsigned long)arg1; \
++ _argvec[2+2] = (unsigned long)arg2; \
++ _argvec[2+3] = (unsigned long)arg3; \
++ _argvec[2+4] = (unsigned long)arg4; \
++ _argvec[2+5] = (unsigned long)arg5; \
++ _argvec[2+6] = (unsigned long)arg6; \
++ __asm__ volatile( \
++ VALGRIND_ALIGN_STACK \
++ "mr 12,%1\n\t" \
++ "std 2,-16(12)\n\t" /* save tocptr */ \
++ "ld 2,-8(12)\n\t" /* use nraddr's tocptr */ \
++ "ld 3, 8(12)\n\t" /* arg1->r3 */ \
++ "ld 4, 16(12)\n\t" /* arg2->r4 */ \
++ "ld 5, 24(12)\n\t" /* arg3->r5 */ \
++ "ld 6, 32(12)\n\t" /* arg4->r6 */ \
++ "ld 7, 40(12)\n\t" /* arg5->r7 */ \
++ "ld 8, 48(12)\n\t" /* arg6->r8 */ \
++ "ld 12, 0(12)\n\t" /* target->r12 */ \
++ VALGRIND_BRANCH_AND_LINK_TO_NOREDIR_R12 \
++ "mr 12,%1\n\t" \
++ "mr %0,3\n\t" \
++ "ld 2,-16(12)\n\t" /* restore tocptr */ \
++ VALGRIND_RESTORE_STACK \
++ : /*out*/ "=r" (_res) \
++ : /*in*/ "r" (&_argvec[2]) \
++ : /*trash*/ "cc", "memory", __CALLER_SAVED_REGS, "r28" \
++ ); \
++ lval = (__typeof__(lval)) _res; \
++ } while (0)
++
++#define CALL_FN_W_7W(lval, orig, arg1,arg2,arg3,arg4,arg5,arg6, \
++ arg7) \
++ do { \
++ volatile OrigFn _orig = (orig); \
++ volatile unsigned long _argvec[3+7]; \
++ volatile unsigned long _res; \
++ /* _argvec[0] holds current r2 across the call */ \
++ _argvec[1] = (unsigned long)_orig.r2; \
++ _argvec[2] = (unsigned long)_orig.nraddr; \
++ _argvec[2+1] = (unsigned long)arg1; \
++ _argvec[2+2] = (unsigned long)arg2; \
++ _argvec[2+3] = (unsigned long)arg3; \
++ _argvec[2+4] = (unsigned long)arg4; \
++ _argvec[2+5] = (unsigned long)arg5; \
++ _argvec[2+6] = (unsigned long)arg6; \
++ _argvec[2+7] = (unsigned long)arg7; \
++ __asm__ volatile( \
++ VALGRIND_ALIGN_STACK \
++ "mr 12,%1\n\t" \
++ "std 2,-16(12)\n\t" /* save tocptr */ \
++ "ld 2,-8(12)\n\t" /* use nraddr's tocptr */ \
++ "ld 3, 8(12)\n\t" /* arg1->r3 */ \
++ "ld 4, 16(12)\n\t" /* arg2->r4 */ \
++ "ld 5, 24(12)\n\t" /* arg3->r5 */ \
++ "ld 6, 32(12)\n\t" /* arg4->r6 */ \
++ "ld 7, 40(12)\n\t" /* arg5->r7 */ \
++ "ld 8, 48(12)\n\t" /* arg6->r8 */ \
++ "ld 9, 56(12)\n\t" /* arg7->r9 */ \
++ "ld 12, 0(12)\n\t" /* target->r12 */ \
++ VALGRIND_BRANCH_AND_LINK_TO_NOREDIR_R12 \
++ "mr 12,%1\n\t" \
++ "mr %0,3\n\t" \
++ "ld 2,-16(12)\n\t" /* restore tocptr */ \
++ VALGRIND_RESTORE_STACK \
++ : /*out*/ "=r" (_res) \
++ : /*in*/ "r" (&_argvec[2]) \
++ : /*trash*/ "cc", "memory", __CALLER_SAVED_REGS, "r28" \
++ ); \
++ lval = (__typeof__(lval)) _res; \
++ } while (0)
++
++#define CALL_FN_W_8W(lval, orig, arg1,arg2,arg3,arg4,arg5,arg6, \
++ arg7,arg8) \
++ do { \
++ volatile OrigFn _orig = (orig); \
++ volatile unsigned long _argvec[3+8]; \
++ volatile unsigned long _res; \
++ /* _argvec[0] holds current r2 across the call */ \
++ _argvec[1] = (unsigned long)_orig.r2; \
++ _argvec[2] = (unsigned long)_orig.nraddr; \
++ _argvec[2+1] = (unsigned long)arg1; \
++ _argvec[2+2] = (unsigned long)arg2; \
++ _argvec[2+3] = (unsigned long)arg3; \
++ _argvec[2+4] = (unsigned long)arg4; \
++ _argvec[2+5] = (unsigned long)arg5; \
++ _argvec[2+6] = (unsigned long)arg6; \
++ _argvec[2+7] = (unsigned long)arg7; \
++ _argvec[2+8] = (unsigned long)arg8; \
++ __asm__ volatile( \
++ VALGRIND_ALIGN_STACK \
++ "mr 12,%1\n\t" \
++ "std 2,-16(12)\n\t" /* save tocptr */ \
++ "ld 2,-8(12)\n\t" /* use nraddr's tocptr */ \
++ "ld 3, 8(12)\n\t" /* arg1->r3 */ \
++ "ld 4, 16(12)\n\t" /* arg2->r4 */ \
++ "ld 5, 24(12)\n\t" /* arg3->r5 */ \
++ "ld 6, 32(12)\n\t" /* arg4->r6 */ \
++ "ld 7, 40(12)\n\t" /* arg5->r7 */ \
++ "ld 8, 48(12)\n\t" /* arg6->r8 */ \
++ "ld 9, 56(12)\n\t" /* arg7->r9 */ \
++ "ld 10, 64(12)\n\t" /* arg8->r10 */ \
++ "ld 12, 0(12)\n\t" /* target->r12 */ \
++ VALGRIND_BRANCH_AND_LINK_TO_NOREDIR_R12 \
++ "mr 12,%1\n\t" \
++ "mr %0,3\n\t" \
++ "ld 2,-16(12)\n\t" /* restore tocptr */ \
++ VALGRIND_RESTORE_STACK \
++ : /*out*/ "=r" (_res) \
++ : /*in*/ "r" (&_argvec[2]) \
++ : /*trash*/ "cc", "memory", __CALLER_SAVED_REGS, "r28" \
++ ); \
++ lval = (__typeof__(lval)) _res; \
++ } while (0)
++
++#define CALL_FN_W_9W(lval, orig, arg1,arg2,arg3,arg4,arg5,arg6, \
++ arg7,arg8,arg9) \
++ do { \
++ volatile OrigFn _orig = (orig); \
++ volatile unsigned long _argvec[3+9]; \
++ volatile unsigned long _res; \
++ /* _argvec[0] holds current r2 across the call */ \
++ _argvec[1] = (unsigned long)_orig.r2; \
++ _argvec[2] = (unsigned long)_orig.nraddr; \
++ _argvec[2+1] = (unsigned long)arg1; \
++ _argvec[2+2] = (unsigned long)arg2; \
++ _argvec[2+3] = (unsigned long)arg3; \
++ _argvec[2+4] = (unsigned long)arg4; \
++ _argvec[2+5] = (unsigned long)arg5; \
++ _argvec[2+6] = (unsigned long)arg6; \
++ _argvec[2+7] = (unsigned long)arg7; \
++ _argvec[2+8] = (unsigned long)arg8; \
++ _argvec[2+9] = (unsigned long)arg9; \
++ __asm__ volatile( \
++ VALGRIND_ALIGN_STACK \
++ "mr 12,%1\n\t" \
++ "std 2,-16(12)\n\t" /* save tocptr */ \
++ "ld 2,-8(12)\n\t" /* use nraddr's tocptr */ \
++ "addi 1,1,-128\n\t" /* expand stack frame */ \
++ /* arg9 */ \
++ "ld 3,72(12)\n\t" \
++ "std 3,96(1)\n\t" \
++ /* args1-8 */ \
++ "ld 3, 8(12)\n\t" /* arg1->r3 */ \
++ "ld 4, 16(12)\n\t" /* arg2->r4 */ \
++ "ld 5, 24(12)\n\t" /* arg3->r5 */ \
++ "ld 6, 32(12)\n\t" /* arg4->r6 */ \
++ "ld 7, 40(12)\n\t" /* arg5->r7 */ \
++ "ld 8, 48(12)\n\t" /* arg6->r8 */ \
++ "ld 9, 56(12)\n\t" /* arg7->r9 */ \
++ "ld 10, 64(12)\n\t" /* arg8->r10 */ \
++ "ld 12, 0(12)\n\t" /* target->r12 */ \
++ VALGRIND_BRANCH_AND_LINK_TO_NOREDIR_R12 \
++ "mr 12,%1\n\t" \
++ "mr %0,3\n\t" \
++ "ld 2,-16(12)\n\t" /* restore tocptr */ \
++ VALGRIND_RESTORE_STACK \
++ : /*out*/ "=r" (_res) \
++ : /*in*/ "r" (&_argvec[2]) \
++ : /*trash*/ "cc", "memory", __CALLER_SAVED_REGS, "r28" \
++ ); \
++ lval = (__typeof__(lval)) _res; \
++ } while (0)
++
++#define CALL_FN_W_10W(lval, orig, arg1,arg2,arg3,arg4,arg5,arg6, \
++ arg7,arg8,arg9,arg10) \
++ do { \
++ volatile OrigFn _orig = (orig); \
++ volatile unsigned long _argvec[3+10]; \
++ volatile unsigned long _res; \
++ /* _argvec[0] holds current r2 across the call */ \
++ _argvec[1] = (unsigned long)_orig.r2; \
++ _argvec[2] = (unsigned long)_orig.nraddr; \
++ _argvec[2+1] = (unsigned long)arg1; \
++ _argvec[2+2] = (unsigned long)arg2; \
++ _argvec[2+3] = (unsigned long)arg3; \
++ _argvec[2+4] = (unsigned long)arg4; \
++ _argvec[2+5] = (unsigned long)arg5; \
++ _argvec[2+6] = (unsigned long)arg6; \
++ _argvec[2+7] = (unsigned long)arg7; \
++ _argvec[2+8] = (unsigned long)arg8; \
++ _argvec[2+9] = (unsigned long)arg9; \
++ _argvec[2+10] = (unsigned long)arg10; \
++ __asm__ volatile( \
++ VALGRIND_ALIGN_STACK \
++ "mr 12,%1\n\t" \
++ "std 2,-16(12)\n\t" /* save tocptr */ \
++ "ld 2,-8(12)\n\t" /* use nraddr's tocptr */ \
++ "addi 1,1,-128\n\t" /* expand stack frame */ \
++ /* arg10 */ \
++ "ld 3,80(12)\n\t" \
++ "std 3,104(1)\n\t" \
++ /* arg9 */ \
++ "ld 3,72(12)\n\t" \
++ "std 3,96(1)\n\t" \
++ /* args1-8 */ \
++ "ld 3, 8(12)\n\t" /* arg1->r3 */ \
++ "ld 4, 16(12)\n\t" /* arg2->r4 */ \
++ "ld 5, 24(12)\n\t" /* arg3->r5 */ \
++ "ld 6, 32(12)\n\t" /* arg4->r6 */ \
++ "ld 7, 40(12)\n\t" /* arg5->r7 */ \
++ "ld 8, 48(12)\n\t" /* arg6->r8 */ \
++ "ld 9, 56(12)\n\t" /* arg7->r9 */ \
++ "ld 10, 64(12)\n\t" /* arg8->r10 */ \
++ "ld 12, 0(12)\n\t" /* target->r12 */ \
++ VALGRIND_BRANCH_AND_LINK_TO_NOREDIR_R12 \
++ "mr 12,%1\n\t" \
++ "mr %0,3\n\t" \
++ "ld 2,-16(12)\n\t" /* restore tocptr */ \
++ VALGRIND_RESTORE_STACK \
++ : /*out*/ "=r" (_res) \
++ : /*in*/ "r" (&_argvec[2]) \
++ : /*trash*/ "cc", "memory", __CALLER_SAVED_REGS, "r28" \
++ ); \
++ lval = (__typeof__(lval)) _res; \
++ } while (0)
++
++#define CALL_FN_W_11W(lval, orig, arg1,arg2,arg3,arg4,arg5,arg6, \
++ arg7,arg8,arg9,arg10,arg11) \
++ do { \
++ volatile OrigFn _orig = (orig); \
++ volatile unsigned long _argvec[3+11]; \
++ volatile unsigned long _res; \
++ /* _argvec[0] holds current r2 across the call */ \
++ _argvec[1] = (unsigned long)_orig.r2; \
++ _argvec[2] = (unsigned long)_orig.nraddr; \
++ _argvec[2+1] = (unsigned long)arg1; \
++ _argvec[2+2] = (unsigned long)arg2; \
++ _argvec[2+3] = (unsigned long)arg3; \
++ _argvec[2+4] = (unsigned long)arg4; \
++ _argvec[2+5] = (unsigned long)arg5; \
++ _argvec[2+6] = (unsigned long)arg6; \
++ _argvec[2+7] = (unsigned long)arg7; \
++ _argvec[2+8] = (unsigned long)arg8; \
++ _argvec[2+9] = (unsigned long)arg9; \
++ _argvec[2+10] = (unsigned long)arg10; \
++ _argvec[2+11] = (unsigned long)arg11; \
++ __asm__ volatile( \
++ VALGRIND_ALIGN_STACK \
++ "mr 12,%1\n\t" \
++ "std 2,-16(12)\n\t" /* save tocptr */ \
++ "ld 2,-8(12)\n\t" /* use nraddr's tocptr */ \
++ "addi 1,1,-144\n\t" /* expand stack frame */ \
++ /* arg11 */ \
++ "ld 3,88(12)\n\t" \
++ "std 3,112(1)\n\t" \
++ /* arg10 */ \
++ "ld 3,80(12)\n\t" \
++ "std 3,104(1)\n\t" \
++ /* arg9 */ \
++ "ld 3,72(12)\n\t" \
++ "std 3,96(1)\n\t" \
++ /* args1-8 */ \
++ "ld 3, 8(12)\n\t" /* arg1->r3 */ \
++ "ld 4, 16(12)\n\t" /* arg2->r4 */ \
++ "ld 5, 24(12)\n\t" /* arg3->r5 */ \
++ "ld 6, 32(12)\n\t" /* arg4->r6 */ \
++ "ld 7, 40(12)\n\t" /* arg5->r7 */ \
++ "ld 8, 48(12)\n\t" /* arg6->r8 */ \
++ "ld 9, 56(12)\n\t" /* arg7->r9 */ \
++ "ld 10, 64(12)\n\t" /* arg8->r10 */ \
++ "ld 12, 0(12)\n\t" /* target->r12 */ \
++ VALGRIND_BRANCH_AND_LINK_TO_NOREDIR_R12 \
++ "mr 12,%1\n\t" \
++ "mr %0,3\n\t" \
++ "ld 2,-16(12)\n\t" /* restore tocptr */ \
++ VALGRIND_RESTORE_STACK \
++ : /*out*/ "=r" (_res) \
++ : /*in*/ "r" (&_argvec[2]) \
++ : /*trash*/ "cc", "memory", __CALLER_SAVED_REGS, "r28" \
++ ); \
++ lval = (__typeof__(lval)) _res; \
++ } while (0)
++
++#define CALL_FN_W_12W(lval, orig, arg1,arg2,arg3,arg4,arg5,arg6, \
++ arg7,arg8,arg9,arg10,arg11,arg12) \
++ do { \
++ volatile OrigFn _orig = (orig); \
++ volatile unsigned long _argvec[3+12]; \
++ volatile unsigned long _res; \
++ /* _argvec[0] holds current r2 across the call */ \
++ _argvec[1] = (unsigned long)_orig.r2; \
++ _argvec[2] = (unsigned long)_orig.nraddr; \
++ _argvec[2+1] = (unsigned long)arg1; \
++ _argvec[2+2] = (unsigned long)arg2; \
++ _argvec[2+3] = (unsigned long)arg3; \
++ _argvec[2+4] = (unsigned long)arg4; \
++ _argvec[2+5] = (unsigned long)arg5; \
++ _argvec[2+6] = (unsigned long)arg6; \
++ _argvec[2+7] = (unsigned long)arg7; \
++ _argvec[2+8] = (unsigned long)arg8; \
++ _argvec[2+9] = (unsigned long)arg9; \
++ _argvec[2+10] = (unsigned long)arg10; \
++ _argvec[2+11] = (unsigned long)arg11; \
++ _argvec[2+12] = (unsigned long)arg12; \
++ __asm__ volatile( \
++ VALGRIND_ALIGN_STACK \
++ "mr 12,%1\n\t" \
++ "std 2,-16(12)\n\t" /* save tocptr */ \
++ "ld 2,-8(12)\n\t" /* use nraddr's tocptr */ \
++ "addi 1,1,-144\n\t" /* expand stack frame */ \
++ /* arg12 */ \
++ "ld 3,96(12)\n\t" \
++ "std 3,120(1)\n\t" \
++ /* arg11 */ \
++ "ld 3,88(12)\n\t" \
++ "std 3,112(1)\n\t" \
++ /* arg10 */ \
++ "ld 3,80(12)\n\t" \
++ "std 3,104(1)\n\t" \
++ /* arg9 */ \
++ "ld 3,72(12)\n\t" \
++ "std 3,96(1)\n\t" \
++ /* args1-8 */ \
++ "ld 3, 8(12)\n\t" /* arg1->r3 */ \
++ "ld 4, 16(12)\n\t" /* arg2->r4 */ \
++ "ld 5, 24(12)\n\t" /* arg3->r5 */ \
++ "ld 6, 32(12)\n\t" /* arg4->r6 */ \
++ "ld 7, 40(12)\n\t" /* arg5->r7 */ \
++ "ld 8, 48(12)\n\t" /* arg6->r8 */ \
++ "ld 9, 56(12)\n\t" /* arg7->r9 */ \
++ "ld 10, 64(12)\n\t" /* arg8->r10 */ \
++ "ld 12, 0(12)\n\t" /* target->r12 */ \
++ VALGRIND_BRANCH_AND_LINK_TO_NOREDIR_R12 \
++ "mr 12,%1\n\t" \
++ "mr %0,3\n\t" \
++ "ld 2,-16(12)\n\t" /* restore tocptr */ \
++ VALGRIND_RESTORE_STACK \
++ : /*out*/ "=r" (_res) \
++ : /*in*/ "r" (&_argvec[2]) \
++ : /*trash*/ "cc", "memory", __CALLER_SAVED_REGS, "r28" \
++ ); \
++ lval = (__typeof__(lval)) _res; \
++ } while (0)
++
++#endif /* PLAT_ppc64le_linux */
++
++/* ------------------------- arm-linux ------------------------- */
++
++#if defined(PLAT_arm_linux)
++
++/* These regs are trashed by the hidden call. */
++#define __CALLER_SAVED_REGS "r0", "r1", "r2", "r3","r4","r14"
++
++/* Macros to save and align the stack before making a function
++ call and restore it afterwards as gcc may not keep the stack
++ pointer aligned if it doesn't realise calls are being made
++ to other functions. */
++
++/* This is a bit tricky. We store the original stack pointer in r10
++ as it is callee-saves. gcc doesn't allow the use of r11 for some
++ reason. Also, we can't directly "bic" the stack pointer in thumb
++ mode since r13 isn't an allowed register number in that context.
++ So use r4 as a temporary, since that is about to get trashed
++ anyway, just after each use of this macro. Side effect is we need
++ to be very careful about any future changes, since
++ VALGRIND_ALIGN_STACK simply assumes r4 is usable. */
++#define VALGRIND_ALIGN_STACK \
++ "mov r10, sp\n\t" \
++ "mov r4, sp\n\t" \
++ "bic r4, r4, #7\n\t" \
++ "mov sp, r4\n\t"
++#define VALGRIND_RESTORE_STACK \
++ "mov sp, r10\n\t"
++
++/* These CALL_FN_ macros assume that on arm-linux, sizeof(unsigned
++ long) == 4. */
++
++#define CALL_FN_W_v(lval, orig) \
++ do { \
++ volatile OrigFn _orig = (orig); \
++ volatile unsigned long _argvec[1]; \
++ volatile unsigned long _res; \
++ _argvec[0] = (unsigned long)_orig.nraddr; \
++ __asm__ volatile( \
++ VALGRIND_ALIGN_STACK \
++ "ldr r4, [%1] \n\t" /* target->r4 */ \
++ VALGRIND_BRANCH_AND_LINK_TO_NOREDIR_R4 \
++ VALGRIND_RESTORE_STACK \
++ "mov %0, r0\n" \
++ : /*out*/ "=r" (_res) \
++ : /*in*/ "0" (&_argvec[0]) \
++ : /*trash*/ "cc", "memory", __CALLER_SAVED_REGS, "r10" \
++ ); \
++ lval = (__typeof__(lval)) _res; \
++ } while (0)
++
++#define CALL_FN_W_W(lval, orig, arg1) \
++ do { \
++ volatile OrigFn _orig = (orig); \
++ volatile unsigned long _argvec[2]; \
++ volatile unsigned long _res; \
++ _argvec[0] = (unsigned long)_orig.nraddr; \
++ _argvec[1] = (unsigned long)(arg1); \
++ __asm__ volatile( \
++ VALGRIND_ALIGN_STACK \
++ "ldr r0, [%1, #4] \n\t" \
++ "ldr r4, [%1] \n\t" /* target->r4 */ \
++ VALGRIND_BRANCH_AND_LINK_TO_NOREDIR_R4 \
++ VALGRIND_RESTORE_STACK \
++ "mov %0, r0\n" \
++ : /*out*/ "=r" (_res) \
++ : /*in*/ "0" (&_argvec[0]) \
++ : /*trash*/ "cc", "memory", __CALLER_SAVED_REGS, "r10" \
++ ); \
++ lval = (__typeof__(lval)) _res; \
++ } while (0)
++
++#define CALL_FN_W_WW(lval, orig, arg1,arg2) \
++ do { \
++ volatile OrigFn _orig = (orig); \
++ volatile unsigned long _argvec[3]; \
++ volatile unsigned long _res; \
++ _argvec[0] = (unsigned long)_orig.nraddr; \
++ _argvec[1] = (unsigned long)(arg1); \
++ _argvec[2] = (unsigned long)(arg2); \
++ __asm__ volatile( \
++ VALGRIND_ALIGN_STACK \
++ "ldr r0, [%1, #4] \n\t" \
++ "ldr r1, [%1, #8] \n\t" \
++ "ldr r4, [%1] \n\t" /* target->r4 */ \
++ VALGRIND_BRANCH_AND_LINK_TO_NOREDIR_R4 \
++ VALGRIND_RESTORE_STACK \
++ "mov %0, r0\n" \
++ : /*out*/ "=r" (_res) \
++ : /*in*/ "0" (&_argvec[0]) \
++ : /*trash*/ "cc", "memory", __CALLER_SAVED_REGS, "r10" \
++ ); \
++ lval = (__typeof__(lval)) _res; \
++ } while (0)
++
++#define CALL_FN_W_WWW(lval, orig, arg1,arg2,arg3) \
++ do { \
++ volatile OrigFn _orig = (orig); \
++ volatile unsigned long _argvec[4]; \
++ volatile unsigned long _res; \
++ _argvec[0] = (unsigned long)_orig.nraddr; \
++ _argvec[1] = (unsigned long)(arg1); \
++ _argvec[2] = (unsigned long)(arg2); \
++ _argvec[3] = (unsigned long)(arg3); \
++ __asm__ volatile( \
++ VALGRIND_ALIGN_STACK \
++ "ldr r0, [%1, #4] \n\t" \
++ "ldr r1, [%1, #8] \n\t" \
++ "ldr r2, [%1, #12] \n\t" \
++ "ldr r4, [%1] \n\t" /* target->r4 */ \
++ VALGRIND_BRANCH_AND_LINK_TO_NOREDIR_R4 \
++ VALGRIND_RESTORE_STACK \
++ "mov %0, r0\n" \
++ : /*out*/ "=r" (_res) \
++ : /*in*/ "0" (&_argvec[0]) \
++ : /*trash*/ "cc", "memory", __CALLER_SAVED_REGS, "r10" \
++ ); \
++ lval = (__typeof__(lval)) _res; \
++ } while (0)
++
++#define CALL_FN_W_WWWW(lval, orig, arg1,arg2,arg3,arg4) \
++ do { \
++ volatile OrigFn _orig = (orig); \
++ volatile unsigned long _argvec[5]; \
++ volatile unsigned long _res; \
++ _argvec[0] = (unsigned long)_orig.nraddr; \
++ _argvec[1] = (unsigned long)(arg1); \
++ _argvec[2] = (unsigned long)(arg2); \
++ _argvec[3] = (unsigned long)(arg3); \
++ _argvec[4] = (unsigned long)(arg4); \
++ __asm__ volatile( \
++ VALGRIND_ALIGN_STACK \
++ "ldr r0, [%1, #4] \n\t" \
++ "ldr r1, [%1, #8] \n\t" \
++ "ldr r2, [%1, #12] \n\t" \
++ "ldr r3, [%1, #16] \n\t" \
++ "ldr r4, [%1] \n\t" /* target->r4 */ \
++ VALGRIND_BRANCH_AND_LINK_TO_NOREDIR_R4 \
++ VALGRIND_RESTORE_STACK \
++ "mov %0, r0" \
++ : /*out*/ "=r" (_res) \
++ : /*in*/ "0" (&_argvec[0]) \
++ : /*trash*/ "cc", "memory", __CALLER_SAVED_REGS, "r10" \
++ ); \
++ lval = (__typeof__(lval)) _res; \
++ } while (0)
++
++#define CALL_FN_W_5W(lval, orig, arg1,arg2,arg3,arg4,arg5) \
++ do { \
++ volatile OrigFn _orig = (orig); \
++ volatile unsigned long _argvec[6]; \
++ volatile unsigned long _res; \
++ _argvec[0] = (unsigned long)_orig.nraddr; \
++ _argvec[1] = (unsigned long)(arg1); \
++ _argvec[2] = (unsigned long)(arg2); \
++ _argvec[3] = (unsigned long)(arg3); \
++ _argvec[4] = (unsigned long)(arg4); \
++ _argvec[5] = (unsigned long)(arg5); \
++ __asm__ volatile( \
++ VALGRIND_ALIGN_STACK \
++ "sub sp, sp, #4 \n\t" \
++ "ldr r0, [%1, #20] \n\t" \
++ "push {r0} \n\t" \
++ "ldr r0, [%1, #4] \n\t" \
++ "ldr r1, [%1, #8] \n\t" \
++ "ldr r2, [%1, #12] \n\t" \
++ "ldr r3, [%1, #16] \n\t" \
++ "ldr r4, [%1] \n\t" /* target->r4 */ \
++ VALGRIND_BRANCH_AND_LINK_TO_NOREDIR_R4 \
++ VALGRIND_RESTORE_STACK \
++ "mov %0, r0" \
++ : /*out*/ "=r" (_res) \
++ : /*in*/ "0" (&_argvec[0]) \
++ : /*trash*/ "cc", "memory", __CALLER_SAVED_REGS, "r10" \
++ ); \
++ lval = (__typeof__(lval)) _res; \
++ } while (0)
++
++#define CALL_FN_W_6W(lval, orig, arg1,arg2,arg3,arg4,arg5,arg6) \
++ do { \
++ volatile OrigFn _orig = (orig); \
++ volatile unsigned long _argvec[7]; \
++ volatile unsigned long _res; \
++ _argvec[0] = (unsigned long)_orig.nraddr; \
++ _argvec[1] = (unsigned long)(arg1); \
++ _argvec[2] = (unsigned long)(arg2); \
++ _argvec[3] = (unsigned long)(arg3); \
++ _argvec[4] = (unsigned long)(arg4); \
++ _argvec[5] = (unsigned long)(arg5); \
++ _argvec[6] = (unsigned long)(arg6); \
++ __asm__ volatile( \
++ VALGRIND_ALIGN_STACK \
++ "ldr r0, [%1, #20] \n\t" \
++ "ldr r1, [%1, #24] \n\t" \
++ "push {r0, r1} \n\t" \
++ "ldr r0, [%1, #4] \n\t" \
++ "ldr r1, [%1, #8] \n\t" \
++ "ldr r2, [%1, #12] \n\t" \
++ "ldr r3, [%1, #16] \n\t" \
++ "ldr r4, [%1] \n\t" /* target->r4 */ \
++ VALGRIND_BRANCH_AND_LINK_TO_NOREDIR_R4 \
++ VALGRIND_RESTORE_STACK \
++ "mov %0, r0" \
++ : /*out*/ "=r" (_res) \
++ : /*in*/ "0" (&_argvec[0]) \
++ : /*trash*/ "cc", "memory", __CALLER_SAVED_REGS, "r10" \
++ ); \
++ lval = (__typeof__(lval)) _res; \
++ } while (0)
++
++#define CALL_FN_W_7W(lval, orig, arg1,arg2,arg3,arg4,arg5,arg6, \
++ arg7) \
++ do { \
++ volatile OrigFn _orig = (orig); \
++ volatile unsigned long _argvec[8]; \
++ volatile unsigned long _res; \
++ _argvec[0] = (unsigned long)_orig.nraddr; \
++ _argvec[1] = (unsigned long)(arg1); \
++ _argvec[2] = (unsigned long)(arg2); \
++ _argvec[3] = (unsigned long)(arg3); \
++ _argvec[4] = (unsigned long)(arg4); \
++ _argvec[5] = (unsigned long)(arg5); \
++ _argvec[6] = (unsigned long)(arg6); \
++ _argvec[7] = (unsigned long)(arg7); \
++ __asm__ volatile( \
++ VALGRIND_ALIGN_STACK \
++ "sub sp, sp, #4 \n\t" \
++ "ldr r0, [%1, #20] \n\t" \
++ "ldr r1, [%1, #24] \n\t" \
++ "ldr r2, [%1, #28] \n\t" \
++ "push {r0, r1, r2} \n\t" \
+ "ldr r0, [%1, #4] \n\t" \
+ "ldr r1, [%1, #8] \n\t" \
+ "ldr r2, [%1, #12] \n\t" \
+@@ -3072,10 +3966,364 @@ typedef
+ "ldr r4, [%1] \n\t" /* target->r4 */ \
+ VALGRIND_BRANCH_AND_LINK_TO_NOREDIR_R4 \
+ VALGRIND_RESTORE_STACK \
+- "mov %0, r0" \
++ "mov %0, r0" \
++ : /*out*/ "=r" (_res) \
++ : /*in*/ "0" (&_argvec[0]) \
++ : /*trash*/ "cc", "memory", __CALLER_SAVED_REGS, "r10" \
++ ); \
++ lval = (__typeof__(lval)) _res; \
++ } while (0)
++
++#define CALL_FN_W_8W(lval, orig, arg1,arg2,arg3,arg4,arg5,arg6, \
++ arg7,arg8) \
++ do { \
++ volatile OrigFn _orig = (orig); \
++ volatile unsigned long _argvec[9]; \
++ volatile unsigned long _res; \
++ _argvec[0] = (unsigned long)_orig.nraddr; \
++ _argvec[1] = (unsigned long)(arg1); \
++ _argvec[2] = (unsigned long)(arg2); \
++ _argvec[3] = (unsigned long)(arg3); \
++ _argvec[4] = (unsigned long)(arg4); \
++ _argvec[5] = (unsigned long)(arg5); \
++ _argvec[6] = (unsigned long)(arg6); \
++ _argvec[7] = (unsigned long)(arg7); \
++ _argvec[8] = (unsigned long)(arg8); \
++ __asm__ volatile( \
++ VALGRIND_ALIGN_STACK \
++ "ldr r0, [%1, #20] \n\t" \
++ "ldr r1, [%1, #24] \n\t" \
++ "ldr r2, [%1, #28] \n\t" \
++ "ldr r3, [%1, #32] \n\t" \
++ "push {r0, r1, r2, r3} \n\t" \
++ "ldr r0, [%1, #4] \n\t" \
++ "ldr r1, [%1, #8] \n\t" \
++ "ldr r2, [%1, #12] \n\t" \
++ "ldr r3, [%1, #16] \n\t" \
++ "ldr r4, [%1] \n\t" /* target->r4 */ \
++ VALGRIND_BRANCH_AND_LINK_TO_NOREDIR_R4 \
++ VALGRIND_RESTORE_STACK \
++ "mov %0, r0" \
++ : /*out*/ "=r" (_res) \
++ : /*in*/ "0" (&_argvec[0]) \
++ : /*trash*/ "cc", "memory", __CALLER_SAVED_REGS, "r10" \
++ ); \
++ lval = (__typeof__(lval)) _res; \
++ } while (0)
++
++#define CALL_FN_W_9W(lval, orig, arg1,arg2,arg3,arg4,arg5,arg6, \
++ arg7,arg8,arg9) \
++ do { \
++ volatile OrigFn _orig = (orig); \
++ volatile unsigned long _argvec[10]; \
++ volatile unsigned long _res; \
++ _argvec[0] = (unsigned long)_orig.nraddr; \
++ _argvec[1] = (unsigned long)(arg1); \
++ _argvec[2] = (unsigned long)(arg2); \
++ _argvec[3] = (unsigned long)(arg3); \
++ _argvec[4] = (unsigned long)(arg4); \
++ _argvec[5] = (unsigned long)(arg5); \
++ _argvec[6] = (unsigned long)(arg6); \
++ _argvec[7] = (unsigned long)(arg7); \
++ _argvec[8] = (unsigned long)(arg8); \
++ _argvec[9] = (unsigned long)(arg9); \
++ __asm__ volatile( \
++ VALGRIND_ALIGN_STACK \
++ "sub sp, sp, #4 \n\t" \
++ "ldr r0, [%1, #20] \n\t" \
++ "ldr r1, [%1, #24] \n\t" \
++ "ldr r2, [%1, #28] \n\t" \
++ "ldr r3, [%1, #32] \n\t" \
++ "ldr r4, [%1, #36] \n\t" \
++ "push {r0, r1, r2, r3, r4} \n\t" \
++ "ldr r0, [%1, #4] \n\t" \
++ "ldr r1, [%1, #8] \n\t" \
++ "ldr r2, [%1, #12] \n\t" \
++ "ldr r3, [%1, #16] \n\t" \
++ "ldr r4, [%1] \n\t" /* target->r4 */ \
++ VALGRIND_BRANCH_AND_LINK_TO_NOREDIR_R4 \
++ VALGRIND_RESTORE_STACK \
++ "mov %0, r0" \
++ : /*out*/ "=r" (_res) \
++ : /*in*/ "0" (&_argvec[0]) \
++ : /*trash*/ "cc", "memory", __CALLER_SAVED_REGS, "r10" \
++ ); \
++ lval = (__typeof__(lval)) _res; \
++ } while (0)
++
++#define CALL_FN_W_10W(lval, orig, arg1,arg2,arg3,arg4,arg5,arg6, \
++ arg7,arg8,arg9,arg10) \
++ do { \
++ volatile OrigFn _orig = (orig); \
++ volatile unsigned long _argvec[11]; \
++ volatile unsigned long _res; \
++ _argvec[0] = (unsigned long)_orig.nraddr; \
++ _argvec[1] = (unsigned long)(arg1); \
++ _argvec[2] = (unsigned long)(arg2); \
++ _argvec[3] = (unsigned long)(arg3); \
++ _argvec[4] = (unsigned long)(arg4); \
++ _argvec[5] = (unsigned long)(arg5); \
++ _argvec[6] = (unsigned long)(arg6); \
++ _argvec[7] = (unsigned long)(arg7); \
++ _argvec[8] = (unsigned long)(arg8); \
++ _argvec[9] = (unsigned long)(arg9); \
++ _argvec[10] = (unsigned long)(arg10); \
++ __asm__ volatile( \
++ VALGRIND_ALIGN_STACK \
++ "ldr r0, [%1, #40] \n\t" \
++ "push {r0} \n\t" \
++ "ldr r0, [%1, #20] \n\t" \
++ "ldr r1, [%1, #24] \n\t" \
++ "ldr r2, [%1, #28] \n\t" \
++ "ldr r3, [%1, #32] \n\t" \
++ "ldr r4, [%1, #36] \n\t" \
++ "push {r0, r1, r2, r3, r4} \n\t" \
++ "ldr r0, [%1, #4] \n\t" \
++ "ldr r1, [%1, #8] \n\t" \
++ "ldr r2, [%1, #12] \n\t" \
++ "ldr r3, [%1, #16] \n\t" \
++ "ldr r4, [%1] \n\t" /* target->r4 */ \
++ VALGRIND_BRANCH_AND_LINK_TO_NOREDIR_R4 \
++ VALGRIND_RESTORE_STACK \
++ "mov %0, r0" \
++ : /*out*/ "=r" (_res) \
++ : /*in*/ "0" (&_argvec[0]) \
++ : /*trash*/ "cc", "memory", __CALLER_SAVED_REGS, "r10" \
++ ); \
++ lval = (__typeof__(lval)) _res; \
++ } while (0)
++
++#define CALL_FN_W_11W(lval, orig, arg1,arg2,arg3,arg4,arg5, \
++ arg6,arg7,arg8,arg9,arg10, \
++ arg11) \
++ do { \
++ volatile OrigFn _orig = (orig); \
++ volatile unsigned long _argvec[12]; \
++ volatile unsigned long _res; \
++ _argvec[0] = (unsigned long)_orig.nraddr; \
++ _argvec[1] = (unsigned long)(arg1); \
++ _argvec[2] = (unsigned long)(arg2); \
++ _argvec[3] = (unsigned long)(arg3); \
++ _argvec[4] = (unsigned long)(arg4); \
++ _argvec[5] = (unsigned long)(arg5); \
++ _argvec[6] = (unsigned long)(arg6); \
++ _argvec[7] = (unsigned long)(arg7); \
++ _argvec[8] = (unsigned long)(arg8); \
++ _argvec[9] = (unsigned long)(arg9); \
++ _argvec[10] = (unsigned long)(arg10); \
++ _argvec[11] = (unsigned long)(arg11); \
++ __asm__ volatile( \
++ VALGRIND_ALIGN_STACK \
++ "sub sp, sp, #4 \n\t" \
++ "ldr r0, [%1, #40] \n\t" \
++ "ldr r1, [%1, #44] \n\t" \
++ "push {r0, r1} \n\t" \
++ "ldr r0, [%1, #20] \n\t" \
++ "ldr r1, [%1, #24] \n\t" \
++ "ldr r2, [%1, #28] \n\t" \
++ "ldr r3, [%1, #32] \n\t" \
++ "ldr r4, [%1, #36] \n\t" \
++ "push {r0, r1, r2, r3, r4} \n\t" \
++ "ldr r0, [%1, #4] \n\t" \
++ "ldr r1, [%1, #8] \n\t" \
++ "ldr r2, [%1, #12] \n\t" \
++ "ldr r3, [%1, #16] \n\t" \
++ "ldr r4, [%1] \n\t" /* target->r4 */ \
++ VALGRIND_BRANCH_AND_LINK_TO_NOREDIR_R4 \
++ VALGRIND_RESTORE_STACK \
++ "mov %0, r0" \
++ : /*out*/ "=r" (_res) \
++ : /*in*/ "0" (&_argvec[0]) \
++ : /*trash*/ "cc", "memory", __CALLER_SAVED_REGS, "r10" \
++ ); \
++ lval = (__typeof__(lval)) _res; \
++ } while (0)
++
++#define CALL_FN_W_12W(lval, orig, arg1,arg2,arg3,arg4,arg5, \
++ arg6,arg7,arg8,arg9,arg10, \
++ arg11,arg12) \
++ do { \
++ volatile OrigFn _orig = (orig); \
++ volatile unsigned long _argvec[13]; \
++ volatile unsigned long _res; \
++ _argvec[0] = (unsigned long)_orig.nraddr; \
++ _argvec[1] = (unsigned long)(arg1); \
++ _argvec[2] = (unsigned long)(arg2); \
++ _argvec[3] = (unsigned long)(arg3); \
++ _argvec[4] = (unsigned long)(arg4); \
++ _argvec[5] = (unsigned long)(arg5); \
++ _argvec[6] = (unsigned long)(arg6); \
++ _argvec[7] = (unsigned long)(arg7); \
++ _argvec[8] = (unsigned long)(arg8); \
++ _argvec[9] = (unsigned long)(arg9); \
++ _argvec[10] = (unsigned long)(arg10); \
++ _argvec[11] = (unsigned long)(arg11); \
++ _argvec[12] = (unsigned long)(arg12); \
++ __asm__ volatile( \
++ VALGRIND_ALIGN_STACK \
++ "ldr r0, [%1, #40] \n\t" \
++ "ldr r1, [%1, #44] \n\t" \
++ "ldr r2, [%1, #48] \n\t" \
++ "push {r0, r1, r2} \n\t" \
++ "ldr r0, [%1, #20] \n\t" \
++ "ldr r1, [%1, #24] \n\t" \
++ "ldr r2, [%1, #28] \n\t" \
++ "ldr r3, [%1, #32] \n\t" \
++ "ldr r4, [%1, #36] \n\t" \
++ "push {r0, r1, r2, r3, r4} \n\t" \
++ "ldr r0, [%1, #4] \n\t" \
++ "ldr r1, [%1, #8] \n\t" \
++ "ldr r2, [%1, #12] \n\t" \
++ "ldr r3, [%1, #16] \n\t" \
++ "ldr r4, [%1] \n\t" /* target->r4 */ \
++ VALGRIND_BRANCH_AND_LINK_TO_NOREDIR_R4 \
++ VALGRIND_RESTORE_STACK \
++ "mov %0, r0" \
++ : /*out*/ "=r" (_res) \
++ : /*in*/ "0" (&_argvec[0]) \
++ : /*trash*/ "cc", "memory", __CALLER_SAVED_REGS, "r10" \
++ ); \
++ lval = (__typeof__(lval)) _res; \
++ } while (0)
++
++#endif /* PLAT_arm_linux */
++
++/* ------------------------ arm64-linux ------------------------ */
++
++#if defined(PLAT_arm64_linux)
++
++/* These regs are trashed by the hidden call. */
++#define __CALLER_SAVED_REGS \
++ "x0", "x1", "x2", "x3","x4", "x5", "x6", "x7", "x8", "x9", \
++ "x10", "x11", "x12", "x13", "x14", "x15", "x16", "x17", \
++ "x18", "x19", "x20", "x30", \
++ "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7", "v8", "v9", \
++ "v10", "v11", "v12", "v13", "v14", "v15", "v16", "v17", \
++ "v18", "v19", "v20", "v21", "v22", "v23", "v24", "v25", \
++ "v26", "v27", "v28", "v29", "v30", "v31"
++
++/* x21 is callee-saved, so we can use it to save and restore SP around
++ the hidden call. */
++#define VALGRIND_ALIGN_STACK \
++ "mov x21, sp\n\t" \
++ "bic sp, x21, #15\n\t"
++#define VALGRIND_RESTORE_STACK \
++ "mov sp, x21\n\t"
++
++/* These CALL_FN_ macros assume that on arm64-linux,
++ sizeof(unsigned long) == 8. */
++
++#define CALL_FN_W_v(lval, orig) \
++ do { \
++ volatile OrigFn _orig = (orig); \
++ volatile unsigned long _argvec[1]; \
++ volatile unsigned long _res; \
++ _argvec[0] = (unsigned long)_orig.nraddr; \
++ __asm__ volatile( \
++ VALGRIND_ALIGN_STACK \
++ "ldr x8, [%1] \n\t" /* target->x8 */ \
++ VALGRIND_BRANCH_AND_LINK_TO_NOREDIR_X8 \
++ VALGRIND_RESTORE_STACK \
++ "mov %0, x0\n" \
++ : /*out*/ "=r" (_res) \
++ : /*in*/ "0" (&_argvec[0]) \
++ : /*trash*/ "cc", "memory", __CALLER_SAVED_REGS, "x21" \
++ ); \
++ lval = (__typeof__(lval)) _res; \
++ } while (0)
++
++#define CALL_FN_W_W(lval, orig, arg1) \
++ do { \
++ volatile OrigFn _orig = (orig); \
++ volatile unsigned long _argvec[2]; \
++ volatile unsigned long _res; \
++ _argvec[0] = (unsigned long)_orig.nraddr; \
++ _argvec[1] = (unsigned long)(arg1); \
++ __asm__ volatile( \
++ VALGRIND_ALIGN_STACK \
++ "ldr x0, [%1, #8] \n\t" \
++ "ldr x8, [%1] \n\t" /* target->x8 */ \
++ VALGRIND_BRANCH_AND_LINK_TO_NOREDIR_X8 \
++ VALGRIND_RESTORE_STACK \
++ "mov %0, x0\n" \
++ : /*out*/ "=r" (_res) \
++ : /*in*/ "0" (&_argvec[0]) \
++ : /*trash*/ "cc", "memory", __CALLER_SAVED_REGS, "x21" \
++ ); \
++ lval = (__typeof__(lval)) _res; \
++ } while (0)
++
++#define CALL_FN_W_WW(lval, orig, arg1,arg2) \
++ do { \
++ volatile OrigFn _orig = (orig); \
++ volatile unsigned long _argvec[3]; \
++ volatile unsigned long _res; \
++ _argvec[0] = (unsigned long)_orig.nraddr; \
++ _argvec[1] = (unsigned long)(arg1); \
++ _argvec[2] = (unsigned long)(arg2); \
++ __asm__ volatile( \
++ VALGRIND_ALIGN_STACK \
++ "ldr x0, [%1, #8] \n\t" \
++ "ldr x1, [%1, #16] \n\t" \
++ "ldr x8, [%1] \n\t" /* target->x8 */ \
++ VALGRIND_BRANCH_AND_LINK_TO_NOREDIR_X8 \
++ VALGRIND_RESTORE_STACK \
++ "mov %0, x0\n" \
+ : /*out*/ "=r" (_res) \
+ : /*in*/ "0" (&_argvec[0]) \
+- : /*trash*/ "cc", "memory", __CALLER_SAVED_REGS, "r10" \
++ : /*trash*/ "cc", "memory", __CALLER_SAVED_REGS, "x21" \
++ ); \
++ lval = (__typeof__(lval)) _res; \
++ } while (0)
++
++#define CALL_FN_W_WWW(lval, orig, arg1,arg2,arg3) \
++ do { \
++ volatile OrigFn _orig = (orig); \
++ volatile unsigned long _argvec[4]; \
++ volatile unsigned long _res; \
++ _argvec[0] = (unsigned long)_orig.nraddr; \
++ _argvec[1] = (unsigned long)(arg1); \
++ _argvec[2] = (unsigned long)(arg2); \
++ _argvec[3] = (unsigned long)(arg3); \
++ __asm__ volatile( \
++ VALGRIND_ALIGN_STACK \
++ "ldr x0, [%1, #8] \n\t" \
++ "ldr x1, [%1, #16] \n\t" \
++ "ldr x2, [%1, #24] \n\t" \
++ "ldr x8, [%1] \n\t" /* target->x8 */ \
++ VALGRIND_BRANCH_AND_LINK_TO_NOREDIR_X8 \
++ VALGRIND_RESTORE_STACK \
++ "mov %0, x0\n" \
++ : /*out*/ "=r" (_res) \
++ : /*in*/ "0" (&_argvec[0]) \
++ : /*trash*/ "cc", "memory", __CALLER_SAVED_REGS, "x21" \
++ ); \
++ lval = (__typeof__(lval)) _res; \
++ } while (0)
++
++#define CALL_FN_W_WWWW(lval, orig, arg1,arg2,arg3,arg4) \
++ do { \
++ volatile OrigFn _orig = (orig); \
++ volatile unsigned long _argvec[5]; \
++ volatile unsigned long _res; \
++ _argvec[0] = (unsigned long)_orig.nraddr; \
++ _argvec[1] = (unsigned long)(arg1); \
++ _argvec[2] = (unsigned long)(arg2); \
++ _argvec[3] = (unsigned long)(arg3); \
++ _argvec[4] = (unsigned long)(arg4); \
++ __asm__ volatile( \
++ VALGRIND_ALIGN_STACK \
++ "ldr x0, [%1, #8] \n\t" \
++ "ldr x1, [%1, #16] \n\t" \
++ "ldr x2, [%1, #24] \n\t" \
++ "ldr x3, [%1, #32] \n\t" \
++ "ldr x8, [%1] \n\t" /* target->x8 */ \
++ VALGRIND_BRANCH_AND_LINK_TO_NOREDIR_X8 \
++ VALGRIND_RESTORE_STACK \
++ "mov %0, x0" \
++ : /*out*/ "=r" (_res) \
++ : /*in*/ "0" (&_argvec[0]) \
++ : /*trash*/ "cc", "memory", __CALLER_SAVED_REGS, "x21" \
+ ); \
+ lval = (__typeof__(lval)) _res; \
+ } while (0)
+@@ -3093,20 +4341,18 @@ typedef
+ _argvec[5] = (unsigned long)(arg5); \
+ __asm__ volatile( \
+ VALGRIND_ALIGN_STACK \
+- "sub sp, sp, #4 \n\t" \
+- "ldr r0, [%1, #20] \n\t" \
+- "push {r0} \n\t" \
+- "ldr r0, [%1, #4] \n\t" \
+- "ldr r1, [%1, #8] \n\t" \
+- "ldr r2, [%1, #12] \n\t" \
+- "ldr r3, [%1, #16] \n\t" \
+- "ldr r4, [%1] \n\t" /* target->r4 */ \
+- VALGRIND_BRANCH_AND_LINK_TO_NOREDIR_R4 \
++ "ldr x0, [%1, #8] \n\t" \
++ "ldr x1, [%1, #16] \n\t" \
++ "ldr x2, [%1, #24] \n\t" \
++ "ldr x3, [%1, #32] \n\t" \
++ "ldr x4, [%1, #40] \n\t" \
++ "ldr x8, [%1] \n\t" /* target->x8 */ \
++ VALGRIND_BRANCH_AND_LINK_TO_NOREDIR_X8 \
+ VALGRIND_RESTORE_STACK \
+- "mov %0, r0" \
++ "mov %0, x0" \
+ : /*out*/ "=r" (_res) \
+ : /*in*/ "0" (&_argvec[0]) \
+- : /*trash*/ "cc", "memory", __CALLER_SAVED_REGS, "r10" \
++ : /*trash*/ "cc", "memory", __CALLER_SAVED_REGS, "x21" \
+ ); \
+ lval = (__typeof__(lval)) _res; \
+ } while (0)
+@@ -3125,20 +4371,19 @@ typedef
+ _argvec[6] = (unsigned long)(arg6); \
+ __asm__ volatile( \
+ VALGRIND_ALIGN_STACK \
+- "ldr r0, [%1, #20] \n\t" \
+- "ldr r1, [%1, #24] \n\t" \
+- "push {r0, r1} \n\t" \
+- "ldr r0, [%1, #4] \n\t" \
+- "ldr r1, [%1, #8] \n\t" \
+- "ldr r2, [%1, #12] \n\t" \
+- "ldr r3, [%1, #16] \n\t" \
+- "ldr r4, [%1] \n\t" /* target->r4 */ \
+- VALGRIND_BRANCH_AND_LINK_TO_NOREDIR_R4 \
++ "ldr x0, [%1, #8] \n\t" \
++ "ldr x1, [%1, #16] \n\t" \
++ "ldr x2, [%1, #24] \n\t" \
++ "ldr x3, [%1, #32] \n\t" \
++ "ldr x4, [%1, #40] \n\t" \
++ "ldr x5, [%1, #48] \n\t" \
++ "ldr x8, [%1] \n\t" /* target->x8 */ \
++ VALGRIND_BRANCH_AND_LINK_TO_NOREDIR_X8 \
+ VALGRIND_RESTORE_STACK \
+- "mov %0, r0" \
++ "mov %0, x0" \
+ : /*out*/ "=r" (_res) \
+ : /*in*/ "0" (&_argvec[0]) \
+- : /*trash*/ "cc", "memory", __CALLER_SAVED_REGS, "r10" \
++ : /*trash*/ "cc", "memory", __CALLER_SAVED_REGS, "x21" \
+ ); \
+ lval = (__typeof__(lval)) _res; \
+ } while (0)
+@@ -3159,22 +4404,20 @@ typedef
+ _argvec[7] = (unsigned long)(arg7); \
+ __asm__ volatile( \
+ VALGRIND_ALIGN_STACK \
+- "sub sp, sp, #4 \n\t" \
+- "ldr r0, [%1, #20] \n\t" \
+- "ldr r1, [%1, #24] \n\t" \
+- "ldr r2, [%1, #28] \n\t" \
+- "push {r0, r1, r2} \n\t" \
+- "ldr r0, [%1, #4] \n\t" \
+- "ldr r1, [%1, #8] \n\t" \
+- "ldr r2, [%1, #12] \n\t" \
+- "ldr r3, [%1, #16] \n\t" \
+- "ldr r4, [%1] \n\t" /* target->r4 */ \
+- VALGRIND_BRANCH_AND_LINK_TO_NOREDIR_R4 \
++ "ldr x0, [%1, #8] \n\t" \
++ "ldr x1, [%1, #16] \n\t" \
++ "ldr x2, [%1, #24] \n\t" \
++ "ldr x3, [%1, #32] \n\t" \
++ "ldr x4, [%1, #40] \n\t" \
++ "ldr x5, [%1, #48] \n\t" \
++ "ldr x6, [%1, #56] \n\t" \
++ "ldr x8, [%1] \n\t" /* target->x8 */ \
++ VALGRIND_BRANCH_AND_LINK_TO_NOREDIR_X8 \
+ VALGRIND_RESTORE_STACK \
+- "mov %0, r0" \
++ "mov %0, x0" \
+ : /*out*/ "=r" (_res) \
+ : /*in*/ "0" (&_argvec[0]) \
+- : /*trash*/ "cc", "memory", __CALLER_SAVED_REGS, "r10" \
++ : /*trash*/ "cc", "memory", __CALLER_SAVED_REGS, "x21" \
+ ); \
+ lval = (__typeof__(lval)) _res; \
+ } while (0)
+@@ -3196,22 +4439,21 @@ typedef
+ _argvec[8] = (unsigned long)(arg8); \
+ __asm__ volatile( \
+ VALGRIND_ALIGN_STACK \
+- "ldr r0, [%1, #20] \n\t" \
+- "ldr r1, [%1, #24] \n\t" \
+- "ldr r2, [%1, #28] \n\t" \
+- "ldr r3, [%1, #32] \n\t" \
+- "push {r0, r1, r2, r3} \n\t" \
+- "ldr r0, [%1, #4] \n\t" \
+- "ldr r1, [%1, #8] \n\t" \
+- "ldr r2, [%1, #12] \n\t" \
+- "ldr r3, [%1, #16] \n\t" \
+- "ldr r4, [%1] \n\t" /* target->r4 */ \
+- VALGRIND_BRANCH_AND_LINK_TO_NOREDIR_R4 \
++ "ldr x0, [%1, #8] \n\t" \
++ "ldr x1, [%1, #16] \n\t" \
++ "ldr x2, [%1, #24] \n\t" \
++ "ldr x3, [%1, #32] \n\t" \
++ "ldr x4, [%1, #40] \n\t" \
++ "ldr x5, [%1, #48] \n\t" \
++ "ldr x6, [%1, #56] \n\t" \
++ "ldr x7, [%1, #64] \n\t" \
++ "ldr x8, [%1] \n\t" /* target->x8 */ \
++ VALGRIND_BRANCH_AND_LINK_TO_NOREDIR_X8 \
+ VALGRIND_RESTORE_STACK \
+- "mov %0, r0" \
++ "mov %0, x0" \
+ : /*out*/ "=r" (_res) \
+ : /*in*/ "0" (&_argvec[0]) \
+- : /*trash*/ "cc", "memory", __CALLER_SAVED_REGS, "r10" \
++ : /*trash*/ "cc", "memory", __CALLER_SAVED_REGS, "x21" \
+ ); \
+ lval = (__typeof__(lval)) _res; \
+ } while (0)
+@@ -3234,24 +4476,24 @@ typedef
+ _argvec[9] = (unsigned long)(arg9); \
+ __asm__ volatile( \
+ VALGRIND_ALIGN_STACK \
+- "sub sp, sp, #4 \n\t" \
+- "ldr r0, [%1, #20] \n\t" \
+- "ldr r1, [%1, #24] \n\t" \
+- "ldr r2, [%1, #28] \n\t" \
+- "ldr r3, [%1, #32] \n\t" \
+- "ldr r4, [%1, #36] \n\t" \
+- "push {r0, r1, r2, r3, r4} \n\t" \
+- "ldr r0, [%1, #4] \n\t" \
+- "ldr r1, [%1, #8] \n\t" \
+- "ldr r2, [%1, #12] \n\t" \
+- "ldr r3, [%1, #16] \n\t" \
+- "ldr r4, [%1] \n\t" /* target->r4 */ \
+- VALGRIND_BRANCH_AND_LINK_TO_NOREDIR_R4 \
++ "sub sp, sp, #0x20 \n\t" \
++ "ldr x0, [%1, #8] \n\t" \
++ "ldr x1, [%1, #16] \n\t" \
++ "ldr x2, [%1, #24] \n\t" \
++ "ldr x3, [%1, #32] \n\t" \
++ "ldr x4, [%1, #40] \n\t" \
++ "ldr x5, [%1, #48] \n\t" \
++ "ldr x6, [%1, #56] \n\t" \
++ "ldr x7, [%1, #64] \n\t" \
++ "ldr x8, [%1, #72] \n\t" \
++ "str x8, [sp, #0] \n\t" \
++ "ldr x8, [%1] \n\t" /* target->x8 */ \
++ VALGRIND_BRANCH_AND_LINK_TO_NOREDIR_X8 \
+ VALGRIND_RESTORE_STACK \
+- "mov %0, r0" \
++ "mov %0, x0" \
+ : /*out*/ "=r" (_res) \
+ : /*in*/ "0" (&_argvec[0]) \
+- : /*trash*/ "cc", "memory", __CALLER_SAVED_REGS, "r10" \
++ : /*trash*/ "cc", "memory", __CALLER_SAVED_REGS, "x21" \
+ ); \
+ lval = (__typeof__(lval)) _res; \
+ } while (0)
+@@ -3275,32 +4517,32 @@ typedef
+ _argvec[10] = (unsigned long)(arg10); \
+ __asm__ volatile( \
+ VALGRIND_ALIGN_STACK \
+- "ldr r0, [%1, #40] \n\t" \
+- "push {r0} \n\t" \
+- "ldr r0, [%1, #20] \n\t" \
+- "ldr r1, [%1, #24] \n\t" \
+- "ldr r2, [%1, #28] \n\t" \
+- "ldr r3, [%1, #32] \n\t" \
+- "ldr r4, [%1, #36] \n\t" \
+- "push {r0, r1, r2, r3, r4} \n\t" \
+- "ldr r0, [%1, #4] \n\t" \
+- "ldr r1, [%1, #8] \n\t" \
+- "ldr r2, [%1, #12] \n\t" \
+- "ldr r3, [%1, #16] \n\t" \
+- "ldr r4, [%1] \n\t" /* target->r4 */ \
+- VALGRIND_BRANCH_AND_LINK_TO_NOREDIR_R4 \
++ "sub sp, sp, #0x20 \n\t" \
++ "ldr x0, [%1, #8] \n\t" \
++ "ldr x1, [%1, #16] \n\t" \
++ "ldr x2, [%1, #24] \n\t" \
++ "ldr x3, [%1, #32] \n\t" \
++ "ldr x4, [%1, #40] \n\t" \
++ "ldr x5, [%1, #48] \n\t" \
++ "ldr x6, [%1, #56] \n\t" \
++ "ldr x7, [%1, #64] \n\t" \
++ "ldr x8, [%1, #72] \n\t" \
++ "str x8, [sp, #0] \n\t" \
++ "ldr x8, [%1, #80] \n\t" \
++ "str x8, [sp, #8] \n\t" \
++ "ldr x8, [%1] \n\t" /* target->x8 */ \
++ VALGRIND_BRANCH_AND_LINK_TO_NOREDIR_X8 \
+ VALGRIND_RESTORE_STACK \
+- "mov %0, r0" \
++ "mov %0, x0" \
+ : /*out*/ "=r" (_res) \
+ : /*in*/ "0" (&_argvec[0]) \
+- : /*trash*/ "cc", "memory", __CALLER_SAVED_REGS, "r10" \
++ : /*trash*/ "cc", "memory", __CALLER_SAVED_REGS, "x21" \
+ ); \
+ lval = (__typeof__(lval)) _res; \
+ } while (0)
+
+-#define CALL_FN_W_11W(lval, orig, arg1,arg2,arg3,arg4,arg5, \
+- arg6,arg7,arg8,arg9,arg10, \
+- arg11) \
++#define CALL_FN_W_11W(lval, orig, arg1,arg2,arg3,arg4,arg5,arg6, \
++ arg7,arg8,arg9,arg10,arg11) \
+ do { \
+ volatile OrigFn _orig = (orig); \
+ volatile unsigned long _argvec[12]; \
+@@ -3319,34 +4561,35 @@ typedef
+ _argvec[11] = (unsigned long)(arg11); \
+ __asm__ volatile( \
+ VALGRIND_ALIGN_STACK \
+- "sub sp, sp, #4 \n\t" \
+- "ldr r0, [%1, #40] \n\t" \
+- "ldr r1, [%1, #44] \n\t" \
+- "push {r0, r1} \n\t" \
+- "ldr r0, [%1, #20] \n\t" \
+- "ldr r1, [%1, #24] \n\t" \
+- "ldr r2, [%1, #28] \n\t" \
+- "ldr r3, [%1, #32] \n\t" \
+- "ldr r4, [%1, #36] \n\t" \
+- "push {r0, r1, r2, r3, r4} \n\t" \
+- "ldr r0, [%1, #4] \n\t" \
+- "ldr r1, [%1, #8] \n\t" \
+- "ldr r2, [%1, #12] \n\t" \
+- "ldr r3, [%1, #16] \n\t" \
+- "ldr r4, [%1] \n\t" /* target->r4 */ \
+- VALGRIND_BRANCH_AND_LINK_TO_NOREDIR_R4 \
++ "sub sp, sp, #0x30 \n\t" \
++ "ldr x0, [%1, #8] \n\t" \
++ "ldr x1, [%1, #16] \n\t" \
++ "ldr x2, [%1, #24] \n\t" \
++ "ldr x3, [%1, #32] \n\t" \
++ "ldr x4, [%1, #40] \n\t" \
++ "ldr x5, [%1, #48] \n\t" \
++ "ldr x6, [%1, #56] \n\t" \
++ "ldr x7, [%1, #64] \n\t" \
++ "ldr x8, [%1, #72] \n\t" \
++ "str x8, [sp, #0] \n\t" \
++ "ldr x8, [%1, #80] \n\t" \
++ "str x8, [sp, #8] \n\t" \
++ "ldr x8, [%1, #88] \n\t" \
++ "str x8, [sp, #16] \n\t" \
++ "ldr x8, [%1] \n\t" /* target->x8 */ \
++ VALGRIND_BRANCH_AND_LINK_TO_NOREDIR_X8 \
+ VALGRIND_RESTORE_STACK \
+- "mov %0, r0" \
++ "mov %0, x0" \
+ : /*out*/ "=r" (_res) \
+ : /*in*/ "0" (&_argvec[0]) \
+- : /*trash*/ "cc", "memory", __CALLER_SAVED_REGS, "r10" \
++ : /*trash*/ "cc", "memory", __CALLER_SAVED_REGS, "x21" \
+ ); \
+ lval = (__typeof__(lval)) _res; \
+ } while (0)
+
+-#define CALL_FN_W_12W(lval, orig, arg1,arg2,arg3,arg4,arg5, \
+- arg6,arg7,arg8,arg9,arg10, \
+- arg11,arg12) \
++#define CALL_FN_W_12W(lval, orig, arg1,arg2,arg3,arg4,arg5,arg6, \
++ arg7,arg8,arg9,arg10,arg11, \
++ arg12) \
+ do { \
+ volatile OrigFn _orig = (orig); \
+ volatile unsigned long _argvec[13]; \
+@@ -3366,32 +4609,35 @@ typedef
+ _argvec[12] = (unsigned long)(arg12); \
+ __asm__ volatile( \
+ VALGRIND_ALIGN_STACK \
+- "ldr r0, [%1, #40] \n\t" \
+- "ldr r1, [%1, #44] \n\t" \
+- "ldr r2, [%1, #48] \n\t" \
+- "push {r0, r1, r2} \n\t" \
+- "ldr r0, [%1, #20] \n\t" \
+- "ldr r1, [%1, #24] \n\t" \
+- "ldr r2, [%1, #28] \n\t" \
+- "ldr r3, [%1, #32] \n\t" \
+- "ldr r4, [%1, #36] \n\t" \
+- "push {r0, r1, r2, r3, r4} \n\t" \
+- "ldr r0, [%1, #4] \n\t" \
+- "ldr r1, [%1, #8] \n\t" \
+- "ldr r2, [%1, #12] \n\t" \
+- "ldr r3, [%1, #16] \n\t" \
+- "ldr r4, [%1] \n\t" /* target->r4 */ \
+- VALGRIND_BRANCH_AND_LINK_TO_NOREDIR_R4 \
++ "sub sp, sp, #0x30 \n\t" \
++ "ldr x0, [%1, #8] \n\t" \
++ "ldr x1, [%1, #16] \n\t" \
++ "ldr x2, [%1, #24] \n\t" \
++ "ldr x3, [%1, #32] \n\t" \
++ "ldr x4, [%1, #40] \n\t" \
++ "ldr x5, [%1, #48] \n\t" \
++ "ldr x6, [%1, #56] \n\t" \
++ "ldr x7, [%1, #64] \n\t" \
++ "ldr x8, [%1, #72] \n\t" \
++ "str x8, [sp, #0] \n\t" \
++ "ldr x8, [%1, #80] \n\t" \
++ "str x8, [sp, #8] \n\t" \
++ "ldr x8, [%1, #88] \n\t" \
++ "str x8, [sp, #16] \n\t" \
++ "ldr x8, [%1, #96] \n\t" \
++ "str x8, [sp, #24] \n\t" \
++ "ldr x8, [%1] \n\t" /* target->x8 */ \
++ VALGRIND_BRANCH_AND_LINK_TO_NOREDIR_X8 \
+ VALGRIND_RESTORE_STACK \
+- "mov %0, r0" \
++ "mov %0, x0" \
+ : /*out*/ "=r" (_res) \
+ : /*in*/ "0" (&_argvec[0]) \
+- : /*trash*/ "cc", "memory", __CALLER_SAVED_REGS, "r10" \
++ : /*trash*/ "cc", "memory", __CALLER_SAVED_REGS, "x21" \
+ ); \
+ lval = (__typeof__(lval)) _res; \
+ } while (0)
+
+-#endif /* PLAT_arm_linux */
++#endif /* PLAT_arm64_linux */
+
+ /* ------------------------- s390x-linux ------------------------- */
+
+@@ -3659,7 +4905,85 @@ typedef
+ "lg 1, 0(1)\n\t" \
+ VALGRIND_CALL_NOREDIR_R1 \
+ "lgr %0, 2\n\t" \
+- "aghi 15,176\n\t" \
++ "aghi 15,176\n\t" \
++ VALGRIND_CFI_EPILOGUE \
++ : /*out*/ "=d" (_res) \
++ : /*in*/ "a" (&_argvec[0]) __FRAME_POINTER \
++ : /*trash*/ "cc", "memory", __CALLER_SAVED_REGS,"6","7" \
++ ); \
++ lval = (__typeof__(lval)) _res; \
++ } while (0)
++
++#define CALL_FN_W_8W(lval, orig, arg1, arg2, arg3, arg4, arg5, \
++ arg6, arg7 ,arg8) \
++ do { \
++ volatile OrigFn _orig = (orig); \
++ volatile unsigned long _argvec[9]; \
++ volatile unsigned long _res; \
++ _argvec[0] = (unsigned long)_orig.nraddr; \
++ _argvec[1] = (unsigned long)arg1; \
++ _argvec[2] = (unsigned long)arg2; \
++ _argvec[3] = (unsigned long)arg3; \
++ _argvec[4] = (unsigned long)arg4; \
++ _argvec[5] = (unsigned long)arg5; \
++ _argvec[6] = (unsigned long)arg6; \
++ _argvec[7] = (unsigned long)arg7; \
++ _argvec[8] = (unsigned long)arg8; \
++ __asm__ volatile( \
++ VALGRIND_CFI_PROLOGUE \
++ "aghi 15,-184\n\t" \
++ "lg 2, 8(1)\n\t" \
++ "lg 3,16(1)\n\t" \
++ "lg 4,24(1)\n\t" \
++ "lg 5,32(1)\n\t" \
++ "lg 6,40(1)\n\t" \
++ "mvc 160(8,15), 48(1)\n\t" \
++ "mvc 168(8,15), 56(1)\n\t" \
++ "mvc 176(8,15), 64(1)\n\t" \
++ "lg 1, 0(1)\n\t" \
++ VALGRIND_CALL_NOREDIR_R1 \
++ "lgr %0, 2\n\t" \
++ "aghi 15,184\n\t" \
++ VALGRIND_CFI_EPILOGUE \
++ : /*out*/ "=d" (_res) \
++ : /*in*/ "a" (&_argvec[0]) __FRAME_POINTER \
++ : /*trash*/ "cc", "memory", __CALLER_SAVED_REGS,"6","7" \
++ ); \
++ lval = (__typeof__(lval)) _res; \
++ } while (0)
++
++#define CALL_FN_W_9W(lval, orig, arg1, arg2, arg3, arg4, arg5, \
++ arg6, arg7 ,arg8, arg9) \
++ do { \
++ volatile OrigFn _orig = (orig); \
++ volatile unsigned long _argvec[10]; \
++ volatile unsigned long _res; \
++ _argvec[0] = (unsigned long)_orig.nraddr; \
++ _argvec[1] = (unsigned long)arg1; \
++ _argvec[2] = (unsigned long)arg2; \
++ _argvec[3] = (unsigned long)arg3; \
++ _argvec[4] = (unsigned long)arg4; \
++ _argvec[5] = (unsigned long)arg5; \
++ _argvec[6] = (unsigned long)arg6; \
++ _argvec[7] = (unsigned long)arg7; \
++ _argvec[8] = (unsigned long)arg8; \
++ _argvec[9] = (unsigned long)arg9; \
++ __asm__ volatile( \
++ VALGRIND_CFI_PROLOGUE \
++ "aghi 15,-192\n\t" \
++ "lg 2, 8(1)\n\t" \
++ "lg 3,16(1)\n\t" \
++ "lg 4,24(1)\n\t" \
++ "lg 5,32(1)\n\t" \
++ "lg 6,40(1)\n\t" \
++ "mvc 160(8,15), 48(1)\n\t" \
++ "mvc 168(8,15), 56(1)\n\t" \
++ "mvc 176(8,15), 64(1)\n\t" \
++ "mvc 184(8,15), 72(1)\n\t" \
++ "lg 1, 0(1)\n\t" \
++ VALGRIND_CALL_NOREDIR_R1 \
++ "lgr %0, 2\n\t" \
++ "aghi 15,192\n\t" \
+ VALGRIND_CFI_EPILOGUE \
+ : /*out*/ "=d" (_res) \
+ : /*in*/ "a" (&_argvec[0]) __FRAME_POINTER \
+@@ -3668,11 +4992,11 @@ typedef
+ lval = (__typeof__(lval)) _res; \
+ } while (0)
+
+-#define CALL_FN_W_8W(lval, orig, arg1, arg2, arg3, arg4, arg5, \
+- arg6, arg7 ,arg8) \
++#define CALL_FN_W_10W(lval, orig, arg1, arg2, arg3, arg4, arg5, \
++ arg6, arg7 ,arg8, arg9, arg10) \
+ do { \
+ volatile OrigFn _orig = (orig); \
+- volatile unsigned long _argvec[9]; \
++ volatile unsigned long _argvec[11]; \
+ volatile unsigned long _res; \
+ _argvec[0] = (unsigned long)_orig.nraddr; \
+ _argvec[1] = (unsigned long)arg1; \
+@@ -3683,9 +5007,11 @@ typedef
+ _argvec[6] = (unsigned long)arg6; \
+ _argvec[7] = (unsigned long)arg7; \
+ _argvec[8] = (unsigned long)arg8; \
++ _argvec[9] = (unsigned long)arg9; \
++ _argvec[10] = (unsigned long)arg10; \
+ __asm__ volatile( \
+ VALGRIND_CFI_PROLOGUE \
+- "aghi 15,-184\n\t" \
++ "aghi 15,-200\n\t" \
+ "lg 2, 8(1)\n\t" \
+ "lg 3,16(1)\n\t" \
+ "lg 4,24(1)\n\t" \
+@@ -3694,10 +5020,12 @@ typedef
+ "mvc 160(8,15), 48(1)\n\t" \
+ "mvc 168(8,15), 56(1)\n\t" \
+ "mvc 176(8,15), 64(1)\n\t" \
++ "mvc 184(8,15), 72(1)\n\t" \
++ "mvc 192(8,15), 80(1)\n\t" \
+ "lg 1, 0(1)\n\t" \
+ VALGRIND_CALL_NOREDIR_R1 \
+ "lgr %0, 2\n\t" \
+- "aghi 15,184\n\t" \
++ "aghi 15,200\n\t" \
+ VALGRIND_CFI_EPILOGUE \
+ : /*out*/ "=d" (_res) \
+ : /*in*/ "a" (&_argvec[0]) __FRAME_POINTER \
+@@ -3706,11 +5034,11 @@ typedef
+ lval = (__typeof__(lval)) _res; \
+ } while (0)
+
+-#define CALL_FN_W_9W(lval, orig, arg1, arg2, arg3, arg4, arg5, \
+- arg6, arg7 ,arg8, arg9) \
++#define CALL_FN_W_11W(lval, orig, arg1, arg2, arg3, arg4, arg5, \
++ arg6, arg7 ,arg8, arg9, arg10, arg11) \
+ do { \
+ volatile OrigFn _orig = (orig); \
+- volatile unsigned long _argvec[10]; \
++ volatile unsigned long _argvec[12]; \
+ volatile unsigned long _res; \
+ _argvec[0] = (unsigned long)_orig.nraddr; \
+ _argvec[1] = (unsigned long)arg1; \
+@@ -3722,9 +5050,11 @@ typedef
+ _argvec[7] = (unsigned long)arg7; \
+ _argvec[8] = (unsigned long)arg8; \
+ _argvec[9] = (unsigned long)arg9; \
++ _argvec[10] = (unsigned long)arg10; \
++ _argvec[11] = (unsigned long)arg11; \
+ __asm__ volatile( \
+ VALGRIND_CFI_PROLOGUE \
+- "aghi 15,-192\n\t" \
++ "aghi 15,-208\n\t" \
+ "lg 2, 8(1)\n\t" \
+ "lg 3,16(1)\n\t" \
+ "lg 4,24(1)\n\t" \
+@@ -3734,10 +5064,12 @@ typedef
+ "mvc 168(8,15), 56(1)\n\t" \
+ "mvc 176(8,15), 64(1)\n\t" \
+ "mvc 184(8,15), 72(1)\n\t" \
++ "mvc 192(8,15), 80(1)\n\t" \
++ "mvc 200(8,15), 88(1)\n\t" \
+ "lg 1, 0(1)\n\t" \
+ VALGRIND_CALL_NOREDIR_R1 \
+ "lgr %0, 2\n\t" \
+- "aghi 15,192\n\t" \
++ "aghi 15,208\n\t" \
+ VALGRIND_CFI_EPILOGUE \
+ : /*out*/ "=d" (_res) \
+ : /*in*/ "a" (&_argvec[0]) __FRAME_POINTER \
+@@ -3746,11 +5078,11 @@ typedef
+ lval = (__typeof__(lval)) _res; \
+ } while (0)
+
+-#define CALL_FN_W_10W(lval, orig, arg1, arg2, arg3, arg4, arg5, \
+- arg6, arg7 ,arg8, arg9, arg10) \
++#define CALL_FN_W_12W(lval, orig, arg1, arg2, arg3, arg4, arg5, \
++ arg6, arg7 ,arg8, arg9, arg10, arg11, arg12)\
+ do { \
+ volatile OrigFn _orig = (orig); \
+- volatile unsigned long _argvec[11]; \
++ volatile unsigned long _argvec[13]; \
+ volatile unsigned long _res; \
+ _argvec[0] = (unsigned long)_orig.nraddr; \
+ _argvec[1] = (unsigned long)arg1; \
+@@ -3763,9 +5095,11 @@ typedef
+ _argvec[8] = (unsigned long)arg8; \
+ _argvec[9] = (unsigned long)arg9; \
+ _argvec[10] = (unsigned long)arg10; \
++ _argvec[11] = (unsigned long)arg11; \
++ _argvec[12] = (unsigned long)arg12; \
+ __asm__ volatile( \
+ VALGRIND_CFI_PROLOGUE \
+- "aghi 15,-200\n\t" \
++ "aghi 15,-216\n\t" \
+ "lg 2, 8(1)\n\t" \
+ "lg 3,16(1)\n\t" \
+ "lg 4,24(1)\n\t" \
+@@ -3776,10 +5110,12 @@ typedef
+ "mvc 176(8,15), 64(1)\n\t" \
+ "mvc 184(8,15), 72(1)\n\t" \
+ "mvc 192(8,15), 80(1)\n\t" \
++ "mvc 200(8,15), 88(1)\n\t" \
++ "mvc 208(8,15), 96(1)\n\t" \
+ "lg 1, 0(1)\n\t" \
+ VALGRIND_CALL_NOREDIR_R1 \
+ "lgr %0, 2\n\t" \
+- "aghi 15,200\n\t" \
++ "aghi 15,216\n\t" \
+ VALGRIND_CFI_EPILOGUE \
+ : /*out*/ "=d" (_res) \
+ : /*in*/ "a" (&_argvec[0]) __FRAME_POINTER \
+@@ -3788,102 +5124,551 @@ typedef
+ lval = (__typeof__(lval)) _res; \
+ } while (0)
+
+-#define CALL_FN_W_11W(lval, orig, arg1, arg2, arg3, arg4, arg5, \
+- arg6, arg7 ,arg8, arg9, arg10, arg11) \
+- do { \
+- volatile OrigFn _orig = (orig); \
+- volatile unsigned long _argvec[12]; \
+- volatile unsigned long _res; \
+- _argvec[0] = (unsigned long)_orig.nraddr; \
+- _argvec[1] = (unsigned long)arg1; \
+- _argvec[2] = (unsigned long)arg2; \
+- _argvec[3] = (unsigned long)arg3; \
+- _argvec[4] = (unsigned long)arg4; \
+- _argvec[5] = (unsigned long)arg5; \
+- _argvec[6] = (unsigned long)arg6; \
+- _argvec[7] = (unsigned long)arg7; \
+- _argvec[8] = (unsigned long)arg8; \
+- _argvec[9] = (unsigned long)arg9; \
+- _argvec[10] = (unsigned long)arg10; \
+- _argvec[11] = (unsigned long)arg11; \
+- __asm__ volatile( \
+- VALGRIND_CFI_PROLOGUE \
+- "aghi 15,-208\n\t" \
+- "lg 2, 8(1)\n\t" \
+- "lg 3,16(1)\n\t" \
+- "lg 4,24(1)\n\t" \
+- "lg 5,32(1)\n\t" \
+- "lg 6,40(1)\n\t" \
+- "mvc 160(8,15), 48(1)\n\t" \
+- "mvc 168(8,15), 56(1)\n\t" \
+- "mvc 176(8,15), 64(1)\n\t" \
+- "mvc 184(8,15), 72(1)\n\t" \
+- "mvc 192(8,15), 80(1)\n\t" \
+- "mvc 200(8,15), 88(1)\n\t" \
+- "lg 1, 0(1)\n\t" \
+- VALGRIND_CALL_NOREDIR_R1 \
+- "lgr %0, 2\n\t" \
+- "aghi 15,208\n\t" \
+- VALGRIND_CFI_EPILOGUE \
+- : /*out*/ "=d" (_res) \
+- : /*in*/ "a" (&_argvec[0]) __FRAME_POINTER \
+- : /*trash*/ "cc", "memory", __CALLER_SAVED_REGS,"6","7" \
+- ); \
+- lval = (__typeof__(lval)) _res; \
++
++#endif /* PLAT_s390x_linux */
++
++/* ------------------------- mips32-linux ----------------------- */
++
++#if defined(PLAT_mips32_linux)
++
++/* These regs are trashed by the hidden call. */
++#define __CALLER_SAVED_REGS "$2", "$3", "$4", "$5", "$6", \
++"$7", "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24", \
++"$25", "$31"
++
++/* These CALL_FN_ macros assume that on mips-linux, sizeof(unsigned
++ long) == 4. */
++
++#define CALL_FN_W_v(lval, orig) \
++ do { \
++ volatile OrigFn _orig = (orig); \
++ volatile unsigned long _argvec[1]; \
++ volatile unsigned long _res; \
++ _argvec[0] = (unsigned long)_orig.nraddr; \
++ __asm__ volatile( \
++ "subu $29, $29, 8 \n\t" \
++ "sw $28, 0($29) \n\t" \
++ "sw $31, 4($29) \n\t" \
++ "subu $29, $29, 16 \n\t" \
++ "lw $25, 0(%1) \n\t" /* target->t9 */ \
++ VALGRIND_CALL_NOREDIR_T9 \
++ "addu $29, $29, 16\n\t" \
++ "lw $28, 0($29) \n\t" \
++ "lw $31, 4($29) \n\t" \
++ "addu $29, $29, 8 \n\t" \
++ "move %0, $2\n" \
++ : /*out*/ "=r" (_res) \
++ : /*in*/ "0" (&_argvec[0]) \
++ : /*trash*/ "memory", __CALLER_SAVED_REGS \
++ ); \
++ lval = (__typeof__(lval)) _res; \
++ } while (0)
++
++#define CALL_FN_W_W(lval, orig, arg1) \
++ do { \
++ volatile OrigFn _orig = (orig); \
++ volatile unsigned long _argvec[2]; \
++ volatile unsigned long _res; \
++ _argvec[0] = (unsigned long)_orig.nraddr; \
++ _argvec[1] = (unsigned long)(arg1); \
++ __asm__ volatile( \
++ "subu $29, $29, 8 \n\t" \
++ "sw $28, 0($29) \n\t" \
++ "sw $31, 4($29) \n\t" \
++ "subu $29, $29, 16 \n\t" \
++ "lw $4, 4(%1) \n\t" /* arg1*/ \
++ "lw $25, 0(%1) \n\t" /* target->t9 */ \
++ VALGRIND_CALL_NOREDIR_T9 \
++ "addu $29, $29, 16 \n\t" \
++ "lw $28, 0($29) \n\t" \
++ "lw $31, 4($29) \n\t" \
++ "addu $29, $29, 8 \n\t" \
++ "move %0, $2\n" \
++ : /*out*/ "=r" (_res) \
++ : /*in*/ "0" (&_argvec[0]) \
++ : /*trash*/ "memory", __CALLER_SAVED_REGS \
++ ); \
++ lval = (__typeof__(lval)) _res; \
++ } while (0)
++
++#define CALL_FN_W_WW(lval, orig, arg1,arg2) \
++ do { \
++ volatile OrigFn _orig = (orig); \
++ volatile unsigned long _argvec[3]; \
++ volatile unsigned long _res; \
++ _argvec[0] = (unsigned long)_orig.nraddr; \
++ _argvec[1] = (unsigned long)(arg1); \
++ _argvec[2] = (unsigned long)(arg2); \
++ __asm__ volatile( \
++ "subu $29, $29, 8 \n\t" \
++ "sw $28, 0($29) \n\t" \
++ "sw $31, 4($29) \n\t" \
++ "subu $29, $29, 16 \n\t" \
++ "lw $4, 4(%1) \n\t" \
++ "lw $5, 8(%1) \n\t" \
++ "lw $25, 0(%1) \n\t" /* target->t9 */ \
++ VALGRIND_CALL_NOREDIR_T9 \
++ "addu $29, $29, 16 \n\t" \
++ "lw $28, 0($29) \n\t" \
++ "lw $31, 4($29) \n\t" \
++ "addu $29, $29, 8 \n\t" \
++ "move %0, $2\n" \
++ : /*out*/ "=r" (_res) \
++ : /*in*/ "0" (&_argvec[0]) \
++ : /*trash*/ "memory", __CALLER_SAVED_REGS \
++ ); \
++ lval = (__typeof__(lval)) _res; \
++ } while (0)
++
++#define CALL_FN_W_WWW(lval, orig, arg1,arg2,arg3) \
++ do { \
++ volatile OrigFn _orig = (orig); \
++ volatile unsigned long _argvec[4]; \
++ volatile unsigned long _res; \
++ _argvec[0] = (unsigned long)_orig.nraddr; \
++ _argvec[1] = (unsigned long)(arg1); \
++ _argvec[2] = (unsigned long)(arg2); \
++ _argvec[3] = (unsigned long)(arg3); \
++ __asm__ volatile( \
++ "subu $29, $29, 8 \n\t" \
++ "sw $28, 0($29) \n\t" \
++ "sw $31, 4($29) \n\t" \
++ "subu $29, $29, 16 \n\t" \
++ "lw $4, 4(%1) \n\t" \
++ "lw $5, 8(%1) \n\t" \
++ "lw $6, 12(%1) \n\t" \
++ "lw $25, 0(%1) \n\t" /* target->t9 */ \
++ VALGRIND_CALL_NOREDIR_T9 \
++ "addu $29, $29, 16 \n\t" \
++ "lw $28, 0($29) \n\t" \
++ "lw $31, 4($29) \n\t" \
++ "addu $29, $29, 8 \n\t" \
++ "move %0, $2\n" \
++ : /*out*/ "=r" (_res) \
++ : /*in*/ "0" (&_argvec[0]) \
++ : /*trash*/ "memory", __CALLER_SAVED_REGS \
++ ); \
++ lval = (__typeof__(lval)) _res; \
++ } while (0)
++
++#define CALL_FN_W_WWWW(lval, orig, arg1,arg2,arg3,arg4) \
++ do { \
++ volatile OrigFn _orig = (orig); \
++ volatile unsigned long _argvec[5]; \
++ volatile unsigned long _res; \
++ _argvec[0] = (unsigned long)_orig.nraddr; \
++ _argvec[1] = (unsigned long)(arg1); \
++ _argvec[2] = (unsigned long)(arg2); \
++ _argvec[3] = (unsigned long)(arg3); \
++ _argvec[4] = (unsigned long)(arg4); \
++ __asm__ volatile( \
++ "subu $29, $29, 8 \n\t" \
++ "sw $28, 0($29) \n\t" \
++ "sw $31, 4($29) \n\t" \
++ "subu $29, $29, 16 \n\t" \
++ "lw $4, 4(%1) \n\t" \
++ "lw $5, 8(%1) \n\t" \
++ "lw $6, 12(%1) \n\t" \
++ "lw $7, 16(%1) \n\t" \
++ "lw $25, 0(%1) \n\t" /* target->t9 */ \
++ VALGRIND_CALL_NOREDIR_T9 \
++ "addu $29, $29, 16 \n\t" \
++ "lw $28, 0($29) \n\t" \
++ "lw $31, 4($29) \n\t" \
++ "addu $29, $29, 8 \n\t" \
++ "move %0, $2\n" \
++ : /*out*/ "=r" (_res) \
++ : /*in*/ "0" (&_argvec[0]) \
++ : /*trash*/ "memory", __CALLER_SAVED_REGS \
++ ); \
++ lval = (__typeof__(lval)) _res; \
++ } while (0)
++
++#define CALL_FN_W_5W(lval, orig, arg1,arg2,arg3,arg4,arg5) \
++ do { \
++ volatile OrigFn _orig = (orig); \
++ volatile unsigned long _argvec[6]; \
++ volatile unsigned long _res; \
++ _argvec[0] = (unsigned long)_orig.nraddr; \
++ _argvec[1] = (unsigned long)(arg1); \
++ _argvec[2] = (unsigned long)(arg2); \
++ _argvec[3] = (unsigned long)(arg3); \
++ _argvec[4] = (unsigned long)(arg4); \
++ _argvec[5] = (unsigned long)(arg5); \
++ __asm__ volatile( \
++ "subu $29, $29, 8 \n\t" \
++ "sw $28, 0($29) \n\t" \
++ "sw $31, 4($29) \n\t" \
++ "lw $4, 20(%1) \n\t" \
++ "subu $29, $29, 24\n\t" \
++ "sw $4, 16($29) \n\t" \
++ "lw $4, 4(%1) \n\t" \
++ "lw $5, 8(%1) \n\t" \
++ "lw $6, 12(%1) \n\t" \
++ "lw $7, 16(%1) \n\t" \
++ "lw $25, 0(%1) \n\t" /* target->t9 */ \
++ VALGRIND_CALL_NOREDIR_T9 \
++ "addu $29, $29, 24 \n\t" \
++ "lw $28, 0($29) \n\t" \
++ "lw $31, 4($29) \n\t" \
++ "addu $29, $29, 8 \n\t" \
++ "move %0, $2\n" \
++ : /*out*/ "=r" (_res) \
++ : /*in*/ "0" (&_argvec[0]) \
++ : /*trash*/ "memory", __CALLER_SAVED_REGS \
++ ); \
++ lval = (__typeof__(lval)) _res; \
++ } while (0)
++#define CALL_FN_W_6W(lval, orig, arg1,arg2,arg3,arg4,arg5,arg6) \
++ do { \
++ volatile OrigFn _orig = (orig); \
++ volatile unsigned long _argvec[7]; \
++ volatile unsigned long _res; \
++ _argvec[0] = (unsigned long)_orig.nraddr; \
++ _argvec[1] = (unsigned long)(arg1); \
++ _argvec[2] = (unsigned long)(arg2); \
++ _argvec[3] = (unsigned long)(arg3); \
++ _argvec[4] = (unsigned long)(arg4); \
++ _argvec[5] = (unsigned long)(arg5); \
++ _argvec[6] = (unsigned long)(arg6); \
++ __asm__ volatile( \
++ "subu $29, $29, 8 \n\t" \
++ "sw $28, 0($29) \n\t" \
++ "sw $31, 4($29) \n\t" \
++ "lw $4, 20(%1) \n\t" \
++ "subu $29, $29, 32\n\t" \
++ "sw $4, 16($29) \n\t" \
++ "lw $4, 24(%1) \n\t" \
++ "nop\n\t" \
++ "sw $4, 20($29) \n\t" \
++ "lw $4, 4(%1) \n\t" \
++ "lw $5, 8(%1) \n\t" \
++ "lw $6, 12(%1) \n\t" \
++ "lw $7, 16(%1) \n\t" \
++ "lw $25, 0(%1) \n\t" /* target->t9 */ \
++ VALGRIND_CALL_NOREDIR_T9 \
++ "addu $29, $29, 32 \n\t" \
++ "lw $28, 0($29) \n\t" \
++ "lw $31, 4($29) \n\t" \
++ "addu $29, $29, 8 \n\t" \
++ "move %0, $2\n" \
++ : /*out*/ "=r" (_res) \
++ : /*in*/ "0" (&_argvec[0]) \
++ : /*trash*/ "memory", __CALLER_SAVED_REGS \
++ ); \
++ lval = (__typeof__(lval)) _res; \
++ } while (0)
++
++#define CALL_FN_W_7W(lval, orig, arg1,arg2,arg3,arg4,arg5,arg6, \
++ arg7) \
++ do { \
++ volatile OrigFn _orig = (orig); \
++ volatile unsigned long _argvec[8]; \
++ volatile unsigned long _res; \
++ _argvec[0] = (unsigned long)_orig.nraddr; \
++ _argvec[1] = (unsigned long)(arg1); \
++ _argvec[2] = (unsigned long)(arg2); \
++ _argvec[3] = (unsigned long)(arg3); \
++ _argvec[4] = (unsigned long)(arg4); \
++ _argvec[5] = (unsigned long)(arg5); \
++ _argvec[6] = (unsigned long)(arg6); \
++ _argvec[7] = (unsigned long)(arg7); \
++ __asm__ volatile( \
++ "subu $29, $29, 8 \n\t" \
++ "sw $28, 0($29) \n\t" \
++ "sw $31, 4($29) \n\t" \
++ "lw $4, 20(%1) \n\t" \
++ "subu $29, $29, 32\n\t" \
++ "sw $4, 16($29) \n\t" \
++ "lw $4, 24(%1) \n\t" \
++ "sw $4, 20($29) \n\t" \
++ "lw $4, 28(%1) \n\t" \
++ "sw $4, 24($29) \n\t" \
++ "lw $4, 4(%1) \n\t" \
++ "lw $5, 8(%1) \n\t" \
++ "lw $6, 12(%1) \n\t" \
++ "lw $7, 16(%1) \n\t" \
++ "lw $25, 0(%1) \n\t" /* target->t9 */ \
++ VALGRIND_CALL_NOREDIR_T9 \
++ "addu $29, $29, 32 \n\t" \
++ "lw $28, 0($29) \n\t" \
++ "lw $31, 4($29) \n\t" \
++ "addu $29, $29, 8 \n\t" \
++ "move %0, $2\n" \
++ : /*out*/ "=r" (_res) \
++ : /*in*/ "0" (&_argvec[0]) \
++ : /*trash*/ "memory", __CALLER_SAVED_REGS \
++ ); \
++ lval = (__typeof__(lval)) _res; \
++ } while (0)
++
++#define CALL_FN_W_8W(lval, orig, arg1,arg2,arg3,arg4,arg5,arg6, \
++ arg7,arg8) \
++ do { \
++ volatile OrigFn _orig = (orig); \
++ volatile unsigned long _argvec[9]; \
++ volatile unsigned long _res; \
++ _argvec[0] = (unsigned long)_orig.nraddr; \
++ _argvec[1] = (unsigned long)(arg1); \
++ _argvec[2] = (unsigned long)(arg2); \
++ _argvec[3] = (unsigned long)(arg3); \
++ _argvec[4] = (unsigned long)(arg4); \
++ _argvec[5] = (unsigned long)(arg5); \
++ _argvec[6] = (unsigned long)(arg6); \
++ _argvec[7] = (unsigned long)(arg7); \
++ _argvec[8] = (unsigned long)(arg8); \
++ __asm__ volatile( \
++ "subu $29, $29, 8 \n\t" \
++ "sw $28, 0($29) \n\t" \
++ "sw $31, 4($29) \n\t" \
++ "lw $4, 20(%1) \n\t" \
++ "subu $29, $29, 40\n\t" \
++ "sw $4, 16($29) \n\t" \
++ "lw $4, 24(%1) \n\t" \
++ "sw $4, 20($29) \n\t" \
++ "lw $4, 28(%1) \n\t" \
++ "sw $4, 24($29) \n\t" \
++ "lw $4, 32(%1) \n\t" \
++ "sw $4, 28($29) \n\t" \
++ "lw $4, 4(%1) \n\t" \
++ "lw $5, 8(%1) \n\t" \
++ "lw $6, 12(%1) \n\t" \
++ "lw $7, 16(%1) \n\t" \
++ "lw $25, 0(%1) \n\t" /* target->t9 */ \
++ VALGRIND_CALL_NOREDIR_T9 \
++ "addu $29, $29, 40 \n\t" \
++ "lw $28, 0($29) \n\t" \
++ "lw $31, 4($29) \n\t" \
++ "addu $29, $29, 8 \n\t" \
++ "move %0, $2\n" \
++ : /*out*/ "=r" (_res) \
++ : /*in*/ "0" (&_argvec[0]) \
++ : /*trash*/ "memory", __CALLER_SAVED_REGS \
++ ); \
++ lval = (__typeof__(lval)) _res; \
++ } while (0)
++
++#define CALL_FN_W_9W(lval, orig, arg1,arg2,arg3,arg4,arg5,arg6, \
++ arg7,arg8,arg9) \
++ do { \
++ volatile OrigFn _orig = (orig); \
++ volatile unsigned long _argvec[10]; \
++ volatile unsigned long _res; \
++ _argvec[0] = (unsigned long)_orig.nraddr; \
++ _argvec[1] = (unsigned long)(arg1); \
++ _argvec[2] = (unsigned long)(arg2); \
++ _argvec[3] = (unsigned long)(arg3); \
++ _argvec[4] = (unsigned long)(arg4); \
++ _argvec[5] = (unsigned long)(arg5); \
++ _argvec[6] = (unsigned long)(arg6); \
++ _argvec[7] = (unsigned long)(arg7); \
++ _argvec[8] = (unsigned long)(arg8); \
++ _argvec[9] = (unsigned long)(arg9); \
++ __asm__ volatile( \
++ "subu $29, $29, 8 \n\t" \
++ "sw $28, 0($29) \n\t" \
++ "sw $31, 4($29) \n\t" \
++ "lw $4, 20(%1) \n\t" \
++ "subu $29, $29, 40\n\t" \
++ "sw $4, 16($29) \n\t" \
++ "lw $4, 24(%1) \n\t" \
++ "sw $4, 20($29) \n\t" \
++ "lw $4, 28(%1) \n\t" \
++ "sw $4, 24($29) \n\t" \
++ "lw $4, 32(%1) \n\t" \
++ "sw $4, 28($29) \n\t" \
++ "lw $4, 36(%1) \n\t" \
++ "sw $4, 32($29) \n\t" \
++ "lw $4, 4(%1) \n\t" \
++ "lw $5, 8(%1) \n\t" \
++ "lw $6, 12(%1) \n\t" \
++ "lw $7, 16(%1) \n\t" \
++ "lw $25, 0(%1) \n\t" /* target->t9 */ \
++ VALGRIND_CALL_NOREDIR_T9 \
++ "addu $29, $29, 40 \n\t" \
++ "lw $28, 0($29) \n\t" \
++ "lw $31, 4($29) \n\t" \
++ "addu $29, $29, 8 \n\t" \
++ "move %0, $2\n" \
++ : /*out*/ "=r" (_res) \
++ : /*in*/ "0" (&_argvec[0]) \
++ : /*trash*/ "memory", __CALLER_SAVED_REGS \
++ ); \
++ lval = (__typeof__(lval)) _res; \
++ } while (0)
++
++#define CALL_FN_W_10W(lval, orig, arg1,arg2,arg3,arg4,arg5,arg6, \
++ arg7,arg8,arg9,arg10) \
++ do { \
++ volatile OrigFn _orig = (orig); \
++ volatile unsigned long _argvec[11]; \
++ volatile unsigned long _res; \
++ _argvec[0] = (unsigned long)_orig.nraddr; \
++ _argvec[1] = (unsigned long)(arg1); \
++ _argvec[2] = (unsigned long)(arg2); \
++ _argvec[3] = (unsigned long)(arg3); \
++ _argvec[4] = (unsigned long)(arg4); \
++ _argvec[5] = (unsigned long)(arg5); \
++ _argvec[6] = (unsigned long)(arg6); \
++ _argvec[7] = (unsigned long)(arg7); \
++ _argvec[8] = (unsigned long)(arg8); \
++ _argvec[9] = (unsigned long)(arg9); \
++ _argvec[10] = (unsigned long)(arg10); \
++ __asm__ volatile( \
++ "subu $29, $29, 8 \n\t" \
++ "sw $28, 0($29) \n\t" \
++ "sw $31, 4($29) \n\t" \
++ "lw $4, 20(%1) \n\t" \
++ "subu $29, $29, 48\n\t" \
++ "sw $4, 16($29) \n\t" \
++ "lw $4, 24(%1) \n\t" \
++ "sw $4, 20($29) \n\t" \
++ "lw $4, 28(%1) \n\t" \
++ "sw $4, 24($29) \n\t" \
++ "lw $4, 32(%1) \n\t" \
++ "sw $4, 28($29) \n\t" \
++ "lw $4, 36(%1) \n\t" \
++ "sw $4, 32($29) \n\t" \
++ "lw $4, 40(%1) \n\t" \
++ "sw $4, 36($29) \n\t" \
++ "lw $4, 4(%1) \n\t" \
++ "lw $5, 8(%1) \n\t" \
++ "lw $6, 12(%1) \n\t" \
++ "lw $7, 16(%1) \n\t" \
++ "lw $25, 0(%1) \n\t" /* target->t9 */ \
++ VALGRIND_CALL_NOREDIR_T9 \
++ "addu $29, $29, 48 \n\t" \
++ "lw $28, 0($29) \n\t" \
++ "lw $31, 4($29) \n\t" \
++ "addu $29, $29, 8 \n\t" \
++ "move %0, $2\n" \
++ : /*out*/ "=r" (_res) \
++ : /*in*/ "0" (&_argvec[0]) \
++ : /*trash*/ "memory", __CALLER_SAVED_REGS \
++ ); \
++ lval = (__typeof__(lval)) _res; \
+ } while (0)
+
+-#define CALL_FN_W_12W(lval, orig, arg1, arg2, arg3, arg4, arg5, \
+- arg6, arg7 ,arg8, arg9, arg10, arg11, arg12)\
+- do { \
+- volatile OrigFn _orig = (orig); \
+- volatile unsigned long _argvec[13]; \
+- volatile unsigned long _res; \
+- _argvec[0] = (unsigned long)_orig.nraddr; \
+- _argvec[1] = (unsigned long)arg1; \
+- _argvec[2] = (unsigned long)arg2; \
+- _argvec[3] = (unsigned long)arg3; \
+- _argvec[4] = (unsigned long)arg4; \
+- _argvec[5] = (unsigned long)arg5; \
+- _argvec[6] = (unsigned long)arg6; \
+- _argvec[7] = (unsigned long)arg7; \
+- _argvec[8] = (unsigned long)arg8; \
+- _argvec[9] = (unsigned long)arg9; \
+- _argvec[10] = (unsigned long)arg10; \
+- _argvec[11] = (unsigned long)arg11; \
+- _argvec[12] = (unsigned long)arg12; \
+- __asm__ volatile( \
+- VALGRIND_CFI_PROLOGUE \
+- "aghi 15,-216\n\t" \
+- "lg 2, 8(1)\n\t" \
+- "lg 3,16(1)\n\t" \
+- "lg 4,24(1)\n\t" \
+- "lg 5,32(1)\n\t" \
+- "lg 6,40(1)\n\t" \
+- "mvc 160(8,15), 48(1)\n\t" \
+- "mvc 168(8,15), 56(1)\n\t" \
+- "mvc 176(8,15), 64(1)\n\t" \
+- "mvc 184(8,15), 72(1)\n\t" \
+- "mvc 192(8,15), 80(1)\n\t" \
+- "mvc 200(8,15), 88(1)\n\t" \
+- "mvc 208(8,15), 96(1)\n\t" \
+- "lg 1, 0(1)\n\t" \
+- VALGRIND_CALL_NOREDIR_R1 \
+- "lgr %0, 2\n\t" \
+- "aghi 15,216\n\t" \
+- VALGRIND_CFI_EPILOGUE \
+- : /*out*/ "=d" (_res) \
+- : /*in*/ "a" (&_argvec[0]) __FRAME_POINTER \
+- : /*trash*/ "cc", "memory", __CALLER_SAVED_REGS,"6","7" \
+- ); \
+- lval = (__typeof__(lval)) _res; \
++#define CALL_FN_W_11W(lval, orig, arg1,arg2,arg3,arg4,arg5, \
++ arg6,arg7,arg8,arg9,arg10, \
++ arg11) \
++ do { \
++ volatile OrigFn _orig = (orig); \
++ volatile unsigned long _argvec[12]; \
++ volatile unsigned long _res; \
++ _argvec[0] = (unsigned long)_orig.nraddr; \
++ _argvec[1] = (unsigned long)(arg1); \
++ _argvec[2] = (unsigned long)(arg2); \
++ _argvec[3] = (unsigned long)(arg3); \
++ _argvec[4] = (unsigned long)(arg4); \
++ _argvec[5] = (unsigned long)(arg5); \
++ _argvec[6] = (unsigned long)(arg6); \
++ _argvec[7] = (unsigned long)(arg7); \
++ _argvec[8] = (unsigned long)(arg8); \
++ _argvec[9] = (unsigned long)(arg9); \
++ _argvec[10] = (unsigned long)(arg10); \
++ _argvec[11] = (unsigned long)(arg11); \
++ __asm__ volatile( \
++ "subu $29, $29, 8 \n\t" \
++ "sw $28, 0($29) \n\t" \
++ "sw $31, 4($29) \n\t" \
++ "lw $4, 20(%1) \n\t" \
++ "subu $29, $29, 48\n\t" \
++ "sw $4, 16($29) \n\t" \
++ "lw $4, 24(%1) \n\t" \
++ "sw $4, 20($29) \n\t" \
++ "lw $4, 28(%1) \n\t" \
++ "sw $4, 24($29) \n\t" \
++ "lw $4, 32(%1) \n\t" \
++ "sw $4, 28($29) \n\t" \
++ "lw $4, 36(%1) \n\t" \
++ "sw $4, 32($29) \n\t" \
++ "lw $4, 40(%1) \n\t" \
++ "sw $4, 36($29) \n\t" \
++ "lw $4, 44(%1) \n\t" \
++ "sw $4, 40($29) \n\t" \
++ "lw $4, 4(%1) \n\t" \
++ "lw $5, 8(%1) \n\t" \
++ "lw $6, 12(%1) \n\t" \
++ "lw $7, 16(%1) \n\t" \
++ "lw $25, 0(%1) \n\t" /* target->t9 */ \
++ VALGRIND_CALL_NOREDIR_T9 \
++ "addu $29, $29, 48 \n\t" \
++ "lw $28, 0($29) \n\t" \
++ "lw $31, 4($29) \n\t" \
++ "addu $29, $29, 8 \n\t" \
++ "move %0, $2\n" \
++ : /*out*/ "=r" (_res) \
++ : /*in*/ "0" (&_argvec[0]) \
++ : /*trash*/ "memory", __CALLER_SAVED_REGS \
++ ); \
++ lval = (__typeof__(lval)) _res; \
+ } while (0)
+
++#define CALL_FN_W_12W(lval, orig, arg1,arg2,arg3,arg4,arg5, \
++ arg6,arg7,arg8,arg9,arg10, \
++ arg11,arg12) \
++ do { \
++ volatile OrigFn _orig = (orig); \
++ volatile unsigned long _argvec[13]; \
++ volatile unsigned long _res; \
++ _argvec[0] = (unsigned long)_orig.nraddr; \
++ _argvec[1] = (unsigned long)(arg1); \
++ _argvec[2] = (unsigned long)(arg2); \
++ _argvec[3] = (unsigned long)(arg3); \
++ _argvec[4] = (unsigned long)(arg4); \
++ _argvec[5] = (unsigned long)(arg5); \
++ _argvec[6] = (unsigned long)(arg6); \
++ _argvec[7] = (unsigned long)(arg7); \
++ _argvec[8] = (unsigned long)(arg8); \
++ _argvec[9] = (unsigned long)(arg9); \
++ _argvec[10] = (unsigned long)(arg10); \
++ _argvec[11] = (unsigned long)(arg11); \
++ _argvec[12] = (unsigned long)(arg12); \
++ __asm__ volatile( \
++ "subu $29, $29, 8 \n\t" \
++ "sw $28, 0($29) \n\t" \
++ "sw $31, 4($29) \n\t" \
++ "lw $4, 20(%1) \n\t" \
++ "subu $29, $29, 56\n\t" \
++ "sw $4, 16($29) \n\t" \
++ "lw $4, 24(%1) \n\t" \
++ "sw $4, 20($29) \n\t" \
++ "lw $4, 28(%1) \n\t" \
++ "sw $4, 24($29) \n\t" \
++ "lw $4, 32(%1) \n\t" \
++ "sw $4, 28($29) \n\t" \
++ "lw $4, 36(%1) \n\t" \
++ "sw $4, 32($29) \n\t" \
++ "lw $4, 40(%1) \n\t" \
++ "sw $4, 36($29) \n\t" \
++ "lw $4, 44(%1) \n\t" \
++ "sw $4, 40($29) \n\t" \
++ "lw $4, 48(%1) \n\t" \
++ "sw $4, 44($29) \n\t" \
++ "lw $4, 4(%1) \n\t" \
++ "lw $5, 8(%1) \n\t" \
++ "lw $6, 12(%1) \n\t" \
++ "lw $7, 16(%1) \n\t" \
++ "lw $25, 0(%1) \n\t" /* target->t9 */ \
++ VALGRIND_CALL_NOREDIR_T9 \
++ "addu $29, $29, 56 \n\t" \
++ "lw $28, 0($29) \n\t" \
++ "lw $31, 4($29) \n\t" \
++ "addu $29, $29, 8 \n\t" \
++ "move %0, $2\n" \
++ : /*out*/ "=r" (_res) \
++ : /*in*/ "r" (&_argvec[0]) \
++ : /*trash*/ "memory", __CALLER_SAVED_REGS \
++ ); \
++ lval = (__typeof__(lval)) _res; \
++ } while (0)
+
+-#endif /* PLAT_s390x_linux */
++#endif /* PLAT_mips32_linux */
+
+-/* ------------------------- mips-linux ------------------------- */
+-
+-#if defined(PLAT_mips32_linux)
++/* ------------------------- mips64-linux ------------------------- */
++
++#if defined(PLAT_mips64_linux)
+
+ /* These regs are trashed by the hidden call. */
+ #define __CALLER_SAVED_REGS "$2", "$3", "$4", "$5", "$6", \
+@@ -3900,20 +5685,12 @@ typedef
+ volatile unsigned long _res; \
+ _argvec[0] = (unsigned long)_orig.nraddr; \
+ __asm__ volatile( \
+- "subu $29, $29, 8 \n\t" \
+- "sw $gp, 0($sp) \n\t" \
+- "sw $ra, 4($sp) \n\t" \
+- "subu $29, $29, 16 \n\t" \
+- "lw $t9, 0(%1) \n\t" /* target->t9 */ \
++ "ld $25, 0(%1)\n\t" /* target->t9 */ \
+ VALGRIND_CALL_NOREDIR_T9 \
+- "addu $29, $29, 16\n\t" \
+- "lw $gp, 0($sp) \n\t" \
+- "lw $ra, 4($sp) \n\t" \
+- "addu $29, $29, 8 \n\t" \
+- "move %0, $v0\n" \
++ "move %0, $2\n" \
+ : /*out*/ "=r" (_res) \
+ : /*in*/ "0" (&_argvec[0]) \
+- : /*trash*/ "cc", "memory", __CALLER_SAVED_REGS \
++ : /*trash*/ "memory", __CALLER_SAVED_REGS \
+ ); \
+ lval = (__typeof__(lval)) _res; \
+ } while (0)
+@@ -3921,26 +5698,18 @@ typedef
+ #define CALL_FN_W_W(lval, orig, arg1) \
+ do { \
+ volatile OrigFn _orig = (orig); \
+- volatile unsigned long _argvec[2]; \
++ volatile unsigned long _argvec[2]; \
+ volatile unsigned long _res; \
+ _argvec[0] = (unsigned long)_orig.nraddr; \
+ _argvec[1] = (unsigned long)(arg1); \
+ __asm__ volatile( \
+- "subu $29, $29, 8 \n\t" \
+- "sw $gp, 0($sp) \n\t" \
+- "sw $ra, 4($sp) \n\t" \
+- "subu $29, $29, 16 \n\t" \
+- "lw $a0, 4(%1) \n\t" /* arg1*/ \
+- "lw $t9, 0(%1) \n\t" /* target->t9 */ \
++ "ld $4, 8(%1)\n\t" /* arg1*/ \
++ "ld $25, 0(%1)\n\t" /* target->t9 */ \
+ VALGRIND_CALL_NOREDIR_T9 \
+- "addu $29, $29, 16 \n\t" \
+- "lw $gp, 0($sp) \n\t" \
+- "lw $ra, 4($sp) \n\t" \
+- "addu $29, $29, 8 \n\t" \
+- "move %0, $v0\n" \
++ "move %0, $2\n" \
+ : /*out*/ "=r" (_res) \
+- : /*in*/ "0" (&_argvec[0]) \
+- : /*trash*/ "cc", "memory", __CALLER_SAVED_REGS \
++ : /*in*/ "r" (&_argvec[0]) \
++ : /*trash*/ "memory", __CALLER_SAVED_REGS \
+ ); \
+ lval = (__typeof__(lval)) _res; \
+ } while (0)
+@@ -3954,22 +5723,14 @@ typedef
+ _argvec[1] = (unsigned long)(arg1); \
+ _argvec[2] = (unsigned long)(arg2); \
+ __asm__ volatile( \
+- "subu $29, $29, 8 \n\t" \
+- "sw $gp, 0($sp) \n\t" \
+- "sw $ra, 4($sp) \n\t" \
+- "subu $29, $29, 16 \n\t" \
+- "lw $a0, 4(%1) \n\t" \
+- "lw $a1, 8(%1) \n\t" \
+- "lw $t9, 0(%1) \n\t" /* target->t9 */ \
++ "ld $4, 8(%1)\n\t" \
++ "ld $5, 16(%1)\n\t" \
++ "ld $25, 0(%1)\n\t" /* target->t9 */ \
+ VALGRIND_CALL_NOREDIR_T9 \
+- "addu $29, $29, 16 \n\t" \
+- "lw $gp, 0($sp) \n\t" \
+- "lw $ra, 4($sp) \n\t" \
+- "addu $29, $29, 8 \n\t" \
+- "move %0, $v0\n" \
++ "move %0, $2\n" \
+ : /*out*/ "=r" (_res) \
+- : /*in*/ "0" (&_argvec[0]) \
+- : /*trash*/ "cc", "memory", __CALLER_SAVED_REGS \
++ : /*in*/ "r" (&_argvec[0]) \
++ : /*trash*/ "memory", __CALLER_SAVED_REGS \
+ ); \
+ lval = (__typeof__(lval)) _res; \
+ } while (0)
+@@ -3984,23 +5745,15 @@ typedef
+ _argvec[2] = (unsigned long)(arg2); \
+ _argvec[3] = (unsigned long)(arg3); \
+ __asm__ volatile( \
+- "subu $29, $29, 8 \n\t" \
+- "sw $gp, 0($sp) \n\t" \
+- "sw $ra, 4($sp) \n\t" \
+- "subu $29, $29, 16 \n\t" \
+- "lw $a0, 4(%1) \n\t" \
+- "lw $a1, 8(%1) \n\t" \
+- "lw $a2, 12(%1) \n\t" \
+- "lw $t9, 0(%1) \n\t" /* target->t9 */ \
++ "ld $4, 8(%1)\n\t" \
++ "ld $5, 16(%1)\n\t" \
++ "ld $6, 24(%1)\n\t" \
++ "ld $25, 0(%1)\n\t" /* target->t9 */ \
+ VALGRIND_CALL_NOREDIR_T9 \
+- "addu $29, $29, 16 \n\t" \
+- "lw $gp, 0($sp) \n\t" \
+- "lw $ra, 4($sp) \n\t" \
+- "addu $29, $29, 8 \n\t" \
+- "move %0, $v0\n" \
++ "move %0, $2\n" \
+ : /*out*/ "=r" (_res) \
+- : /*in*/ "0" (&_argvec[0]) \
+- : /*trash*/ "cc", "memory", __CALLER_SAVED_REGS \
++ : /*in*/ "r" (&_argvec[0]) \
++ : /*trash*/ "memory", __CALLER_SAVED_REGS \
+ ); \
+ lval = (__typeof__(lval)) _res; \
+ } while (0)
+@@ -4016,24 +5769,16 @@ typedef
+ _argvec[3] = (unsigned long)(arg3); \
+ _argvec[4] = (unsigned long)(arg4); \
+ __asm__ volatile( \
+- "subu $29, $29, 8 \n\t" \
+- "sw $gp, 0($sp) \n\t" \
+- "sw $ra, 4($sp) \n\t" \
+- "subu $29, $29, 16 \n\t" \
+- "lw $a0, 4(%1) \n\t" \
+- "lw $a1, 8(%1) \n\t" \
+- "lw $a2, 12(%1) \n\t" \
+- "lw $a3, 16(%1) \n\t" \
+- "lw $t9, 0(%1) \n\t" /* target->t9 */ \
++ "ld $4, 8(%1)\n\t" \
++ "ld $5, 16(%1)\n\t" \
++ "ld $6, 24(%1)\n\t" \
++ "ld $7, 32(%1)\n\t" \
++ "ld $25, 0(%1)\n\t" /* target->t9 */ \
+ VALGRIND_CALL_NOREDIR_T9 \
+- "addu $29, $29, 16 \n\t" \
+- "lw $gp, 0($sp) \n\t" \
+- "lw $ra, 4($sp) \n\t" \
+- "addu $29, $29, 8 \n\t" \
+- "move %0, $v0\n" \
++ "move %0, $2\n" \
+ : /*out*/ "=r" (_res) \
+- : /*in*/ "0" (&_argvec[0]) \
+- : /*trash*/ "cc", "memory", __CALLER_SAVED_REGS \
++ : /*in*/ "r" (&_argvec[0]) \
++ : /*trash*/ "memory", __CALLER_SAVED_REGS \
+ ); \
+ lval = (__typeof__(lval)) _res; \
+ } while (0)
+@@ -4050,29 +5795,21 @@ typedef
+ _argvec[4] = (unsigned long)(arg4); \
+ _argvec[5] = (unsigned long)(arg5); \
+ __asm__ volatile( \
+- "subu $29, $29, 8 \n\t" \
+- "sw $gp, 0($sp) \n\t" \
+- "sw $ra, 4($sp) \n\t" \
+- "lw $a0, 20(%1) \n\t" \
+- "subu $sp, $sp, 24\n\t" \
+- "sw $a0, 16($sp) \n\t" \
+- "lw $a0, 4(%1) \n\t" \
+- "lw $a1, 8(%1) \n\t" \
+- "lw $a2, 12(%1) \n\t" \
+- "lw $a3, 16(%1) \n\t" \
+- "lw $t9, 0(%1) \n\t" /* target->t9 */ \
++ "ld $4, 8(%1)\n\t" \
++ "ld $5, 16(%1)\n\t" \
++ "ld $6, 24(%1)\n\t" \
++ "ld $7, 32(%1)\n\t" \
++ "ld $8, 40(%1)\n\t" \
++ "ld $25, 0(%1)\n\t" /* target->t9 */ \
+ VALGRIND_CALL_NOREDIR_T9 \
+- "addu $29, $29, 24 \n\t" \
+- "lw $gp, 0($sp) \n\t" \
+- "lw $ra, 4($sp) \n\t" \
+- "addu $sp, $sp, 8 \n\t" \
+- "move %0, $v0\n" \
++ "move %0, $2\n" \
+ : /*out*/ "=r" (_res) \
+- : /*in*/ "0" (&_argvec[0]) \
+- : /*trash*/ "cc", "memory", __CALLER_SAVED_REGS \
++ : /*in*/ "r" (&_argvec[0]) \
++ : /*trash*/ "memory", __CALLER_SAVED_REGS \
+ ); \
+ lval = (__typeof__(lval)) _res; \
+ } while (0)
++
+ #define CALL_FN_W_6W(lval, orig, arg1,arg2,arg3,arg4,arg5,arg6) \
+ do { \
+ volatile OrigFn _orig = (orig); \
+@@ -4086,29 +5823,18 @@ typedef
+ _argvec[5] = (unsigned long)(arg5); \
+ _argvec[6] = (unsigned long)(arg6); \
+ __asm__ volatile( \
+- "subu $29, $29, 8 \n\t" \
+- "sw $gp, 0($sp) \n\t" \
+- "sw $ra, 4($sp) \n\t" \
+- "lw $a0, 20(%1) \n\t" \
+- "subu $sp, $sp, 32\n\t" \
+- "sw $a0, 16($sp) \n\t" \
+- "lw $a0, 24(%1) \n\t" \
+- "nop\n\t" \
+- "sw $a0, 20($sp) \n\t" \
+- "lw $a0, 4(%1) \n\t" \
+- "lw $a1, 8(%1) \n\t" \
+- "lw $a2, 12(%1) \n\t" \
+- "lw $a3, 16(%1) \n\t" \
+- "lw $t9, 0(%1) \n\t" /* target->t9 */ \
++ "ld $4, 8(%1)\n\t" \
++ "ld $5, 16(%1)\n\t" \
++ "ld $6, 24(%1)\n\t" \
++ "ld $7, 32(%1)\n\t" \
++ "ld $8, 40(%1)\n\t" \
++ "ld $9, 48(%1)\n\t" \
++ "ld $25, 0(%1)\n\t" /* target->t9 */ \
+ VALGRIND_CALL_NOREDIR_T9 \
+- "addu $sp, $sp, 32 \n\t" \
+- "lw $gp, 0($sp) \n\t" \
+- "lw $ra, 4($sp) \n\t" \
+- "addu $sp, $sp, 8 \n\t" \
+- "move %0, $v0\n" \
++ "move %0, $2\n" \
+ : /*out*/ "=r" (_res) \
+- : /*in*/ "0" (&_argvec[0]) \
+- : /*trash*/ "cc", "memory", __CALLER_SAVED_REGS \
++ : /*in*/ "r" (&_argvec[0]) \
++ : /*trash*/ "memory", __CALLER_SAVED_REGS \
+ ); \
+ lval = (__typeof__(lval)) _res; \
+ } while (0)
+@@ -4128,30 +5854,19 @@ typedef
+ _argvec[6] = (unsigned long)(arg6); \
+ _argvec[7] = (unsigned long)(arg7); \
+ __asm__ volatile( \
+- "subu $29, $29, 8 \n\t" \
+- "sw $gp, 0($sp) \n\t" \
+- "sw $ra, 4($sp) \n\t" \
+- "lw $a0, 20(%1) \n\t" \
+- "subu $sp, $sp, 32\n\t" \
+- "sw $a0, 16($sp) \n\t" \
+- "lw $a0, 24(%1) \n\t" \
+- "sw $a0, 20($sp) \n\t" \
+- "lw $a0, 28(%1) \n\t" \
+- "sw $a0, 24($sp) \n\t" \
+- "lw $a0, 4(%1) \n\t" \
+- "lw $a1, 8(%1) \n\t" \
+- "lw $a2, 12(%1) \n\t" \
+- "lw $a3, 16(%1) \n\t" \
+- "lw $t9, 0(%1) \n\t" /* target->t9 */ \
++ "ld $4, 8(%1)\n\t" \
++ "ld $5, 16(%1)\n\t" \
++ "ld $6, 24(%1)\n\t" \
++ "ld $7, 32(%1)\n\t" \
++ "ld $8, 40(%1)\n\t" \
++ "ld $9, 48(%1)\n\t" \
++ "ld $10, 56(%1)\n\t" \
++ "ld $25, 0(%1) \n\t" /* target->t9 */ \
+ VALGRIND_CALL_NOREDIR_T9 \
+- "addu $sp, $sp, 32 \n\t" \
+- "lw $gp, 0($sp) \n\t" \
+- "lw $ra, 4($sp) \n\t" \
+- "addu $sp, $sp, 8 \n\t" \
+- "move %0, $v0\n" \
++ "move %0, $2\n" \
+ : /*out*/ "=r" (_res) \
+- : /*in*/ "0" (&_argvec[0]) \
+- : /*trash*/ "cc", "memory", __CALLER_SAVED_REGS \
++ : /*in*/ "r" (&_argvec[0]) \
++ : /*trash*/ "memory", __CALLER_SAVED_REGS \
+ ); \
+ lval = (__typeof__(lval)) _res; \
+ } while (0)
+@@ -4172,32 +5887,20 @@ typedef
+ _argvec[7] = (unsigned long)(arg7); \
+ _argvec[8] = (unsigned long)(arg8); \
+ __asm__ volatile( \
+- "subu $29, $29, 8 \n\t" \
+- "sw $gp, 0($sp) \n\t" \
+- "sw $ra, 4($sp) \n\t" \
+- "lw $a0, 20(%1) \n\t" \
+- "subu $sp, $sp, 40\n\t" \
+- "sw $a0, 16($sp) \n\t" \
+- "lw $a0, 24(%1) \n\t" \
+- "sw $a0, 20($sp) \n\t" \
+- "lw $a0, 28(%1) \n\t" \
+- "sw $a0, 24($sp) \n\t" \
+- "lw $a0, 32(%1) \n\t" \
+- "sw $a0, 28($sp) \n\t" \
+- "lw $a0, 4(%1) \n\t" \
+- "lw $a1, 8(%1) \n\t" \
+- "lw $a2, 12(%1) \n\t" \
+- "lw $a3, 16(%1) \n\t" \
+- "lw $t9, 0(%1) \n\t" /* target->t9 */ \
++ "ld $4, 8(%1)\n\t" \
++ "ld $5, 16(%1)\n\t" \
++ "ld $6, 24(%1)\n\t" \
++ "ld $7, 32(%1)\n\t" \
++ "ld $8, 40(%1)\n\t" \
++ "ld $9, 48(%1)\n\t" \
++ "ld $10, 56(%1)\n\t" \
++ "ld $11, 64(%1)\n\t" \
++ "ld $25, 0(%1) \n\t" /* target->t9 */ \
+ VALGRIND_CALL_NOREDIR_T9 \
+- "addu $sp, $sp, 40 \n\t" \
+- "lw $gp, 0($sp) \n\t" \
+- "lw $ra, 4($sp) \n\t" \
+- "addu $sp, $sp, 8 \n\t" \
+- "move %0, $v0\n" \
++ "move %0, $2\n" \
+ : /*out*/ "=r" (_res) \
+- : /*in*/ "0" (&_argvec[0]) \
+- : /*trash*/ "cc", "memory", __CALLER_SAVED_REGS \
++ : /*in*/ "r" (&_argvec[0]) \
++ : /*trash*/ "memory", __CALLER_SAVED_REGS \
+ ); \
+ lval = (__typeof__(lval)) _res; \
+ } while (0)
+@@ -4219,34 +5922,24 @@ typedef
+ _argvec[8] = (unsigned long)(arg8); \
+ _argvec[9] = (unsigned long)(arg9); \
+ __asm__ volatile( \
+- "subu $29, $29, 8 \n\t" \
+- "sw $gp, 0($sp) \n\t" \
+- "sw $ra, 4($sp) \n\t" \
+- "lw $a0, 20(%1) \n\t" \
+- "subu $sp, $sp, 40\n\t" \
+- "sw $a0, 16($sp) \n\t" \
+- "lw $a0, 24(%1) \n\t" \
+- "sw $a0, 20($sp) \n\t" \
+- "lw $a0, 28(%1) \n\t" \
+- "sw $a0, 24($sp) \n\t" \
+- "lw $a0, 32(%1) \n\t" \
+- "sw $a0, 28($sp) \n\t" \
+- "lw $a0, 36(%1) \n\t" \
+- "sw $a0, 32($sp) \n\t" \
+- "lw $a0, 4(%1) \n\t" \
+- "lw $a1, 8(%1) \n\t" \
+- "lw $a2, 12(%1) \n\t" \
+- "lw $a3, 16(%1) \n\t" \
+- "lw $t9, 0(%1) \n\t" /* target->t9 */ \
++ "dsubu $29, $29, 8\n\t" \
++ "ld $4, 72(%1)\n\t" \
++ "sd $4, 0($29)\n\t" \
++ "ld $4, 8(%1)\n\t" \
++ "ld $5, 16(%1)\n\t" \
++ "ld $6, 24(%1)\n\t" \
++ "ld $7, 32(%1)\n\t" \
++ "ld $8, 40(%1)\n\t" \
++ "ld $9, 48(%1)\n\t" \
++ "ld $10, 56(%1)\n\t" \
++ "ld $11, 64(%1)\n\t" \
++ "ld $25, 0(%1)\n\t" /* target->t9 */ \
+ VALGRIND_CALL_NOREDIR_T9 \
+- "addu $sp, $sp, 40 \n\t" \
+- "lw $gp, 0($sp) \n\t" \
+- "lw $ra, 4($sp) \n\t" \
+- "addu $sp, $sp, 8 \n\t" \
+- "move %0, $v0\n" \
++ "daddu $29, $29, 8\n\t" \
++ "move %0, $2\n" \
+ : /*out*/ "=r" (_res) \
+- : /*in*/ "0" (&_argvec[0]) \
+- : /*trash*/ "cc", "memory", __CALLER_SAVED_REGS \
++ : /*in*/ "r" (&_argvec[0]) \
++ : /*trash*/ "memory", __CALLER_SAVED_REGS \
+ ); \
+ lval = (__typeof__(lval)) _res; \
+ } while (0)
+@@ -4269,36 +5962,26 @@ typedef
+ _argvec[9] = (unsigned long)(arg9); \
+ _argvec[10] = (unsigned long)(arg10); \
+ __asm__ volatile( \
+- "subu $29, $29, 8 \n\t" \
+- "sw $gp, 0($sp) \n\t" \
+- "sw $ra, 4($sp) \n\t" \
+- "lw $a0, 20(%1) \n\t" \
+- "subu $sp, $sp, 48\n\t" \
+- "sw $a0, 16($sp) \n\t" \
+- "lw $a0, 24(%1) \n\t" \
+- "sw $a0, 20($sp) \n\t" \
+- "lw $a0, 28(%1) \n\t" \
+- "sw $a0, 24($sp) \n\t" \
+- "lw $a0, 32(%1) \n\t" \
+- "sw $a0, 28($sp) \n\t" \
+- "lw $a0, 36(%1) \n\t" \
+- "sw $a0, 32($sp) \n\t" \
+- "lw $a0, 40(%1) \n\t" \
+- "sw $a0, 36($sp) \n\t" \
+- "lw $a0, 4(%1) \n\t" \
+- "lw $a1, 8(%1) \n\t" \
+- "lw $a2, 12(%1) \n\t" \
+- "lw $a3, 16(%1) \n\t" \
+- "lw $t9, 0(%1) \n\t" /* target->t9 */ \
++ "dsubu $29, $29, 16\n\t" \
++ "ld $4, 72(%1)\n\t" \
++ "sd $4, 0($29)\n\t" \
++ "ld $4, 80(%1)\n\t" \
++ "sd $4, 8($29)\n\t" \
++ "ld $4, 8(%1)\n\t" \
++ "ld $5, 16(%1)\n\t" \
++ "ld $6, 24(%1)\n\t" \
++ "ld $7, 32(%1)\n\t" \
++ "ld $8, 40(%1)\n\t" \
++ "ld $9, 48(%1)\n\t" \
++ "ld $10, 56(%1)\n\t" \
++ "ld $11, 64(%1)\n\t" \
++ "ld $25, 0(%1)\n\t" /* target->t9 */ \
+ VALGRIND_CALL_NOREDIR_T9 \
+- "addu $sp, $sp, 48 \n\t" \
+- "lw $gp, 0($sp) \n\t" \
+- "lw $ra, 4($sp) \n\t" \
+- "addu $sp, $sp, 8 \n\t" \
+- "move %0, $v0\n" \
++ "daddu $29, $29, 16\n\t" \
++ "move %0, $2\n" \
+ : /*out*/ "=r" (_res) \
+- : /*in*/ "0" (&_argvec[0]) \
+- : /*trash*/ "cc", "memory", __CALLER_SAVED_REGS \
++ : /*in*/ "r" (&_argvec[0]) \
++ : /*trash*/ "memory", __CALLER_SAVED_REGS \
+ ); \
+ lval = (__typeof__(lval)) _res; \
+ } while (0)
+@@ -4323,38 +6006,28 @@ typedef
+ _argvec[10] = (unsigned long)(arg10); \
+ _argvec[11] = (unsigned long)(arg11); \
+ __asm__ volatile( \
+- "subu $29, $29, 8 \n\t" \
+- "sw $gp, 0($sp) \n\t" \
+- "sw $ra, 4($sp) \n\t" \
+- "lw $a0, 20(%1) \n\t" \
+- "subu $sp, $sp, 48\n\t" \
+- "sw $a0, 16($sp) \n\t" \
+- "lw $a0, 24(%1) \n\t" \
+- "sw $a0, 20($sp) \n\t" \
+- "lw $a0, 28(%1) \n\t" \
+- "sw $a0, 24($sp) \n\t" \
+- "lw $a0, 32(%1) \n\t" \
+- "sw $a0, 28($sp) \n\t" \
+- "lw $a0, 36(%1) \n\t" \
+- "sw $a0, 32($sp) \n\t" \
+- "lw $a0, 40(%1) \n\t" \
+- "sw $a0, 36($sp) \n\t" \
+- "lw $a0, 44(%1) \n\t" \
+- "sw $a0, 40($sp) \n\t" \
+- "lw $a0, 4(%1) \n\t" \
+- "lw $a1, 8(%1) \n\t" \
+- "lw $a2, 12(%1) \n\t" \
+- "lw $a3, 16(%1) \n\t" \
+- "lw $t9, 0(%1) \n\t" /* target->t9 */ \
++ "dsubu $29, $29, 24\n\t" \
++ "ld $4, 72(%1)\n\t" \
++ "sd $4, 0($29)\n\t" \
++ "ld $4, 80(%1)\n\t" \
++ "sd $4, 8($29)\n\t" \
++ "ld $4, 88(%1)\n\t" \
++ "sd $4, 16($29)\n\t" \
++ "ld $4, 8(%1)\n\t" \
++ "ld $5, 16(%1)\n\t" \
++ "ld $6, 24(%1)\n\t" \
++ "ld $7, 32(%1)\n\t" \
++ "ld $8, 40(%1)\n\t" \
++ "ld $9, 48(%1)\n\t" \
++ "ld $10, 56(%1)\n\t" \
++ "ld $11, 64(%1)\n\t" \
++ "ld $25, 0(%1)\n\t" /* target->t9 */ \
+ VALGRIND_CALL_NOREDIR_T9 \
+- "addu $sp, $sp, 48 \n\t" \
+- "lw $gp, 0($sp) \n\t" \
+- "lw $ra, 4($sp) \n\t" \
+- "addu $sp, $sp, 8 \n\t" \
+- "move %0, $v0\n" \
++ "daddu $29, $29, 24\n\t" \
++ "move %0, $2\n" \
+ : /*out*/ "=r" (_res) \
+- : /*in*/ "0" (&_argvec[0]) \
+- : /*trash*/ "cc", "memory", __CALLER_SAVED_REGS \
++ : /*in*/ "r" (&_argvec[0]) \
++ : /*trash*/ "memory", __CALLER_SAVED_REGS \
+ ); \
+ lval = (__typeof__(lval)) _res; \
+ } while (0)
+@@ -4380,45 +6053,35 @@ typedef
+ _argvec[11] = (unsigned long)(arg11); \
+ _argvec[12] = (unsigned long)(arg12); \
+ __asm__ volatile( \
+- "subu $29, $29, 8 \n\t" \
+- "sw $gp, 0($sp) \n\t" \
+- "sw $ra, 4($sp) \n\t" \
+- "lw $a0, 20(%1) \n\t" \
+- "subu $sp, $sp, 56\n\t" \
+- "sw $a0, 16($sp) \n\t" \
+- "lw $a0, 24(%1) \n\t" \
+- "sw $a0, 20($sp) \n\t" \
+- "lw $a0, 28(%1) \n\t" \
+- "sw $a0, 24($sp) \n\t" \
+- "lw $a0, 32(%1) \n\t" \
+- "sw $a0, 28($sp) \n\t" \
+- "lw $a0, 36(%1) \n\t" \
+- "sw $a0, 32($sp) \n\t" \
+- "lw $a0, 40(%1) \n\t" \
+- "sw $a0, 36($sp) \n\t" \
+- "lw $a0, 44(%1) \n\t" \
+- "sw $a0, 40($sp) \n\t" \
+- "lw $a0, 48(%1) \n\t" \
+- "sw $a0, 44($sp) \n\t" \
+- "lw $a0, 4(%1) \n\t" \
+- "lw $a1, 8(%1) \n\t" \
+- "lw $a2, 12(%1) \n\t" \
+- "lw $a3, 16(%1) \n\t" \
+- "lw $t9, 0(%1) \n\t" /* target->t9 */ \
++ "dsubu $29, $29, 32\n\t" \
++ "ld $4, 72(%1)\n\t" \
++ "sd $4, 0($29)\n\t" \
++ "ld $4, 80(%1)\n\t" \
++ "sd $4, 8($29)\n\t" \
++ "ld $4, 88(%1)\n\t" \
++ "sd $4, 16($29)\n\t" \
++ "ld $4, 96(%1)\n\t" \
++ "sd $4, 24($29)\n\t" \
++ "ld $4, 8(%1)\n\t" \
++ "ld $5, 16(%1)\n\t" \
++ "ld $6, 24(%1)\n\t" \
++ "ld $7, 32(%1)\n\t" \
++ "ld $8, 40(%1)\n\t" \
++ "ld $9, 48(%1)\n\t" \
++ "ld $10, 56(%1)\n\t" \
++ "ld $11, 64(%1)\n\t" \
++ "ld $25, 0(%1)\n\t" /* target->t9 */ \
+ VALGRIND_CALL_NOREDIR_T9 \
+- "addu $sp, $sp, 56 \n\t" \
+- "lw $gp, 0($sp) \n\t" \
+- "lw $ra, 4($sp) \n\t" \
+- "addu $sp, $sp, 8 \n\t" \
+- "move %0, $v0\n" \
++ "daddu $29, $29, 32\n\t" \
++ "move %0, $2\n" \
+ : /*out*/ "=r" (_res) \
+- : /*in*/ "0" (&_argvec[0]) \
+- : /*trash*/ "cc", "memory", __CALLER_SAVED_REGS \
++ : /*in*/ "r" (&_argvec[0]) \
++ : /*trash*/ "memory", __CALLER_SAVED_REGS \
+ ); \
+ lval = (__typeof__(lval)) _res; \
+ } while (0)
+
+-#endif /* PLAT_mips32_linux */
++#endif /* PLAT_mips64_linux */
+
+
+ /* ------------------------------------------------------------------ */
+@@ -4464,8 +6127,8 @@ typedef
+ errors. */
+ VG_USERREQ__COUNT_ERRORS = 0x1201,
+
+- /* Allows a string (gdb monitor command) to be passed to the tool
+- Used for interaction with vgdb/gdb */
++ /* Allows the client program and/or gdbserver to execute a monitor
++ command. */
+ VG_USERREQ__GDB_MONITOR_COMMAND = 0x1202,
+
+ /* These are useful and can be interpreted by any tool that
+@@ -4562,14 +6225,14 @@ VALGRIND_PRINTF(const char *format, ...)
+ #if defined(NVALGRIND)
+ return 0;
+ #else /* NVALGRIND */
+-#if defined(_MSC_VER)
++#if defined(_MSC_VER) || defined(__MINGW64__)
+ uintptr_t _qzz_res;
+ #else
+ unsigned long _qzz_res;
+ #endif
+ va_list vargs;
+ va_start(vargs, format);
+-#if defined(_MSC_VER)
++#if defined(_MSC_VER) || defined(__MINGW64__)
+ _qzz_res = VALGRIND_DO_CLIENT_REQUEST_EXPR(0,
+ VG_USERREQ__PRINTF_VALIST_BY_REF,
+ (uintptr_t)format,
+@@ -4600,14 +6263,14 @@ VALGRIND_PRINTF_BACKTRACE(const char *format, ...)
+ #if defined(NVALGRIND)
+ return 0;
+ #else /* NVALGRIND */
+-#if defined(_MSC_VER)
++#if defined(_MSC_VER) || defined(__MINGW64__)
+ uintptr_t _qzz_res;
+ #else
+ unsigned long _qzz_res;
+ #endif
+ va_list vargs;
+ va_start(vargs, format);
+-#if defined(_MSC_VER)
++#if defined(_MSC_VER) || defined(__MINGW64__)
+ _qzz_res = VALGRIND_DO_CLIENT_REQUEST_EXPR(0,
+ VG_USERREQ__PRINTF_BACKTRACE_VALIST_BY_REF,
+ (uintptr_t)format,
+@@ -4844,7 +6507,9 @@ VALGRIND_PRINTF_BACKTRACE(const char *format, ...)
+ VG_USERREQ__MEMPOOL_EXISTS, \
+ pool, 0, 0, 0, 0)
+
+-/* Mark a piece of memory as being a stack. Returns a stack id. */
++/* Mark a piece of memory as being a stack. Returns a stack id.
++ start is the lowest addressable stack byte, end is the highest
++ addressable stack byte. */
+ #define VALGRIND_STACK_REGISTER(start, end) \
+ (unsigned)VALGRIND_DO_CLIENT_REQUEST_EXPR(0, \
+ VG_USERREQ__STACK_REGISTER, \
+@@ -4856,7 +6521,9 @@ VALGRIND_PRINTF_BACKTRACE(const char *format, ...)
+ VALGRIND_DO_CLIENT_REQUEST_STMT(VG_USERREQ__STACK_DEREGISTER, \
+ id, 0, 0, 0, 0)
+
+-/* Change the start and end address of the stack id. */
++/* Change the start and end address of the stack id.
++ start is the new lowest addressable stack byte, end is the new highest
++ addressable stack byte. */
+ #define VALGRIND_STACK_CHANGE(id, start, end) \
+ VALGRIND_DO_CLIENT_REQUEST_STMT(VG_USERREQ__STACK_CHANGE, \
+ id, start, end, 0, 0)
+@@ -4893,15 +6560,28 @@ VALGRIND_PRINTF_BACKTRACE(const char *format, ...)
+ VALGRIND_DO_CLIENT_REQUEST_STMT(VG_USERREQ__CHANGE_ERR_DISABLEMENT, \
+ -1, 0, 0, 0, 0)
+
++/* Execute a monitor command from the client program.
++ If a connection is opened with GDB, the output will be sent
++ according to the output mode set for vgdb.
++ If no connection is opened, output will go to the log output.
++ Returns 1 if command not recognised, 0 otherwise. */
++#define VALGRIND_MONITOR_COMMAND(command) \
++ VALGRIND_DO_CLIENT_REQUEST_EXPR(0, VG_USERREQ__GDB_MONITOR_COMMAND, \
++ command, 0, 0, 0, 0)
++
++
+ #undef PLAT_x86_darwin
+ #undef PLAT_amd64_darwin
+ #undef PLAT_x86_win32
++#undef PLAT_amd64_win64
+ #undef PLAT_x86_linux
+ #undef PLAT_amd64_linux
+ #undef PLAT_ppc32_linux
+-#undef PLAT_ppc64_linux
++#undef PLAT_ppc64be_linux
++#undef PLAT_ppc64le_linux
+ #undef PLAT_arm_linux
+ #undef PLAT_s390x_linux
+ #undef PLAT_mips32_linux
++#undef PLAT_mips64_linux
+
+ #endif /* __VALGRIND_H */
diff --git a/wine-mono.spec b/wine-mono.spec
index d3c30d9..164fc72 100644
--- a/wine-mono.spec
+++ b/wine-mono.spec
@@ -2,7 +2,7 @@
Name: wine-mono
Version: 4.5.4
-Release: 1%{?dist}
+Release: 2%{?dist}
Summary: Mono library required for Wine
License: GPLv2 and LGPLv2 and MIT and BSD and MS-PL and MPLv1.1
@@ -10,6 +10,8 @@ Group: Development/Libraries
URL: http://wiki.winehq.org/Mono
Source0: http://sourceforge.net/projects/wine/files/Wine%20Mono/%{version}/%{name}-%{version}.tar.gz
Patch0: wine-mono-build-msifilename.patch
+# https://github.com/mono/mono/commit/1445d4821c8091c395264542344dca9df22a2c82
+Patch1: wine-mono-valgrind.patch
# see git://github.com/madewokherd/wine-mono
@@ -49,6 +51,7 @@ Windows Mono library required for Wine.
%prep
%setup -q
%patch0 -p1 -b.msifilename
+%patch1 -dmono -p1 -b.valgrind
%build
# make sure this builds on x86-64
@@ -90,6 +93,9 @@ cp mono-basic/LICENSE mono-basic-LICENSE
%{_datadir}/wine/mono/wine-mono-%{version}.msi
%changelog
+* Thu Feb 05 2015 Michael Cronenworth <mike at cchtml.com> - 4.5.4-2
+- Update bundled valgrind headers (#1141584)
+
* Fri Nov 14 2014 Andreas Bierfert <andreas.bierfert at lowlatency.de>
- 4.5.4-1
- version upgrade
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