[OT]Re: Well supported, reliable NICs for Redhat Linux/Fedora?

[Xose Vazquez Perez]

this thread is a little off-topic here. Sorry

Robert L Cochran wrote:

> Xose Vazquez Perez wrote:

>> A RealTek RTL-8139C+ clone is cheaper. But it must be C+, only _8139_
>> are shit. The driver is 8139cp.

> I've never had a problem with any of the recent Realtek chips. They just
> work. I guess I'm using a really recent chipset!

Yes, RealTek NICs work. But RTL-8139 based has a _very_ bad design.
FreeBSD driver has more information:

/*
 * The RealTek 8139 PCI NIC redefines the meaning of 'low end.' This is
 * probably the worst PCI ethernet controller ever made, with the possible
 * exception of the FEAST chip made by SMC. The 8139 supports bus-master
 * DMA, but it has a terrible interface that nullifies any performance
 * gains that bus-master DMA usually offers.
 *
 * For transmission, the chip offers a series of four TX descriptor
 * registers. Each transmit frame must be in a contiguous buffer, aligned
 * on a longword (32-bit) boundary. This means we almost always have to
 * do mbuf copies in order to transmit a frame, except in the unlikely
 * case where a) the packet fits into a single mbuf, and b) the packet
 * is 32-bit aligned within the mbuf's data area. The presence of only
 * four descriptor registers means that we can never have more than four
 * packets queued for transmission at any one time.
 *
 * Reception is not much better. The driver has to allocate a single large
 * buffer area (up to 64K in size) into which the chip will DMA received
 * frames. Because we don't know where within this region received packets
 * will begin or end, we have no choice but to copy data from the buffer
 * area into mbufs in order to pass the packets up to the higher protocol
 * levels.
 *
 * It's impossible given this rotten design to really achieve decent
 * performance at 100Mbps, unless you happen to have a 400Mhz PII or
 * some equally overmuscled CPU to drive it.
 * [...]
 * Fast forward a few years. RealTek now has a new chip called the
 * 8139C+ which at long last implements descriptor-based DMA. Not
 * only that, it supports RX and TX TCP/IP checksum offload, VLAN
 * tagging and insertion, TCP large send and 64-bit addressing.
 * Better still, it allows arbitrary byte alignments for RX and
 * TX buffers, meaning no copying is necessary on any architecture.
 * There are a few limitations however: the RX and TX descriptor
 * rings must be aligned on 256 byte boundaries, they must be in
 * contiguous RAM, and each ring can have a maximum of 64 descriptors.
 * There are two TX descriptor queues: one normal priority and one
 * high. Descriptor ring addresses and DMA buffer addresses are
 * 64 bits wide. The 8139C+ is also backwards compatible with the
 * 8139, so the chip will still function with older drivers: C+
 * mode has to be enabled by setting the appropriate bits in the C+
 * command register. The PHY access mechanism appears to be unchanged.
 *
 [...]

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