P4s, Athlons and bandwidth

[Jean Francois Martinez]

Given that most/all of the recent boxes (ie the ones doing the real
work) are P4s and Athlons it is time RedHat stopped compiling
with -mcpu=i686 and started optimizing for the P4: -mcpu=p4

Another point is that there is no such thing like low-level glibc
functions for the P4 and the Athlon.  The highest targetted
processor is the PIII.  However documents in AMD's web site show
that moving data (ie memcpy and friends) can be made several times
faster if using 3DNow instructions and data prefetching, I gave only
a cursory glance to the assembler parts of glibc but it didn't look
like those parts (targetting the PIII) would be even remotely ideal
for the Athlon.  Same thing about the P4.

Would it be possible for RedHat to contact those with an interest ie
AMD/Intel in order to get high-pedrformance assembly versions of those
low level routines?  Or failing that to have them written by an
employee?


-- 
Jean Francois Martinez <jfm512(a)free.fr&gt;