On Tue, Jul 26, 2016 at 12:05:23PM -0400, Przemek Klosowski wrote:
Why are the proprietary bits in this case problematic, if we have
proprietary bits in the context of module (e.g. wireless) firmware
and CPU microcode patches?
Right, in fact the proprietary bits have a firmware-like license as
was pointed out to me in this comment:
https://rwmj.wordpress.com/2016/07/26/risc-v-on-an-fpga-pt-5/#comments
So subject to legal review of that license, maybe we can treat it as
firmware.
By the way, while the FPGA bitstream generation in general is still
highly proprietary, there is a break in the wall: Clifford Wolff
developed an open-source FPGA toolchain for Lattice iCE40 FPGAs
http://www.clifford.at/icestorm/ .
Now, iCE40 is a fairly simple FPGA---that's why it was possible to
develop a non-proprietary toolchain for it. I am not sure what
limitations it imposes on the RISC-V flavor that fits on
it----Clifford has compiled PicoRV32 which I think is not suitable
to run Linux, but I am sure the rest is just a SMOP :)
https://github.com/cliffordwolf/icotools/tree/master/icosoc
Yes, hopefully this will develop into something we can use one day.
Right now the Artix-7 model that I'm using has > 100K cells, whereas
even the top of the line iCE40 has 7680. (But hey, the first ever
FPGA I used had 32, so we've come a long way.) Plus there are other
things in the Artix-7 that we use like the DDR3 RAM interface and the
UART, and in future one hopes the ethernet & VGA.
By this time next year it may be that lowRISC will have produced
actual silicon -- a 4-core Rocket + 8 "minion" mini cores
(
https://speakerdeck.com/asb/lowrisc-plans-for-risc-v-in-2016)
Architecturally this is going to be a strange bit of kit, because in
order to do any I/O (even a serial port) you will have to use the
minion cores, each running a mini OS. Linux cannot run on those
cores. The lowRISC plan is to run a NetBSD-based unikernel. I don't
know how (or if) we'd deal with that in Fedora.
Rich.
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